From: Scott Wood <scottwood@freescale.com>
To: Bharat Bhushan <r65777@freescale.com>
Cc: Bharat Bhushan <bharat.bhushan@freescale.com>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org, afaerber@suse.de,
agraf@suse.de
Subject: Re: [Qemu-devel] [PATCH 2/2 v2] Adding BAR0 for e500 PCI controller
Date: Tue, 9 Oct 2012 17:37:56 -0500 [thread overview]
Message-ID: <1349822276.26044.14@snotra> (raw)
In-Reply-To: <1349806750-17652-3-git-send-email-Bharat.Bhushan@freescale.com> (from r65777@freescale.com on Tue Oct 9 13:19:10 2012)
On 10/09/2012 01:19:10 PM, Bharat Bhushan wrote:
> +static int e500_ccsr_initfn(SysBusDevice *dev)
> +{
> + PPCE500CCSRState *pci_ccsr;
> +
> + pci_ccsr = CCSR(dev);
> + memory_region_init(&pci_ccsr->ccsr_space, "e500-ccsr",
> + MPC8544_CCSRBAR_SIZE);
> + return 0;
> +}
Is this object supposed to represent CCSR (which is what the type name
seems to imply, along with the existence of a different
PPCE500PCIBridgeState) or PCI BAR0 (which is what pci_ccsr seems to
imply, along with the fact that it's being added in the PCI patch)?
-Scott
next prev parent reply other threads:[~2012-10-09 22:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-09 18:19 [Qemu-devel] [PATCH 0/2 v2] e500: creating CCSR region and registering bar0 Bharat Bhushan
2012-10-09 18:19 ` [Qemu-devel] [PATCH 1/2 v2] e500: Adding CCSR memory region Bharat Bhushan
2012-10-09 18:47 ` Andreas Färber
2012-10-09 18:19 ` [Qemu-devel] [PATCH 2/2 v2] Adding BAR0 for e500 PCI controller Bharat Bhushan
2012-10-09 18:45 ` Andreas Färber
2012-10-09 22:37 ` Scott Wood [this message]
2012-10-10 1:22 ` Bhushan Bharat-R65777
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