* [PATCH V2 1/3] ARM: tegra: simplify DEBUG_LL UART selection options
@ 2012-10-15 19:07 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-15 19:07 UTC (permalink / raw)
To: Rob Herring, Olof Johansson, Arnd Bergmann
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more:
* No upstream bootloader currently or will ever support this option.
* CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative.
Merge the fixed and automatic UART selection menus into a single choice
for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART,
rather than potentially having an AUTO option override whatever fixed
option was chosen.
Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART,
simply don't turn on DEBUG_LL. NONE used to be the default option, so
pick AUTO_ODMDATA as the new default.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
v2:
* Remove redundant default selection in mach-tegra/Kconfig
* Rebase on iomap.h/irammap.h moves
arch/arm/mach-tegra/Kconfig | 40 ++++---------------
arch/arm/mach-tegra/common.c | 5 +-
arch/arm/mach-tegra/include/mach/uncompress.h | 52 ++-----------------------
arch/arm/mach-tegra/iomap.h | 14 -------
4 files changed, 15 insertions(+), 96 deletions(-)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 9ff6f6e..97fcd16 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -58,11 +58,16 @@ config TEGRA_AHB
perfomance parameters(priority, prefech size).
choice
- prompt "Default low-level debug console UART"
- default TEGRA_DEBUG_UART_NONE
+ prompt "Low-level debug console UART"
-config TEGRA_DEBUG_UART_NONE
- bool "None"
+config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
config TEGRA_DEBUG_UARTA
bool "UART-A"
@@ -81,33 +86,6 @@ config TEGRA_DEBUG_UARTE
endchoice
-choice
- prompt "Automatic low-level debug console UART"
- default TEGRA_DEBUG_UART_AUTO_NONE
-
-config TEGRA_DEBUG_UART_AUTO_NONE
- bool "None"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UART_AUTO_SCRATCH
- bool "Via UART scratch register"
- help
- Automatically determines which UART to use for low-level debug based
- on the UART scratch register value. Some bootloaders put ASCII 'D'
- in this register when they initialize their own console UART output.
- Using this option allows the kernel to automatically pick the same
- UART.
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index f688daa..b493d64 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,14 +44,13 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-#define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF)
u32 tegra_uart_config[3] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
- (u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET),
+ 0,
/* Debug UART virtual address */
- (u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET),
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 2772575..4150c71 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -139,51 +139,19 @@ int auto_odmdata(void)
}
#endif
-#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH
-int auto_scratch(void)
-{
- int i;
-
- /*
- * Look for the first UART that:
- * a) Is not in reset.
- * b) Is clocked.
- * c) Has a 'D' in the scratchpad register.
- *
- * Note that on Tegra30, the first two conditions are required, since
- * if not true, accesses to the UART scratch register will hang.
- * Tegra20 doesn't have this issue.
- *
- * The intent is that the bootloader will tell the kernel which UART
- * to use by setting up those conditions. If nothing found, we'll fall
- * back to what's specified in TEGRA_DEBUG_UART_BASE.
- */
- for (i = 0; i < ARRAY_SIZE(uarts); i++) {
- if (!uart_clocked(i))
- continue;
-
- uart = (volatile u8 *)uarts[i].base;
- if (uart[UART_SCR << DEBUG_UART_SHIFT] != 'D')
- continue;
-
- return i;
- }
-
- return -1;
-}
-#endif
-
/*
* Setup before decompression. This is where we do UART selection for
* earlyprintk and init the uart_base register.
*/
static inline void arch_decomp_setup(void)
{
- int uart_id, auto_uart_id;
+ int uart_id;
volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;
u32 chip, div;
-#if defined(CONFIG_TEGRA_DEBUG_UARTA)
+#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ uart_id = auto_odmdata();
+#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
uart_id = 0;
#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
uart_id = 1;
@@ -193,19 +161,7 @@ static inline void arch_decomp_setup(void)
uart_id = 3;
#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
uart_id = 4;
-#else
- uart_id = -1;
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- auto_uart_id = auto_odmdata();
-#elif defined(CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH)
- auto_uart_id = auto_scratch();
-#else
- auto_uart_id = -1;
#endif
- if (auto_uart_id != -1)
- uart_id = auto_uart_id;
if (uart_id < 0 || uart_id >= ARRAY_SIZE(uarts) ||
!uart_clocked(uart_id))
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index 5315103..db8be51 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -261,20 +261,6 @@
#define TEGRA_SDMMC4_BASE 0xC8000600
#define TEGRA_SDMMC4_SIZE SZ_512
-#if defined(CONFIG_TEGRA_DEBUG_UART_NONE)
-# define TEGRA_DEBUG_UART_BASE 0
-#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTA_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTB_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTC)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTC_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTD)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTD_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
-#endif
-
/* On TEGRA, many peripherals are very closely packed in
* two 256MB io windows (that actually only use about 64KB
* at the start of each).
--
1.7.0.4
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH V2 1/3] ARM: tegra: simplify DEBUG_LL UART selection options
@ 2012-10-15 19:07 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more:
* No upstream bootloader currently or will ever support this option.
* CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative.
Merge the fixed and automatic UART selection menus into a single choice
for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART,
rather than potentially having an AUTO option override whatever fixed
option was chosen.
Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART,
simply don't turn on DEBUG_LL. NONE used to be the default option, so
pick AUTO_ODMDATA as the new default.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Remove redundant default selection in mach-tegra/Kconfig
* Rebase on iomap.h/irammap.h moves
arch/arm/mach-tegra/Kconfig | 40 ++++---------------
arch/arm/mach-tegra/common.c | 5 +-
arch/arm/mach-tegra/include/mach/uncompress.h | 52 ++-----------------------
arch/arm/mach-tegra/iomap.h | 14 -------
4 files changed, 15 insertions(+), 96 deletions(-)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 9ff6f6e..97fcd16 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -58,11 +58,16 @@ config TEGRA_AHB
perfomance parameters(priority, prefech size).
choice
- prompt "Default low-level debug console UART"
- default TEGRA_DEBUG_UART_NONE
+ prompt "Low-level debug console UART"
-config TEGRA_DEBUG_UART_NONE
- bool "None"
+config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
config TEGRA_DEBUG_UARTA
bool "UART-A"
@@ -81,33 +86,6 @@ config TEGRA_DEBUG_UARTE
endchoice
-choice
- prompt "Automatic low-level debug console UART"
- default TEGRA_DEBUG_UART_AUTO_NONE
-
-config TEGRA_DEBUG_UART_AUTO_NONE
- bool "None"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UART_AUTO_SCRATCH
- bool "Via UART scratch register"
- help
- Automatically determines which UART to use for low-level debug based
- on the UART scratch register value. Some bootloaders put ASCII 'D'
- in this register when they initialize their own console UART output.
- Using this option allows the kernel to automatically pick the same
- UART.
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index f688daa..b493d64 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,14 +44,13 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-#define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF)
u32 tegra_uart_config[3] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
- (u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET),
+ 0,
/* Debug UART virtual address */
- (u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET),
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 2772575..4150c71 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -139,51 +139,19 @@ int auto_odmdata(void)
}
#endif
-#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH
-int auto_scratch(void)
-{
- int i;
-
- /*
- * Look for the first UART that:
- * a) Is not in reset.
- * b) Is clocked.
- * c) Has a 'D' in the scratchpad register.
- *
- * Note that on Tegra30, the first two conditions are required, since
- * if not true, accesses to the UART scratch register will hang.
- * Tegra20 doesn't have this issue.
- *
- * The intent is that the bootloader will tell the kernel which UART
- * to use by setting up those conditions. If nothing found, we'll fall
- * back to what's specified in TEGRA_DEBUG_UART_BASE.
- */
- for (i = 0; i < ARRAY_SIZE(uarts); i++) {
- if (!uart_clocked(i))
- continue;
-
- uart = (volatile u8 *)uarts[i].base;
- if (uart[UART_SCR << DEBUG_UART_SHIFT] != 'D')
- continue;
-
- return i;
- }
-
- return -1;
-}
-#endif
-
/*
* Setup before decompression. This is where we do UART selection for
* earlyprintk and init the uart_base register.
*/
static inline void arch_decomp_setup(void)
{
- int uart_id, auto_uart_id;
+ int uart_id;
volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;
u32 chip, div;
-#if defined(CONFIG_TEGRA_DEBUG_UARTA)
+#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ uart_id = auto_odmdata();
+#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
uart_id = 0;
#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
uart_id = 1;
@@ -193,19 +161,7 @@ static inline void arch_decomp_setup(void)
uart_id = 3;
#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
uart_id = 4;
-#else
- uart_id = -1;
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- auto_uart_id = auto_odmdata();
-#elif defined(CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH)
- auto_uart_id = auto_scratch();
-#else
- auto_uart_id = -1;
#endif
- if (auto_uart_id != -1)
- uart_id = auto_uart_id;
if (uart_id < 0 || uart_id >= ARRAY_SIZE(uarts) ||
!uart_clocked(uart_id))
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index 5315103..db8be51 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -261,20 +261,6 @@
#define TEGRA_SDMMC4_BASE 0xC8000600
#define TEGRA_SDMMC4_SIZE SZ_512
-#if defined(CONFIG_TEGRA_DEBUG_UART_NONE)
-# define TEGRA_DEBUG_UART_BASE 0
-#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTA_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTB_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTC)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTC_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTD)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTD_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
-#endif
-
/* On TEGRA, many peripherals are very closely packed in
* two 256MB io windows (that actually only use about 64KB
* at the start of each).
--
1.7.0.4
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH V2 2/3] ARM: tegra: make debug-macro.S work standalone
2012-10-15 19:07 ` Stephen Warren
@ 2012-10-15 19:07 ` Stephen Warren
-1 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-15 19:07 UTC (permalink / raw)
To: Rob Herring, Olof Johansson, Arnd Bergmann
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Prior to this change, Tegra's debug-macro.S relied on uncompress.h having
determined which UART to use, and whether it was safe to use the UART
(i.e. is it not in reset, and clocked). This determination was
communicated from uncompress.h to debug-macro.S using a few bytes of
Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h
was a required part of the kernel boot process; booting a non-compressed
kernel would not allow earlyprintk to operate.
This change duplicates the UART selection and validation logic into
debug-macro.S so that the reliance on uncompress.h is removed.
This also helps out with single-zImage work, since there is currently no
support for using any uncompress with single-zImage.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
v2:
* Rebase on iomap.h/irammap.h moves
arch/arm/mach-tegra/common.c | 4 +-
arch/arm/mach-tegra/include/mach/debug-macro.S | 151 ++++++++++++++++++++---
arch/arm/mach-tegra/include/mach/uncompress.h | 13 --
arch/arm/mach-tegra/irammap.h | 9 --
4 files changed, 134 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index b493d64..a57dd7a 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,13 +44,15 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-u32 tegra_uart_config[3] = {
+u32 tegra_uart_config[4] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
0,
/* Debug UART virtual address */
0,
+ /* Scratch space for debug macro */
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 44ca7b1..d4c23d6 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -27,7 +27,42 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
+
+#define UART_SHIFT 2
+
+#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
+#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
+#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
+#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
+#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
+#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
+#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
+#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+
+#define checkuart(rp, rv, lhu, bit, uart) \
+ /* Load address of CLK_RST register */ \
+ movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+ /* Load value from CLK_RST register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's reset bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If set, can't use UART; jump to save no UART */ \
+ bne 90f ; \
+ /* Load address of CLK_OUT_ENB register */ \
+ movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+ /* Load value from CLK_OUT_ENB register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's clock enable bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If clear, can't use UART; jump to save no UART */ \
+ beq 90f ; \
+ /* Passed all tests, load address of UART registers */ \
+ movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+ movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+ /* Jump to save UART address */ \
+ b 91f
.macro addruart, rp, rv, tmp
adr \rp, 99f @ actual addr of 99f
@@ -36,22 +71,101 @@
ldr \rp, [\rp, #4] @ linked tegra_uart_config
sub \tmp, \rp, \rv @ actual tegra_uart_config
ldr \rp, [\tmp] @ Load tegra_uart_config
- cmp \rp, #1 @ needs intitialization?
+ cmp \rp, #1 @ needs initialization?
bne 100f @ no; go load the addresses
mov \rv, #0 @ yes; record init is done
str \rv, [\tmp]
- mov \rp, #TEGRA_IRAM_BASE @ See if cookie is in IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET]
- movw \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE & 0xffff
- movt \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE >> 16
- cmp \rv, \rp @ Cookie present?
- bne 100f @ No, use default UART
- mov \rp, #TEGRA_IRAM_BASE @ Load UART address from IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET + 4]
- str \rv, [\tmp, #4] @ Store in tegra_uart_phys
- sub \rv, \rv, #IO_APB_PHYS @ Calculate virt address
+
+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
+ /* Check ODMDATA */
+10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
+ movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
+ ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
+ ubfx \rv, \rp, #18, #2 @ 19:18 are console type
+ cmp \rv, #2 @ 2 and 3 mean DCC, UART
+ beq 11f @ some boards swap the meaning
+ cmp \rv, #3 @ so accept either
+ bne 90f
+11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
+ cmp \rv, #0 @ UART 0?
+ beq 20f
+ cmp \rv, #1 @ UART 1?
+ beq 21f
+ cmp \rv, #2 @ UART 2?
+ beq 22f
+ cmp \rv, #3 @ UART 3?
+ beq 23f
+ cmp \rv, #4 @ UART 4?
+ beq 24f
+ b 90f @ invalid
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART A validity */
+20: checkuart(\rp, \rv, L, 6, A)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART B validity */
+21: checkuart(\rp, \rv, L, 7, B)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART C validity */
+22: checkuart(\rp, \rv, H, 23, C)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART D validity */
+23: checkuart(\rp, \rv, U, 1, D)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART E validity */
+24:
+ checkuart(\rp, \rv, U, 2, E)
+#endif
+
+ /* No valid UART found */
+90: mov \rp, #0
+ /* fall through */
+
+ /* Record whichever UART we chose */
+91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
+ cmp \rp, #0 @ Valid UART address?
+ bne 92f @ Yes, go process it
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ b 100f @ Done
+92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
add \rv, \rv, #IO_APB_VIRT
str \rv, [\tmp, #8] @ Store in tegra_uart_virt
+ movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
+ movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
+ ldr \rv, [\rv, #0] @ Load HIDREV
+ ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
+ cmp \rv, #0x20 @ Tegra20?
+ moveq \rv, #0x75 @ Tegra20 divisor
+ movne \rv, #0xdd @ Tegra30 divisor
+ str \rv, [\tmp, #12] @ Save divisor to scratch
+ /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
+ mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ /* uart[UART_DLL] = div & 0xff; */
+ ldr \rv, [\tmp, #12]
+ and \rv, \rv, #0xff
+ str \rv, [\rp, #UART_DLL << UART_SHIFT]
+ /* uart[UART_DLM] = div >> 8; */
+ ldr \rv, [\tmp, #12]
+ lsr \rv, \rv, #8
+ str \rv, [\rp, #UART_DLM << UART_SHIFT]
+ /* uart[UART_LCR] = UART_LCR_WLEN8; */
+ mov \rv, #UART_LCR_WLEN8
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
b 100f
.align
@@ -59,27 +173,24 @@
.word tegra_uart_config
.ltorg
+ /* Load previously selected UART address */
100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
.endm
-#define UART_SHIFT 2
-
/*
* Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
- * check to make sure that we aren't in the CONFIG_TEGRA_DEBUG_UART_NONE case.
- * We use the fact that all 5 valid UART addresses all have something in the
- * 2nd-to-lowest byte.
+ * check to make sure that the UART address is actually valid.
*/
.macro senduart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
strneb \rd, [\rx, #UART_TX << UART_SHIFT]
1001:
.endm
.macro busyuart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
@@ -90,7 +201,7 @@
.macro waituart, rd, rx
#ifdef FLOW_CONTROL
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 4150c71..485003f 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -29,7 +29,6 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
#define BIT(x) (1 << (x))
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
@@ -52,17 +51,6 @@ static inline void flush(void)
{
}
-static inline void save_uart_address(void)
-{
- u32 *buf = (u32 *)(TEGRA_IRAM_BASE + TEGRA_IRAM_DEBUG_UART_OFFSET);
-
- if (uart) {
- buf[0] = TEGRA_IRAM_DEBUG_UART_COOKIE;
- buf[1] = (u32)uart;
- } else
- buf[0] = 0;
-}
-
static const struct {
u32 base;
u32 reset_reg;
@@ -169,7 +157,6 @@ static inline void arch_decomp_setup(void)
else
uart = (volatile u8 *)uarts[uart_id].base;
- save_uart_address();
if (uart == NULL)
return;
diff --git a/arch/arm/mach-tegra/irammap.h b/arch/arm/mach-tegra/irammap.h
index 0cbe632..501952a 100644
--- a/arch/arm/mach-tegra/irammap.h
+++ b/arch/arm/mach-tegra/irammap.h
@@ -23,13 +23,4 @@
#define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
#define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
-/*
- * These locations are written to by uncompress.h, and read by debug-macro.S.
- * The first word holds the cookie value if the data is valid. The second
- * word holds the UART physical address.
- */
-#define TEGRA_IRAM_DEBUG_UART_OFFSET SZ_1K
-#define TEGRA_IRAM_DEBUG_UART_SIZE 8
-#define TEGRA_IRAM_DEBUG_UART_COOKIE 0x55415254
-
#endif
--
1.7.0.4
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH V2 2/3] ARM: tegra: make debug-macro.S work standalone
@ 2012-10-15 19:07 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Prior to this change, Tegra's debug-macro.S relied on uncompress.h having
determined which UART to use, and whether it was safe to use the UART
(i.e. is it not in reset, and clocked). This determination was
communicated from uncompress.h to debug-macro.S using a few bytes of
Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h
was a required part of the kernel boot process; booting a non-compressed
kernel would not allow earlyprintk to operate.
This change duplicates the UART selection and validation logic into
debug-macro.S so that the reliance on uncompress.h is removed.
This also helps out with single-zImage work, since there is currently no
support for using any uncompress with single-zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Rebase on iomap.h/irammap.h moves
arch/arm/mach-tegra/common.c | 4 +-
arch/arm/mach-tegra/include/mach/debug-macro.S | 151 ++++++++++++++++++++---
arch/arm/mach-tegra/include/mach/uncompress.h | 13 --
arch/arm/mach-tegra/irammap.h | 9 --
4 files changed, 134 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index b493d64..a57dd7a 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,13 +44,15 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-u32 tegra_uart_config[3] = {
+u32 tegra_uart_config[4] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
0,
/* Debug UART virtual address */
0,
+ /* Scratch space for debug macro */
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 44ca7b1..d4c23d6 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -27,7 +27,42 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
+
+#define UART_SHIFT 2
+
+#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
+#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
+#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
+#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
+#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
+#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
+#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
+#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+
+#define checkuart(rp, rv, lhu, bit, uart) \
+ /* Load address of CLK_RST register */ \
+ movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+ /* Load value from CLK_RST register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's reset bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If set, can't use UART; jump to save no UART */ \
+ bne 90f ; \
+ /* Load address of CLK_OUT_ENB register */ \
+ movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+ /* Load value from CLK_OUT_ENB register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's clock enable bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If clear, can't use UART; jump to save no UART */ \
+ beq 90f ; \
+ /* Passed all tests, load address of UART registers */ \
+ movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+ movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+ /* Jump to save UART address */ \
+ b 91f
.macro addruart, rp, rv, tmp
adr \rp, 99f @ actual addr of 99f
@@ -36,22 +71,101 @@
ldr \rp, [\rp, #4] @ linked tegra_uart_config
sub \tmp, \rp, \rv @ actual tegra_uart_config
ldr \rp, [\tmp] @ Load tegra_uart_config
- cmp \rp, #1 @ needs intitialization?
+ cmp \rp, #1 @ needs initialization?
bne 100f @ no; go load the addresses
mov \rv, #0 @ yes; record init is done
str \rv, [\tmp]
- mov \rp, #TEGRA_IRAM_BASE @ See if cookie is in IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET]
- movw \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE & 0xffff
- movt \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE >> 16
- cmp \rv, \rp @ Cookie present?
- bne 100f @ No, use default UART
- mov \rp, #TEGRA_IRAM_BASE @ Load UART address from IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET + 4]
- str \rv, [\tmp, #4] @ Store in tegra_uart_phys
- sub \rv, \rv, #IO_APB_PHYS @ Calculate virt address
+
+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
+ /* Check ODMDATA */
+10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
+ movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
+ ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
+ ubfx \rv, \rp, #18, #2 @ 19:18 are console type
+ cmp \rv, #2 @ 2 and 3 mean DCC, UART
+ beq 11f @ some boards swap the meaning
+ cmp \rv, #3 @ so accept either
+ bne 90f
+11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
+ cmp \rv, #0 @ UART 0?
+ beq 20f
+ cmp \rv, #1 @ UART 1?
+ beq 21f
+ cmp \rv, #2 @ UART 2?
+ beq 22f
+ cmp \rv, #3 @ UART 3?
+ beq 23f
+ cmp \rv, #4 @ UART 4?
+ beq 24f
+ b 90f @ invalid
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART A validity */
+20: checkuart(\rp, \rv, L, 6, A)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART B validity */
+21: checkuart(\rp, \rv, L, 7, B)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART C validity */
+22: checkuart(\rp, \rv, H, 23, C)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART D validity */
+23: checkuart(\rp, \rv, U, 1, D)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART E validity */
+24:
+ checkuart(\rp, \rv, U, 2, E)
+#endif
+
+ /* No valid UART found */
+90: mov \rp, #0
+ /* fall through */
+
+ /* Record whichever UART we chose */
+91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
+ cmp \rp, #0 @ Valid UART address?
+ bne 92f @ Yes, go process it
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ b 100f @ Done
+92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
add \rv, \rv, #IO_APB_VIRT
str \rv, [\tmp, #8] @ Store in tegra_uart_virt
+ movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
+ movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
+ ldr \rv, [\rv, #0] @ Load HIDREV
+ ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
+ cmp \rv, #0x20 @ Tegra20?
+ moveq \rv, #0x75 @ Tegra20 divisor
+ movne \rv, #0xdd @ Tegra30 divisor
+ str \rv, [\tmp, #12] @ Save divisor to scratch
+ /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
+ mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ /* uart[UART_DLL] = div & 0xff; */
+ ldr \rv, [\tmp, #12]
+ and \rv, \rv, #0xff
+ str \rv, [\rp, #UART_DLL << UART_SHIFT]
+ /* uart[UART_DLM] = div >> 8; */
+ ldr \rv, [\tmp, #12]
+ lsr \rv, \rv, #8
+ str \rv, [\rp, #UART_DLM << UART_SHIFT]
+ /* uart[UART_LCR] = UART_LCR_WLEN8; */
+ mov \rv, #UART_LCR_WLEN8
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
b 100f
.align
@@ -59,27 +173,24 @@
.word tegra_uart_config
.ltorg
+ /* Load previously selected UART address */
100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
.endm
-#define UART_SHIFT 2
-
/*
* Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
- * check to make sure that we aren't in the CONFIG_TEGRA_DEBUG_UART_NONE case.
- * We use the fact that all 5 valid UART addresses all have something in the
- * 2nd-to-lowest byte.
+ * check to make sure that the UART address is actually valid.
*/
.macro senduart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
strneb \rd, [\rx, #UART_TX << UART_SHIFT]
1001:
.endm
.macro busyuart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
@@ -90,7 +201,7 @@
.macro waituart, rd, rx
#ifdef FLOW_CONTROL
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 4150c71..485003f 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -29,7 +29,6 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
#define BIT(x) (1 << (x))
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
@@ -52,17 +51,6 @@ static inline void flush(void)
{
}
-static inline void save_uart_address(void)
-{
- u32 *buf = (u32 *)(TEGRA_IRAM_BASE + TEGRA_IRAM_DEBUG_UART_OFFSET);
-
- if (uart) {
- buf[0] = TEGRA_IRAM_DEBUG_UART_COOKIE;
- buf[1] = (u32)uart;
- } else
- buf[0] = 0;
-}
-
static const struct {
u32 base;
u32 reset_reg;
@@ -169,7 +157,6 @@ static inline void arch_decomp_setup(void)
else
uart = (volatile u8 *)uarts[uart_id].base;
- save_uart_address();
if (uart == NULL)
return;
diff --git a/arch/arm/mach-tegra/irammap.h b/arch/arm/mach-tegra/irammap.h
index 0cbe632..501952a 100644
--- a/arch/arm/mach-tegra/irammap.h
+++ b/arch/arm/mach-tegra/irammap.h
@@ -23,13 +23,4 @@
#define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
#define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
-/*
- * These locations are written to by uncompress.h, and read by debug-macro.S.
- * The first word holds the cookie value if the data is valid. The second
- * word holds the UART physical address.
- */
-#define TEGRA_IRAM_DEBUG_UART_OFFSET SZ_1K
-#define TEGRA_IRAM_DEBUG_UART_SIZE 8
-#define TEGRA_IRAM_DEBUG_UART_COOKIE 0x55415254
-
#endif
--
1.7.0.4
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-15 19:07 ` Stephen Warren
@ 2012-10-15 19:07 ` Stephen Warren
-1 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-15 19:07 UTC (permalink / raw)
To: Rob Herring, Olof Johansson, Arnd Bergmann
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Move Tegra's debug-macro.S over to the common debug macro directory.
Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
all related options are selected in the same place.
Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
removed whenever Tegra is converted to multi-platform.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
#include "../../mach-tegra/iomap.h"
in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
continue to #include a header to share the defines to Tegra physical
memory layout and virtual based addresses with Tegra's io.c's struct
map_desc entries, so they can't get out of sync. So, the include can
either use the relative path as quoted above (which I don't think will
cause any significant maintenance issue), or Tegra's iomap.h would have
to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
Second, is the Kconfig.debug change reasonable? I guess I could remove
the second choice menu I added, and just put all the options in the main
"Kernel low-level debugging port" choice. However, that would make the
"if" statements in "config DEBUG_LL_INCLUDE" rather more unwieldy.
v2:
* Remove redundant default selection in Kconfig.debug, fix indentation
there.
* Rebase on iomap.h/irammap.h moves
arch/arm/Kconfig.debug | 38 +++++
arch/arm/include/debug/tegra.S | 209 +++++++++++++++++++++++
arch/arm/mach-tegra/Kconfig | 29 ----
arch/arm/mach-tegra/include/mach/debug-macro.S | 211 ------------------------
4 files changed, 247 insertions(+), 240 deletions(-)
create mode 100644 arch/arm/include/debug/tegra.S
delete mode 100644 arch/arm/mach-tegra/include/mach/debug-macro.S
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857..96b9425 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -345,6 +345,13 @@ choice
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
+ config DEBUG_TEGRA_UART
+ depends on ARCH_TEGRA
+ bool "Use Tegra UART for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -409,6 +416,36 @@ choice
endchoice
+choice
+ prompt "Low-level debug console UART"
+ depends on DEBUG_LL && DEBUG_TEGRA_UART
+
+ config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
+
+ config TEGRA_DEBUG_UARTA
+ bool "UART A"
+
+ config TEGRA_DEBUG_UARTB
+ bool "UART B"
+
+ config TEGRA_DEBUG_UARTC
+ bool "UART C"
+
+ config TEGRA_DEBUG_UARTD
+ bool "UART D"
+
+ config TEGRA_DEBUG_UARTE
+ bool "UART E"
+
+endchoice
+
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
@@ -418,6 +455,7 @@ config DEBUG_LL_INCLUDE
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
+ default "debug/tegra.S" if DEBUG_TEGRA_UART
default "mach/debug-macro.S"
config EARLY_PRINTK
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
new file mode 100644
index 0000000..b957abb
--- /dev/null
+++ b/arch/arm/include/debug/tegra.S
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2010,2011 Google, Inc.
+ * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
+ *
+ * Author:
+ * Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
+ * Erik Gilling <konkers-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
+ * Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
+ * Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+ *
+ * Portions based on mach-omap2's debug-macro.S
+ * Copyright (C) 1994-1999 Russell King
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/serial_reg.h>
+
+#include "../../mach-tegra/iomap.h"
+
+#define UART_SHIFT 2
+
+#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
+#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
+#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
+#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
+#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
+#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
+#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
+#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+
+#define checkuart(rp, rv, lhu, bit, uart) \
+ /* Load address of CLK_RST register */ \
+ movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+ /* Load value from CLK_RST register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's reset bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If set, can't use UART; jump to save no UART */ \
+ bne 90f ; \
+ /* Load address of CLK_OUT_ENB register */ \
+ movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+ /* Load value from CLK_OUT_ENB register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's clock enable bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If clear, can't use UART; jump to save no UART */ \
+ beq 90f ; \
+ /* Passed all tests, load address of UART registers */ \
+ movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+ movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+ /* Jump to save UART address */ \
+ b 91f
+
+ .macro addruart, rp, rv, tmp
+ adr \rp, 99f @ actual addr of 99f
+ ldr \rv, [\rp] @ linked addr is stored there
+ sub \rv, \rv, \rp @ offset between the two
+ ldr \rp, [\rp, #4] @ linked tegra_uart_config
+ sub \tmp, \rp, \rv @ actual tegra_uart_config
+ ldr \rp, [\tmp] @ Load tegra_uart_config
+ cmp \rp, #1 @ needs initialization?
+ bne 100f @ no; go load the addresses
+ mov \rv, #0 @ yes; record init is done
+ str \rv, [\tmp]
+
+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
+ /* Check ODMDATA */
+10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
+ movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
+ ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
+ ubfx \rv, \rp, #18, #2 @ 19:18 are console type
+ cmp \rv, #2 @ 2 and 3 mean DCC, UART
+ beq 11f @ some boards swap the meaning
+ cmp \rv, #3 @ so accept either
+ bne 90f
+11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
+ cmp \rv, #0 @ UART 0?
+ beq 20f
+ cmp \rv, #1 @ UART 1?
+ beq 21f
+ cmp \rv, #2 @ UART 2?
+ beq 22f
+ cmp \rv, #3 @ UART 3?
+ beq 23f
+ cmp \rv, #4 @ UART 4?
+ beq 24f
+ b 90f @ invalid
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART A validity */
+20: checkuart(\rp, \rv, L, 6, A)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART B validity */
+21: checkuart(\rp, \rv, L, 7, B)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART C validity */
+22: checkuart(\rp, \rv, H, 23, C)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART D validity */
+23: checkuart(\rp, \rv, U, 1, D)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART E validity */
+24:
+ checkuart(\rp, \rv, U, 2, E)
+#endif
+
+ /* No valid UART found */
+90: mov \rp, #0
+ /* fall through */
+
+ /* Record whichever UART we chose */
+91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
+ cmp \rp, #0 @ Valid UART address?
+ bne 92f @ Yes, go process it
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ b 100f @ Done
+92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
+ add \rv, \rv, #IO_APB_VIRT
+ str \rv, [\tmp, #8] @ Store in tegra_uart_virt
+ movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
+ movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
+ ldr \rv, [\rv, #0] @ Load HIDREV
+ ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
+ cmp \rv, #0x20 @ Tegra20?
+ moveq \rv, #0x75 @ Tegra20 divisor
+ movne \rv, #0xdd @ Tegra30 divisor
+ str \rv, [\tmp, #12] @ Save divisor to scratch
+ /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
+ mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ /* uart[UART_DLL] = div & 0xff; */
+ ldr \rv, [\tmp, #12]
+ and \rv, \rv, #0xff
+ str \rv, [\rp, #UART_DLL << UART_SHIFT]
+ /* uart[UART_DLM] = div >> 8; */
+ ldr \rv, [\tmp, #12]
+ lsr \rv, \rv, #8
+ str \rv, [\rp, #UART_DLM << UART_SHIFT]
+ /* uart[UART_LCR] = UART_LCR_WLEN8; */
+ mov \rv, #UART_LCR_WLEN8
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ b 100f
+
+ .align
+99: .word .
+ .word tegra_uart_config
+ .ltorg
+
+ /* Load previously selected UART address */
+100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
+ ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
+ .endm
+
+/*
+ * Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
+ * check to make sure that the UART address is actually valid.
+ */
+
+ .macro senduart, rd, rx
+ cmp \rx, #0
+ strneb \rd, [\rx, #UART_TX << UART_SHIFT]
+1001:
+ .endm
+
+ .macro busyuart, rd, rx
+ cmp \rx, #0
+ beq 1002f
+1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
+ and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ bne 1001b
+1002:
+ .endm
+
+ .macro waituart, rd, rx
+#ifdef FLOW_CONTROL
+ cmp \rx, #0
+ beq 1002f
+1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
+ tst \rd, #UART_MSR_CTS
+ beq 1001b
+1002:
+#endif
+ .endm
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 97fcd16..e426d1b 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -57,35 +57,6 @@ config TEGRA_AHB
which controls AHB bus master arbitration and some
perfomance parameters(priority, prefech size).
-choice
- prompt "Low-level debug console UART"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UARTA
- bool "UART-A"
-
-config TEGRA_DEBUG_UARTB
- bool "UART-B"
-
-config TEGRA_DEBUG_UARTC
- bool "UART-C"
-
-config TEGRA_DEBUG_UARTD
- bool "UART-D"
-
-config TEGRA_DEBUG_UARTE
- bool "UART-E"
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
deleted file mode 100644
index d4c23d6..0000000
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/debug-macro.S
- *
- * Copyright (C) 2010,2011 Google, Inc.
- * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
- *
- * Author:
- * Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
- * Erik Gilling <konkers-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
- * Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
- * Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
- *
- * Portions based on mach-omap2's debug-macro.S
- * Copyright (C) 1994-1999 Russell King
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/serial_reg.h>
-
-#include "../../iomap.h"
-
-#define UART_SHIFT 2
-
-#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
-#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
-#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
-#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
-#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
-#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
-#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
-#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
-
-#define checkuart(rp, rv, lhu, bit, uart) \
- /* Load address of CLK_RST register */ \
- movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
- movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
- /* Load value from CLK_RST register */ \
- ldr rp, [rp, #0] ; \
- /* Test UART's reset bit */ \
- tst rp, #(1 << bit) ; \
- /* If set, can't use UART; jump to save no UART */ \
- bne 90f ; \
- /* Load address of CLK_OUT_ENB register */ \
- movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
- movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
- /* Load value from CLK_OUT_ENB register */ \
- ldr rp, [rp, #0] ; \
- /* Test UART's clock enable bit */ \
- tst rp, #(1 << bit) ; \
- /* If clear, can't use UART; jump to save no UART */ \
- beq 90f ; \
- /* Passed all tests, load address of UART registers */ \
- movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
- movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
- /* Jump to save UART address */ \
- b 91f
-
- .macro addruart, rp, rv, tmp
- adr \rp, 99f @ actual addr of 99f
- ldr \rv, [\rp] @ linked addr is stored there
- sub \rv, \rv, \rp @ offset between the two
- ldr \rp, [\rp, #4] @ linked tegra_uart_config
- sub \tmp, \rp, \rv @ actual tegra_uart_config
- ldr \rp, [\tmp] @ Load tegra_uart_config
- cmp \rp, #1 @ needs initialization?
- bne 100f @ no; go load the addresses
- mov \rv, #0 @ yes; record init is done
- str \rv, [\tmp]
-
-#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
- /* Check ODMDATA */
-10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
- movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
- ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
- ubfx \rv, \rp, #18, #2 @ 19:18 are console type
- cmp \rv, #2 @ 2 and 3 mean DCC, UART
- beq 11f @ some boards swap the meaning
- cmp \rv, #3 @ so accept either
- bne 90f
-11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
- cmp \rv, #0 @ UART 0?
- beq 20f
- cmp \rv, #1 @ UART 1?
- beq 21f
- cmp \rv, #2 @ UART 2?
- beq 22f
- cmp \rv, #3 @ UART 3?
- beq 23f
- cmp \rv, #4 @ UART 4?
- beq 24f
- b 90f @ invalid
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART A validity */
-20: checkuart(\rp, \rv, L, 6, A)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART B validity */
-21: checkuart(\rp, \rv, L, 7, B)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART C validity */
-22: checkuart(\rp, \rv, H, 23, C)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART D validity */
-23: checkuart(\rp, \rv, U, 1, D)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART E validity */
-24:
- checkuart(\rp, \rv, U, 2, E)
-#endif
-
- /* No valid UART found */
-90: mov \rp, #0
- /* fall through */
-
- /* Record whichever UART we chose */
-91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
- cmp \rp, #0 @ Valid UART address?
- bne 92f @ Yes, go process it
- str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
- b 100f @ Done
-92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
- add \rv, \rv, #IO_APB_VIRT
- str \rv, [\tmp, #8] @ Store in tegra_uart_virt
- movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
- movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
- ldr \rv, [\rv, #0] @ Load HIDREV
- ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
- cmp \rv, #0x20 @ Tegra20?
- moveq \rv, #0x75 @ Tegra20 divisor
- movne \rv, #0xdd @ Tegra30 divisor
- str \rv, [\tmp, #12] @ Save divisor to scratch
- /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
- mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
- str \rv, [\rp, #UART_LCR << UART_SHIFT]
- /* uart[UART_DLL] = div & 0xff; */
- ldr \rv, [\tmp, #12]
- and \rv, \rv, #0xff
- str \rv, [\rp, #UART_DLL << UART_SHIFT]
- /* uart[UART_DLM] = div >> 8; */
- ldr \rv, [\tmp, #12]
- lsr \rv, \rv, #8
- str \rv, [\rp, #UART_DLM << UART_SHIFT]
- /* uart[UART_LCR] = UART_LCR_WLEN8; */
- mov \rv, #UART_LCR_WLEN8
- str \rv, [\rp, #UART_LCR << UART_SHIFT]
- b 100f
-
- .align
-99: .word .
- .word tegra_uart_config
- .ltorg
-
- /* Load previously selected UART address */
-100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
- ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
- .endm
-
-/*
- * Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
- * check to make sure that the UART address is actually valid.
- */
-
- .macro senduart, rd, rx
- cmp \rx, #0
- strneb \rd, [\rx, #UART_TX << UART_SHIFT]
-1001:
- .endm
-
- .macro busyuart, rd, rx
- cmp \rx, #0
- beq 1002f
-1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
- and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
- teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
- bne 1001b
-1002:
- .endm
-
- .macro waituart, rd, rx
-#ifdef FLOW_CONTROL
- cmp \rx, #0
- beq 1002f
-1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
- tst \rd, #UART_MSR_CTS
- beq 1001b
-1002:
-#endif
- .endm
--
1.7.0.4
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-15 19:07 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Move Tegra's debug-macro.S over to the common debug macro directory.
Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
all related options are selected in the same place.
Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
removed whenever Tegra is converted to multi-platform.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
#include "../../mach-tegra/iomap.h"
in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
continue to #include a header to share the defines to Tegra physical
memory layout and virtual based addresses with Tegra's io.c's struct
map_desc entries, so they can't get out of sync. So, the include can
either use the relative path as quoted above (which I don't think will
cause any significant maintenance issue), or Tegra's iomap.h would have
to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
Second, is the Kconfig.debug change reasonable? I guess I could remove
the second choice menu I added, and just put all the options in the main
"Kernel low-level debugging port" choice. However, that would make the
"if" statements in "config DEBUG_LL_INCLUDE" rather more unwieldy.
v2:
* Remove redundant default selection in Kconfig.debug, fix indentation
there.
* Rebase on iomap.h/irammap.h moves
arch/arm/Kconfig.debug | 38 +++++
arch/arm/include/debug/tegra.S | 209 +++++++++++++++++++++++
arch/arm/mach-tegra/Kconfig | 29 ----
arch/arm/mach-tegra/include/mach/debug-macro.S | 211 ------------------------
4 files changed, 247 insertions(+), 240 deletions(-)
create mode 100644 arch/arm/include/debug/tegra.S
delete mode 100644 arch/arm/mach-tegra/include/mach/debug-macro.S
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857..96b9425 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -345,6 +345,13 @@ choice
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
+ config DEBUG_TEGRA_UART
+ depends on ARCH_TEGRA
+ bool "Use Tegra UART for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -409,6 +416,36 @@ choice
endchoice
+choice
+ prompt "Low-level debug console UART"
+ depends on DEBUG_LL && DEBUG_TEGRA_UART
+
+ config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
+
+ config TEGRA_DEBUG_UARTA
+ bool "UART A"
+
+ config TEGRA_DEBUG_UARTB
+ bool "UART B"
+
+ config TEGRA_DEBUG_UARTC
+ bool "UART C"
+
+ config TEGRA_DEBUG_UARTD
+ bool "UART D"
+
+ config TEGRA_DEBUG_UARTE
+ bool "UART E"
+
+endchoice
+
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
@@ -418,6 +455,7 @@ config DEBUG_LL_INCLUDE
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
+ default "debug/tegra.S" if DEBUG_TEGRA_UART
default "mach/debug-macro.S"
config EARLY_PRINTK
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
new file mode 100644
index 0000000..b957abb
--- /dev/null
+++ b/arch/arm/include/debug/tegra.S
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2010,2011 Google, Inc.
+ * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
+ *
+ * Author:
+ * Colin Cross <ccross@google.com>
+ * Erik Gilling <konkers@google.com>
+ * Doug Anderson <dianders@chromium.org>
+ * Stephen Warren <swarren@nvidia.com>
+ *
+ * Portions based on mach-omap2's debug-macro.S
+ * Copyright (C) 1994-1999 Russell King
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/serial_reg.h>
+
+#include "../../mach-tegra/iomap.h"
+
+#define UART_SHIFT 2
+
+#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
+#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
+#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
+#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
+#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
+#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
+#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
+#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+
+#define checkuart(rp, rv, lhu, bit, uart) \
+ /* Load address of CLK_RST register */ \
+ movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+ /* Load value from CLK_RST register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's reset bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If set, can't use UART; jump to save no UART */ \
+ bne 90f ; \
+ /* Load address of CLK_OUT_ENB register */ \
+ movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+ /* Load value from CLK_OUT_ENB register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's clock enable bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If clear, can't use UART; jump to save no UART */ \
+ beq 90f ; \
+ /* Passed all tests, load address of UART registers */ \
+ movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+ movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+ /* Jump to save UART address */ \
+ b 91f
+
+ .macro addruart, rp, rv, tmp
+ adr \rp, 99f @ actual addr of 99f
+ ldr \rv, [\rp] @ linked addr is stored there
+ sub \rv, \rv, \rp @ offset between the two
+ ldr \rp, [\rp, #4] @ linked tegra_uart_config
+ sub \tmp, \rp, \rv @ actual tegra_uart_config
+ ldr \rp, [\tmp] @ Load tegra_uart_config
+ cmp \rp, #1 @ needs initialization?
+ bne 100f @ no; go load the addresses
+ mov \rv, #0 @ yes; record init is done
+ str \rv, [\tmp]
+
+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
+ /* Check ODMDATA */
+10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
+ movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
+ ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
+ ubfx \rv, \rp, #18, #2 @ 19:18 are console type
+ cmp \rv, #2 @ 2 and 3 mean DCC, UART
+ beq 11f @ some boards swap the meaning
+ cmp \rv, #3 @ so accept either
+ bne 90f
+11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
+ cmp \rv, #0 @ UART 0?
+ beq 20f
+ cmp \rv, #1 @ UART 1?
+ beq 21f
+ cmp \rv, #2 @ UART 2?
+ beq 22f
+ cmp \rv, #3 @ UART 3?
+ beq 23f
+ cmp \rv, #4 @ UART 4?
+ beq 24f
+ b 90f @ invalid
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART A validity */
+20: checkuart(\rp, \rv, L, 6, A)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART B validity */
+21: checkuart(\rp, \rv, L, 7, B)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART C validity */
+22: checkuart(\rp, \rv, H, 23, C)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART D validity */
+23: checkuart(\rp, \rv, U, 1, D)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART E validity */
+24:
+ checkuart(\rp, \rv, U, 2, E)
+#endif
+
+ /* No valid UART found */
+90: mov \rp, #0
+ /* fall through */
+
+ /* Record whichever UART we chose */
+91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
+ cmp \rp, #0 @ Valid UART address?
+ bne 92f @ Yes, go process it
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ b 100f @ Done
+92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
+ add \rv, \rv, #IO_APB_VIRT
+ str \rv, [\tmp, #8] @ Store in tegra_uart_virt
+ movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
+ movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
+ ldr \rv, [\rv, #0] @ Load HIDREV
+ ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
+ cmp \rv, #0x20 @ Tegra20?
+ moveq \rv, #0x75 @ Tegra20 divisor
+ movne \rv, #0xdd @ Tegra30 divisor
+ str \rv, [\tmp, #12] @ Save divisor to scratch
+ /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
+ mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ /* uart[UART_DLL] = div & 0xff; */
+ ldr \rv, [\tmp, #12]
+ and \rv, \rv, #0xff
+ str \rv, [\rp, #UART_DLL << UART_SHIFT]
+ /* uart[UART_DLM] = div >> 8; */
+ ldr \rv, [\tmp, #12]
+ lsr \rv, \rv, #8
+ str \rv, [\rp, #UART_DLM << UART_SHIFT]
+ /* uart[UART_LCR] = UART_LCR_WLEN8; */
+ mov \rv, #UART_LCR_WLEN8
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ b 100f
+
+ .align
+99: .word .
+ .word tegra_uart_config
+ .ltorg
+
+ /* Load previously selected UART address */
+100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
+ ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
+ .endm
+
+/*
+ * Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
+ * check to make sure that the UART address is actually valid.
+ */
+
+ .macro senduart, rd, rx
+ cmp \rx, #0
+ strneb \rd, [\rx, #UART_TX << UART_SHIFT]
+1001:
+ .endm
+
+ .macro busyuart, rd, rx
+ cmp \rx, #0
+ beq 1002f
+1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
+ and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ bne 1001b
+1002:
+ .endm
+
+ .macro waituart, rd, rx
+#ifdef FLOW_CONTROL
+ cmp \rx, #0
+ beq 1002f
+1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
+ tst \rd, #UART_MSR_CTS
+ beq 1001b
+1002:
+#endif
+ .endm
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 97fcd16..e426d1b 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -57,35 +57,6 @@ config TEGRA_AHB
which controls AHB bus master arbitration and some
perfomance parameters(priority, prefech size).
-choice
- prompt "Low-level debug console UART"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UARTA
- bool "UART-A"
-
-config TEGRA_DEBUG_UARTB
- bool "UART-B"
-
-config TEGRA_DEBUG_UARTC
- bool "UART-C"
-
-config TEGRA_DEBUG_UARTD
- bool "UART-D"
-
-config TEGRA_DEBUG_UARTE
- bool "UART-E"
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
deleted file mode 100644
index d4c23d6..0000000
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/debug-macro.S
- *
- * Copyright (C) 2010,2011 Google, Inc.
- * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
- *
- * Author:
- * Colin Cross <ccross@google.com>
- * Erik Gilling <konkers@google.com>
- * Doug Anderson <dianders@chromium.org>
- * Stephen Warren <swarren@nvidia.com>
- *
- * Portions based on mach-omap2's debug-macro.S
- * Copyright (C) 1994-1999 Russell King
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/serial_reg.h>
-
-#include "../../iomap.h"
-
-#define UART_SHIFT 2
-
-#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
-#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
-#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
-#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
-#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
-#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
-#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
-#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
-
-#define checkuart(rp, rv, lhu, bit, uart) \
- /* Load address of CLK_RST register */ \
- movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
- movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
- /* Load value from CLK_RST register */ \
- ldr rp, [rp, #0] ; \
- /* Test UART's reset bit */ \
- tst rp, #(1 << bit) ; \
- /* If set, can't use UART; jump to save no UART */ \
- bne 90f ; \
- /* Load address of CLK_OUT_ENB register */ \
- movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
- movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
- /* Load value from CLK_OUT_ENB register */ \
- ldr rp, [rp, #0] ; \
- /* Test UART's clock enable bit */ \
- tst rp, #(1 << bit) ; \
- /* If clear, can't use UART; jump to save no UART */ \
- beq 90f ; \
- /* Passed all tests, load address of UART registers */ \
- movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
- movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
- /* Jump to save UART address */ \
- b 91f
-
- .macro addruart, rp, rv, tmp
- adr \rp, 99f @ actual addr of 99f
- ldr \rv, [\rp] @ linked addr is stored there
- sub \rv, \rv, \rp @ offset between the two
- ldr \rp, [\rp, #4] @ linked tegra_uart_config
- sub \tmp, \rp, \rv @ actual tegra_uart_config
- ldr \rp, [\tmp] @ Load tegra_uart_config
- cmp \rp, #1 @ needs initialization?
- bne 100f @ no; go load the addresses
- mov \rv, #0 @ yes; record init is done
- str \rv, [\tmp]
-
-#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
- /* Check ODMDATA */
-10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
- movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
- ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
- ubfx \rv, \rp, #18, #2 @ 19:18 are console type
- cmp \rv, #2 @ 2 and 3 mean DCC, UART
- beq 11f @ some boards swap the meaning
- cmp \rv, #3 @ so accept either
- bne 90f
-11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
- cmp \rv, #0 @ UART 0?
- beq 20f
- cmp \rv, #1 @ UART 1?
- beq 21f
- cmp \rv, #2 @ UART 2?
- beq 22f
- cmp \rv, #3 @ UART 3?
- beq 23f
- cmp \rv, #4 @ UART 4?
- beq 24f
- b 90f @ invalid
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART A validity */
-20: checkuart(\rp, \rv, L, 6, A)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART B validity */
-21: checkuart(\rp, \rv, L, 7, B)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART C validity */
-22: checkuart(\rp, \rv, H, 23, C)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART D validity */
-23: checkuart(\rp, \rv, U, 1, D)
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
- defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- /* Check UART E validity */
-24:
- checkuart(\rp, \rv, U, 2, E)
-#endif
-
- /* No valid UART found */
-90: mov \rp, #0
- /* fall through */
-
- /* Record whichever UART we chose */
-91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
- cmp \rp, #0 @ Valid UART address?
- bne 92f @ Yes, go process it
- str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
- b 100f @ Done
-92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
- add \rv, \rv, #IO_APB_VIRT
- str \rv, [\tmp, #8] @ Store in tegra_uart_virt
- movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
- movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
- ldr \rv, [\rv, #0] @ Load HIDREV
- ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
- cmp \rv, #0x20 @ Tegra20?
- moveq \rv, #0x75 @ Tegra20 divisor
- movne \rv, #0xdd @ Tegra30 divisor
- str \rv, [\tmp, #12] @ Save divisor to scratch
- /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
- mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
- str \rv, [\rp, #UART_LCR << UART_SHIFT]
- /* uart[UART_DLL] = div & 0xff; */
- ldr \rv, [\tmp, #12]
- and \rv, \rv, #0xff
- str \rv, [\rp, #UART_DLL << UART_SHIFT]
- /* uart[UART_DLM] = div >> 8; */
- ldr \rv, [\tmp, #12]
- lsr \rv, \rv, #8
- str \rv, [\rp, #UART_DLM << UART_SHIFT]
- /* uart[UART_LCR] = UART_LCR_WLEN8; */
- mov \rv, #UART_LCR_WLEN8
- str \rv, [\rp, #UART_LCR << UART_SHIFT]
- b 100f
-
- .align
-99: .word .
- .word tegra_uart_config
- .ltorg
-
- /* Load previously selected UART address */
-100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
- ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
- .endm
-
-/*
- * Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
- * check to make sure that the UART address is actually valid.
- */
-
- .macro senduart, rd, rx
- cmp \rx, #0
- strneb \rd, [\rx, #UART_TX << UART_SHIFT]
-1001:
- .endm
-
- .macro busyuart, rd, rx
- cmp \rx, #0
- beq 1002f
-1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
- and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
- teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
- bne 1001b
-1002:
- .endm
-
- .macro waituart, rd, rx
-#ifdef FLOW_CONTROL
- cmp \rx, #0
- beq 1002f
-1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
- tst \rd, #UART_MSR_CTS
- beq 1001b
-1002:
-#endif
- .endm
--
1.7.0.4
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-15 19:07 ` Stephen Warren
@ 2012-10-17 14:03 ` Arnd Bergmann
-1 siblings, 0 replies; 28+ messages in thread
From: Arnd Bergmann @ 2012-10-17 14:03 UTC (permalink / raw)
To: Stephen Warren
Cc: Rob Herring, Olof Johansson, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
On Monday 15 October 2012, Stephen Warren wrote:
> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>
> #include "../../mach-tegra/iomap.h"
>
> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
> continue to #include a header to share the defines to Tegra physical
> memory layout and virtual based addresses with Tegra's io.c's struct
> map_desc entries, so they can't get out of sync. So, the include can
> either use the relative path as quoted above (which I don't think will
> cause any significant maintenance issue), or Tegra's iomap.h would have
> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
I don't have a good answer for this unfortunately. I wouldn't want relative
include paths to take over because they can paper over a lot of other
problems when people get lazy.
> Second, is the Kconfig.debug change reasonable? I guess I could remove
> the second choice menu I added, and just put all the options in the main
> "Kernel low-level debugging port" choice. However, that would make the
> "if" statements in "config DEBUG_LL_INCLUDE" rather more unwieldy.
It looks ok to me in principle, but you could also solve this by making
DEBUG_TEGRA_UART a silent option like this:
@@ -345,6 +345,46 @@ choice
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
+ config DEBUG_TEGRA_UARTA
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTA for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTB
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTB for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTC
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTC for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTD
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTD for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTE
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTE for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -409,6 +416,36 @@ choice
endchoice
+config DEBUG_TEGRA_UART
+ bool
I don't have a strong preference either way.
ARnd
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-17 14:03 ` Arnd Bergmann
0 siblings, 0 replies; 28+ messages in thread
From: Arnd Bergmann @ 2012-10-17 14:03 UTC (permalink / raw)
To: linux-arm-kernel
On Monday 15 October 2012, Stephen Warren wrote:
> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>
> #include "../../mach-tegra/iomap.h"
>
> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
> continue to #include a header to share the defines to Tegra physical
> memory layout and virtual based addresses with Tegra's io.c's struct
> map_desc entries, so they can't get out of sync. So, the include can
> either use the relative path as quoted above (which I don't think will
> cause any significant maintenance issue), or Tegra's iomap.h would have
> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
I don't have a good answer for this unfortunately. I wouldn't want relative
include paths to take over because they can paper over a lot of other
problems when people get lazy.
> Second, is the Kconfig.debug change reasonable? I guess I could remove
> the second choice menu I added, and just put all the options in the main
> "Kernel low-level debugging port" choice. However, that would make the
> "if" statements in "config DEBUG_LL_INCLUDE" rather more unwieldy.
It looks ok to me in principle, but you could also solve this by making
DEBUG_TEGRA_UART a silent option like this:
@@ -345,6 +345,46 @@ choice
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
+ config DEBUG_TEGRA_UARTA
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTA for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTB
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTB for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTC
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTC for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTD
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTD for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_TEGRA_UARTE
+ depends on ARCH_TEGRA
+ select DEBUG_TEGRA_UART
+ bool "Use Tegra UARTE for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -409,6 +416,36 @@ choice
endchoice
+config DEBUG_TEGRA_UART
+ bool
I don't have a strong preference either way.
ARnd
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-15 19:07 ` Stephen Warren
@ 2012-10-17 14:38 ` Rob Herring
-1 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-17 14:38 UTC (permalink / raw)
To: Stephen Warren
Cc: Olof Johansson, Arnd Bergmann,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
On 10/15/2012 02:07 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> Move Tegra's debug-macro.S over to the common debug macro directory.
>
> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
> all related options are selected in the same place.
>
> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
> removed whenever Tegra is converted to multi-platform.
>
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>
> #include "../../mach-tegra/iomap.h"
>
> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
> continue to #include a header to share the defines to Tegra physical
> memory layout and virtual based addresses with Tegra's io.c's struct
> map_desc entries, so they can't get out of sync. So, the include can
> either use the relative path as quoted above (which I don't think will
> cause any significant maintenance issue), or Tegra's iomap.h would have
> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
We already have a way to get the phys and virt addresses at runtime with
addruart macro. Couldn't we wrap this with a proper function and setup
the mapping at runtime. This would move it out of the platforms.
I'd also like to make the virtual address the same on all platforms (but
different offsets within a 1MB section) and make the phys address a
kconfig option. This would also eliminate the need for the platform
include and potentially addruart for that matter.
Rob
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-17 14:38 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-17 14:38 UTC (permalink / raw)
To: linux-arm-kernel
On 10/15/2012 02:07 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> Move Tegra's debug-macro.S over to the common debug macro directory.
>
> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
> all related options are selected in the same place.
>
> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
> removed whenever Tegra is converted to multi-platform.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>
> #include "../../mach-tegra/iomap.h"
>
> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
> continue to #include a header to share the defines to Tegra physical
> memory layout and virtual based addresses with Tegra's io.c's struct
> map_desc entries, so they can't get out of sync. So, the include can
> either use the relative path as quoted above (which I don't think will
> cause any significant maintenance issue), or Tegra's iomap.h would have
> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
We already have a way to get the phys and virt addresses at runtime with
addruart macro. Couldn't we wrap this with a proper function and setup
the mapping at runtime. This would move it out of the platforms.
I'd also like to make the virtual address the same on all platforms (but
different offsets within a 1MB section) and make the phys address a
kconfig option. This would also eliminate the need for the platform
include and potentially addruart for that matter.
Rob
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-17 14:38 ` Rob Herring
@ 2012-10-17 16:22 ` Stephen Warren
-1 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-17 16:22 UTC (permalink / raw)
To: Rob Herring
Cc: Olof Johansson, Arnd Bergmann,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
On 10/17/2012 08:38 AM, Rob Herring wrote:
> On 10/15/2012 02:07 PM, Stephen Warren wrote:
>> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>
>> Move Tegra's debug-macro.S over to the common debug macro directory.
>>
>> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
>> all related options are selected in the same place.
>>
>> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
>> removed whenever Tegra is converted to multi-platform.
>>
>> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>>
>> #include "../../mach-tegra/iomap.h"
>>
>> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
>> continue to #include a header to share the defines to Tegra physical
>> memory layout and virtual based addresses with Tegra's io.c's struct
>> map_desc entries, so they can't get out of sync. So, the include can
>> either use the relative path as quoted above (which I don't think will
>> cause any significant maintenance issue), or Tegra's iomap.h would have
>> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
>
> We already have a way to get the phys and virt addresses at runtime with
> addruart macro.
So this discussion is mainly about the implementation of addruart.
> Couldn't we wrap this with a proper function and setup
> the mapping at runtime. This would move it out of the platforms.
So, the mapping already is set up at run-time at least during early
boot; __create_page_tables() in arch/arm/kernel/head.S calls addruart
and sets up an entry for it.
I suppose the implication here is that the virtual address that addruart
returns doesn't have to match anything that the machine later sets up
using iotable_init().
If that's true, then Tegra's debug-macro.S only needs to know the UART
physical address, and can make up almost any arbitrary virtual address
(perhaps even driven by the logic you mention in your next paragraph
below) and hence need not rely on Tegra's iomap.h. That said, we'd still
have to manually remember not to create conflicting virtual address
setups in the two places, which would still be easier with a shared header.
However, I then have two questions:
1) How long do the page tables set up by __create_page_tables() last; do
they stick around forever, or at least as long as the macros from
debug-macro.S are used, or are they replaced sometime, on the assumption
that the machine's .map_io() will call iotable_init() and end up setting
up the same mapping?
2) If the virtual address returned by addruart on Tegra is different
than any virtual addresses set up by Tegra's .map_io(), and Tegra's
.map_io() sets up a very broad mapping that covers all peripherals
including the UART, and hence the UART physical registers get mapped
into two virtual addresses, will this cause any problems? IIRC,
duplicate mappings can cause some issues on ARM, but perhaps that only
applies to memory-like mappings, and not completely uncached IO mappings?
> I'd also like to make the virtual address the same on all platforms (but
> different offsets within a 1MB section) and make the phys address a
> kconfig option. This would also eliminate the need for the platform
> include and potentially addruart for that matter.
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-17 16:22 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-17 16:22 UTC (permalink / raw)
To: linux-arm-kernel
On 10/17/2012 08:38 AM, Rob Herring wrote:
> On 10/15/2012 02:07 PM, Stephen Warren wrote:
>> From: Stephen Warren <swarren@nvidia.com>
>>
>> Move Tegra's debug-macro.S over to the common debug macro directory.
>>
>> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
>> all related options are selected in the same place.
>>
>> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
>> removed whenever Tegra is converted to multi-platform.
>>
>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>> ---
>> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>>
>> #include "../../mach-tegra/iomap.h"
>>
>> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
>> continue to #include a header to share the defines to Tegra physical
>> memory layout and virtual based addresses with Tegra's io.c's struct
>> map_desc entries, so they can't get out of sync. So, the include can
>> either use the relative path as quoted above (which I don't think will
>> cause any significant maintenance issue), or Tegra's iomap.h would have
>> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
>
> We already have a way to get the phys and virt addresses at runtime with
> addruart macro.
So this discussion is mainly about the implementation of addruart.
> Couldn't we wrap this with a proper function and setup
> the mapping at runtime. This would move it out of the platforms.
So, the mapping already is set up at run-time at least during early
boot; __create_page_tables() in arch/arm/kernel/head.S calls addruart
and sets up an entry for it.
I suppose the implication here is that the virtual address that addruart
returns doesn't have to match anything that the machine later sets up
using iotable_init().
If that's true, then Tegra's debug-macro.S only needs to know the UART
physical address, and can make up almost any arbitrary virtual address
(perhaps even driven by the logic you mention in your next paragraph
below) and hence need not rely on Tegra's iomap.h. That said, we'd still
have to manually remember not to create conflicting virtual address
setups in the two places, which would still be easier with a shared header.
However, I then have two questions:
1) How long do the page tables set up by __create_page_tables() last; do
they stick around forever, or at least as long as the macros from
debug-macro.S are used, or are they replaced sometime, on the assumption
that the machine's .map_io() will call iotable_init() and end up setting
up the same mapping?
2) If the virtual address returned by addruart on Tegra is different
than any virtual addresses set up by Tegra's .map_io(), and Tegra's
.map_io() sets up a very broad mapping that covers all peripherals
including the UART, and hence the UART physical registers get mapped
into two virtual addresses, will this cause any problems? IIRC,
duplicate mappings can cause some issues on ARM, but perhaps that only
applies to memory-like mappings, and not completely uncached IO mappings?
> I'd also like to make the virtual address the same on all platforms (but
> different offsets within a 1MB section) and make the phys address a
> kconfig option. This would also eliminate the need for the platform
> include and potentially addruart for that matter.
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-17 16:22 ` Stephen Warren
@ 2012-10-17 21:12 ` Stephen Warren
-1 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-17 21:12 UTC (permalink / raw)
To: Rob Herring
Cc: Olof Johansson, Arnd Bergmann,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
On 10/17/2012 10:22 AM, Stephen Warren wrote:
> On 10/17/2012 08:38 AM, Rob Herring wrote:
>> On 10/15/2012 02:07 PM, Stephen Warren wrote:
>>> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>>
>>> Move Tegra's debug-macro.S over to the common debug macro directory.
>>>
>>> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
>>> all related options are selected in the same place.
>>>
>>> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
>>> removed whenever Tegra is converted to multi-platform.
>>>
>>> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>> ---
>>> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>>>
>>> #include "../../mach-tegra/iomap.h"
>>>
>>> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
>>> continue to #include a header to share the defines to Tegra physical
>>> memory layout and virtual based addresses with Tegra's io.c's struct
>>> map_desc entries, so they can't get out of sync. So, the include can
>>> either use the relative path as quoted above (which I don't think will
>>> cause any significant maintenance issue), or Tegra's iomap.h would have
>>> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
>>
>> We already have a way to get the phys and virt addresses at runtime with
>> addruart macro.
>
> So this discussion is mainly about the implementation of addruart.
>
>> Couldn't we wrap this with a proper function and setup
>> the mapping at runtime. This would move it out of the platforms.
>
> So, the mapping already is set up at run-time at least during early
> boot; __create_page_tables() in arch/arm/kernel/head.S calls addruart
> and sets up an entry for it.
>
> I suppose the implication here is that the virtual address that addruart
> returns doesn't have to match anything that the machine later sets up
> using iotable_init().
>
> If that's true, then Tegra's debug-macro.S only needs to know the UART
> physical address, and can make up almost any arbitrary virtual address
> (perhaps even driven by the logic you mention in your next paragraph
> below) and hence need not rely on Tegra's iomap.h. That said, we'd still
> have to manually remember not to create conflicting virtual address
> setups in the two places, which would still be easier with a shared header.
>
> However, I then have two questions:
>
> 1) How long do the page tables set up by __create_page_tables() last; do
> they stick around forever, or at least as long as the macros from
> debug-macro.S are used, or are they replaced sometime, on the assumption
> that the machine's .map_io() will call iotable_init() and end up setting
> up the same mapping?
So answering my own question here after testing this:
If I use a different (to iomap.h) virtual address in debug-macro.S, then
the very very early output from earlyprintk does work:
> [ 0.000000] Booting Linux on physical CPU 0
> [ 0.000000] Initializing cgroup subsys cpu
> [ 0.000000] Linux version 3.7.0-rc1-next-20121016-...
> [ 0.000000] CPU: ARMv7 Processor [411fc090] revision 0 (ARMv7), cr=10c5387d
> [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
> [ 0.000000] Machine: nVidia Tegra20 (Flattened Device Tree), model: NVIDIA Tegra2 Harmony evaluation board
> [ 0.000000] bootconsole [earlycon0] enabled
> [ 0.000000] Memory policy: ECC disabled, Data cache writealloc
However, the kernel either hangs or output simply stops working at that
point. If I modify Tegra's iotable_init() call to add an entry to map
the UART to the virtual address debug-macro.S assumes, then everything
works again.
That implies we really do need to keep the two pieces of code completely
in sync, so a shared header is the right way to go. It also implies that
having duplicate mappings of the same physical address doesn't cause any
immediate obvious catastrophic problems.
Ways we might avoid files in arch/arm/include/debug having to use
relative include paths to pick up that header are:
a) Move mach-${mach}/include/mach/iomap.h to iomap-${mach}.h in some
standard include path.
b) Rework debug-macro.S so that it isn't an include file, but rather a
regular top-level file. In other words, rather than compiling
arch/arm/kernel/debug.S, and having that #include DEBUG_LL_INCLUDE,
instead compile DEBUG_LL_SOURCE (i.e. arch/arm/mach-${mach}/debug.S by
default), and have that #include any common parts (e.g. implementation
of printhex8). This has benefits of:
b1) arch/arm/mach-${mach}/debug.S is in the mach directory that owns it,
rather than having them all dumped into a common location.
b2) Can use #include "iomap.h", a non-relative include, to pick up the
shared header
b3) Perhaps we can simplify the current debug.S e.g. have a common
debug-semihosting.S that contains the semihosting stuff, and only
include that from mach-*/debug.S if that machine uses semihosting, or
similar?
(b) seems like a lot of work. I don't see any advantage of (a) over just
using the relative include.
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-17 21:12 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-17 21:12 UTC (permalink / raw)
To: linux-arm-kernel
On 10/17/2012 10:22 AM, Stephen Warren wrote:
> On 10/17/2012 08:38 AM, Rob Herring wrote:
>> On 10/15/2012 02:07 PM, Stephen Warren wrote:
>>> From: Stephen Warren <swarren@nvidia.com>
>>>
>>> Move Tegra's debug-macro.S over to the common debug macro directory.
>>>
>>> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
>>> all related options are selected in the same place.
>>>
>>> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
>>> removed whenever Tegra is converted to multi-platform.
>>>
>>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>>> ---
>>> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>>>
>>> #include "../../mach-tegra/iomap.h"
>>>
>>> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
>>> continue to #include a header to share the defines to Tegra physical
>>> memory layout and virtual based addresses with Tegra's io.c's struct
>>> map_desc entries, so they can't get out of sync. So, the include can
>>> either use the relative path as quoted above (which I don't think will
>>> cause any significant maintenance issue), or Tegra's iomap.h would have
>>> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
>>
>> We already have a way to get the phys and virt addresses at runtime with
>> addruart macro.
>
> So this discussion is mainly about the implementation of addruart.
>
>> Couldn't we wrap this with a proper function and setup
>> the mapping at runtime. This would move it out of the platforms.
>
> So, the mapping already is set up at run-time at least during early
> boot; __create_page_tables() in arch/arm/kernel/head.S calls addruart
> and sets up an entry for it.
>
> I suppose the implication here is that the virtual address that addruart
> returns doesn't have to match anything that the machine later sets up
> using iotable_init().
>
> If that's true, then Tegra's debug-macro.S only needs to know the UART
> physical address, and can make up almost any arbitrary virtual address
> (perhaps even driven by the logic you mention in your next paragraph
> below) and hence need not rely on Tegra's iomap.h. That said, we'd still
> have to manually remember not to create conflicting virtual address
> setups in the two places, which would still be easier with a shared header.
>
> However, I then have two questions:
>
> 1) How long do the page tables set up by __create_page_tables() last; do
> they stick around forever, or at least as long as the macros from
> debug-macro.S are used, or are they replaced sometime, on the assumption
> that the machine's .map_io() will call iotable_init() and end up setting
> up the same mapping?
So answering my own question here after testing this:
If I use a different (to iomap.h) virtual address in debug-macro.S, then
the very very early output from earlyprintk does work:
> [ 0.000000] Booting Linux on physical CPU 0
> [ 0.000000] Initializing cgroup subsys cpu
> [ 0.000000] Linux version 3.7.0-rc1-next-20121016-...
> [ 0.000000] CPU: ARMv7 Processor [411fc090] revision 0 (ARMv7), cr=10c5387d
> [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
> [ 0.000000] Machine: nVidia Tegra20 (Flattened Device Tree), model: NVIDIA Tegra2 Harmony evaluation board
> [ 0.000000] bootconsole [earlycon0] enabled
> [ 0.000000] Memory policy: ECC disabled, Data cache writealloc
However, the kernel either hangs or output simply stops working at that
point. If I modify Tegra's iotable_init() call to add an entry to map
the UART to the virtual address debug-macro.S assumes, then everything
works again.
That implies we really do need to keep the two pieces of code completely
in sync, so a shared header is the right way to go. It also implies that
having duplicate mappings of the same physical address doesn't cause any
immediate obvious catastrophic problems.
Ways we might avoid files in arch/arm/include/debug having to use
relative include paths to pick up that header are:
a) Move mach-${mach}/include/mach/iomap.h to iomap-${mach}.h in some
standard include path.
b) Rework debug-macro.S so that it isn't an include file, but rather a
regular top-level file. In other words, rather than compiling
arch/arm/kernel/debug.S, and having that #include DEBUG_LL_INCLUDE,
instead compile DEBUG_LL_SOURCE (i.e. arch/arm/mach-${mach}/debug.S by
default), and have that #include any common parts (e.g. implementation
of printhex8). This has benefits of:
b1) arch/arm/mach-${mach}/debug.S is in the mach directory that owns it,
rather than having them all dumped into a common location.
b2) Can use #include "iomap.h", a non-relative include, to pick up the
shared header
b3) Perhaps we can simplify the current debug.S e.g. have a common
debug-semihosting.S that contains the semihosting stuff, and only
include that from mach-*/debug.S if that machine uses semihosting, or
similar?
(b) seems like a lot of work. I don't see any advantage of (a) over just
using the relative include.
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-17 16:22 ` Stephen Warren
@ 2012-10-17 23:17 ` Rob Herring
-1 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-17 23:17 UTC (permalink / raw)
To: Stephen Warren
Cc: Olof Johansson, Arnd Bergmann,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
On 10/17/2012 11:22 AM, Stephen Warren wrote:
> On 10/17/2012 08:38 AM, Rob Herring wrote:
>> On 10/15/2012 02:07 PM, Stephen Warren wrote:
>>> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>>
>>> Move Tegra's debug-macro.S over to the common debug macro directory.
>>>
>>> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
>>> all related options are selected in the same place.
>>>
>>> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
>>> removed whenever Tegra is converted to multi-platform.
>>>
>>> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>> ---
>>> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>>>
>>> #include "../../mach-tegra/iomap.h"
>>>
>>> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
>>> continue to #include a header to share the defines to Tegra physical
>>> memory layout and virtual based addresses with Tegra's io.c's struct
>>> map_desc entries, so they can't get out of sync. So, the include can
>>> either use the relative path as quoted above (which I don't think will
>>> cause any significant maintenance issue), or Tegra's iomap.h would have
>>> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
>>
>> We already have a way to get the phys and virt addresses at runtime with
>> addruart macro.
>
> So this discussion is mainly about the implementation of addruart.
>
>> Couldn't we wrap this with a proper function and setup
>> the mapping at runtime. This would move it out of the platforms.
>
> So, the mapping already is set up at run-time at least during early
> boot; __create_page_tables() in arch/arm/kernel/head.S calls addruart
> and sets up an entry for it.
>
> I suppose the implication here is that the virtual address that addruart
> returns doesn't have to match anything that the machine later sets up
> using iotable_init().
>
> If that's true, then Tegra's debug-macro.S only needs to know the UART
> physical address, and can make up almost any arbitrary virtual address
> (perhaps even driven by the logic you mention in your next paragraph
> below) and hence need not rely on Tegra's iomap.h. That said, we'd still
> have to manually remember not to create conflicting virtual address
> setups in the two places, which would still be easier with a shared header.
The virtual address has to remain the same.
A non-platform specific header for a fixed virtual address define would
be cleaner than relative includes.
>
> However, I then have two questions:
>
> 1) How long do the page tables set up by __create_page_tables() last; do
> they stick around forever, or at least as long as the macros from
> debug-macro.S are used, or are they replaced sometime, on the assumption
> that the machine's .map_io() will call iotable_init() and end up setting
> up the same mapping?
It works to...
[ 0.000000] Booting Linux on physical CPU 0
[ 0.000000] Linux version 3.5.4+ (rob@rob-laptop) (gcc version 4.7.2
(Ubuntu/Linaro 4.7.2-1ubuntu1) ) #280 SMP Wed Oct 17 18:00:29 CDT 2012 ()
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7),
cr=10c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
instruction cache
[ 0.000000] Machine: Highbank, model: Calxeda Highbank
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] cma: CMA: reserved 16 MiB at 2e800000
[ 0.000000] Memory policy: ECC disabled, Data cache writealloc
...here with no iotable mapping.
>
> 2) If the virtual address returned by addruart on Tegra is different
> than any virtual addresses set up by Tegra's .map_io(), and Tegra's
> .map_io() sets up a very broad mapping that covers all peripherals
> including the UART, and hence the UART physical registers get mapped
> into two virtual addresses, will this cause any problems? IIRC,
> duplicate mappings can cause some issues on ARM, but perhaps that only
> applies to memory-like mappings, and not completely uncached IO mappings?
The virt address has to match. It can initially be a 1MB section and
then replaced with a 4K entry, but the same DEBUG_LL macros are used
throughout the boot process as the mapping is updated.
Duplicate mappings of different memory types is the problem. Multiple
mapping of the same type are fine and common (the zero page for example).
Rob
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-17 23:17 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-17 23:17 UTC (permalink / raw)
To: linux-arm-kernel
On 10/17/2012 11:22 AM, Stephen Warren wrote:
> On 10/17/2012 08:38 AM, Rob Herring wrote:
>> On 10/15/2012 02:07 PM, Stephen Warren wrote:
>>> From: Stephen Warren <swarren@nvidia.com>
>>>
>>> Move Tegra's debug-macro.S over to the common debug macro directory.
>>>
>>> Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
>>> all related options are selected in the same place.
>>>
>>> Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
>>> removed whenever Tegra is converted to multi-platform.
>>>
>>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>>> ---
>>> Rob, Arnd, Olof, I'd particularly like feedback on whether the following:
>>>
>>> #include "../../mach-tegra/iomap.h"
>>>
>>> in arch/arm/include/debug/tegra.S is acceptable. I'd really like to
>>> continue to #include a header to share the defines to Tegra physical
>>> memory layout and virtual based addresses with Tegra's io.c's struct
>>> map_desc entries, so they can't get out of sync. So, the include can
>>> either use the relative path as quoted above (which I don't think will
>>> cause any significant maintenance issue), or Tegra's iomap.h would have
>>> to be moved somewhere public so e.g. <tegra-iomap.h> could be included.
>>
>> We already have a way to get the phys and virt addresses at runtime with
>> addruart macro.
>
> So this discussion is mainly about the implementation of addruart.
>
>> Couldn't we wrap this with a proper function and setup
>> the mapping at runtime. This would move it out of the platforms.
>
> So, the mapping already is set up at run-time at least during early
> boot; __create_page_tables() in arch/arm/kernel/head.S calls addruart
> and sets up an entry for it.
>
> I suppose the implication here is that the virtual address that addruart
> returns doesn't have to match anything that the machine later sets up
> using iotable_init().
>
> If that's true, then Tegra's debug-macro.S only needs to know the UART
> physical address, and can make up almost any arbitrary virtual address
> (perhaps even driven by the logic you mention in your next paragraph
> below) and hence need not rely on Tegra's iomap.h. That said, we'd still
> have to manually remember not to create conflicting virtual address
> setups in the two places, which would still be easier with a shared header.
The virtual address has to remain the same.
A non-platform specific header for a fixed virtual address define would
be cleaner than relative includes.
>
> However, I then have two questions:
>
> 1) How long do the page tables set up by __create_page_tables() last; do
> they stick around forever, or at least as long as the macros from
> debug-macro.S are used, or are they replaced sometime, on the assumption
> that the machine's .map_io() will call iotable_init() and end up setting
> up the same mapping?
It works to...
[ 0.000000] Booting Linux on physical CPU 0
[ 0.000000] Linux version 3.5.4+ (rob at rob-laptop) (gcc version 4.7.2
(Ubuntu/Linaro 4.7.2-1ubuntu1) ) #280 SMP Wed Oct 17 18:00:29 CDT 2012 ()
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7),
cr=10c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
instruction cache
[ 0.000000] Machine: Highbank, model: Calxeda Highbank
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] cma: CMA: reserved 16 MiB at 2e800000
[ 0.000000] Memory policy: ECC disabled, Data cache writealloc
...here with no iotable mapping.
>
> 2) If the virtual address returned by addruart on Tegra is different
> than any virtual addresses set up by Tegra's .map_io(), and Tegra's
> .map_io() sets up a very broad mapping that covers all peripherals
> including the UART, and hence the UART physical registers get mapped
> into two virtual addresses, will this cause any problems? IIRC,
> duplicate mappings can cause some issues on ARM, but perhaps that only
> applies to memory-like mappings, and not completely uncached IO mappings?
The virt address has to match. It can initially be a 1MB section and
then replaced with a 4K entry, but the same DEBUG_LL macros are used
throughout the boot process as the mapping is updated.
Duplicate mappings of different memory types is the problem. Multiple
mapping of the same type are fine and common (the zero page for example).
Rob
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-17 21:12 ` Stephen Warren
@ 2012-10-18 9:53 ` Russell King - ARM Linux
-1 siblings, 0 replies; 28+ messages in thread
From: Russell King - ARM Linux @ 2012-10-18 9:53 UTC (permalink / raw)
To: Stephen Warren
Cc: Rob Herring, Olof Johansson, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
Stephen Warren,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Arnd Bergmann
On Wed, Oct 17, 2012 at 03:12:17PM -0600, Stephen Warren wrote:
> That implies we really do need to keep the two pieces of code completely
> in sync, so a shared header is the right way to go. It also implies that
> having duplicate mappings of the same physical address doesn't cause any
> immediate obvious catastrophic problems.
>
> Ways we might avoid files in arch/arm/include/debug having to use
> relative include paths to pick up that header are:
Why not take the opposite approach. Treat the platform as setting up the
addresses for the UART. Then arrange for the debug macros to match that.
Or we define a common virtual address for debug UARTs (which platforms
would not be able to use).
> b) Rework debug-macro.S so that it isn't an include file, but rather a
> regular top-level file.
No, that won't work. It's used in two places - the kernel and the
decompressor. Hence why it is an include file (it's not an include
file just for the fun of it.)
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-18 9:53 ` Russell King - ARM Linux
0 siblings, 0 replies; 28+ messages in thread
From: Russell King - ARM Linux @ 2012-10-18 9:53 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Oct 17, 2012 at 03:12:17PM -0600, Stephen Warren wrote:
> That implies we really do need to keep the two pieces of code completely
> in sync, so a shared header is the right way to go. It also implies that
> having duplicate mappings of the same physical address doesn't cause any
> immediate obvious catastrophic problems.
>
> Ways we might avoid files in arch/arm/include/debug having to use
> relative include paths to pick up that header are:
Why not take the opposite approach. Treat the platform as setting up the
addresses for the UART. Then arrange for the debug macros to match that.
Or we define a common virtual address for debug UARTs (which platforms
would not be able to use).
> b) Rework debug-macro.S so that it isn't an include file, but rather a
> regular top-level file.
No, that won't work. It's used in two places - the kernel and the
decompressor. Hence why it is an include file (it's not an include
file just for the fun of it.)
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-17 21:12 ` Stephen Warren
@ 2012-10-18 13:47 ` Rob Herring
-1 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-18 13:47 UTC (permalink / raw)
To: Stephen Warren
Cc: Olof Johansson, Arnd Bergmann,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
On 10/17/2012 04:12 PM, Stephen Warren wrote:
> On 10/17/2012 10:22 AM, Stephen Warren wrote:
snip
> That implies we really do need to keep the two pieces of code completely
> in sync, so a shared header is the right way to go. It also implies that
> having duplicate mappings of the same physical address doesn't cause any
> immediate obvious catastrophic problems.
>
> Ways we might avoid files in arch/arm/include/debug having to use
> relative include paths to pick up that header are:
>
> a) Move mach-${mach}/include/mach/iomap.h to iomap-${mach}.h in some
> standard include path.
>
Your goal should be to get rid of iomap.h though...
> b) Rework debug-macro.S so that it isn't an include file, but rather a
> regular top-level file. In other words, rather than compiling
> arch/arm/kernel/debug.S, and having that #include DEBUG_LL_INCLUDE,
> instead compile DEBUG_LL_SOURCE (i.e. arch/arm/mach-${mach}/debug.S by
> default), and have that #include any common parts (e.g. implementation
> of printhex8). This has benefits of:
>
> b1) arch/arm/mach-${mach}/debug.S is in the mach directory that owns it,
> rather than having them all dumped into a common location.
>
> b2) Can use #include "iomap.h", a non-relative include, to pick up the
> shared header
>
> b3) Perhaps we can simplify the current debug.S e.g. have a common
> debug-semihosting.S that contains the semihosting stuff, and only
> include that from mach-*/debug.S if that machine uses semihosting, or
> similar?
>
> (b) seems like a lot of work. I don't see any advantage of (a) over just
> using the relative include.
Agreed.
Here is what I mentioned previously. This removes the static mapping from
the platforms. This is untested and probably breaks on different DEBUG_LL
options. For now, platforms call debug_ll_io_init, but once all platforms
are converted, this can be called from devicemaps_init.
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 195ac2f..2ece92c 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -40,6 +40,9 @@ extern void iotable_init(struct map_desc *, int);
extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
void *caller);
+extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr);
+extern void debug_ll_io_init(void);
+
struct mem_type;
extern const struct mem_type *get_mem_type(unsigned int type);
/*
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 66f711b..93883ed 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -100,6 +100,13 @@ ENTRY(printch)
b 1b
ENDPROC(printch)
+ENTRY(debug_ll_addr)
+ addruart r2, r3, ip
+ str r2, [r0]
+ str r3, [r1]
+ mov pc, lr
+ENDPROC(debug_ll_addr)
+
#else
ENTRY(printascii)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 941dfb9..1c8c7be 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -876,6 +876,20 @@ static void __init pci_reserve_io(void)
#define pci_reserve_io() do { } while (0)
#endif
+void __init debug_ll_io_init(void)
+{
+ struct map_desc map;
+
+ if (!IS_ENABLED(CONFIG_DEBUG_LL))
+ return;
+
+ debug_ll_addr(&map.pfn, &map.virtual);
+ map.pfn = __phys_to_pfn(map.pfn);
+ map.length = PAGE_SIZE;
+ map.type = MT_DEVICE;
+ create_mapping(&map);
+}
+
static void * __initdata vmalloc_min =
(void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-18 13:47 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-18 13:47 UTC (permalink / raw)
To: linux-arm-kernel
On 10/17/2012 04:12 PM, Stephen Warren wrote:
> On 10/17/2012 10:22 AM, Stephen Warren wrote:
snip
> That implies we really do need to keep the two pieces of code completely
> in sync, so a shared header is the right way to go. It also implies that
> having duplicate mappings of the same physical address doesn't cause any
> immediate obvious catastrophic problems.
>
> Ways we might avoid files in arch/arm/include/debug having to use
> relative include paths to pick up that header are:
>
> a) Move mach-${mach}/include/mach/iomap.h to iomap-${mach}.h in some
> standard include path.
>
Your goal should be to get rid of iomap.h though...
> b) Rework debug-macro.S so that it isn't an include file, but rather a
> regular top-level file. In other words, rather than compiling
> arch/arm/kernel/debug.S, and having that #include DEBUG_LL_INCLUDE,
> instead compile DEBUG_LL_SOURCE (i.e. arch/arm/mach-${mach}/debug.S by
> default), and have that #include any common parts (e.g. implementation
> of printhex8). This has benefits of:
>
> b1) arch/arm/mach-${mach}/debug.S is in the mach directory that owns it,
> rather than having them all dumped into a common location.
>
> b2) Can use #include "iomap.h", a non-relative include, to pick up the
> shared header
>
> b3) Perhaps we can simplify the current debug.S e.g. have a common
> debug-semihosting.S that contains the semihosting stuff, and only
> include that from mach-*/debug.S if that machine uses semihosting, or
> similar?
>
> (b) seems like a lot of work. I don't see any advantage of (a) over just
> using the relative include.
Agreed.
Here is what I mentioned previously. This removes the static mapping from
the platforms. This is untested and probably breaks on different DEBUG_LL
options. For now, platforms call debug_ll_io_init, but once all platforms
are converted, this can be called from devicemaps_init.
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 195ac2f..2ece92c 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -40,6 +40,9 @@ extern void iotable_init(struct map_desc *, int);
extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
void *caller);
+extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr);
+extern void debug_ll_io_init(void);
+
struct mem_type;
extern const struct mem_type *get_mem_type(unsigned int type);
/*
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 66f711b..93883ed 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -100,6 +100,13 @@ ENTRY(printch)
b 1b
ENDPROC(printch)
+ENTRY(debug_ll_addr)
+ addruart r2, r3, ip
+ str r2, [r0]
+ str r3, [r1]
+ mov pc, lr
+ENDPROC(debug_ll_addr)
+
#else
ENTRY(printascii)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 941dfb9..1c8c7be 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -876,6 +876,20 @@ static void __init pci_reserve_io(void)
#define pci_reserve_io() do { } while (0)
#endif
+void __init debug_ll_io_init(void)
+{
+ struct map_desc map;
+
+ if (!IS_ENABLED(CONFIG_DEBUG_LL))
+ return;
+
+ debug_ll_addr(&map.pfn, &map.virtual);
+ map.pfn = __phys_to_pfn(map.pfn);
+ map.length = PAGE_SIZE;
+ map.type = MT_DEVICE;
+ create_mapping(&map);
+}
+
static void * __initdata vmalloc_min =
(void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-18 13:47 ` Rob Herring
@ 2012-10-18 13:54 ` Russell King - ARM Linux
-1 siblings, 0 replies; 28+ messages in thread
From: Russell King - ARM Linux @ 2012-10-18 13:54 UTC (permalink / raw)
To: Rob Herring
Cc: Stephen Warren, Olof Johansson,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Arnd Bergmann
On Thu, Oct 18, 2012 at 08:47:56AM -0500, Rob Herring wrote:
> Here is what I mentioned previously. This removes the static mapping from
> the platforms. This is untested and probably breaks on different DEBUG_LL
> options. For now, platforms call debug_ll_io_init, but once all platforms
> are converted, this can be called from devicemaps_init.
There's a problem with this approach. What if the platform specifically
sets the debug addresses to be within one of it's existing mappings (which
is definitely what you'd want to do with 8250-based UARTs attached to a
PCI bus.)
This isn't going to work in that case unless we split the debug mapping
from the PCI IO space mapping.
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-18 13:54 ` Russell King - ARM Linux
0 siblings, 0 replies; 28+ messages in thread
From: Russell King - ARM Linux @ 2012-10-18 13:54 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Oct 18, 2012 at 08:47:56AM -0500, Rob Herring wrote:
> Here is what I mentioned previously. This removes the static mapping from
> the platforms. This is untested and probably breaks on different DEBUG_LL
> options. For now, platforms call debug_ll_io_init, but once all platforms
> are converted, this can be called from devicemaps_init.
There's a problem with this approach. What if the platform specifically
sets the debug addresses to be within one of it's existing mappings (which
is definitely what you'd want to do with 8250-based UARTs attached to a
PCI bus.)
This isn't going to work in that case unless we split the debug mapping
from the PCI IO space mapping.
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-18 13:54 ` Russell King - ARM Linux
@ 2012-10-18 14:15 ` Rob Herring
-1 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-18 14:15 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Stephen Warren, Olof Johansson,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Arnd Bergmann
On 10/18/2012 08:54 AM, Russell King - ARM Linux wrote:
> On Thu, Oct 18, 2012 at 08:47:56AM -0500, Rob Herring wrote:
>> Here is what I mentioned previously. This removes the static mapping from
>> the platforms. This is untested and probably breaks on different DEBUG_LL
>> options. For now, platforms call debug_ll_io_init, but once all platforms
>> are converted, this can be called from devicemaps_init.
>
> There's a problem with this approach. What if the platform specifically
> sets the debug addresses to be within one of it's existing mappings (which
> is definitely what you'd want to do with 8250-based UARTs attached to a
> PCI bus.)
>
> This isn't going to work in that case unless we split the debug mapping
> from the PCI IO space mapping.
It is opt-in, so we may never get to the last step. We're still better
off than now. Is there a platform that is doing this? If so, I didn't
move any DEBUG_LL users to the fixed i/o space so they would still be
using their old i/o space address. Having 2 mappings would work, right?
You use the debug mapping initially and when PCI bus and the real
console driver are up, you switch to the fixed i/o space.
This isn't just a PCI issue. You could also have a mapping that covers a
block of SOC peripherals including the uart and you don't want a
separate mapping.
Rob
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-18 14:15 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2012-10-18 14:15 UTC (permalink / raw)
To: linux-arm-kernel
On 10/18/2012 08:54 AM, Russell King - ARM Linux wrote:
> On Thu, Oct 18, 2012 at 08:47:56AM -0500, Rob Herring wrote:
>> Here is what I mentioned previously. This removes the static mapping from
>> the platforms. This is untested and probably breaks on different DEBUG_LL
>> options. For now, platforms call debug_ll_io_init, but once all platforms
>> are converted, this can be called from devicemaps_init.
>
> There's a problem with this approach. What if the platform specifically
> sets the debug addresses to be within one of it's existing mappings (which
> is definitely what you'd want to do with 8250-based UARTs attached to a
> PCI bus.)
>
> This isn't going to work in that case unless we split the debug mapping
> from the PCI IO space mapping.
It is opt-in, so we may never get to the last step. We're still better
off than now. Is there a platform that is doing this? If so, I didn't
move any DEBUG_LL users to the fixed i/o space so they would still be
using their old i/o space address. Having 2 mappings would work, right?
You use the debug mapping initially and when PCI bus and the real
console driver are up, you switch to the fixed i/o space.
This isn't just a PCI issue. You could also have a mapping that covers a
block of SOC peripherals including the uart and you don't want a
separate mapping.
Rob
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-18 9:53 ` Russell King - ARM Linux
@ 2012-10-19 16:37 ` Stephen Warren
-1 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-19 16:37 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Rob Herring, Olof Johansson, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
Stephen Warren,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Arnd Bergmann
On 10/18/2012 03:53 AM, Russell King - ARM Linux wrote:
> On Wed, Oct 17, 2012 at 03:12:17PM -0600, Stephen Warren wrote:
>> That implies we really do need to keep the two pieces of code completely
>> in sync, so a shared header is the right way to go. It also implies that
>> having duplicate mappings of the same physical address doesn't cause any
>> immediate obvious catastrophic problems.
>>
>> Ways we might avoid files in arch/arm/include/debug having to use
>> relative include paths to pick up that header are:
>
> Why not take the opposite approach. Treat the platform as setting up the
> addresses for the UART. Then arrange for the debug macros to match that.
Well, wouldn't the debug macros match it by including a common header
file that defined the virtual address:-)
> Or we define a common virtual address for debug UARTs (which platforms
> would not be able to use).
That seems like good idea.
>> b) Rework debug-macro.S so that it isn't an include file, but rather a
>> regular top-level file.
>
> No, that won't work. It's used in two places - the kernel and the
> decompressor. Hence why it is an include file (it's not an include
> file just for the fun of it.)
Can't the file just be compiled twice by the two different Makefiles?
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-19 16:37 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-19 16:37 UTC (permalink / raw)
To: linux-arm-kernel
On 10/18/2012 03:53 AM, Russell King - ARM Linux wrote:
> On Wed, Oct 17, 2012 at 03:12:17PM -0600, Stephen Warren wrote:
>> That implies we really do need to keep the two pieces of code completely
>> in sync, so a shared header is the right way to go. It also implies that
>> having duplicate mappings of the same physical address doesn't cause any
>> immediate obvious catastrophic problems.
>>
>> Ways we might avoid files in arch/arm/include/debug having to use
>> relative include paths to pick up that header are:
>
> Why not take the opposite approach. Treat the platform as setting up the
> addresses for the UART. Then arrange for the debug macros to match that.
Well, wouldn't the debug macros match it by including a common header
file that defined the virtual address:-)
> Or we define a common virtual address for debug UARTs (which platforms
> would not be able to use).
That seems like good idea.
>> b) Rework debug-macro.S so that it isn't an include file, but rather a
>> regular top-level file.
>
> No, that won't work. It's used in two places - the kernel and the
> decompressor. Hence why it is an include file (it's not an include
> file just for the fun of it.)
Can't the file just be compiled twice by the two different Makefiles?
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
2012-10-18 13:47 ` Rob Herring
@ 2012-10-19 16:40 ` Stephen Warren
-1 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-19 16:40 UTC (permalink / raw)
To: Rob Herring
Cc: Olof Johansson, Arnd Bergmann,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Stephen Warren
On 10/18/2012 07:47 AM, Rob Herring wrote:
...
> Here is what I mentioned previously. This removes the static mapping from
> the platforms. This is untested and probably breaks on different DEBUG_LL
> options. For now, platforms call debug_ll_io_init, but once all platforms
> are converted, this can be called from devicemaps_init.
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> +void __init debug_ll_io_init(void)
> +{
> + struct map_desc map;
> +
> + if (!IS_ENABLED(CONFIG_DEBUG_LL))
> + return;
> +
> + debug_ll_addr(&map.pfn, &map.virtual);
> + map.pfn = __phys_to_pfn(map.pfn);
> + map.length = PAGE_SIZE;
> + map.type = MT_DEVICE;
> + create_mapping(&map);
> +}
OK, so I just call this new function from Tegra's tegra_map_common_io().
That looks pretty neat. I'll give it a try.
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-19 16:40 ` Stephen Warren
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Warren @ 2012-10-19 16:40 UTC (permalink / raw)
To: linux-arm-kernel
On 10/18/2012 07:47 AM, Rob Herring wrote:
...
> Here is what I mentioned previously. This removes the static mapping from
> the platforms. This is untested and probably breaks on different DEBUG_LL
> options. For now, platforms call debug_ll_io_init, but once all platforms
> are converted, this can be called from devicemaps_init.
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> +void __init debug_ll_io_init(void)
> +{
> + struct map_desc map;
> +
> + if (!IS_ENABLED(CONFIG_DEBUG_LL))
> + return;
> +
> + debug_ll_addr(&map.pfn, &map.virtual);
> + map.pfn = __phys_to_pfn(map.pfn);
> + map.length = PAGE_SIZE;
> + map.type = MT_DEVICE;
> + create_mapping(&map);
> +}
OK, so I just call this new function from Tegra's tegra_map_common_io().
That looks pretty neat. I'll give it a try.
^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2012-10-19 16:40 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-10-15 19:07 [PATCH V2 1/3] ARM: tegra: simplify DEBUG_LL UART selection options Stephen Warren
2012-10-15 19:07 ` Stephen Warren
[not found] ` <1350328024-30485-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-15 19:07 ` [PATCH V2 2/3] ARM: tegra: make debug-macro.S work standalone Stephen Warren
2012-10-15 19:07 ` Stephen Warren
2012-10-15 19:07 ` [PATCH V2 3/3] ARM: tegra: move debug-macro.S to include/debug Stephen Warren
2012-10-15 19:07 ` Stephen Warren
[not found] ` <1350328024-30485-3-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-17 14:03 ` Arnd Bergmann
2012-10-17 14:03 ` Arnd Bergmann
2012-10-17 14:38 ` Rob Herring
2012-10-17 14:38 ` Rob Herring
[not found] ` <507EC303.1080000-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-17 16:22 ` Stephen Warren
2012-10-17 16:22 ` Stephen Warren
[not found] ` <507EDB37.1060102-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-17 21:12 ` Stephen Warren
2012-10-17 21:12 ` Stephen Warren
[not found] ` <507F1F31.2060503-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-18 9:53 ` Russell King - ARM Linux
2012-10-18 9:53 ` Russell King - ARM Linux
[not found] ` <20121018095328.GS21164-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2012-10-19 16:37 ` Stephen Warren
2012-10-19 16:37 ` Stephen Warren
2012-10-18 13:47 ` Rob Herring
2012-10-18 13:47 ` Rob Herring
[not found] ` <5080088C.9090607-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-18 13:54 ` Russell King - ARM Linux
2012-10-18 13:54 ` Russell King - ARM Linux
[not found] ` <20121018135444.GT21164-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2012-10-18 14:15 ` Rob Herring
2012-10-18 14:15 ` Rob Herring
2012-10-19 16:40 ` Stephen Warren
2012-10-19 16:40 ` Stephen Warren
2012-10-17 23:17 ` Rob Herring
2012-10-17 23:17 ` Rob Herring
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