* [PATCH V3 1/5] ARM: implement debug_ll_io_init()
@ 2012-10-19 22:41 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
Cc: Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Stephen Warren
From: Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
When using DEBUG_LL, the UART's (or other HW's) registers are mapped
into early page tables based on the results of assembly macro addruart.
Later, when the page tables are replaced, the same virtual address must
remain valid. Historically, this has been ensured by using defines from
<mach/iomap.h> in both the implementation of addruart, and the machine's
.map_io() function. However, with the move to single zImage, we wish to
remove <mach/iomap.h>. To enable this, the macro addruart may be used
when constructing the late page tables too; addruart is exposed as a
C function debug_ll_addr(), and used to set up the required mapping in
debug_ll_io_init(), which may called on an opt-in basis from a machine's
.map_io() function.
Signed-off-by: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
[swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when
either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
I assume this first patch should actually go into some arm-soc branch so
that if others want to take advantage of it this kernel cycle, they can.
v3: New patch.
---
arch/arm/include/asm/mach/map.h | 7 +++++++
arch/arm/kernel/debug.S | 13 +++++++++++++
arch/arm/mm/mmu.c | 16 ++++++++++++++++
3 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 195ac2f..2fe141f 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -40,6 +40,13 @@ extern void iotable_init(struct map_desc *, int);
extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
void *caller);
+#ifdef CONFIG_DEBUG_LL
+extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr);
+extern void debug_ll_io_init(void);
+#else
+static inline void debug_ll_io_init(void) {}
+#endif
+
struct mem_type;
extern const struct mem_type *get_mem_type(unsigned int type);
/*
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 66f711b..7525ce4 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -100,6 +100,13 @@ ENTRY(printch)
b 1b
ENDPROC(printch)
+ENTRY(debug_ll_addr)
+ addruart r2, r3, ip
+ str r2, [r0]
+ str r3, [r1]
+ mov pc, lr
+ENDPROC(debug_ll_addr)
+
#else
ENTRY(printascii)
@@ -119,4 +126,10 @@ ENTRY(printch)
mov pc, lr
ENDPROC(printch)
+ENTRY(debug_ll_addr)
+ mov r2, #0
+ mov r3, #0
+ mov pc, lr
+ENDPROC(debug_ll_addr)
+
#endif
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 941dfb9..39719bb 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -876,6 +876,22 @@ static void __init pci_reserve_io(void)
#define pci_reserve_io() do { } while (0)
#endif
+#ifdef CONFIG_DEBUG_LL
+void __init debug_ll_io_init(void)
+{
+ struct map_desc map;
+
+ debug_ll_addr(&map.pfn, &map.virtual);
+ if (!map.pfn || !map.virtual)
+ return;
+ map.pfn = __phys_to_pfn(map.pfn);
+ map.virtual &= PAGE_MASK;
+ map.length = PAGE_SIZE;
+ map.type = MT_DEVICE;
+ create_mapping(&map);
+}
+#endif
+
static void * __initdata vmalloc_min =
(void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 1/5] ARM: implement debug_ll_io_init()
@ 2012-10-19 22:41 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <robherring2@gmail.com>
When using DEBUG_LL, the UART's (or other HW's) registers are mapped
into early page tables based on the results of assembly macro addruart.
Later, when the page tables are replaced, the same virtual address must
remain valid. Historically, this has been ensured by using defines from
<mach/iomap.h> in both the implementation of addruart, and the machine's
.map_io() function. However, with the move to single zImage, we wish to
remove <mach/iomap.h>. To enable this, the macro addruart may be used
when constructing the late page tables too; addruart is exposed as a
C function debug_ll_addr(), and used to set up the required mapping in
debug_ll_io_init(), which may called on an opt-in basis from a machine's
.map_io() function.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
[swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when
either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
I assume this first patch should actually go into some arm-soc branch so
that if others want to take advantage of it this kernel cycle, they can.
v3: New patch.
---
arch/arm/include/asm/mach/map.h | 7 +++++++
arch/arm/kernel/debug.S | 13 +++++++++++++
arch/arm/mm/mmu.c | 16 ++++++++++++++++
3 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 195ac2f..2fe141f 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -40,6 +40,13 @@ extern void iotable_init(struct map_desc *, int);
extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
void *caller);
+#ifdef CONFIG_DEBUG_LL
+extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr);
+extern void debug_ll_io_init(void);
+#else
+static inline void debug_ll_io_init(void) {}
+#endif
+
struct mem_type;
extern const struct mem_type *get_mem_type(unsigned int type);
/*
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 66f711b..7525ce4 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -100,6 +100,13 @@ ENTRY(printch)
b 1b
ENDPROC(printch)
+ENTRY(debug_ll_addr)
+ addruart r2, r3, ip
+ str r2, [r0]
+ str r3, [r1]
+ mov pc, lr
+ENDPROC(debug_ll_addr)
+
#else
ENTRY(printascii)
@@ -119,4 +126,10 @@ ENTRY(printch)
mov pc, lr
ENDPROC(printch)
+ENTRY(debug_ll_addr)
+ mov r2, #0
+ mov r3, #0
+ mov pc, lr
+ENDPROC(debug_ll_addr)
+
#endif
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 941dfb9..39719bb 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -876,6 +876,22 @@ static void __init pci_reserve_io(void)
#define pci_reserve_io() do { } while (0)
#endif
+#ifdef CONFIG_DEBUG_LL
+void __init debug_ll_io_init(void)
+{
+ struct map_desc map;
+
+ debug_ll_addr(&map.pfn, &map.virtual);
+ if (!map.pfn || !map.virtual)
+ return;
+ map.pfn = __phys_to_pfn(map.pfn);
+ map.virtual &= PAGE_MASK;
+ map.length = PAGE_SIZE;
+ map.type = MT_DEVICE;
+ create_mapping(&map);
+}
+#endif
+
static void * __initdata vmalloc_min =
(void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 2/5] ARM: tegra: simplify DEBUG_LL UART selection options
2012-10-19 22:41 ` Stephen Warren
@ 2012-10-19 22:41 ` Stephen Warren
-1 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
Cc: Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more:
* No upstream bootloader currently or will ever support this option.
* CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative.
Merge the fixed and automatic UART selection menus into a single choice
for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART,
rather than potentially having an AUTO option override whatever fixed
option was chosen.
Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART,
simply don't turn on DEBUG_LL. NONE used to be the default option, so
pick AUTO_ODMDATA as the new default.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
v3: No change.
v2: Remove redundant default selection in mach-tegra/Kconfig
---
arch/arm/mach-tegra/Kconfig | 40 ++++---------------
arch/arm/mach-tegra/common.c | 5 +-
arch/arm/mach-tegra/include/mach/uncompress.h | 52 ++-----------------------
arch/arm/mach-tegra/iomap.h | 14 -------
4 files changed, 15 insertions(+), 96 deletions(-)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 9ff6f6e..97fcd16 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -58,11 +58,16 @@ config TEGRA_AHB
perfomance parameters(priority, prefech size).
choice
- prompt "Default low-level debug console UART"
- default TEGRA_DEBUG_UART_NONE
+ prompt "Low-level debug console UART"
-config TEGRA_DEBUG_UART_NONE
- bool "None"
+config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
config TEGRA_DEBUG_UARTA
bool "UART-A"
@@ -81,33 +86,6 @@ config TEGRA_DEBUG_UARTE
endchoice
-choice
- prompt "Automatic low-level debug console UART"
- default TEGRA_DEBUG_UART_AUTO_NONE
-
-config TEGRA_DEBUG_UART_AUTO_NONE
- bool "None"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UART_AUTO_SCRATCH
- bool "Via UART scratch register"
- help
- Automatically determines which UART to use for low-level debug based
- on the UART scratch register value. Some bootloaders put ASCII 'D'
- in this register when they initialize their own console UART output.
- Using this option allows the kernel to automatically pick the same
- UART.
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index f688daa..b493d64 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,14 +44,13 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-#define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF)
u32 tegra_uart_config[3] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
- (u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET),
+ 0,
/* Debug UART virtual address */
- (u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET),
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 2772575..4150c71 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -139,51 +139,19 @@ int auto_odmdata(void)
}
#endif
-#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH
-int auto_scratch(void)
-{
- int i;
-
- /*
- * Look for the first UART that:
- * a) Is not in reset.
- * b) Is clocked.
- * c) Has a 'D' in the scratchpad register.
- *
- * Note that on Tegra30, the first two conditions are required, since
- * if not true, accesses to the UART scratch register will hang.
- * Tegra20 doesn't have this issue.
- *
- * The intent is that the bootloader will tell the kernel which UART
- * to use by setting up those conditions. If nothing found, we'll fall
- * back to what's specified in TEGRA_DEBUG_UART_BASE.
- */
- for (i = 0; i < ARRAY_SIZE(uarts); i++) {
- if (!uart_clocked(i))
- continue;
-
- uart = (volatile u8 *)uarts[i].base;
- if (uart[UART_SCR << DEBUG_UART_SHIFT] != 'D')
- continue;
-
- return i;
- }
-
- return -1;
-}
-#endif
-
/*
* Setup before decompression. This is where we do UART selection for
* earlyprintk and init the uart_base register.
*/
static inline void arch_decomp_setup(void)
{
- int uart_id, auto_uart_id;
+ int uart_id;
volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;
u32 chip, div;
-#if defined(CONFIG_TEGRA_DEBUG_UARTA)
+#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ uart_id = auto_odmdata();
+#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
uart_id = 0;
#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
uart_id = 1;
@@ -193,19 +161,7 @@ static inline void arch_decomp_setup(void)
uart_id = 3;
#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
uart_id = 4;
-#else
- uart_id = -1;
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- auto_uart_id = auto_odmdata();
-#elif defined(CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH)
- auto_uart_id = auto_scratch();
-#else
- auto_uart_id = -1;
#endif
- if (auto_uart_id != -1)
- uart_id = auto_uart_id;
if (uart_id < 0 || uart_id >= ARRAY_SIZE(uarts) ||
!uart_clocked(uart_id))
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index 5315103..db8be51 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -261,20 +261,6 @@
#define TEGRA_SDMMC4_BASE 0xC8000600
#define TEGRA_SDMMC4_SIZE SZ_512
-#if defined(CONFIG_TEGRA_DEBUG_UART_NONE)
-# define TEGRA_DEBUG_UART_BASE 0
-#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTA_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTB_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTC)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTC_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTD)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTD_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
-#endif
-
/* On TEGRA, many peripherals are very closely packed in
* two 256MB io windows (that actually only use about 64KB
* at the start of each).
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 2/5] ARM: tegra: simplify DEBUG_LL UART selection options
@ 2012-10-19 22:41 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more:
* No upstream bootloader currently or will ever support this option.
* CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative.
Merge the fixed and automatic UART selection menus into a single choice
for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART,
rather than potentially having an AUTO option override whatever fixed
option was chosen.
Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART,
simply don't turn on DEBUG_LL. NONE used to be the default option, so
pick AUTO_ODMDATA as the new default.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v3: No change.
v2: Remove redundant default selection in mach-tegra/Kconfig
---
arch/arm/mach-tegra/Kconfig | 40 ++++---------------
arch/arm/mach-tegra/common.c | 5 +-
arch/arm/mach-tegra/include/mach/uncompress.h | 52 ++-----------------------
arch/arm/mach-tegra/iomap.h | 14 -------
4 files changed, 15 insertions(+), 96 deletions(-)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 9ff6f6e..97fcd16 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -58,11 +58,16 @@ config TEGRA_AHB
perfomance parameters(priority, prefech size).
choice
- prompt "Default low-level debug console UART"
- default TEGRA_DEBUG_UART_NONE
+ prompt "Low-level debug console UART"
-config TEGRA_DEBUG_UART_NONE
- bool "None"
+config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
config TEGRA_DEBUG_UARTA
bool "UART-A"
@@ -81,33 +86,6 @@ config TEGRA_DEBUG_UARTE
endchoice
-choice
- prompt "Automatic low-level debug console UART"
- default TEGRA_DEBUG_UART_AUTO_NONE
-
-config TEGRA_DEBUG_UART_AUTO_NONE
- bool "None"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UART_AUTO_SCRATCH
- bool "Via UART scratch register"
- help
- Automatically determines which UART to use for low-level debug based
- on the UART scratch register value. Some bootloaders put ASCII 'D'
- in this register when they initialize their own console UART output.
- Using this option allows the kernel to automatically pick the same
- UART.
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index f688daa..b493d64 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,14 +44,13 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-#define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF)
u32 tegra_uart_config[3] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
- (u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET),
+ 0,
/* Debug UART virtual address */
- (u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET),
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 2772575..4150c71 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -139,51 +139,19 @@ int auto_odmdata(void)
}
#endif
-#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH
-int auto_scratch(void)
-{
- int i;
-
- /*
- * Look for the first UART that:
- * a) Is not in reset.
- * b) Is clocked.
- * c) Has a 'D' in the scratchpad register.
- *
- * Note that on Tegra30, the first two conditions are required, since
- * if not true, accesses to the UART scratch register will hang.
- * Tegra20 doesn't have this issue.
- *
- * The intent is that the bootloader will tell the kernel which UART
- * to use by setting up those conditions. If nothing found, we'll fall
- * back to what's specified in TEGRA_DEBUG_UART_BASE.
- */
- for (i = 0; i < ARRAY_SIZE(uarts); i++) {
- if (!uart_clocked(i))
- continue;
-
- uart = (volatile u8 *)uarts[i].base;
- if (uart[UART_SCR << DEBUG_UART_SHIFT] != 'D')
- continue;
-
- return i;
- }
-
- return -1;
-}
-#endif
-
/*
* Setup before decompression. This is where we do UART selection for
* earlyprintk and init the uart_base register.
*/
static inline void arch_decomp_setup(void)
{
- int uart_id, auto_uart_id;
+ int uart_id;
volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;
u32 chip, div;
-#if defined(CONFIG_TEGRA_DEBUG_UARTA)
+#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ uart_id = auto_odmdata();
+#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
uart_id = 0;
#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
uart_id = 1;
@@ -193,19 +161,7 @@ static inline void arch_decomp_setup(void)
uart_id = 3;
#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
uart_id = 4;
-#else
- uart_id = -1;
-#endif
-
-#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
- auto_uart_id = auto_odmdata();
-#elif defined(CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH)
- auto_uart_id = auto_scratch();
-#else
- auto_uart_id = -1;
#endif
- if (auto_uart_id != -1)
- uart_id = auto_uart_id;
if (uart_id < 0 || uart_id >= ARRAY_SIZE(uarts) ||
!uart_clocked(uart_id))
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index 5315103..db8be51 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -261,20 +261,6 @@
#define TEGRA_SDMMC4_BASE 0xC8000600
#define TEGRA_SDMMC4_SIZE SZ_512
-#if defined(CONFIG_TEGRA_DEBUG_UART_NONE)
-# define TEGRA_DEBUG_UART_BASE 0
-#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTA_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTB_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTC)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTC_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTD)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTD_BASE
-#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
-# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
-#endif
-
/* On TEGRA, many peripherals are very closely packed in
* two 256MB io windows (that actually only use about 64KB
* at the start of each).
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
2012-10-19 22:41 ` Stephen Warren
@ 2012-10-19 22:41 ` Stephen Warren
-1 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
Cc: Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Prior to this change, Tegra's debug-macro.S relied on uncompress.h having
determined which UART to use, and whether it was safe to use the UART
(i.e. is it not in reset, and is clocked). This determination was
communicated from uncompress.h to debug-macro.S using a few bytes of
Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h
was a required part of the kernel boot process; booting a non-compressed
kernel would not allow earlyprintk to operate.
This change duplicates the UART selection and validation logic into
debug-macro.S so that the reliance on uncompress.h is removed.
This also helps out with single-zImage work, since there is currently no
support for using any uncompress.h with single-zImage.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
v3: No change.
---
arch/arm/mach-tegra/common.c | 4 +-
arch/arm/mach-tegra/include/mach/debug-macro.S | 151 ++++++++++++++++++++---
arch/arm/mach-tegra/include/mach/uncompress.h | 13 --
arch/arm/mach-tegra/irammap.h | 9 --
4 files changed, 134 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index b493d64..a57dd7a 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,13 +44,15 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-u32 tegra_uart_config[3] = {
+u32 tegra_uart_config[4] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
0,
/* Debug UART virtual address */
0,
+ /* Scratch space for debug macro */
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 44ca7b1..d4c23d6 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -27,7 +27,42 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
+
+#define UART_SHIFT 2
+
+#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
+#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
+#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
+#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
+#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
+#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
+#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
+#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+
+#define checkuart(rp, rv, lhu, bit, uart) \
+ /* Load address of CLK_RST register */ \
+ movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+ /* Load value from CLK_RST register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's reset bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If set, can't use UART; jump to save no UART */ \
+ bne 90f ; \
+ /* Load address of CLK_OUT_ENB register */ \
+ movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+ /* Load value from CLK_OUT_ENB register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's clock enable bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If clear, can't use UART; jump to save no UART */ \
+ beq 90f ; \
+ /* Passed all tests, load address of UART registers */ \
+ movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+ movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+ /* Jump to save UART address */ \
+ b 91f
.macro addruart, rp, rv, tmp
adr \rp, 99f @ actual addr of 99f
@@ -36,22 +71,101 @@
ldr \rp, [\rp, #4] @ linked tegra_uart_config
sub \tmp, \rp, \rv @ actual tegra_uart_config
ldr \rp, [\tmp] @ Load tegra_uart_config
- cmp \rp, #1 @ needs intitialization?
+ cmp \rp, #1 @ needs initialization?
bne 100f @ no; go load the addresses
mov \rv, #0 @ yes; record init is done
str \rv, [\tmp]
- mov \rp, #TEGRA_IRAM_BASE @ See if cookie is in IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET]
- movw \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE & 0xffff
- movt \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE >> 16
- cmp \rv, \rp @ Cookie present?
- bne 100f @ No, use default UART
- mov \rp, #TEGRA_IRAM_BASE @ Load UART address from IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET + 4]
- str \rv, [\tmp, #4] @ Store in tegra_uart_phys
- sub \rv, \rv, #IO_APB_PHYS @ Calculate virt address
+
+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
+ /* Check ODMDATA */
+10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
+ movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
+ ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
+ ubfx \rv, \rp, #18, #2 @ 19:18 are console type
+ cmp \rv, #2 @ 2 and 3 mean DCC, UART
+ beq 11f @ some boards swap the meaning
+ cmp \rv, #3 @ so accept either
+ bne 90f
+11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
+ cmp \rv, #0 @ UART 0?
+ beq 20f
+ cmp \rv, #1 @ UART 1?
+ beq 21f
+ cmp \rv, #2 @ UART 2?
+ beq 22f
+ cmp \rv, #3 @ UART 3?
+ beq 23f
+ cmp \rv, #4 @ UART 4?
+ beq 24f
+ b 90f @ invalid
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART A validity */
+20: checkuart(\rp, \rv, L, 6, A)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART B validity */
+21: checkuart(\rp, \rv, L, 7, B)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART C validity */
+22: checkuart(\rp, \rv, H, 23, C)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART D validity */
+23: checkuart(\rp, \rv, U, 1, D)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART E validity */
+24:
+ checkuart(\rp, \rv, U, 2, E)
+#endif
+
+ /* No valid UART found */
+90: mov \rp, #0
+ /* fall through */
+
+ /* Record whichever UART we chose */
+91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
+ cmp \rp, #0 @ Valid UART address?
+ bne 92f @ Yes, go process it
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ b 100f @ Done
+92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
add \rv, \rv, #IO_APB_VIRT
str \rv, [\tmp, #8] @ Store in tegra_uart_virt
+ movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
+ movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
+ ldr \rv, [\rv, #0] @ Load HIDREV
+ ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
+ cmp \rv, #0x20 @ Tegra20?
+ moveq \rv, #0x75 @ Tegra20 divisor
+ movne \rv, #0xdd @ Tegra30 divisor
+ str \rv, [\tmp, #12] @ Save divisor to scratch
+ /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
+ mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ /* uart[UART_DLL] = div & 0xff; */
+ ldr \rv, [\tmp, #12]
+ and \rv, \rv, #0xff
+ str \rv, [\rp, #UART_DLL << UART_SHIFT]
+ /* uart[UART_DLM] = div >> 8; */
+ ldr \rv, [\tmp, #12]
+ lsr \rv, \rv, #8
+ str \rv, [\rp, #UART_DLM << UART_SHIFT]
+ /* uart[UART_LCR] = UART_LCR_WLEN8; */
+ mov \rv, #UART_LCR_WLEN8
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
b 100f
.align
@@ -59,27 +173,24 @@
.word tegra_uart_config
.ltorg
+ /* Load previously selected UART address */
100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
.endm
-#define UART_SHIFT 2
-
/*
* Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
- * check to make sure that we aren't in the CONFIG_TEGRA_DEBUG_UART_NONE case.
- * We use the fact that all 5 valid UART addresses all have something in the
- * 2nd-to-lowest byte.
+ * check to make sure that the UART address is actually valid.
*/
.macro senduart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
strneb \rd, [\rx, #UART_TX << UART_SHIFT]
1001:
.endm
.macro busyuart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
@@ -90,7 +201,7 @@
.macro waituart, rd, rx
#ifdef FLOW_CONTROL
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 4150c71..485003f 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -29,7 +29,6 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
#define BIT(x) (1 << (x))
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
@@ -52,17 +51,6 @@ static inline void flush(void)
{
}
-static inline void save_uart_address(void)
-{
- u32 *buf = (u32 *)(TEGRA_IRAM_BASE + TEGRA_IRAM_DEBUG_UART_OFFSET);
-
- if (uart) {
- buf[0] = TEGRA_IRAM_DEBUG_UART_COOKIE;
- buf[1] = (u32)uart;
- } else
- buf[0] = 0;
-}
-
static const struct {
u32 base;
u32 reset_reg;
@@ -169,7 +157,6 @@ static inline void arch_decomp_setup(void)
else
uart = (volatile u8 *)uarts[uart_id].base;
- save_uart_address();
if (uart == NULL)
return;
diff --git a/arch/arm/mach-tegra/irammap.h b/arch/arm/mach-tegra/irammap.h
index 0cbe632..501952a 100644
--- a/arch/arm/mach-tegra/irammap.h
+++ b/arch/arm/mach-tegra/irammap.h
@@ -23,13 +23,4 @@
#define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
#define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
-/*
- * These locations are written to by uncompress.h, and read by debug-macro.S.
- * The first word holds the cookie value if the data is valid. The second
- * word holds the UART physical address.
- */
-#define TEGRA_IRAM_DEBUG_UART_OFFSET SZ_1K
-#define TEGRA_IRAM_DEBUG_UART_SIZE 8
-#define TEGRA_IRAM_DEBUG_UART_COOKIE 0x55415254
-
#endif
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
@ 2012-10-19 22:41 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Prior to this change, Tegra's debug-macro.S relied on uncompress.h having
determined which UART to use, and whether it was safe to use the UART
(i.e. is it not in reset, and is clocked). This determination was
communicated from uncompress.h to debug-macro.S using a few bytes of
Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h
was a required part of the kernel boot process; booting a non-compressed
kernel would not allow earlyprintk to operate.
This change duplicates the UART selection and validation logic into
debug-macro.S so that the reliance on uncompress.h is removed.
This also helps out with single-zImage work, since there is currently no
support for using any uncompress.h with single-zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v3: No change.
---
arch/arm/mach-tegra/common.c | 4 +-
arch/arm/mach-tegra/include/mach/debug-macro.S | 151 ++++++++++++++++++++---
arch/arm/mach-tegra/include/mach/uncompress.h | 13 --
arch/arm/mach-tegra/irammap.h | 9 --
4 files changed, 134 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index b493d64..a57dd7a 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -44,13 +44,15 @@
* kernel is loaded. The data is declared here rather than debug-macro.S so
* that multiple inclusions of debug-macro.S point at the same data.
*/
-u32 tegra_uart_config[3] = {
+u32 tegra_uart_config[4] = {
/* Debug UART initialization required */
1,
/* Debug UART physical address */
0,
/* Debug UART virtual address */
0,
+ /* Scratch space for debug macro */
+ 0,
};
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 44ca7b1..d4c23d6 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -27,7 +27,42 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
+
+#define UART_SHIFT 2
+
+#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
+#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
+#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
+#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
+#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
+#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
+#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
+#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+
+#define checkuart(rp, rv, lhu, bit, uart) \
+ /* Load address of CLK_RST register */ \
+ movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+ /* Load value from CLK_RST register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's reset bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If set, can't use UART; jump to save no UART */ \
+ bne 90f ; \
+ /* Load address of CLK_OUT_ENB register */ \
+ movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+ movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+ /* Load value from CLK_OUT_ENB register */ \
+ ldr rp, [rp, #0] ; \
+ /* Test UART's clock enable bit */ \
+ tst rp, #(1 << bit) ; \
+ /* If clear, can't use UART; jump to save no UART */ \
+ beq 90f ; \
+ /* Passed all tests, load address of UART registers */ \
+ movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+ movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+ /* Jump to save UART address */ \
+ b 91f
.macro addruart, rp, rv, tmp
adr \rp, 99f @ actual addr of 99f
@@ -36,22 +71,101 @@
ldr \rp, [\rp, #4] @ linked tegra_uart_config
sub \tmp, \rp, \rv @ actual tegra_uart_config
ldr \rp, [\tmp] @ Load tegra_uart_config
- cmp \rp, #1 @ needs intitialization?
+ cmp \rp, #1 @ needs initialization?
bne 100f @ no; go load the addresses
mov \rv, #0 @ yes; record init is done
str \rv, [\tmp]
- mov \rp, #TEGRA_IRAM_BASE @ See if cookie is in IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET]
- movw \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE & 0xffff
- movt \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE >> 16
- cmp \rv, \rp @ Cookie present?
- bne 100f @ No, use default UART
- mov \rp, #TEGRA_IRAM_BASE @ Load UART address from IRAM
- ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET + 4]
- str \rv, [\tmp, #4] @ Store in tegra_uart_phys
- sub \rv, \rv, #IO_APB_PHYS @ Calculate virt address
+
+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
+ /* Check ODMDATA */
+10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
+ movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
+ ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
+ ubfx \rv, \rp, #18, #2 @ 19:18 are console type
+ cmp \rv, #2 @ 2 and 3 mean DCC, UART
+ beq 11f @ some boards swap the meaning
+ cmp \rv, #3 @ so accept either
+ bne 90f
+11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
+ cmp \rv, #0 @ UART 0?
+ beq 20f
+ cmp \rv, #1 @ UART 1?
+ beq 21f
+ cmp \rv, #2 @ UART 2?
+ beq 22f
+ cmp \rv, #3 @ UART 3?
+ beq 23f
+ cmp \rv, #4 @ UART 4?
+ beq 24f
+ b 90f @ invalid
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART A validity */
+20: checkuart(\rp, \rv, L, 6, A)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART B validity */
+21: checkuart(\rp, \rv, L, 7, B)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART C validity */
+22: checkuart(\rp, \rv, H, 23, C)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART D validity */
+23: checkuart(\rp, \rv, U, 1, D)
+#endif
+
+#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \
+ defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)
+ /* Check UART E validity */
+24:
+ checkuart(\rp, \rv, U, 2, E)
+#endif
+
+ /* No valid UART found */
+90: mov \rp, #0
+ /* fall through */
+
+ /* Record whichever UART we chose */
+91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
+ cmp \rp, #0 @ Valid UART address?
+ bne 92f @ Yes, go process it
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ b 100f @ Done
+92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
add \rv, \rv, #IO_APB_VIRT
str \rv, [\tmp, #8] @ Store in tegra_uart_virt
+ movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
+ movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
+ ldr \rv, [\rv, #0] @ Load HIDREV
+ ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version
+ cmp \rv, #0x20 @ Tegra20?
+ moveq \rv, #0x75 @ Tegra20 divisor
+ movne \rv, #0xdd @ Tegra30 divisor
+ str \rv, [\tmp, #12] @ Save divisor to scratch
+ /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
+ mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
+ /* uart[UART_DLL] = div & 0xff; */
+ ldr \rv, [\tmp, #12]
+ and \rv, \rv, #0xff
+ str \rv, [\rp, #UART_DLL << UART_SHIFT]
+ /* uart[UART_DLM] = div >> 8; */
+ ldr \rv, [\tmp, #12]
+ lsr \rv, \rv, #8
+ str \rv, [\rp, #UART_DLM << UART_SHIFT]
+ /* uart[UART_LCR] = UART_LCR_WLEN8; */
+ mov \rv, #UART_LCR_WLEN8
+ str \rv, [\rp, #UART_LCR << UART_SHIFT]
b 100f
.align
@@ -59,27 +173,24 @@
.word tegra_uart_config
.ltorg
+ /* Load previously selected UART address */
100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
.endm
-#define UART_SHIFT 2
-
/*
* Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
- * check to make sure that we aren't in the CONFIG_TEGRA_DEBUG_UART_NONE case.
- * We use the fact that all 5 valid UART addresses all have something in the
- * 2nd-to-lowest byte.
+ * check to make sure that the UART address is actually valid.
*/
.macro senduart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
strneb \rd, [\rx, #UART_TX << UART_SHIFT]
1001:
.endm
.macro busyuart, rd, rx
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
@@ -90,7 +201,7 @@
.macro waituart, rd, rx
#ifdef FLOW_CONTROL
- tst \rx, #0x0000ff00
+ cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 4150c71..485003f 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -29,7 +29,6 @@
#include <linux/serial_reg.h>
#include "../../iomap.h"
-#include "../../irammap.h"
#define BIT(x) (1 << (x))
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
@@ -52,17 +51,6 @@ static inline void flush(void)
{
}
-static inline void save_uart_address(void)
-{
- u32 *buf = (u32 *)(TEGRA_IRAM_BASE + TEGRA_IRAM_DEBUG_UART_OFFSET);
-
- if (uart) {
- buf[0] = TEGRA_IRAM_DEBUG_UART_COOKIE;
- buf[1] = (u32)uart;
- } else
- buf[0] = 0;
-}
-
static const struct {
u32 base;
u32 reset_reg;
@@ -169,7 +157,6 @@ static inline void arch_decomp_setup(void)
else
uart = (volatile u8 *)uarts[uart_id].base;
- save_uart_address();
if (uart == NULL)
return;
diff --git a/arch/arm/mach-tegra/irammap.h b/arch/arm/mach-tegra/irammap.h
index 0cbe632..501952a 100644
--- a/arch/arm/mach-tegra/irammap.h
+++ b/arch/arm/mach-tegra/irammap.h
@@ -23,13 +23,4 @@
#define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
#define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
-/*
- * These locations are written to by uncompress.h, and read by debug-macro.S.
- * The first word holds the cookie value if the data is valid. The second
- * word holds the UART physical address.
- */
-#define TEGRA_IRAM_DEBUG_UART_OFFSET SZ_1K
-#define TEGRA_IRAM_DEBUG_UART_SIZE 8
-#define TEGRA_IRAM_DEBUG_UART_COOKIE 0x55415254
-
#endif
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 4/5] ARM: tegra: don't include iomap.h from debug-macro.S
2012-10-19 22:41 ` Stephen Warren
@ 2012-10-19 22:41 ` Stephen Warren
-1 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
Cc: Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
In order to move Tegra's debug-macro.S to a common location for single
zImage, it must not rely on any machine-specific header files such as
<mach/iomap.h>. Duplicate the few physical address definitions that
debug-macro.S relies upon directly into the file.
To avoid tegra_io_desc[] requiring shared knowledge of the UART
mapping's virtual address, use a virtual address outside the ranges
in tegra_io_desc[]. Call debug_ll_io_init() to propagate the mapping
beyond the early pages tables.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
v3: New patch.
---
arch/arm/mach-tegra/include/mach/debug-macro.S | 24 +++++++++++++++++++-----
arch/arm/mach-tegra/io.c | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index d4c23d6..f67fd6d 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -26,10 +26,18 @@
#include <linux/serial_reg.h>
-#include "../../iomap.h"
-
#define UART_SHIFT 2
+/* Physical addresses */
+#define TEGRA_CLK_RESET_BASE 0x60006000
+#define TEGRA_APB_MISC_BASE 0x70000000
+#define TEGRA_UARTA_BASE 0x70006000
+#define TEGRA_UARTB_BASE 0x70006040
+#define TEGRA_UARTC_BASE 0x70006200
+#define TEGRA_UARTD_BASE 0x70006300
+#define TEGRA_UARTE_BASE 0x70006400
+#define TEGRA_PMC_BASE 0x7000e400
+
#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
@@ -39,6 +47,12 @@
#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+/*
+ * Must be 1MB-aligned since a 1MB mapping is used early on.
+ * Must not overlap with regions in mach-tegra/io.c:tegra_io_desc[].
+ */
+#define UART_VIRTUAL_BASE 0xfe100000
+
#define checkuart(rp, rv, lhu, bit, uart) \
/* Load address of CLK_RST register */ \
movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
@@ -139,10 +153,10 @@
91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
cmp \rp, #0 @ Valid UART address?
bne 92f @ Yes, go process it
- str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_virt
b 100f @ Done
-92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
- add \rv, \rv, #IO_APB_VIRT
+92: and \rv, \rp, #0xffffff @ offset within 1MB section
+ add \rv, \rv, #UART_VIRTUAL_BASE
str \rv, [\tmp, #8] @ Store in tegra_uart_virt
movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 7d09f30..bb9c9c2 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -59,5 +59,6 @@ static struct map_desc tegra_io_desc[] __initdata = {
void __init tegra_map_common_io(void)
{
+ debug_ll_io_init();
iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc));
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 4/5] ARM: tegra: don't include iomap.h from debug-macro.S
@ 2012-10-19 22:41 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
In order to move Tegra's debug-macro.S to a common location for single
zImage, it must not rely on any machine-specific header files such as
<mach/iomap.h>. Duplicate the few physical address definitions that
debug-macro.S relies upon directly into the file.
To avoid tegra_io_desc[] requiring shared knowledge of the UART
mapping's virtual address, use a virtual address outside the ranges
in tegra_io_desc[]. Call debug_ll_io_init() to propagate the mapping
beyond the early pages tables.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v3: New patch.
---
arch/arm/mach-tegra/include/mach/debug-macro.S | 24 +++++++++++++++++++-----
arch/arm/mach-tegra/io.c | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index d4c23d6..f67fd6d 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -26,10 +26,18 @@
#include <linux/serial_reg.h>
-#include "../../iomap.h"
-
#define UART_SHIFT 2
+/* Physical addresses */
+#define TEGRA_CLK_RESET_BASE 0x60006000
+#define TEGRA_APB_MISC_BASE 0x70000000
+#define TEGRA_UARTA_BASE 0x70006000
+#define TEGRA_UARTB_BASE 0x70006040
+#define TEGRA_UARTC_BASE 0x70006200
+#define TEGRA_UARTD_BASE 0x70006300
+#define TEGRA_UARTE_BASE 0x70006400
+#define TEGRA_PMC_BASE 0x7000e400
+
#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
@@ -39,6 +47,12 @@
#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
+/*
+ * Must be 1MB-aligned since a 1MB mapping is used early on.
+ * Must not overlap with regions in mach-tegra/io.c:tegra_io_desc[].
+ */
+#define UART_VIRTUAL_BASE 0xfe100000
+
#define checkuart(rp, rv, lhu, bit, uart) \
/* Load address of CLK_RST register */ \
movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
@@ -139,10 +153,10 @@
91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
cmp \rp, #0 @ Valid UART address?
bne 92f @ Yes, go process it
- str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_virt
b 100f @ Done
-92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
- add \rv, \rv, #IO_APB_VIRT
+92: and \rv, \rp, #0xffffff @ offset within 1MB section
+ add \rv, \rv, #UART_VIRTUAL_BASE
str \rv, [\tmp, #8] @ Store in tegra_uart_virt
movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 7d09f30..bb9c9c2 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -59,5 +59,6 @@ static struct map_desc tegra_io_desc[] __initdata = {
void __init tegra_map_common_io(void)
{
+ debug_ll_io_init();
iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc));
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 5/5] ARM: tegra: move debug-macro.S to include/debug
2012-10-19 22:41 ` Stephen Warren
@ 2012-10-19 22:41 ` Stephen Warren
-1 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
Cc: Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Move Tegra's debug-macro.S over to the common debug macro directory.
Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
all related options are selected in the same place.
Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
removed whenever Tegra is converted to multi-platform.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
v3: No change; just rebased on updated earlier patches.
v2: Remove redundant default selection in Kconfig.debug, fix indentation
there.
---
arch/arm/Kconfig.debug | 38 ++++++++++++++++++++
.../mach/debug-macro.S => include/debug/tegra.S} | 2 -
arch/arm/mach-tegra/Kconfig | 29 ---------------
3 files changed, 38 insertions(+), 31 deletions(-)
rename arch/arm/{mach-tegra/include/mach/debug-macro.S => include/debug/tegra.S} (99%)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857..96b9425 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -345,6 +345,13 @@ choice
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
+ config DEBUG_TEGRA_UART
+ depends on ARCH_TEGRA
+ bool "Use Tegra UART for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -409,6 +416,36 @@ choice
endchoice
+choice
+ prompt "Low-level debug console UART"
+ depends on DEBUG_LL && DEBUG_TEGRA_UART
+
+ config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
+
+ config TEGRA_DEBUG_UARTA
+ bool "UART A"
+
+ config TEGRA_DEBUG_UARTB
+ bool "UART B"
+
+ config TEGRA_DEBUG_UARTC
+ bool "UART C"
+
+ config TEGRA_DEBUG_UARTD
+ bool "UART D"
+
+ config TEGRA_DEBUG_UARTE
+ bool "UART E"
+
+endchoice
+
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
@@ -418,6 +455,7 @@ config DEBUG_LL_INCLUDE
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
+ default "debug/tegra.S" if DEBUG_TEGRA_UART
default "mach/debug-macro.S"
config EARLY_PRINTK
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/include/debug/tegra.S
similarity index 99%
rename from arch/arm/mach-tegra/include/mach/debug-macro.S
rename to arch/arm/include/debug/tegra.S
index f67fd6d..883d7c2 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/tegra.S
@@ -1,6 +1,4 @@
/*
- * arch/arm/mach-tegra/include/mach/debug-macro.S
- *
* Copyright (C) 2010,2011 Google, Inc.
* Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
*
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 97fcd16..e426d1b 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -57,35 +57,6 @@ config TEGRA_AHB
which controls AHB bus master arbitration and some
perfomance parameters(priority, prefech size).
-choice
- prompt "Low-level debug console UART"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UARTA
- bool "UART-A"
-
-config TEGRA_DEBUG_UARTB
- bool "UART-B"
-
-config TEGRA_DEBUG_UARTC
- bool "UART-C"
-
-config TEGRA_DEBUG_UARTD
- bool "UART-D"
-
-config TEGRA_DEBUG_UARTE
- bool "UART-E"
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH V3 5/5] ARM: tegra: move debug-macro.S to include/debug
@ 2012-10-19 22:41 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-19 22:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Move Tegra's debug-macro.S over to the common debug macro directory.
Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
all related options are selected in the same place.
Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
removed whenever Tegra is converted to multi-platform.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v3: No change; just rebased on updated earlier patches.
v2: Remove redundant default selection in Kconfig.debug, fix indentation
there.
---
arch/arm/Kconfig.debug | 38 ++++++++++++++++++++
.../mach/debug-macro.S => include/debug/tegra.S} | 2 -
arch/arm/mach-tegra/Kconfig | 29 ---------------
3 files changed, 38 insertions(+), 31 deletions(-)
rename arch/arm/{mach-tegra/include/mach/debug-macro.S => include/debug/tegra.S} (99%)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857..96b9425 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -345,6 +345,13 @@ choice
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
+ config DEBUG_TEGRA_UART
+ depends on ARCH_TEGRA
+ bool "Use Tegra UART for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -409,6 +416,36 @@ choice
endchoice
+choice
+ prompt "Low-level debug console UART"
+ depends on DEBUG_LL && DEBUG_TEGRA_UART
+
+ config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
+
+ config TEGRA_DEBUG_UARTA
+ bool "UART A"
+
+ config TEGRA_DEBUG_UARTB
+ bool "UART B"
+
+ config TEGRA_DEBUG_UARTC
+ bool "UART C"
+
+ config TEGRA_DEBUG_UARTD
+ bool "UART D"
+
+ config TEGRA_DEBUG_UARTE
+ bool "UART E"
+
+endchoice
+
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
@@ -418,6 +455,7 @@ config DEBUG_LL_INCLUDE
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
+ default "debug/tegra.S" if DEBUG_TEGRA_UART
default "mach/debug-macro.S"
config EARLY_PRINTK
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/include/debug/tegra.S
similarity index 99%
rename from arch/arm/mach-tegra/include/mach/debug-macro.S
rename to arch/arm/include/debug/tegra.S
index f67fd6d..883d7c2 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/tegra.S
@@ -1,6 +1,4 @@
/*
- * arch/arm/mach-tegra/include/mach/debug-macro.S
- *
* Copyright (C) 2010,2011 Google, Inc.
* Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
*
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 97fcd16..e426d1b 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -57,35 +57,6 @@ config TEGRA_AHB
which controls AHB bus master arbitration and some
perfomance parameters(priority, prefech size).
-choice
- prompt "Low-level debug console UART"
-
-config TEGRA_DEBUG_UART_AUTO_ODMDATA
- bool "Via ODMDATA"
- help
- Automatically determines which UART to use for low-level debug based
- on the ODMDATA value. This value is part of the BCT, and is written
- to the boot memory device using nvflash, or other flashing tool.
- When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
- 0/1/2/3/4 are UART A/B/C/D/E.
-
-config TEGRA_DEBUG_UARTA
- bool "UART-A"
-
-config TEGRA_DEBUG_UARTB
- bool "UART-B"
-
-config TEGRA_DEBUG_UARTC
- bool "UART-C"
-
-config TEGRA_DEBUG_UARTD
- bool "UART-D"
-
-config TEGRA_DEBUG_UARTE
- bool "UART-E"
-
-endchoice
-
config TEGRA_EMC_SCALING_ENABLE
bool "Enable scaling the memory frequency"
--
1.7.0.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH V3 1/5] ARM: implement debug_ll_io_init()
2012-10-19 22:41 ` Stephen Warren
@ 2012-10-20 13:36 ` Rob Herring
-1 siblings, 0 replies; 20+ messages in thread
From: Rob Herring @ 2012-10-20 13:36 UTC (permalink / raw)
To: Stephen Warren
Cc: Stephen Warren, Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 10/19/2012 05:41 PM, Stephen Warren wrote:
> From: Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>
> When using DEBUG_LL, the UART's (or other HW's) registers are mapped
> into early page tables based on the results of assembly macro addruart.
> Later, when the page tables are replaced, the same virtual address must
> remain valid. Historically, this has been ensured by using defines from
> <mach/iomap.h> in both the implementation of addruart, and the machine's
> .map_io() function. However, with the move to single zImage, we wish to
> remove <mach/iomap.h>. To enable this, the macro addruart may be used
> when constructing the late page tables too; addruart is exposed as a
> C function debug_ll_addr(), and used to set up the required mapping in
> debug_ll_io_init(), which may called on an opt-in basis from a machine's
> .map_io() function.
>
> Signed-off-by: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
> [swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
> debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when
> either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> I assume this first patch should actually go into some arm-soc branch so
> that if others want to take advantage of it this kernel cycle, they can.
>
> v3: New patch.
> ---
> arch/arm/include/asm/mach/map.h | 7 +++++++
> arch/arm/kernel/debug.S | 13 +++++++++++++
> arch/arm/mm/mmu.c | 16 ++++++++++++++++
> 3 files changed, 36 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
> index 195ac2f..2fe141f 100644
> --- a/arch/arm/include/asm/mach/map.h
> +++ b/arch/arm/include/asm/mach/map.h
> @@ -40,6 +40,13 @@ extern void iotable_init(struct map_desc *, int);
> extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
> void *caller);
>
> +#ifdef CONFIG_DEBUG_LL
> +extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr);
> +extern void debug_ll_io_init(void);
> +#else
> +static inline void debug_ll_io_init(void) {}
> +#endif
> +
> struct mem_type;
> extern const struct mem_type *get_mem_type(unsigned int type);
> /*
> diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
> index 66f711b..7525ce4 100644
> --- a/arch/arm/kernel/debug.S
> +++ b/arch/arm/kernel/debug.S
> @@ -100,6 +100,13 @@ ENTRY(printch)
> b 1b
> ENDPROC(printch)
>
> +ENTRY(debug_ll_addr)
> + addruart r2, r3, ip
> + str r2, [r0]
> + str r3, [r1]
> + mov pc, lr
> +ENDPROC(debug_ll_addr)
> +
> #else
>
> ENTRY(printascii)
> @@ -119,4 +126,10 @@ ENTRY(printch)
> mov pc, lr
> ENDPROC(printch)
>
> +ENTRY(debug_ll_addr)
> + mov r2, #0
> + mov r3, #0
Don't you want:
mov r2, #0
str r2, [r0]
str r2, [r1]
> + mov pc, lr
> +ENDPROC(debug_ll_addr)
> +
> #endif
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index 941dfb9..39719bb 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -876,6 +876,22 @@ static void __init pci_reserve_io(void)
> #define pci_reserve_io() do { } while (0)
> #endif
>
> +#ifdef CONFIG_DEBUG_LL
> +void __init debug_ll_io_init(void)
> +{
> + struct map_desc map;
> +
> + debug_ll_addr(&map.pfn, &map.virtual);
> + if (!map.pfn || !map.virtual)
> + return;
> + map.pfn = __phys_to_pfn(map.pfn);
> + map.virtual &= PAGE_MASK;
> + map.length = PAGE_SIZE;
> + map.type = MT_DEVICE;
> + create_mapping(&map);
> +}
> +#endif
> +
> static void * __initdata vmalloc_min =
> (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
>
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH V3 1/5] ARM: implement debug_ll_io_init()
@ 2012-10-20 13:36 ` Rob Herring
0 siblings, 0 replies; 20+ messages in thread
From: Rob Herring @ 2012-10-20 13:36 UTC (permalink / raw)
To: linux-arm-kernel
On 10/19/2012 05:41 PM, Stephen Warren wrote:
> From: Rob Herring <robherring2@gmail.com>
>
> When using DEBUG_LL, the UART's (or other HW's) registers are mapped
> into early page tables based on the results of assembly macro addruart.
> Later, when the page tables are replaced, the same virtual address must
> remain valid. Historically, this has been ensured by using defines from
> <mach/iomap.h> in both the implementation of addruart, and the machine's
> .map_io() function. However, with the move to single zImage, we wish to
> remove <mach/iomap.h>. To enable this, the macro addruart may be used
> when constructing the late page tables too; addruart is exposed as a
> C function debug_ll_addr(), and used to set up the required mapping in
> debug_ll_io_init(), which may called on an opt-in basis from a machine's
> .map_io() function.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> [swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
> debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when
> either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> I assume this first patch should actually go into some arm-soc branch so
> that if others want to take advantage of it this kernel cycle, they can.
>
> v3: New patch.
> ---
> arch/arm/include/asm/mach/map.h | 7 +++++++
> arch/arm/kernel/debug.S | 13 +++++++++++++
> arch/arm/mm/mmu.c | 16 ++++++++++++++++
> 3 files changed, 36 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
> index 195ac2f..2fe141f 100644
> --- a/arch/arm/include/asm/mach/map.h
> +++ b/arch/arm/include/asm/mach/map.h
> @@ -40,6 +40,13 @@ extern void iotable_init(struct map_desc *, int);
> extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
> void *caller);
>
> +#ifdef CONFIG_DEBUG_LL
> +extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr);
> +extern void debug_ll_io_init(void);
> +#else
> +static inline void debug_ll_io_init(void) {}
> +#endif
> +
> struct mem_type;
> extern const struct mem_type *get_mem_type(unsigned int type);
> /*
> diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
> index 66f711b..7525ce4 100644
> --- a/arch/arm/kernel/debug.S
> +++ b/arch/arm/kernel/debug.S
> @@ -100,6 +100,13 @@ ENTRY(printch)
> b 1b
> ENDPROC(printch)
>
> +ENTRY(debug_ll_addr)
> + addruart r2, r3, ip
> + str r2, [r0]
> + str r3, [r1]
> + mov pc, lr
> +ENDPROC(debug_ll_addr)
> +
> #else
>
> ENTRY(printascii)
> @@ -119,4 +126,10 @@ ENTRY(printch)
> mov pc, lr
> ENDPROC(printch)
>
> +ENTRY(debug_ll_addr)
> + mov r2, #0
> + mov r3, #0
Don't you want:
mov r2, #0
str r2, [r0]
str r2, [r1]
> + mov pc, lr
> +ENDPROC(debug_ll_addr)
> +
> #endif
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index 941dfb9..39719bb 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -876,6 +876,22 @@ static void __init pci_reserve_io(void)
> #define pci_reserve_io() do { } while (0)
> #endif
>
> +#ifdef CONFIG_DEBUG_LL
> +void __init debug_ll_io_init(void)
> +{
> + struct map_desc map;
> +
> + debug_ll_addr(&map.pfn, &map.virtual);
> + if (!map.pfn || !map.virtual)
> + return;
> + map.pfn = __phys_to_pfn(map.pfn);
> + map.virtual &= PAGE_MASK;
> + map.length = PAGE_SIZE;
> + map.type = MT_DEVICE;
> + create_mapping(&map);
> +}
> +#endif
> +
> static void * __initdata vmalloc_min =
> (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
>
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
2012-10-19 22:41 ` Stephen Warren
@ 2012-10-22 8:18 ` Peter De Schrijver
-1 siblings, 0 replies; 20+ messages in thread
From: Peter De Schrijver @ 2012-10-22 8:18 UTC (permalink / raw)
To: Stephen Warren
Cc: Stephen Warren, Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA
> +
> +#define checkuart(rp, rv, lhu, bit, uart) \
> + /* Load address of CLK_RST register */ \
> + movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
> + movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
> + /* Load value from CLK_RST register */ \
> + ldr rp, [rp, #0] ; \
> + /* Test UART's reset bit */ \
> + tst rp, #(1 << bit) ; \
> + /* If set, can't use UART; jump to save no UART */ \
> + bne 90f ; \
> + /* Load address of CLK_OUT_ENB register */ \
> + movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
> + movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
> + /* Load value from CLK_OUT_ENB register */ \
> + ldr rp, [rp, #0] ; \
> + /* Test UART's clock enable bit */ \
> + tst rp, #(1 << bit) ; \
> + /* If clear, can't use UART; jump to save no UART */ \
> + beq 90f ; \
> + /* Passed all tests, load address of UART registers */ \
> + movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
> + movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
> + /* Jump to save UART address */ \
> + b 91f
>
Maybe make this a subroutine?
Cheers,
Peter.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
@ 2012-10-22 8:18 ` Peter De Schrijver
0 siblings, 0 replies; 20+ messages in thread
From: Peter De Schrijver @ 2012-10-22 8:18 UTC (permalink / raw)
To: linux-arm-kernel
> +
> +#define checkuart(rp, rv, lhu, bit, uart) \
> + /* Load address of CLK_RST register */ \
> + movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
> + movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
> + /* Load value from CLK_RST register */ \
> + ldr rp, [rp, #0] ; \
> + /* Test UART's reset bit */ \
> + tst rp, #(1 << bit) ; \
> + /* If set, can't use UART; jump to save no UART */ \
> + bne 90f ; \
> + /* Load address of CLK_OUT_ENB register */ \
> + movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
> + movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
> + /* Load value from CLK_OUT_ENB register */ \
> + ldr rp, [rp, #0] ; \
> + /* Test UART's clock enable bit */ \
> + tst rp, #(1 << bit) ; \
> + /* If clear, can't use UART; jump to save no UART */ \
> + beq 90f ; \
> + /* Passed all tests, load address of UART registers */ \
> + movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
> + movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
> + /* Jump to save UART address */ \
> + b 91f
>
Maybe make this a subroutine?
Cheers,
Peter.
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
2012-10-22 8:18 ` Peter De Schrijver
@ 2012-10-22 16:24 ` Stephen Warren
-1 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-22 16:24 UTC (permalink / raw)
To: Peter De Schrijver
Cc: Stephen Warren, Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 10/22/2012 02:18 AM, Peter De Schrijver wrote:
>> +
>> +#define checkuart(rp, rv, lhu, bit, uart) \
>> + /* Load address of CLK_RST register */ \
>> + movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
>> + movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
>> + /* Load value from CLK_RST register */ \
>> + ldr rp, [rp, #0] ; \
>> + /* Test UART's reset bit */ \
>> + tst rp, #(1 << bit) ; \
>> + /* If set, can't use UART; jump to save no UART */ \
>> + bne 90f ; \
>> + /* Load address of CLK_OUT_ENB register */ \
>> + movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
>> + movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
>> + /* Load value from CLK_OUT_ENB register */ \
>> + ldr rp, [rp, #0] ; \
>> + /* Test UART's clock enable bit */ \
>> + tst rp, #(1 << bit) ; \
>> + /* If clear, can't use UART; jump to save no UART */ \
>> + beq 90f ; \
>> + /* Passed all tests, load address of UART registers */ \
>> + movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
>> + movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
>> + /* Jump to save UART address */ \
>> + b 91f
>>
>
> Maybe make this a subroutine?
The addruart macro (which in turn uses the checkuart macro) is only
allowed to use 3 registers; rp, rv, rtmp. I'm also not 100% sure if the
stack is guaranteed to be set up when addruart is called either. So, I
don't think making this a function is possible.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
@ 2012-10-22 16:24 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-10-22 16:24 UTC (permalink / raw)
To: linux-arm-kernel
On 10/22/2012 02:18 AM, Peter De Schrijver wrote:
>> +
>> +#define checkuart(rp, rv, lhu, bit, uart) \
>> + /* Load address of CLK_RST register */ \
>> + movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
>> + movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
>> + /* Load value from CLK_RST register */ \
>> + ldr rp, [rp, #0] ; \
>> + /* Test UART's reset bit */ \
>> + tst rp, #(1 << bit) ; \
>> + /* If set, can't use UART; jump to save no UART */ \
>> + bne 90f ; \
>> + /* Load address of CLK_OUT_ENB register */ \
>> + movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
>> + movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
>> + /* Load value from CLK_OUT_ENB register */ \
>> + ldr rp, [rp, #0] ; \
>> + /* Test UART's clock enable bit */ \
>> + tst rp, #(1 << bit) ; \
>> + /* If clear, can't use UART; jump to save no UART */ \
>> + beq 90f ; \
>> + /* Passed all tests, load address of UART registers */ \
>> + movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
>> + movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
>> + /* Jump to save UART address */ \
>> + b 91f
>>
>
> Maybe make this a subroutine?
The addruart macro (which in turn uses the checkuart macro) is only
allowed to use 3 registers; rp, rv, rtmp. I'm also not 100% sure if the
stack is guaranteed to be set up when addruart is called either. So, I
don't think making this a function is possible.
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
2012-10-22 16:24 ` Stephen Warren
@ 2012-10-22 22:13 ` Russell King - ARM Linux
-1 siblings, 0 replies; 20+ messages in thread
From: Russell King - ARM Linux @ 2012-10-22 22:13 UTC (permalink / raw)
To: Stephen Warren
Cc: Peter De Schrijver, Stephen Warren, Olof Johansson,
Arnd Bergmann, Rob Herring,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA
On Mon, Oct 22, 2012 at 10:24:32AM -0600, Stephen Warren wrote:
> On 10/22/2012 02:18 AM, Peter De Schrijver wrote:
> >> +
> >> +#define checkuart(rp, rv, lhu, bit, uart) \
> >> + /* Load address of CLK_RST register */ \
> >> + movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
> >> + movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
> >> + /* Load value from CLK_RST register */ \
> >> + ldr rp, [rp, #0] ; \
> >> + /* Test UART's reset bit */ \
> >> + tst rp, #(1 << bit) ; \
> >> + /* If set, can't use UART; jump to save no UART */ \
> >> + bne 90f ; \
> >> + /* Load address of CLK_OUT_ENB register */ \
> >> + movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
> >> + movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
> >> + /* Load value from CLK_OUT_ENB register */ \
> >> + ldr rp, [rp, #0] ; \
> >> + /* Test UART's clock enable bit */ \
> >> + tst rp, #(1 << bit) ; \
> >> + /* If clear, can't use UART; jump to save no UART */ \
> >> + beq 90f ; \
> >> + /* Passed all tests, load address of UART registers */ \
> >> + movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
> >> + movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
> >> + /* Jump to save UART address */ \
> >> + b 91f
> >>
> >
> > Maybe make this a subroutine?
>
> The addruart macro (which in turn uses the checkuart macro) is only
> allowed to use 3 registers; rp, rv, rtmp. I'm also not 100% sure if the
> stack is guaranteed to be set up when addruart is called either. So, I
> don't think making this a function is possible.
There's no stack. Remember, this stuff can be inserted as early as the
front of the kernel assembly code, where there is _nothing_ - the MMU
is off so virtual addresses are meaningless. etc.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S
@ 2012-10-22 22:13 ` Russell King - ARM Linux
0 siblings, 0 replies; 20+ messages in thread
From: Russell King - ARM Linux @ 2012-10-22 22:13 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 22, 2012 at 10:24:32AM -0600, Stephen Warren wrote:
> On 10/22/2012 02:18 AM, Peter De Schrijver wrote:
> >> +
> >> +#define checkuart(rp, rv, lhu, bit, uart) \
> >> + /* Load address of CLK_RST register */ \
> >> + movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
> >> + movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
> >> + /* Load value from CLK_RST register */ \
> >> + ldr rp, [rp, #0] ; \
> >> + /* Test UART's reset bit */ \
> >> + tst rp, #(1 << bit) ; \
> >> + /* If set, can't use UART; jump to save no UART */ \
> >> + bne 90f ; \
> >> + /* Load address of CLK_OUT_ENB register */ \
> >> + movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
> >> + movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
> >> + /* Load value from CLK_OUT_ENB register */ \
> >> + ldr rp, [rp, #0] ; \
> >> + /* Test UART's clock enable bit */ \
> >> + tst rp, #(1 << bit) ; \
> >> + /* If clear, can't use UART; jump to save no UART */ \
> >> + beq 90f ; \
> >> + /* Passed all tests, load address of UART registers */ \
> >> + movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
> >> + movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
> >> + /* Jump to save UART address */ \
> >> + b 91f
> >>
> >
> > Maybe make this a subroutine?
>
> The addruart macro (which in turn uses the checkuart macro) is only
> allowed to use 3 registers; rp, rv, rtmp. I'm also not 100% sure if the
> stack is guaranteed to be set up when addruart is called either. So, I
> don't think making this a function is possible.
There's no stack. Remember, this stuff can be inserted as early as the
front of the kernel assembly code, where there is _nothing_ - the MMU
is off so virtual addresses are meaningless. etc.
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH V3 1/5] ARM: implement debug_ll_io_init()
2012-10-19 22:41 ` Stephen Warren
@ 2012-11-05 19:03 ` Stephen Warren
-1 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-11-05 19:03 UTC (permalink / raw)
To: Stephen Warren
Cc: Olof Johansson, Arnd Bergmann, Rob Herring,
Russell King - ARM Linux,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Rob Herring
On 10/19/2012 04:41 PM, Stephen Warren wrote:
> When using DEBUG_LL, the UART's (or other HW's) registers are mapped
> into early page tables based on the results of assembly macro addruart.
> Later, when the page tables are replaced, the same virtual address must
> remain valid. Historically, this has been ensured by using defines from
> <mach/iomap.h> in both the implementation of addruart, and the machine's
> .map_io() function. However, with the move to single zImage, we wish to
> remove <mach/iomap.h>. To enable this, the macro addruart may be used
> when constructing the late page tables too; addruart is exposed as a
> C function debug_ll_addr(), and used to set up the required mapping in
> debug_ll_io_init(), which may called on an opt-in basis from a machine's
> .map_io() function.
Patch 1 has been taken into arm-soc, and I've applied patches 2-5 to the
Tegra tree.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH V3 1/5] ARM: implement debug_ll_io_init()
@ 2012-11-05 19:03 ` Stephen Warren
0 siblings, 0 replies; 20+ messages in thread
From: Stephen Warren @ 2012-11-05 19:03 UTC (permalink / raw)
To: linux-arm-kernel
On 10/19/2012 04:41 PM, Stephen Warren wrote:
> When using DEBUG_LL, the UART's (or other HW's) registers are mapped
> into early page tables based on the results of assembly macro addruart.
> Later, when the page tables are replaced, the same virtual address must
> remain valid. Historically, this has been ensured by using defines from
> <mach/iomap.h> in both the implementation of addruart, and the machine's
> .map_io() function. However, with the move to single zImage, we wish to
> remove <mach/iomap.h>. To enable this, the macro addruart may be used
> when constructing the late page tables too; addruart is exposed as a
> C function debug_ll_addr(), and used to set up the required mapping in
> debug_ll_io_init(), which may called on an opt-in basis from a machine's
> .map_io() function.
Patch 1 has been taken into arm-soc, and I've applied patches 2-5 to the
Tegra tree.
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2012-11-05 19:03 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-10-19 22:41 [PATCH V3 1/5] ARM: implement debug_ll_io_init() Stephen Warren
2012-10-19 22:41 ` Stephen Warren
[not found] ` <1350686507-3022-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-19 22:41 ` [PATCH V3 2/5] ARM: tegra: simplify DEBUG_LL UART selection options Stephen Warren
2012-10-19 22:41 ` Stephen Warren
2012-10-19 22:41 ` [PATCH V3 3/5] ARM: tegra: decouple uncompress.h and debug-macro.S Stephen Warren
2012-10-19 22:41 ` Stephen Warren
[not found] ` <1350686507-3022-3-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-22 8:18 ` Peter De Schrijver
2012-10-22 8:18 ` Peter De Schrijver
[not found] ` <20121022081830.GH3196-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2012-10-22 16:24 ` Stephen Warren
2012-10-22 16:24 ` Stephen Warren
[not found] ` <50857340.4010403-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-22 22:13 ` Russell King - ARM Linux
2012-10-22 22:13 ` Russell King - ARM Linux
2012-10-19 22:41 ` [PATCH V3 4/5] ARM: tegra: don't include iomap.h from debug-macro.S Stephen Warren
2012-10-19 22:41 ` Stephen Warren
2012-10-19 22:41 ` [PATCH V3 5/5] ARM: tegra: move debug-macro.S to include/debug Stephen Warren
2012-10-19 22:41 ` Stephen Warren
2012-10-20 13:36 ` [PATCH V3 1/5] ARM: implement debug_ll_io_init() Rob Herring
2012-10-20 13:36 ` Rob Herring
2012-11-05 19:03 ` Stephen Warren
2012-11-05 19:03 ` Stephen Warren
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