* [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug
@ 2012-11-17 20:52 Max Filippov
2012-12-04 19:36 ` Max Filippov
2012-12-05 11:15 ` Andreas Färber
0 siblings, 2 replies; 4+ messages in thread
From: Max Filippov @ 2012-11-17 20:52 UTC (permalink / raw)
To: qemu-devel; +Cc: Igor Mammedov, Andreas Färber, Max Filippov
cpu_get_phys_page_debug is not in sync with cpu_x86_handle_mmu_fault:
the latter first checks CR0_PG_MASK and only after CR4_PAE_MASK.
This fixes odd gdb code display with PAE enabled.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
target-i386/helper.c | 37 ++++++++++++++++++++-----------------
1 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bf206cf..7f5e8e3 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -877,7 +877,11 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr)
uint32_t page_offset;
int page_size;
- if (env->cr[4] & CR4_PAE_MASK) {
+ if (!(env->cr[0] & CR0_PG_MASK)) {
+ pte = addr;
+ page_size = 4096;
+ pte = pte & env->a20_mask;
+ } else if (env->cr[4] & CR4_PAE_MASK) {
target_ulong pdpe_addr;
uint64_t pde, pdpe;
@@ -935,26 +939,25 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr)
} else {
uint32_t pde;
- if (!(env->cr[0] & CR0_PG_MASK)) {
- pte = addr;
- page_size = 4096;
+ /* page directory entry */
+ pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) &
+ env->a20_mask;
+ pde = ldl_phys(pde_addr);
+ if (!(pde & PG_PRESENT_MASK)) {
+ return -1;
+ }
+ if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
+ pte = pde & ~0x003ff000; /* align to 4MB */
+ page_size = 4096 * 1024;
} else {
/* page directory entry */
- pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask;
- pde = ldl_phys(pde_addr);
- if (!(pde & PG_PRESENT_MASK))
+ pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) &
+ env->a20_mask;
+ pte = ldl_phys(pte_addr);
+ if (!(pte & PG_PRESENT_MASK)) {
return -1;
- if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
- pte = pde & ~0x003ff000; /* align to 4MB */
- page_size = 4096 * 1024;
- } else {
- /* page directory entry */
- pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask;
- pte = ldl_phys(pte_addr);
- if (!(pte & PG_PRESENT_MASK))
- return -1;
- page_size = 4096;
}
+ page_size = 4096;
}
pte = pte & env->a20_mask;
}
--
1.7.7.6
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug
2012-11-17 20:52 [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug Max Filippov
@ 2012-12-04 19:36 ` Max Filippov
2012-12-05 11:15 ` Andreas Färber
1 sibling, 0 replies; 4+ messages in thread
From: Max Filippov @ 2012-12-04 19:36 UTC (permalink / raw)
To: qemu-devel; +Cc: Igor Mammedov, Andreas Färber, Max Filippov
On Sun, Nov 18, 2012 at 12:52 AM, Max Filippov <jcmvbkbc@gmail.com> wrote:
> cpu_get_phys_page_debug is not in sync with cpu_x86_handle_mmu_fault:
> the latter first checks CR0_PG_MASK and only after CR4_PAE_MASK.
>
> This fixes odd gdb code display with PAE enabled.
>
> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
> ---
> target-i386/helper.c | 37 ++++++++++++++++++++-----------------
> 1 files changed, 20 insertions(+), 17 deletions(-)
Ping?
--
Thanks.
-- Max
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug
2012-11-17 20:52 [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug Max Filippov
2012-12-04 19:36 ` Max Filippov
@ 2012-12-05 11:15 ` Andreas Färber
2012-12-05 11:36 ` Max Filippov
1 sibling, 1 reply; 4+ messages in thread
From: Andreas Färber @ 2012-12-05 11:15 UTC (permalink / raw)
To: Max Filippov; +Cc: Igor Mammedov, qemu-devel
Am 17.11.2012 21:52, schrieb Max Filippov:
> cpu_get_phys_page_debug is not in sync with cpu_x86_handle_mmu_fault:
> the latter first checks CR0_PG_MASK and only after CR4_PAE_MASK.
>
> This fixes odd gdb code display with PAE enabled.
>
> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
You write, they are "not in sync". Would it be possible to share code to
assure this, e.g., by calling a helper function from both?
Regards,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug
2012-12-05 11:15 ` Andreas Färber
@ 2012-12-05 11:36 ` Max Filippov
0 siblings, 0 replies; 4+ messages in thread
From: Max Filippov @ 2012-12-05 11:36 UTC (permalink / raw)
To: Andreas Färber; +Cc: Igor Mammedov, qemu-devel
On Wed, Dec 5, 2012 at 3:15 PM, Andreas Färber <afaerber@suse.de> wrote:
> Am 17.11.2012 21:52, schrieb Max Filippov:
>> cpu_get_phys_page_debug is not in sync with cpu_x86_handle_mmu_fault:
>> the latter first checks CR0_PG_MASK and only after CR4_PAE_MASK.
>>
>> This fixes odd gdb code display with PAE enabled.
>>
>> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
>
> You write, they are "not in sync". Would it be possible to share code to
> assure this, e.g., by calling a helper function from both?
I'd say yes though that'd be a bigger change. I'll try to do it.
--
Thanks.
-- Max
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-12-05 11:49 UTC | newest]
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2012-11-17 20:52 [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug Max Filippov
2012-12-04 19:36 ` Max Filippov
2012-12-05 11:15 ` Andreas Färber
2012-12-05 11:36 ` Max Filippov
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