All of lore.kernel.org
 help / color / mirror / Atom feed
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
	Grant Likely <grant.likely@secretlab.ca>,
	Russell King <linux@arm.linux.org.uk>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	devicetree-discuss@lists.ozlabs.org,
	Lior Amsalem <alior@marvell.com>, Andrew Lunn <andrew@lunn.ch>,
	Jason Cooper <jason@lakedaemon.net>,
	Arnd Bergmann <arnd@arndb.de>, Maen Suleiman <maen@marvell.com>,
	Thierry Reding <thierry.reding@avionic-design.de>,
	Gregory Clement <gregory.clement@free-electrons.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	Olof Johansson <olof@lixom.net>,
	Tawfik Bayouk <tawfik@marvell.com>,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
	Mitch Bradley <wmb@firmworks.com>,
	Andrew Murray <andrew.murray@arm.com>
Subject: [PATCH v5 13/17] arm: mvebu: PCIe Device Tree informations for Armada XP DB
Date: Thu, 21 Mar 2013 18:30:21 +0100	[thread overview]
Message-ID: <1363887025-19931-14-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1363887025-19931-1-git-send-email-thomas.petazzoni@free-electrons.com>

The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/arm/boot/dts/armada-xp-db.dts |   33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index e83505e..54cc5bb 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -121,5 +121,38 @@
 				spi-max-frequency = <20000000>;
 			};
 		};
+
+		pcie-controller {
+			status = "okay";
+
+			/*
+			 * All 6 slots are physically present as
+			 * standard PCIe slots on the board.
+			 */
+			pcie@1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+			pcie@2,0 {
+				/* Port 0, Lane 1 */
+				status = "okay";
+			};
+			pcie@3,0 {
+				/* Port 0, Lane 2 */
+				status = "okay";
+			};
+			pcie@4,0 {
+				/* Port 0, Lane 3 */
+				status = "okay";
+			};
+			pcie@9,0 {
+				/* Port 2, Lane 0 */
+				status = "okay";
+			};
+			pcie@10,0 {
+				/* Port 3, Lane 0 */
+				status = "okay";
+			};
+		};
 	};
 };
-- 
1.7.9.5

WARNING: multiple messages have this Message-ID (diff)
From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 13/17] arm: mvebu: PCIe Device Tree informations for Armada XP DB
Date: Thu, 21 Mar 2013 18:30:21 +0100	[thread overview]
Message-ID: <1363887025-19931-14-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1363887025-19931-1-git-send-email-thomas.petazzoni@free-electrons.com>

The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/arm/boot/dts/armada-xp-db.dts |   33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index e83505e..54cc5bb 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -121,5 +121,38 @@
 				spi-max-frequency = <20000000>;
 			};
 		};
+
+		pcie-controller {
+			status = "okay";
+
+			/*
+			 * All 6 slots are physically present as
+			 * standard PCIe slots on the board.
+			 */
+			pcie at 1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+			pcie at 2,0 {
+				/* Port 0, Lane 1 */
+				status = "okay";
+			};
+			pcie at 3,0 {
+				/* Port 0, Lane 2 */
+				status = "okay";
+			};
+			pcie at 4,0 {
+				/* Port 0, Lane 3 */
+				status = "okay";
+			};
+			pcie at 9,0 {
+				/* Port 2, Lane 0 */
+				status = "okay";
+			};
+			pcie at 10,0 {
+				/* Port 3, Lane 0 */
+				status = "okay";
+			};
+		};
 	};
 };
-- 
1.7.9.5

  parent reply	other threads:[~2013-03-21 17:30 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-21 17:30 [PATCH v5 00/17] PCIe support for the Armada 370 and Armada XP SoCs Thomas Petazzoni
2013-03-21 17:30 ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 01/17] of/pci: Provide support for parsing PCI DT ranges property Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
     [not found]   ` <1363887025-19931-2-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-03-22 10:00     ` Andrew Murray
2013-03-22 10:00       ` Andrew Murray
2013-03-22 10:00       ` Andrew Murray
2013-03-22 10:12   ` Thierry Reding
2013-03-22 10:12     ` Thierry Reding
     [not found]     ` <20130322101238.GA22929-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2013-03-22 10:20       ` Thomas Petazzoni
2013-03-22 10:20         ` Thomas Petazzoni
2013-03-22 10:20         ` Thomas Petazzoni
2013-03-22 11:03         ` Andrew Murray
2013-03-22 11:03           ` Andrew Murray
2013-03-22 11:03           ` Andrew Murray
2013-03-21 17:30 ` [PATCH v5 02/17] of/pci: Add of_pci_get_devfn() function Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 03/17] of/pci: Add of_pci_parse_bus_range() function Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 04/17] pci: infrastructure to add drivers in drivers/pci/host Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 05/17] arm: pci: add a align_resource hook Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 06/17] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 07/17] clk: mvebu: add more PCIe clocks for Armada XP Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 08/17] pci: PCIe driver for Marvell Armada 370/XP systems Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 09/17] arm: mvebu: PCIe support is now available on mvebu Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 10/17] arm: mvebu: add PCIe Device Tree informations for Armada 370 Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 11/17] arm: mvebu: add PCIe Device Tree informations for Armada XP Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 12/17] arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` Thomas Petazzoni [this message]
2013-03-21 17:30   ` [PATCH v5 13/17] arm: mvebu: PCIe Device Tree informations for Armada XP DB Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 14/17] arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 15/17] arm: mvebu: PCIe Device Tree informations for Armada 370 DB Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 16/17] arm: mvebu: PCIe Device Tree informations for Armada XP GP Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni
2013-03-21 17:30 ` [PATCH v5 17/17] arm: mvebu: update defconfig with PCI and USB support Thomas Petazzoni
2013-03-21 17:30   ` Thomas Petazzoni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1363887025-19931-14-git-send-email-thomas.petazzoni@free-electrons.com \
    --to=thomas.petazzoni@free-electrons.com \
    --cc=alior@marvell.com \
    --cc=andrew.murray@arm.com \
    --cc=andrew@lunn.ch \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=devicetree-discuss@lists.ozlabs.org \
    --cc=ezequiel.garcia@free-electrons.com \
    --cc=grant.likely@secretlab.ca \
    --cc=gregory.clement@free-electrons.com \
    --cc=jason@lakedaemon.net \
    --cc=jgunthorpe@obsidianresearch.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=maen@marvell.com \
    --cc=olof@lixom.net \
    --cc=tawfik@marvell.com \
    --cc=thierry.reding@avionic-design.de \
    --cc=wmb@firmworks.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.