* [PATCH 0/6] ARM: ux500: first multiplatform series
@ 2013-03-21 11:49 Linus Walleij
2013-03-21 11:49 ` [PATCH 1/6] ARM: ux500: move debugmacro to debug includes Linus Walleij
` (6 more replies)
0 siblings, 7 replies; 49+ messages in thread
From: Linus Walleij @ 2013-03-21 11:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Linus Walleij <linus.walleij@linaro.org>
This is the first set in my ux500 multiplatform series.
As you can see it starts out by getting rid of three
files in <mach/*>. It's enough stuff to discuss already,
and relates to my recent question of whether the mailbox
subsystem can be merged into the ARM SoC tree.
Linus Walleij (6):
ARM: ux500: move debugmacro to debug includes
clk: ux500: pass clock base adresses in init call
mfd: prcmu: pass a base and size with the early initcall
mfd: db8500-prcmu: get base address from resource
ARM: ux500: move PRCMU functions into the CPUidle driver
ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
arch/arm/Kconfig.debug | 8 +
arch/arm/include/debug/ux500.S | 48 ++++++
arch/arm/mach-ux500/board-mop500-audio.c | 1 -
arch/arm/mach-ux500/board-mop500-pins.c | 2 -
arch/arm/mach-ux500/board-mop500-sdi.c | 2 +-
arch/arm/mach-ux500/board-mop500-uib.c | 1 -
arch/arm/mach-ux500/board-mop500.c | 2 +-
arch/arm/mach-ux500/cache-l2x0.c | 2 +-
arch/arm/mach-ux500/cpu-db8500.c | 6 +-
arch/arm/mach-ux500/cpu.c | 25 +--
arch/arm/mach-ux500/cpuidle.c | 148 +++++++++++++++++-
arch/arm/mach-ux500/db8500-regs.h | 201 ++++++++++++++++++++++++
arch/arm/mach-ux500/devices-common.c | 1 -
arch/arm/mach-ux500/devices-db8500.c | 8 +-
arch/arm/mach-ux500/devices-db8500.h | 1 +
arch/arm/mach-ux500/devices.c | 3 +-
arch/arm/mach-ux500/id.c | 2 +-
arch/arm/mach-ux500/include/mach/db8500-regs.h | 173 ---------------------
arch/arm/mach-ux500/include/mach/debug-macro.S | 39 -----
arch/arm/mach-ux500/include/mach/hardware.h | 47 ------
arch/arm/mach-ux500/include/mach/irqs.h | 2 -
arch/arm/mach-ux500/include/mach/uncompress.h | 3 +-
arch/arm/mach-ux500/platsmp.c | 2 +-
arch/arm/mach-ux500/timer.c | 2 +-
arch/arm/mach-ux500/usb.c | 2 +-
drivers/clk/ux500/clk-prcc.c | 1 -
drivers/clk/ux500/u8500_clk.c | 142 ++++++++---------
drivers/clocksource/clksrc-dbx500-prcmu.c | 1 -
drivers/mfd/db8500-prcmu.c | 176 +++++----------------
drivers/mfd/dbx500-prcmu-regs.h | 204 +++++++++++--------------
include/linux/mfd/db8500-prcmu.h | 10 +-
include/linux/mfd/dbx500-prcmu.h | 36 +----
include/linux/platform_data/clk-ux500.h | 3 +-
33 files changed, 647 insertions(+), 657 deletions(-)
create mode 100644 arch/arm/include/debug/ux500.S
create mode 100644 arch/arm/mach-ux500/db8500-regs.h
delete mode 100644 arch/arm/mach-ux500/include/mach/db8500-regs.h
delete mode 100644 arch/arm/mach-ux500/include/mach/debug-macro.S
delete mode 100644 arch/arm/mach-ux500/include/mach/hardware.h
--
1.7.11.3
^ permalink raw reply [flat|nested] 49+ messages in thread* [PATCH 1/6] ARM: ux500: move debugmacro to debug includes 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij @ 2013-03-21 11:49 ` Linus Walleij 2013-03-21 12:06 ` Arnd Bergmann 2013-03-21 11:49 ` [PATCH 2/6] clk: ux500: pass clock base adresses in init call Linus Walleij ` (5 subsequent siblings) 6 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-21 11:49 UTC (permalink / raw) To: linux-arm-kernel From: Linus Walleij <linus.walleij@linaro.org> This moves the Ux500 debug macro to the debug headers to make way for multiplatform support. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/Kconfig.debug | 8 ++++++ arch/arm/include/debug/ux500.S | 39 ++++++++++++++++++++++++++ arch/arm/mach-ux500/include/mach/debug-macro.S | 39 -------------------------- 3 files changed, 47 insertions(+), 39 deletions(-) create mode 100644 arch/arm/include/debug/ux500.S delete mode 100644 arch/arm/mach-ux500/include/mach/debug-macro.S diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index acdddda..a7b6f8b 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -414,6 +414,13 @@ choice Say Y here if you want the debug print routines to direct their output to the uart1 port on SiRFmarco devices. + config DEBUG_UX500_UART + depends on ARCH_U8500 + bool "Use Ux500 UART for low-level debug" + help + Say Y here if you want kernel low-level debugging support + on Ux500 based platforms. + config DEBUG_VEXPRESS_UART0_DETECT bool "Autodetect UART0 on Versatile Express Cortex-A core tiles" depends on ARCH_VEXPRESS && CPU_CP15_MMU @@ -598,6 +605,7 @@ config DEBUG_LL_INCLUDE DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 default "debug/vt8500.S" if DEBUG_VT8500_UART0 default "debug/tegra.S" if DEBUG_TEGRA_UART + default "debug/ux500.S" if DEBUG_UX500_UART default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1 default "mach/debug-macro.S" diff --git a/arch/arm/include/debug/ux500.S b/arch/arm/include/debug/ux500.S new file mode 100644 index 0000000..6703522 --- /dev/null +++ b/arch/arm/include/debug/ux500.S @@ -0,0 +1,39 @@ +/* + * Debugging macro include header + * + * Copyright (C) 2009 ST-Ericsson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#include <mach/hardware.h> + +#if CONFIG_UX500_DEBUG_UART > 2 +#error Invalid Ux500 debug UART +#endif + +/* + * DEBUG_LL only works if only one SOC is built in. We don't use #else below + * in order to get "__UX500_UART redefined" warnings if more than one SOC is + * built, so that there's some hint during the build that something is wrong. + */ + +#ifdef CONFIG_UX500_SOC_DB8500 +#define __UX500_UART(n) U8500_UART##n##_BASE +#endif + +#ifndef __UX500_UART +#error Unknown SOC +#endif + +#define UX500_UART(n) __UX500_UART(n) +#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) + + .macro addruart, rp, rv, tmp + ldr \rp, =UART_BASE @ no, physical address + ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address + .endm + +#include <asm/hardware/debug-pl01x.S> diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S deleted file mode 100644 index 6703522..0000000 --- a/arch/arm/mach-ux500/include/mach/debug-macro.S +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Debugging macro include header - * - * Copyright (C) 2009 ST-Ericsson - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include <mach/hardware.h> - -#if CONFIG_UX500_DEBUG_UART > 2 -#error Invalid Ux500 debug UART -#endif - -/* - * DEBUG_LL only works if only one SOC is built in. We don't use #else below - * in order to get "__UX500_UART redefined" warnings if more than one SOC is - * built, so that there's some hint during the build that something is wrong. - */ - -#ifdef CONFIG_UX500_SOC_DB8500 -#define __UX500_UART(n) U8500_UART##n##_BASE -#endif - -#ifndef __UX500_UART -#error Unknown SOC -#endif - -#define UX500_UART(n) __UX500_UART(n) -#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) - - .macro addruart, rp, rv, tmp - ldr \rp, =UART_BASE @ no, physical address - ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address - .endm - -#include <asm/hardware/debug-pl01x.S> -- 1.7.11.3 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 1/6] ARM: ux500: move debugmacro to debug includes 2013-03-21 11:49 ` [PATCH 1/6] ARM: ux500: move debugmacro to debug includes Linus Walleij @ 2013-03-21 12:06 ` Arnd Bergmann 0 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 12:06 UTC (permalink / raw) To: linux-arm-kernel On Thursday 21 March 2013 12:49:08 Linus Walleij wrote: > From: Linus Walleij <linus.walleij@linaro.org> > > This moves the Ux500 debug macro to the debug headers to > make way for multiplatform support. > > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 2/6] clk: ux500: pass clock base adresses in init call 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij 2013-03-21 11:49 ` [PATCH 1/6] ARM: ux500: move debugmacro to debug includes Linus Walleij @ 2013-03-21 11:49 ` Linus Walleij 2013-03-21 12:10 ` Arnd Bergmann ` (2 more replies) 2013-03-21 11:49 ` [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall Linus Walleij ` (4 subsequent siblings) 6 siblings, 3 replies; 49+ messages in thread From: Linus Walleij @ 2013-03-21 11:49 UTC (permalink / raw) To: linux-arm-kernel From: Linus Walleij <linus.walleij@linaro.org> The ux500 clock driver was including <mach/db8500-regs.h> which will not work when building for multiplatform support since <mach/*> is going away. Pass the base adresses in the init call instead. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- Requesting an ACK from Mike on this to merge it through the ARM SoC tree eventually. --- arch/arm/mach-ux500/cpu.c | 4 +- drivers/clk/ux500/u8500_clk.c | 142 ++++++++++++++++---------------- include/linux/platform_data/clk-ux500.h | 3 +- 3 files changed, 76 insertions(+), 73 deletions(-) diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 537870d..741d06a 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -72,7 +72,9 @@ void __init ux500_init_irq(void) db8500_prcmu_early_init(); if (cpu_is_u8500_family() || cpu_is_u9540()) - u8500_clk_init(); + u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, + U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, + U8500_CLKRST6_BASE); else if (cpu_is_u8540()) u8540_clk_init(); } diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 6b889a0..0c9b83d 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -12,10 +12,10 @@ #include <linux/clk-provider.h> #include <linux/mfd/dbx500-prcmu.h> #include <linux/platform_data/clk-ux500.h> -#include <mach/db8500-regs.h> #include "clk.h" -void u8500_clk_init(void) +void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, + u32 clkrst5_base, u32 clkrst6_base) { struct prcmu_fw_version *fw_version; const char *sgaclk_parent = NULL; @@ -215,147 +215,147 @@ void u8500_clk_init(void) */ /* PRCC P-clocks */ - clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", clkrst1_base, BIT(0), 0); clk_register_clkdev(clk, "apb_pclk", "uart0"); - clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", clkrst1_base, BIT(1), 0); clk_register_clkdev(clk, "apb_pclk", "uart1"); - clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", clkrst1_base, BIT(2), 0); clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.1"); - clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", clkrst1_base, BIT(3), 0); clk_register_clkdev(clk, "apb_pclk", "msp0"); clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.0"); - clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", clkrst1_base, BIT(4), 0); clk_register_clkdev(clk, "apb_pclk", "msp1"); clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.1"); - clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", clkrst1_base, BIT(5), 0); clk_register_clkdev(clk, "apb_pclk", "sdi0"); - clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", clkrst1_base, BIT(6), 0); clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.2"); - clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", clkrst1_base, BIT(7), 0); clk_register_clkdev(clk, NULL, "spi3"); - clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", clkrst1_base, BIT(8), 0); clk_register_clkdev(clk, "apb_pclk", "slimbus0"); - clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", clkrst1_base, BIT(9), 0); clk_register_clkdev(clk, NULL, "gpio.0"); clk_register_clkdev(clk, NULL, "gpio.1"); clk_register_clkdev(clk, NULL, "gpioblock0"); - clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", clkrst1_base, BIT(10), 0); clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.4"); - clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, + clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", clkrst1_base, BIT(11), 0); clk_register_clkdev(clk, "apb_pclk", "msp3"); clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.3"); - clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", clkrst2_base, BIT(0), 0); clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.3"); - clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", clkrst2_base, BIT(1), 0); clk_register_clkdev(clk, NULL, "spi2"); - clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", clkrst2_base, BIT(2), 0); clk_register_clkdev(clk, NULL, "spi1"); - clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", clkrst2_base, BIT(3), 0); clk_register_clkdev(clk, NULL, "pwl"); - clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", clkrst2_base, BIT(4), 0); clk_register_clkdev(clk, "apb_pclk", "sdi4"); - clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", clkrst2_base, BIT(5), 0); clk_register_clkdev(clk, "apb_pclk", "msp2"); clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.2"); - clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", clkrst2_base, BIT(6), 0); clk_register_clkdev(clk, "apb_pclk", "sdi1"); - clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", clkrst2_base, BIT(7), 0); clk_register_clkdev(clk, "apb_pclk", "sdi3"); - clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", clkrst2_base, BIT(8), 0); clk_register_clkdev(clk, NULL, "spi0"); - clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", clkrst2_base, BIT(9), 0); clk_register_clkdev(clk, "hsir_hclk", "ste_hsi.0"); - clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", clkrst2_base, BIT(10), 0); clk_register_clkdev(clk, "hsit_hclk", "ste_hsi.0"); - clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", clkrst2_base, BIT(11), 0); clk_register_clkdev(clk, NULL, "gpio.6"); clk_register_clkdev(clk, NULL, "gpio.7"); clk_register_clkdev(clk, NULL, "gpioblock1"); - clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", U8500_CLKRST2_BASE, + clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", clkrst2_base, BIT(12), 0); - clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base, BIT(0), 0); clk_register_clkdev(clk, NULL, "fsmc"); - clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base, BIT(1), 0); clk_register_clkdev(clk, "apb_pclk", "ssp0"); - clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", clkrst3_base, BIT(2), 0); clk_register_clkdev(clk, "apb_pclk", "ssp1"); - clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", clkrst3_base, BIT(3), 0); clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.0"); - clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", clkrst3_base, BIT(4), 0); clk_register_clkdev(clk, "apb_pclk", "sdi2"); - clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", clkrst3_base, BIT(5), 0); clk_register_clkdev(clk, "apb_pclk", "ske"); clk_register_clkdev(clk, "apb_pclk", "nmk-ske-keypad"); - clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", clkrst3_base, BIT(6), 0); clk_register_clkdev(clk, "apb_pclk", "uart2"); - clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", clkrst3_base, BIT(7), 0); clk_register_clkdev(clk, "apb_pclk", "sdi5"); - clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", U8500_CLKRST3_BASE, + clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", clkrst3_base, BIT(8), 0); clk_register_clkdev(clk, NULL, "gpio.2"); clk_register_clkdev(clk, NULL, "gpio.3"); @@ -363,45 +363,45 @@ void u8500_clk_init(void) clk_register_clkdev(clk, NULL, "gpio.5"); clk_register_clkdev(clk, NULL, "gpioblock2"); - clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", U8500_CLKRST5_BASE, + clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", clkrst5_base, BIT(0), 0); clk_register_clkdev(clk, "usb", "musb-ux500.0"); - clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", U8500_CLKRST5_BASE, + clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", clkrst5_base, BIT(1), 0); clk_register_clkdev(clk, NULL, "gpio.8"); clk_register_clkdev(clk, NULL, "gpioblock3"); - clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", clkrst6_base, BIT(0), 0); clk_register_clkdev(clk, "apb_pclk", "rng"); - clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", clkrst6_base, BIT(1), 0); clk_register_clkdev(clk, NULL, "cryp0"); clk_register_clkdev(clk, NULL, "cryp1"); - clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", clkrst6_base, BIT(2), 0); clk_register_clkdev(clk, NULL, "hash0"); - clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", clkrst6_base, BIT(3), 0); clk_register_clkdev(clk, NULL, "pka"); - clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", clkrst6_base, BIT(4), 0); clk_register_clkdev(clk, NULL, "hash1"); - clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", clkrst6_base, BIT(5), 0); clk_register_clkdev(clk, NULL, "cfgreg"); - clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", clkrst6_base, BIT(6), 0); clk_register_clkdev(clk, "apb_pclk", "mtu0"); - clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", U8500_CLKRST6_BASE, + clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", clkrst6_base, BIT(7), 0); clk_register_clkdev(clk, "apb_pclk", "mtu1"); @@ -415,110 +415,110 @@ void u8500_clk_init(void) /* Periph1 */ clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk", - U8500_CLKRST1_BASE, BIT(0), CLK_SET_RATE_GATE); + clkrst1_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "uart0"); clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk", - U8500_CLKRST1_BASE, BIT(1), CLK_SET_RATE_GATE); + clkrst1_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "uart1"); clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", - U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); + clkrst1_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "nmk-i2c.1"); clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", - U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); + clkrst1_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "msp0"); clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0"); clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", - U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); + clkrst1_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "msp1"); clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1"); clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", - U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); + clkrst1_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "sdi0"); clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", - U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); + clkrst1_base, BIT(6), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "nmk-i2c.2"); clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", - U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE); + clkrst1_base, BIT(8), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "slimbus0"); clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", - U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); + clkrst1_base, BIT(9), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "nmk-i2c.4"); clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", - U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); + clkrst1_base, BIT(10), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "msp3"); clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3"); /* Periph2 */ clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", - U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); + clkrst2_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "nmk-i2c.3"); clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", - U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); + clkrst2_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "sdi4"); clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", - U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); + clkrst2_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "msp2"); clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2"); clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", - U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); + clkrst2_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "sdi1"); clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk", - U8500_CLKRST2_BASE, BIT(5), CLK_SET_RATE_GATE); + clkrst2_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "sdi3"); /* Note that rate is received from parent. */ clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk", - U8500_CLKRST2_BASE, BIT(6), + clkrst2_base, BIT(6), CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); clk = clk_reg_prcc_kclk("p2_ssitx_kclk", "hsitxclk", - U8500_CLKRST2_BASE, BIT(7), + clkrst2_base, BIT(7), CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); /* Periph3 */ clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", - U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); + clkrst3_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "ssp0"); clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", - U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); + clkrst3_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "ssp1"); clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", - U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); + clkrst3_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "nmk-i2c.0"); clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", - U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); + clkrst3_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "sdi2"); clk = clk_reg_prcc_kclk("p3_ske_kclk", "rtc32k", - U8500_CLKRST3_BASE, BIT(5), CLK_SET_RATE_GATE); + clkrst3_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "ske"); clk_register_clkdev(clk, NULL, "nmk-ske-keypad"); clk = clk_reg_prcc_kclk("p3_uart2_kclk", "uartclk", - U8500_CLKRST3_BASE, BIT(6), CLK_SET_RATE_GATE); + clkrst3_base, BIT(6), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "uart2"); clk = clk_reg_prcc_kclk("p3_sdi5_kclk", "sdmmcclk", - U8500_CLKRST3_BASE, BIT(7), CLK_SET_RATE_GATE); + clkrst3_base, BIT(7), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "sdi5"); /* Periph6 */ clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk", - U8500_CLKRST6_BASE, BIT(0), CLK_SET_RATE_GATE); + clkrst6_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "rng"); } diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h index 3af0da1..320d9c3 100644 --- a/include/linux/platform_data/clk-ux500.h +++ b/include/linux/platform_data/clk-ux500.h @@ -10,7 +10,8 @@ #ifndef __CLK_UX500_H #define __CLK_UX500_H -void u8500_clk_init(void); +void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, + u32 clkrst5_base, u32 clkrst6_base); void u9540_clk_init(void); void u8540_clk_init(void); -- 1.7.11.3 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 2/6] clk: ux500: pass clock base adresses in init call 2013-03-21 11:49 ` [PATCH 2/6] clk: ux500: pass clock base adresses in init call Linus Walleij @ 2013-03-21 12:10 ` Arnd Bergmann 2013-03-21 14:05 ` Ulf Hansson 2013-03-21 17:50 ` Mike Turquette 2 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 12:10 UTC (permalink / raw) To: linux-arm-kernel On Thursday 21 March 2013 12:49:09 Linus Walleij wrote: > From: Linus Walleij <linus.walleij@linaro.org> > > The ux500 clock driver was including <mach/db8500-regs.h> > which will not work when building for multiplatform support > since <mach/*> is going away. > > Pass the base adresses in the init call instead. > > Cc: Ulf Hansson <ulf.hansson@linaro.org> > Cc: Mike Turquette <mturquette@linaro.org> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> It would be nicer to read the base addresses from DT properties and convert the driver to use CLK_OF_DECLARE(), but this works too, and it leaves the non-DT path alone for now. Acked-by: Arnd Bergmann <arnd@arndb.de> ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 2/6] clk: ux500: pass clock base adresses in init call 2013-03-21 11:49 ` [PATCH 2/6] clk: ux500: pass clock base adresses in init call Linus Walleij 2013-03-21 12:10 ` Arnd Bergmann @ 2013-03-21 14:05 ` Ulf Hansson 2013-03-21 17:50 ` Mike Turquette 2 siblings, 0 replies; 49+ messages in thread From: Ulf Hansson @ 2013-03-21 14:05 UTC (permalink / raw) To: linux-arm-kernel On 21 March 2013 12:49, Linus Walleij <linus.walleij@stericsson.com> wrote: > From: Linus Walleij <linus.walleij@linaro.org> > > The ux500 clock driver was including <mach/db8500-regs.h> > which will not work when building for multiplatform support > since <mach/*> is going away. > > Pass the base adresses in the init call instead. > > Cc: Ulf Hansson <ulf.hansson@linaro.org> > Cc: Mike Turquette <mturquette@linaro.org> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > Requesting an ACK from Mike on this to merge it through > the ARM SoC tree eventually. > --- > arch/arm/mach-ux500/cpu.c | 4 +- > drivers/clk/ux500/u8500_clk.c | 142 ++++++++++++++++---------------- > include/linux/platform_data/clk-ux500.h | 3 +- > 3 files changed, 76 insertions(+), 73 deletions(-) > > diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c > index 537870d..741d06a 100644 > --- a/arch/arm/mach-ux500/cpu.c > +++ b/arch/arm/mach-ux500/cpu.c > @@ -72,7 +72,9 @@ void __init ux500_init_irq(void) > db8500_prcmu_early_init(); > > if (cpu_is_u8500_family() || cpu_is_u9540()) > - u8500_clk_init(); > + u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, > + U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, > + U8500_CLKRST6_BASE); > else if (cpu_is_u8540()) > u8540_clk_init(); > } > diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c > index 6b889a0..0c9b83d 100644 > --- a/drivers/clk/ux500/u8500_clk.c > +++ b/drivers/clk/ux500/u8500_clk.c > @@ -12,10 +12,10 @@ > #include <linux/clk-provider.h> > #include <linux/mfd/dbx500-prcmu.h> > #include <linux/platform_data/clk-ux500.h> > -#include <mach/db8500-regs.h> > #include "clk.h" > > -void u8500_clk_init(void) > +void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, > + u32 clkrst5_base, u32 clkrst6_base) > { > struct prcmu_fw_version *fw_version; > const char *sgaclk_parent = NULL; > @@ -215,147 +215,147 @@ void u8500_clk_init(void) > */ > > /* PRCC P-clocks */ > - clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", clkrst1_base, > BIT(0), 0); > clk_register_clkdev(clk, "apb_pclk", "uart0"); > > - clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", clkrst1_base, > BIT(1), 0); > clk_register_clkdev(clk, "apb_pclk", "uart1"); > > - clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", clkrst1_base, > BIT(2), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.1"); > > - clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", clkrst1_base, > BIT(3), 0); > clk_register_clkdev(clk, "apb_pclk", "msp0"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.0"); > > - clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", clkrst1_base, > BIT(4), 0); > clk_register_clkdev(clk, "apb_pclk", "msp1"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.1"); > > - clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", clkrst1_base, > BIT(5), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi0"); > > - clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", clkrst1_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.2"); > > - clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", clkrst1_base, > BIT(7), 0); > clk_register_clkdev(clk, NULL, "spi3"); > > - clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", clkrst1_base, > BIT(8), 0); > clk_register_clkdev(clk, "apb_pclk", "slimbus0"); > > - clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", clkrst1_base, > BIT(9), 0); > clk_register_clkdev(clk, NULL, "gpio.0"); > clk_register_clkdev(clk, NULL, "gpio.1"); > clk_register_clkdev(clk, NULL, "gpioblock0"); > > - clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", clkrst1_base, > BIT(10), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.4"); > > - clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", clkrst1_base, > BIT(11), 0); > clk_register_clkdev(clk, "apb_pclk", "msp3"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.3"); > > - clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", clkrst2_base, > BIT(0), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.3"); > > - clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", clkrst2_base, > BIT(1), 0); > clk_register_clkdev(clk, NULL, "spi2"); > > - clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", clkrst2_base, > BIT(2), 0); > clk_register_clkdev(clk, NULL, "spi1"); > > - clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", clkrst2_base, > BIT(3), 0); > clk_register_clkdev(clk, NULL, "pwl"); > > - clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", clkrst2_base, > BIT(4), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi4"); > > - clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", clkrst2_base, > BIT(5), 0); > clk_register_clkdev(clk, "apb_pclk", "msp2"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.2"); > > - clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", clkrst2_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi1"); > > - clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", clkrst2_base, > BIT(7), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi3"); > > - clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", clkrst2_base, > BIT(8), 0); > clk_register_clkdev(clk, NULL, "spi0"); > > - clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", clkrst2_base, > BIT(9), 0); > clk_register_clkdev(clk, "hsir_hclk", "ste_hsi.0"); > > - clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", clkrst2_base, > BIT(10), 0); > clk_register_clkdev(clk, "hsit_hclk", "ste_hsi.0"); > > - clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", clkrst2_base, > BIT(11), 0); > clk_register_clkdev(clk, NULL, "gpio.6"); > clk_register_clkdev(clk, NULL, "gpio.7"); > clk_register_clkdev(clk, NULL, "gpioblock1"); > > - clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", clkrst2_base, > BIT(12), 0); > > - clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base, > BIT(0), 0); > clk_register_clkdev(clk, NULL, "fsmc"); > > - clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base, > BIT(1), 0); > clk_register_clkdev(clk, "apb_pclk", "ssp0"); > > - clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", clkrst3_base, > BIT(2), 0); > clk_register_clkdev(clk, "apb_pclk", "ssp1"); > > - clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", clkrst3_base, > BIT(3), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.0"); > > - clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", clkrst3_base, > BIT(4), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi2"); > > - clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", clkrst3_base, > BIT(5), 0); > clk_register_clkdev(clk, "apb_pclk", "ske"); > clk_register_clkdev(clk, "apb_pclk", "nmk-ske-keypad"); > > - clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", clkrst3_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "uart2"); > > - clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", clkrst3_base, > BIT(7), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi5"); > > - clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", clkrst3_base, > BIT(8), 0); > clk_register_clkdev(clk, NULL, "gpio.2"); > clk_register_clkdev(clk, NULL, "gpio.3"); > @@ -363,45 +363,45 @@ void u8500_clk_init(void) > clk_register_clkdev(clk, NULL, "gpio.5"); > clk_register_clkdev(clk, NULL, "gpioblock2"); > > - clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", U8500_CLKRST5_BASE, > + clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", clkrst5_base, > BIT(0), 0); > clk_register_clkdev(clk, "usb", "musb-ux500.0"); > > - clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", U8500_CLKRST5_BASE, > + clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", clkrst5_base, > BIT(1), 0); > clk_register_clkdev(clk, NULL, "gpio.8"); > clk_register_clkdev(clk, NULL, "gpioblock3"); > > - clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", clkrst6_base, > BIT(0), 0); > clk_register_clkdev(clk, "apb_pclk", "rng"); > > - clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", clkrst6_base, > BIT(1), 0); > clk_register_clkdev(clk, NULL, "cryp0"); > clk_register_clkdev(clk, NULL, "cryp1"); > > - clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", clkrst6_base, > BIT(2), 0); > clk_register_clkdev(clk, NULL, "hash0"); > > - clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", clkrst6_base, > BIT(3), 0); > clk_register_clkdev(clk, NULL, "pka"); > > - clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", clkrst6_base, > BIT(4), 0); > clk_register_clkdev(clk, NULL, "hash1"); > > - clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", clkrst6_base, > BIT(5), 0); > clk_register_clkdev(clk, NULL, "cfgreg"); > > - clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", clkrst6_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "mtu0"); > > - clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", clkrst6_base, > BIT(7), 0); > clk_register_clkdev(clk, "apb_pclk", "mtu1"); > > @@ -415,110 +415,110 @@ void u8500_clk_init(void) > > /* Periph1 */ > clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk", > - U8500_CLKRST1_BASE, BIT(0), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(0), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "uart0"); > > clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk", > - U8500_CLKRST1_BASE, BIT(1), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(1), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "uart1"); > > clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", > - U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(2), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.1"); > > clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", > - U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(3), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp0"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0"); > > clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", > - U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(4), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp1"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1"); > > clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", > - U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(5), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi0"); > > clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", > - U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(6), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.2"); > > clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", > - U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(8), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "slimbus0"); > > clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", > - U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(9), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.4"); > > clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", > - U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(10), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp3"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3"); > > /* Periph2 */ > clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", > - U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(0), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.3"); > > clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", > - U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(2), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi4"); > > clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", > - U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(3), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp2"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2"); > > clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", > - U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(4), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi1"); > > clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk", > - U8500_CLKRST2_BASE, BIT(5), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(5), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi3"); > > /* Note that rate is received from parent. */ > clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk", > - U8500_CLKRST2_BASE, BIT(6), > + clkrst2_base, BIT(6), > CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); > clk = clk_reg_prcc_kclk("p2_ssitx_kclk", "hsitxclk", > - U8500_CLKRST2_BASE, BIT(7), > + clkrst2_base, BIT(7), > CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); > > /* Periph3 */ > clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", > - U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(1), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "ssp0"); > > clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", > - U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(2), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "ssp1"); > > clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", > - U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(3), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.0"); > > clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", > - U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(4), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi2"); > > clk = clk_reg_prcc_kclk("p3_ske_kclk", "rtc32k", > - U8500_CLKRST3_BASE, BIT(5), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(5), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "ske"); > clk_register_clkdev(clk, NULL, "nmk-ske-keypad"); > > clk = clk_reg_prcc_kclk("p3_uart2_kclk", "uartclk", > - U8500_CLKRST3_BASE, BIT(6), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(6), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "uart2"); > > clk = clk_reg_prcc_kclk("p3_sdi5_kclk", "sdmmcclk", > - U8500_CLKRST3_BASE, BIT(7), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(7), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi5"); > > /* Periph6 */ > clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk", > - U8500_CLKRST6_BASE, BIT(0), CLK_SET_RATE_GATE); > + clkrst6_base, BIT(0), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "rng"); > } > diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h > index 3af0da1..320d9c3 100644 > --- a/include/linux/platform_data/clk-ux500.h > +++ b/include/linux/platform_data/clk-ux500.h > @@ -10,7 +10,8 @@ > #ifndef __CLK_UX500_H > #define __CLK_UX500_H > > -void u8500_clk_init(void); > +void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, > + u32 clkrst5_base, u32 clkrst6_base); > void u9540_clk_init(void); > void u8540_clk_init(void); > > -- > 1.7.11.3 > Acked-by: Ulf Hansson <ulf.hansson@linaro.org> ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 2/6] clk: ux500: pass clock base adresses in init call 2013-03-21 11:49 ` [PATCH 2/6] clk: ux500: pass clock base adresses in init call Linus Walleij 2013-03-21 12:10 ` Arnd Bergmann 2013-03-21 14:05 ` Ulf Hansson @ 2013-03-21 17:50 ` Mike Turquette 2 siblings, 0 replies; 49+ messages in thread From: Mike Turquette @ 2013-03-21 17:50 UTC (permalink / raw) To: linux-arm-kernel Quoting Linus Walleij (2013-03-21 04:49:09) > From: Linus Walleij <linus.walleij@linaro.org> > > The ux500 clock driver was including <mach/db8500-regs.h> > which will not work when building for multiplatform support > since <mach/*> is going away. > > Pass the base adresses in the init call instead. > > Cc: Ulf Hansson <ulf.hansson@linaro.org> > Cc: Mike Turquette <mturquette@linaro.org> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > Requesting an ACK from Mike on this to merge it through > the ARM SoC tree eventually. > --- Acked-by: Mike Turquette <mturquette@linaro.org> > arch/arm/mach-ux500/cpu.c | 4 +- > drivers/clk/ux500/u8500_clk.c | 142 ++++++++++++++++---------------- > include/linux/platform_data/clk-ux500.h | 3 +- > 3 files changed, 76 insertions(+), 73 deletions(-) > > diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c > index 537870d..741d06a 100644 > --- a/arch/arm/mach-ux500/cpu.c > +++ b/arch/arm/mach-ux500/cpu.c > @@ -72,7 +72,9 @@ void __init ux500_init_irq(void) > db8500_prcmu_early_init(); > > if (cpu_is_u8500_family() || cpu_is_u9540()) > - u8500_clk_init(); > + u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, > + U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, > + U8500_CLKRST6_BASE); > else if (cpu_is_u8540()) > u8540_clk_init(); > } > diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c > index 6b889a0..0c9b83d 100644 > --- a/drivers/clk/ux500/u8500_clk.c > +++ b/drivers/clk/ux500/u8500_clk.c > @@ -12,10 +12,10 @@ > #include <linux/clk-provider.h> > #include <linux/mfd/dbx500-prcmu.h> > #include <linux/platform_data/clk-ux500.h> > -#include <mach/db8500-regs.h> > #include "clk.h" > > -void u8500_clk_init(void) > +void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, > + u32 clkrst5_base, u32 clkrst6_base) > { > struct prcmu_fw_version *fw_version; > const char *sgaclk_parent = NULL; > @@ -215,147 +215,147 @@ void u8500_clk_init(void) > */ > > /* PRCC P-clocks */ > - clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", clkrst1_base, > BIT(0), 0); > clk_register_clkdev(clk, "apb_pclk", "uart0"); > > - clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", clkrst1_base, > BIT(1), 0); > clk_register_clkdev(clk, "apb_pclk", "uart1"); > > - clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", clkrst1_base, > BIT(2), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.1"); > > - clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", clkrst1_base, > BIT(3), 0); > clk_register_clkdev(clk, "apb_pclk", "msp0"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.0"); > > - clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", clkrst1_base, > BIT(4), 0); > clk_register_clkdev(clk, "apb_pclk", "msp1"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.1"); > > - clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", clkrst1_base, > BIT(5), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi0"); > > - clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", clkrst1_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.2"); > > - clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", clkrst1_base, > BIT(7), 0); > clk_register_clkdev(clk, NULL, "spi3"); > > - clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", clkrst1_base, > BIT(8), 0); > clk_register_clkdev(clk, "apb_pclk", "slimbus0"); > > - clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", clkrst1_base, > BIT(9), 0); > clk_register_clkdev(clk, NULL, "gpio.0"); > clk_register_clkdev(clk, NULL, "gpio.1"); > clk_register_clkdev(clk, NULL, "gpioblock0"); > > - clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", clkrst1_base, > BIT(10), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.4"); > > - clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, > + clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", clkrst1_base, > BIT(11), 0); > clk_register_clkdev(clk, "apb_pclk", "msp3"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.3"); > > - clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", clkrst2_base, > BIT(0), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.3"); > > - clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", clkrst2_base, > BIT(1), 0); > clk_register_clkdev(clk, NULL, "spi2"); > > - clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", clkrst2_base, > BIT(2), 0); > clk_register_clkdev(clk, NULL, "spi1"); > > - clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", clkrst2_base, > BIT(3), 0); > clk_register_clkdev(clk, NULL, "pwl"); > > - clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", clkrst2_base, > BIT(4), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi4"); > > - clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", clkrst2_base, > BIT(5), 0); > clk_register_clkdev(clk, "apb_pclk", "msp2"); > clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.2"); > > - clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", clkrst2_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi1"); > > - clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", clkrst2_base, > BIT(7), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi3"); > > - clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", clkrst2_base, > BIT(8), 0); > clk_register_clkdev(clk, NULL, "spi0"); > > - clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", clkrst2_base, > BIT(9), 0); > clk_register_clkdev(clk, "hsir_hclk", "ste_hsi.0"); > > - clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", clkrst2_base, > BIT(10), 0); > clk_register_clkdev(clk, "hsit_hclk", "ste_hsi.0"); > > - clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", clkrst2_base, > BIT(11), 0); > clk_register_clkdev(clk, NULL, "gpio.6"); > clk_register_clkdev(clk, NULL, "gpio.7"); > clk_register_clkdev(clk, NULL, "gpioblock1"); > > - clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", U8500_CLKRST2_BASE, > + clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", clkrst2_base, > BIT(12), 0); > > - clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base, > BIT(0), 0); > clk_register_clkdev(clk, NULL, "fsmc"); > > - clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base, > BIT(1), 0); > clk_register_clkdev(clk, "apb_pclk", "ssp0"); > > - clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", clkrst3_base, > BIT(2), 0); > clk_register_clkdev(clk, "apb_pclk", "ssp1"); > > - clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", clkrst3_base, > BIT(3), 0); > clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.0"); > > - clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", clkrst3_base, > BIT(4), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi2"); > > - clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", clkrst3_base, > BIT(5), 0); > clk_register_clkdev(clk, "apb_pclk", "ske"); > clk_register_clkdev(clk, "apb_pclk", "nmk-ske-keypad"); > > - clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", clkrst3_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "uart2"); > > - clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", clkrst3_base, > BIT(7), 0); > clk_register_clkdev(clk, "apb_pclk", "sdi5"); > > - clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", U8500_CLKRST3_BASE, > + clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", clkrst3_base, > BIT(8), 0); > clk_register_clkdev(clk, NULL, "gpio.2"); > clk_register_clkdev(clk, NULL, "gpio.3"); > @@ -363,45 +363,45 @@ void u8500_clk_init(void) > clk_register_clkdev(clk, NULL, "gpio.5"); > clk_register_clkdev(clk, NULL, "gpioblock2"); > > - clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", U8500_CLKRST5_BASE, > + clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", clkrst5_base, > BIT(0), 0); > clk_register_clkdev(clk, "usb", "musb-ux500.0"); > > - clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", U8500_CLKRST5_BASE, > + clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", clkrst5_base, > BIT(1), 0); > clk_register_clkdev(clk, NULL, "gpio.8"); > clk_register_clkdev(clk, NULL, "gpioblock3"); > > - clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", clkrst6_base, > BIT(0), 0); > clk_register_clkdev(clk, "apb_pclk", "rng"); > > - clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", clkrst6_base, > BIT(1), 0); > clk_register_clkdev(clk, NULL, "cryp0"); > clk_register_clkdev(clk, NULL, "cryp1"); > > - clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", clkrst6_base, > BIT(2), 0); > clk_register_clkdev(clk, NULL, "hash0"); > > - clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", clkrst6_base, > BIT(3), 0); > clk_register_clkdev(clk, NULL, "pka"); > > - clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", clkrst6_base, > BIT(4), 0); > clk_register_clkdev(clk, NULL, "hash1"); > > - clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", clkrst6_base, > BIT(5), 0); > clk_register_clkdev(clk, NULL, "cfgreg"); > > - clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", clkrst6_base, > BIT(6), 0); > clk_register_clkdev(clk, "apb_pclk", "mtu0"); > > - clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", U8500_CLKRST6_BASE, > + clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", clkrst6_base, > BIT(7), 0); > clk_register_clkdev(clk, "apb_pclk", "mtu1"); > > @@ -415,110 +415,110 @@ void u8500_clk_init(void) > > /* Periph1 */ > clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk", > - U8500_CLKRST1_BASE, BIT(0), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(0), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "uart0"); > > clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk", > - U8500_CLKRST1_BASE, BIT(1), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(1), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "uart1"); > > clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", > - U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(2), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.1"); > > clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", > - U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(3), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp0"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0"); > > clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", > - U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(4), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp1"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1"); > > clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", > - U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(5), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi0"); > > clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", > - U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(6), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.2"); > > clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", > - U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(8), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "slimbus0"); > > clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", > - U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(9), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.4"); > > clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", > - U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); > + clkrst1_base, BIT(10), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp3"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3"); > > /* Periph2 */ > clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", > - U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(0), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.3"); > > clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", > - U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(2), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi4"); > > clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", > - U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(3), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "msp2"); > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2"); > > clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", > - U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(4), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi1"); > > clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk", > - U8500_CLKRST2_BASE, BIT(5), CLK_SET_RATE_GATE); > + clkrst2_base, BIT(5), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi3"); > > /* Note that rate is received from parent. */ > clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk", > - U8500_CLKRST2_BASE, BIT(6), > + clkrst2_base, BIT(6), > CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); > clk = clk_reg_prcc_kclk("p2_ssitx_kclk", "hsitxclk", > - U8500_CLKRST2_BASE, BIT(7), > + clkrst2_base, BIT(7), > CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); > > /* Periph3 */ > clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", > - U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(1), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "ssp0"); > > clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", > - U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(2), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "ssp1"); > > clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", > - U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(3), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "nmk-i2c.0"); > > clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", > - U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(4), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi2"); > > clk = clk_reg_prcc_kclk("p3_ske_kclk", "rtc32k", > - U8500_CLKRST3_BASE, BIT(5), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(5), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "ske"); > clk_register_clkdev(clk, NULL, "nmk-ske-keypad"); > > clk = clk_reg_prcc_kclk("p3_uart2_kclk", "uartclk", > - U8500_CLKRST3_BASE, BIT(6), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(6), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "uart2"); > > clk = clk_reg_prcc_kclk("p3_sdi5_kclk", "sdmmcclk", > - U8500_CLKRST3_BASE, BIT(7), CLK_SET_RATE_GATE); > + clkrst3_base, BIT(7), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "sdi5"); > > /* Periph6 */ > clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk", > - U8500_CLKRST6_BASE, BIT(0), CLK_SET_RATE_GATE); > + clkrst6_base, BIT(0), CLK_SET_RATE_GATE); > clk_register_clkdev(clk, NULL, "rng"); > } > diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h > index 3af0da1..320d9c3 100644 > --- a/include/linux/platform_data/clk-ux500.h > +++ b/include/linux/platform_data/clk-ux500.h > @@ -10,7 +10,8 @@ > #ifndef __CLK_UX500_H > #define __CLK_UX500_H > > -void u8500_clk_init(void); > +void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, > + u32 clkrst5_base, u32 clkrst6_base); > void u9540_clk_init(void); > void u8540_clk_init(void); > > -- > 1.7.11.3 ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij 2013-03-21 11:49 ` [PATCH 1/6] ARM: ux500: move debugmacro to debug includes Linus Walleij 2013-03-21 11:49 ` [PATCH 2/6] clk: ux500: pass clock base adresses in init call Linus Walleij @ 2013-03-21 11:49 ` Linus Walleij 2013-03-21 12:11 ` Arnd Bergmann 2013-03-21 11:49 ` [PATCH 4/6] mfd: db8500-prcmu: get base address from resource Linus Walleij ` (3 subsequent siblings) 6 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-21 11:49 UTC (permalink / raw) To: linux-arm-kernel From: Linus Walleij <linus.walleij@linaro.org> This patch will make an early remapping of the PRCMU, to be used when setting up the clocks, that will call down into parts of the PRCMU driver before it is probed. Going forward this will be removed like this: - The mailbox subsystem need to be merged. http://marc.info/?l=linux-kernel&m=136314559201983&w=2 - At this point the PRCMU clock code can be moved over to the ux500 clock driver in drivers/clk/ux500/* and maintained there in a decentralized manner. - This early initcall and PRCMU base parameters become part of the ux500_clk_init() call instead. Cc: Suman Anna <s-anna@ti.com> Cc: Loic Pallardy <loic.pallardy@st.com> Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/mach-ux500/cpu.c | 17 +++++++++++------ drivers/mfd/db8500-prcmu.c | 13 ++++++++++++- include/linux/mfd/db8500-prcmu.h | 4 ++-- include/linux/mfd/dbx500-prcmu.h | 6 +++--- 4 files changed, 28 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 741d06a..af13b6d 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -8,7 +8,7 @@ #include <linux/platform_device.h> #include <linux/io.h> -#include <linux/mfd/db8500-prcmu.h> +#include <linux/mfd/dbx500-prcmu.h> #include <linux/clksrc-dbx500-prcmu.h> #include <linux/sys_soc.h> #include <linux/err.h> @@ -68,15 +68,20 @@ void __init ux500_init_irq(void) * Init clocks here so that they are available for system timer * initialization. */ - if (cpu_is_u8500_family() || cpu_is_u9540()) - db8500_prcmu_early_init(); - - if (cpu_is_u8500_family() || cpu_is_u9540()) + if (cpu_is_u8500_family()) { + prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, U8500_CLKRST6_BASE); - else if (cpu_is_u8540()) + } else if (cpu_is_u9540()) { + prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); + u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, + U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, + U8500_CLKRST6_BASE); + } else if (cpu_is_u8540()) { + prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); u8540_clk_init(); + } } void __init ux500_init_late(void) diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 21f261b..9166427 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2825,8 +2825,19 @@ static void dbx500_fw_version_init(struct platform_device *pdev, } } -void __init db8500_prcmu_early_init(void) +void __init db8500_prcmu_early_init(u32 phy_base, u32 size) { + /* + * This is a temporary remap to bring up the clocks. It is + * subsequently replaces with a real remap. After the merge of + * the mailbox subsystem all of this early code goes away, and the + * clock driver can probe independently. An early initcall will + * still be needed, but it can be diverted into drivers/clk/ux500/*. + */ + prcmu_base = ioremap(phy_base, size); + if (!prcmu_base) + pr_err("%s: ioremap() of prcmu registers failed!\n", __func__); + spin_lock_init(&mb0_transfer.lock); spin_lock_init(&mb0_transfer.dbb_irqs_lock); mutex_init(&mb0_transfer.ac_wake_lock); diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index 77a46ae..ac943df 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h @@ -489,7 +489,7 @@ struct prcmu_auto_pm_config { #ifdef CONFIG_MFD_DB8500_PRCMU -void db8500_prcmu_early_init(void); +void db8500_prcmu_early_init(u32 phy_base, u32 size); int prcmu_set_rc_a2p(enum romcode_write); enum romcode_read prcmu_get_rc_p2a(void); enum ap_pwrst prcmu_get_xp70_current_state(void); @@ -553,7 +553,7 @@ void db8500_prcmu_write_masked(unsigned int reg, u32 mask, u32 value); #else /* !CONFIG_MFD_DB8500_PRCMU */ -static inline void db8500_prcmu_early_init(void) {} +static inline void db8500_prcmu_early_init(u32 phy_base, u32 size) {} static inline int prcmu_set_rc_a2p(enum romcode_write code) { diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index 3abcca9..8c546cb 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -276,9 +276,9 @@ struct prcmu_fw_version { #if defined(CONFIG_UX500_SOC_DB8500) -static inline void __init prcmu_early_init(void) +static inline void prcmu_early_init(u32 phy_base, u32 size) { - return db8500_prcmu_early_init(); + return db8500_prcmu_early_init(phy_base, size); } static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, @@ -500,7 +500,7 @@ static inline int prcmu_config_a9wdog(u8 num, bool sleep_auto_off) } #else -static inline void __init prcmu_early_init(void) {} +static inline void prcmu_early_init(u32 phy_base, u32 size) {} static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll) -- 1.7.11.3 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall 2013-03-21 11:49 ` [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall Linus Walleij @ 2013-03-21 12:11 ` Arnd Bergmann 2013-03-21 14:01 ` Ulf Hansson 0 siblings, 1 reply; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 12:11 UTC (permalink / raw) To: linux-arm-kernel On Thursday 21 March 2013 12:49:10 Linus Walleij wrote: > > From: Linus Walleij <linus.walleij@linaro.org> > > This patch will make an early remapping of the PRCMU, to be > used when setting up the clocks, that will call down into parts > of the PRCMU driver before it is probed. > > Going forward this will be removed like this: > > - The mailbox subsystem need to be merged. > http://marc.info/?l=linux-kernel&m=136314559201983&w=2 > > - At this point the PRCMU clock code can be moved over to the > ux500 clock driver in drivers/clk/ux500/* and maintained > there in a decentralized manner. > > - This early initcall and PRCMU base parameters become part of > the ux500_clk_init() call instead. > > Cc: Suman Anna <s-anna@ti.com> > Cc: Loic Pallardy <loic.pallardy@st.com> > Cc: Samuel Ortiz <sameo@linux.intel.com> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall 2013-03-21 12:11 ` Arnd Bergmann @ 2013-03-21 14:01 ` Ulf Hansson 0 siblings, 0 replies; 49+ messages in thread From: Ulf Hansson @ 2013-03-21 14:01 UTC (permalink / raw) To: linux-arm-kernel On 21 March 2013 13:11, Arnd Bergmann <arnd@arndb.de> wrote: > On Thursday 21 March 2013 12:49:10 Linus Walleij wrote: >> >> From: Linus Walleij <linus.walleij@linaro.org> >> >> This patch will make an early remapping of the PRCMU, to be >> used when setting up the clocks, that will call down into parts >> of the PRCMU driver before it is probed. >> >> Going forward this will be removed like this: >> >> - The mailbox subsystem need to be merged. >> http://marc.info/?l=linux-kernel&m=136314559201983&w=2 >> >> - At this point the PRCMU clock code can be moved over to the >> ux500 clock driver in drivers/clk/ux500/* and maintained >> there in a decentralized manner. >> >> - This early initcall and PRCMU base parameters become part of >> the ux500_clk_init() call instead. >> >> Cc: Suman Anna <s-anna@ti.com> >> Cc: Loic Pallardy <loic.pallardy@st.com> >> Cc: Samuel Ortiz <sameo@linux.intel.com> >> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > > Acked-by: Arnd Bergmann <arnd@arndb.de> > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel Until the clk-prmcu type gets split into register clocks and mailbox clocks this patch work very fine! Acked-by; Ulf Hansson <ulf.hansson@linaro.org> ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 4/6] mfd: db8500-prcmu: get base address from resource 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij ` (2 preceding siblings ...) 2013-03-21 11:49 ` [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall Linus Walleij @ 2013-03-21 11:49 ` Linus Walleij 2013-03-21 12:15 ` Arnd Bergmann 2013-03-21 11:49 ` [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver Linus Walleij ` (2 subsequent siblings) 6 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-21 11:49 UTC (permalink / raw) To: linux-arm-kernel From: Linus Walleij <linus.walleij@linaro.org> We cannot use a global variable stored in <mach/hardware.h> to find the base address of the PRCMU. The real resource is already there from the board, so use this to look up the base address instead. Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- Sam, I'm requesting an ACK for taking this through the ARM SoC tree. --- arch/arm/mach-ux500/cpu-db8500.c | 2 - arch/arm/mach-ux500/cpu.c | 2 - arch/arm/mach-ux500/include/mach/hardware.h | 2 - drivers/mfd/db8500-prcmu.c | 47 ++++--- drivers/mfd/dbx500-prcmu-regs.h | 208 ++++++++++++++-------------- 5 files changed, 131 insertions(+), 130 deletions(-) diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 19235cf..8c58dff 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -94,8 +94,6 @@ void __init u8500_map_io(void) iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); else iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); - - _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); } static struct resource db8500_pmu_resources[] = { diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index af13b6d..38459e9 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -30,8 +30,6 @@ #include "board-mop500.h" #include "id.h" -void __iomem *_PRCMU_BASE; - /* * FIXME: Should we set up the GPIO domain here? * diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h index 5201dda..4eece2a 100644 --- a/arch/arm/mach-ux500/include/mach/hardware.h +++ b/arch/arm/mach-ux500/include/mach/hardware.h @@ -39,8 +39,6 @@ #ifndef __ASSEMBLY__ -extern void __iomem *_PRCMU_BASE; - #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) #endif /* __ASSEMBLY__ */ diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 9166427..acb8ef7 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -422,9 +422,10 @@ static DEFINE_SPINLOCK(clkout_lock); /* Global var to runtime determine TCDM base for v2 or v1 */ static __iomem void *tcdm_base; +static __iomem void *prcmu_base; struct clk_mgt { - void __iomem *reg; + u32 offset; u32 pllsw; int branch; bool clk38div; @@ -599,9 +600,9 @@ int db8500_prcmu_set_display_clocks(void) while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0) cpu_relax(); - writel(PRCMU_DSI_CLOCK_SETTING, PRCM_HDMICLK_MGT); - writel(PRCMU_DSI_LP_CLOCK_SETTING, PRCM_TVCLK_MGT); - writel(PRCMU_DPI_CLOCK_SETTING, PRCM_LCDCLK_MGT); + writel(PRCMU_DSI_CLOCK_SETTING, prcmu_base + PRCM_HDMICLK_MGT); + writel(PRCMU_DSI_LP_CLOCK_SETTING, prcmu_base + PRCM_TVCLK_MGT); + writel(PRCMU_DPI_CLOCK_SETTING, prcmu_base + PRCM_LCDCLK_MGT); /* Release the HW semaphore. */ writel(0, PRCM_SEM); @@ -613,7 +614,7 @@ int db8500_prcmu_set_display_clocks(void) u32 db8500_prcmu_read(unsigned int reg) { - return readl(_PRCMU_BASE + reg); + return readl(prcmu_base + reg); } void db8500_prcmu_write(unsigned int reg, u32 value) @@ -621,7 +622,7 @@ void db8500_prcmu_write(unsigned int reg, u32 value) unsigned long flags; spin_lock_irqsave(&prcmu_lock, flags); - writel(value, (_PRCMU_BASE + reg)); + writel(value, (prcmu_base + reg)); spin_unlock_irqrestore(&prcmu_lock, flags); } @@ -631,9 +632,9 @@ void db8500_prcmu_write_masked(unsigned int reg, u32 mask, u32 value) unsigned long flags; spin_lock_irqsave(&prcmu_lock, flags); - val = readl(_PRCMU_BASE + reg); + val = readl(prcmu_base + reg); val = ((val & ~mask) | (value & mask)); - writel(val, (_PRCMU_BASE + reg)); + writel(val, (prcmu_base + reg)); spin_unlock_irqrestore(&prcmu_lock, flags); } @@ -1059,7 +1060,7 @@ int db8500_prcmu_set_ddr_opp(u8 opp) /* Divide the frequency of certain clocks by 2 for APE_50_PARTLY_25_OPP. */ static void request_even_slower_clocks(bool enable) { - void __iomem *clock_reg[] = { + u32 clock_reg[] = { PRCM_ACLK_MGT, PRCM_DMACLK_MGT }; @@ -1076,7 +1077,7 @@ static void request_even_slower_clocks(bool enable) u32 val; u32 div; - val = readl(clock_reg[i]); + val = readl(prcmu_base + clock_reg[i]); div = (val & PRCM_CLK_MGT_CLKPLLDIV_MASK); if (enable) { if ((div <= 1) || (div > 15)) { @@ -1092,7 +1093,7 @@ static void request_even_slower_clocks(bool enable) } val = ((val & ~PRCM_CLK_MGT_CLKPLLDIV_MASK) | (div & PRCM_CLK_MGT_CLKPLLDIV_MASK)); - writel(val, clock_reg[i]); + writel(val, prcmu_base + clock_reg[i]); } unlock_and_return: @@ -1446,14 +1447,14 @@ static int request_clock(u8 clock, bool enable) while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0) cpu_relax(); - val = readl(clk_mgt[clock].reg); + val = readl(prcmu_base + clk_mgt[clock].offset); if (enable) { val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw); } else { clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); val &= ~(PRCM_CLK_MGT_CLKEN | PRCM_CLK_MGT_CLKPLLSW_MASK); } - writel(val, clk_mgt[clock].reg); + writel(val, prcmu_base + clk_mgt[clock].offset); /* Release the HW semaphore. */ writel(0, PRCM_SEM); @@ -1629,7 +1630,7 @@ static unsigned long clock_rate(u8 clock) u32 pllsw; unsigned long rate = ROOT_CLOCK_RATE; - val = readl(clk_mgt[clock].reg); + val = readl(prcmu_base + clk_mgt[clock].offset); if (val & PRCM_CLK_MGT_CLK38) { if (clk_mgt[clock].clk38div && (val & PRCM_CLK_MGT_CLK38DIV)) @@ -1785,7 +1786,7 @@ static long round_clock_rate(u8 clock, unsigned long rate) unsigned long src_rate; long rounded_rate; - val = readl(clk_mgt[clock].reg); + val = readl(prcmu_base + clk_mgt[clock].offset); src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), clk_mgt[clock].branch); div = clock_divider(src_rate, rate); @@ -1933,7 +1934,7 @@ static void set_clock_rate(u8 clock, unsigned long rate) while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0) cpu_relax(); - val = readl(clk_mgt[clock].reg); + val = readl(prcmu_base + clk_mgt[clock].offset); src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), clk_mgt[clock].branch); div = clock_divider(src_rate, rate); @@ -1961,7 +1962,7 @@ static void set_clock_rate(u8 clock, unsigned long rate) val &= ~PRCM_CLK_MGT_CLKPLLDIV_MASK; val |= min(div, (u32)31); } - writel(val, clk_mgt[clock].reg); + writel(val, prcmu_base + clk_mgt[clock].offset); /* Release the HW semaphore. */ writel(0, PRCM_SEM); @@ -3163,8 +3164,18 @@ static int db8500_prcmu_probe(struct platform_device *pdev) int irq = 0, err = 0, i; struct resource *res; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcmu"); + if (!res) { + dev_err(&pdev->dev, "no prcmu memory region provided\n"); + return -ENOENT; + } + prcmu_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!prcmu_base) { + dev_err(&pdev->dev, + "failed to ioremap prcmu register memory\n"); + return -ENOENT; + } init_prcm_registers(); - dbx500_fw_version_init(pdev, pdata->version_offset); res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcmu-tcdm"); if (!res) { diff --git a/drivers/mfd/dbx500-prcmu-regs.h b/drivers/mfd/dbx500-prcmu-regs.h index 79c76eb..439254d 100644 --- a/drivers/mfd/dbx500-prcmu-regs.h +++ b/drivers/mfd/dbx500-prcmu-regs.h @@ -13,136 +13,132 @@ #ifndef __DB8500_PRCMU_REGS_H #define __DB8500_PRCMU_REGS_H -#include <mach/hardware.h> - #define BITS(_start, _end) ((BIT(_end) - BIT(_start)) + BIT(_end)) -#define PRCM_CLK_MGT(_offset) (void __iomem *)(IO_ADDRESS(U8500_PRCMU_BASE) \ - + _offset) -#define PRCM_ACLK_MGT PRCM_CLK_MGT(0x004) -#define PRCM_SVACLK_MGT PRCM_CLK_MGT(0x008) -#define PRCM_SIACLK_MGT PRCM_CLK_MGT(0x00C) -#define PRCM_SGACLK_MGT PRCM_CLK_MGT(0x014) -#define PRCM_UARTCLK_MGT PRCM_CLK_MGT(0x018) -#define PRCM_MSP02CLK_MGT PRCM_CLK_MGT(0x01C) -#define PRCM_I2CCLK_MGT PRCM_CLK_MGT(0x020) -#define PRCM_SDMMCCLK_MGT PRCM_CLK_MGT(0x024) -#define PRCM_SLIMCLK_MGT PRCM_CLK_MGT(0x028) -#define PRCM_PER1CLK_MGT PRCM_CLK_MGT(0x02C) -#define PRCM_PER2CLK_MGT PRCM_CLK_MGT(0x030) -#define PRCM_PER3CLK_MGT PRCM_CLK_MGT(0x034) -#define PRCM_PER5CLK_MGT PRCM_CLK_MGT(0x038) -#define PRCM_PER6CLK_MGT PRCM_CLK_MGT(0x03C) -#define PRCM_PER7CLK_MGT PRCM_CLK_MGT(0x040) -#define PRCM_LCDCLK_MGT PRCM_CLK_MGT(0x044) -#define PRCM_BMLCLK_MGT PRCM_CLK_MGT(0x04C) -#define PRCM_HSITXCLK_MGT PRCM_CLK_MGT(0x050) -#define PRCM_HSIRXCLK_MGT PRCM_CLK_MGT(0x054) -#define PRCM_HDMICLK_MGT PRCM_CLK_MGT(0x058) -#define PRCM_APEATCLK_MGT PRCM_CLK_MGT(0x05C) -#define PRCM_APETRACECLK_MGT PRCM_CLK_MGT(0x060) -#define PRCM_MCDECLK_MGT PRCM_CLK_MGT(0x064) -#define PRCM_IPI2CCLK_MGT PRCM_CLK_MGT(0x068) -#define PRCM_DSIALTCLK_MGT PRCM_CLK_MGT(0x06C) -#define PRCM_DMACLK_MGT PRCM_CLK_MGT(0x074) -#define PRCM_B2R2CLK_MGT PRCM_CLK_MGT(0x078) -#define PRCM_TVCLK_MGT PRCM_CLK_MGT(0x07C) -#define PRCM_UNIPROCLK_MGT PRCM_CLK_MGT(0x278) -#define PRCM_SSPCLK_MGT PRCM_CLK_MGT(0x280) -#define PRCM_RNGCLK_MGT PRCM_CLK_MGT(0x284) -#define PRCM_UICCCLK_MGT PRCM_CLK_MGT(0x27C) -#define PRCM_MSP1CLK_MGT PRCM_CLK_MGT(0x288) - -#define PRCM_ARM_PLLDIVPS (_PRCMU_BASE + 0x118) +#define PRCM_ACLK_MGT (0x004) +#define PRCM_SVACLK_MGT (0x008) +#define PRCM_SIACLK_MGT (0x00C) +#define PRCM_SGACLK_MGT (0x014) +#define PRCM_UARTCLK_MGT (0x018) +#define PRCM_MSP02CLK_MGT (0x01C) +#define PRCM_I2CCLK_MGT (0x020) +#define PRCM_SDMMCCLK_MGT (0x024) +#define PRCM_SLIMCLK_MGT (0x028) +#define PRCM_PER1CLK_MGT (0x02C) +#define PRCM_PER2CLK_MGT (0x030) +#define PRCM_PER3CLK_MGT (0x034) +#define PRCM_PER5CLK_MGT (0x038) +#define PRCM_PER6CLK_MGT (0x03C) +#define PRCM_PER7CLK_MGT (0x040) +#define PRCM_LCDCLK_MGT (0x044) +#define PRCM_BMLCLK_MGT (0x04C) +#define PRCM_HSITXCLK_MGT (0x050) +#define PRCM_HSIRXCLK_MGT (0x054) +#define PRCM_HDMICLK_MGT (0x058) +#define PRCM_APEATCLK_MGT (0x05C) +#define PRCM_APETRACECLK_MGT (0x060) +#define PRCM_MCDECLK_MGT (0x064) +#define PRCM_IPI2CCLK_MGT (0x068) +#define PRCM_DSIALTCLK_MGT (0x06C) +#define PRCM_DMACLK_MGT (0x074) +#define PRCM_B2R2CLK_MGT (0x078) +#define PRCM_TVCLK_MGT (0x07C) +#define PRCM_UNIPROCLK_MGT (0x278) +#define PRCM_SSPCLK_MGT (0x280) +#define PRCM_RNGCLK_MGT (0x284) +#define PRCM_UICCCLK_MGT (0x27C) +#define PRCM_MSP1CLK_MGT (0x288) + +#define PRCM_ARM_PLLDIVPS (prcmu_base + 0x118) #define PRCM_ARM_PLLDIVPS_ARM_BRM_RATE 0x3f #define PRCM_ARM_PLLDIVPS_MAX_MASK 0xf -#define PRCM_PLLARM_LOCKP (_PRCMU_BASE + 0x0a8) +#define PRCM_PLLARM_LOCKP (prcmu_base + 0x0a8) #define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3 0x2 -#define PRCM_ARM_CHGCLKREQ (_PRCMU_BASE + 0x114) +#define PRCM_ARM_CHGCLKREQ (prcmu_base + 0x114) #define PRCM_ARM_CHGCLKREQ_PRCM_ARM_CHGCLKREQ BIT(0) #define PRCM_ARM_CHGCLKREQ_PRCM_ARM_DIVSEL BIT(16) -#define PRCM_PLLARM_ENABLE (_PRCMU_BASE + 0x98) +#define PRCM_PLLARM_ENABLE (prcmu_base + 0x98) #define PRCM_PLLARM_ENABLE_PRCM_PLLARM_ENABLE 0x1 #define PRCM_PLLARM_ENABLE_PRCM_PLLARM_COUNTON 0x100 -#define PRCM_ARMCLKFIX_MGT (_PRCMU_BASE + 0x0) -#define PRCM_A9PL_FORCE_CLKEN (_PRCMU_BASE + 0x19C) -#define PRCM_A9_RESETN_CLR (_PRCMU_BASE + 0x1f4) -#define PRCM_A9_RESETN_SET (_PRCMU_BASE + 0x1f0) -#define PRCM_ARM_LS_CLAMP (_PRCMU_BASE + 0x30c) -#define PRCM_SRAM_A9 (_PRCMU_BASE + 0x308) +#define PRCM_ARMCLKFIX_MGT (prcmu_base + 0x0) +#define PRCM_A9PL_FORCE_CLKEN (prcmu_base + 0x19C) +#define PRCM_A9_RESETN_CLR (prcmu_base + 0x1f4) +#define PRCM_A9_RESETN_SET (prcmu_base + 0x1f0) +#define PRCM_ARM_LS_CLAMP (prcmu_base + 0x30c) +#define PRCM_SRAM_A9 (prcmu_base + 0x308) #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN BIT(0) #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN BIT(1) /* ARM WFI Standby signal register */ -#define PRCM_ARM_WFI_STANDBY (_PRCMU_BASE + 0x130) +#define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) #define PRCM_ARM_WFI_STANDBY_WFI0 0x08 #define PRCM_ARM_WFI_STANDBY_WFI1 0x10 -#define PRCM_IOCR (_PRCMU_BASE + 0x310) +#define PRCM_IOCR (prcmu_base + 0x310) #define PRCM_IOCR_IOFORCE 0x1 /* CPU mailbox registers */ -#define PRCM_MBOX_CPU_VAL (_PRCMU_BASE + 0x0fc) -#define PRCM_MBOX_CPU_SET (_PRCMU_BASE + 0x100) -#define PRCM_MBOX_CPU_CLR (_PRCMU_BASE + 0x104) +#define PRCM_MBOX_CPU_VAL (prcmu_base + 0x0fc) +#define PRCM_MBOX_CPU_SET (prcmu_base + 0x100) +#define PRCM_MBOX_CPU_CLR (prcmu_base + 0x104) /* Dual A9 core interrupt management unit registers */ -#define PRCM_A9_MASK_REQ (_PRCMU_BASE + 0x328) +#define PRCM_A9_MASK_REQ (prcmu_base + 0x328) #define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ 0x1 -#define PRCM_A9_MASK_ACK (_PRCMU_BASE + 0x32c) -#define PRCM_ARMITMSK31TO0 (_PRCMU_BASE + 0x11c) -#define PRCM_ARMITMSK63TO32 (_PRCMU_BASE + 0x120) -#define PRCM_ARMITMSK95TO64 (_PRCMU_BASE + 0x124) -#define PRCM_ARMITMSK127TO96 (_PRCMU_BASE + 0x128) -#define PRCM_POWER_STATE_VAL (_PRCMU_BASE + 0x25C) -#define PRCM_ARMITVAL31TO0 (_PRCMU_BASE + 0x260) -#define PRCM_ARMITVAL63TO32 (_PRCMU_BASE + 0x264) -#define PRCM_ARMITVAL95TO64 (_PRCMU_BASE + 0x268) -#define PRCM_ARMITVAL127TO96 (_PRCMU_BASE + 0x26C) - -#define PRCM_HOSTACCESS_REQ (_PRCMU_BASE + 0x334) +#define PRCM_A9_MASK_ACK (prcmu_base + 0x32c) +#define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c) +#define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120) +#define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124) +#define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128) +#define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C) +#define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260) +#define PRCM_ARMITVAL63TO32 (prcmu_base + 0x264) +#define PRCM_ARMITVAL95TO64 (prcmu_base + 0x268) +#define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C) + +#define PRCM_HOSTACCESS_REQ (prcmu_base + 0x334) #define PRCM_HOSTACCESS_REQ_HOSTACCESS_REQ 0x1 #define PRCM_HOSTACCESS_REQ_WAKE_REQ BIT(16) #define ARM_WAKEUP_MODEM 0x1 -#define PRCM_ARM_IT1_CLR (_PRCMU_BASE + 0x48C) -#define PRCM_ARM_IT1_VAL (_PRCMU_BASE + 0x494) -#define PRCM_HOLD_EVT (_PRCMU_BASE + 0x174) +#define PRCM_ARM_IT1_CLR (prcmu_base + 0x48C) +#define PRCM_ARM_IT1_VAL (prcmu_base + 0x494) +#define PRCM_HOLD_EVT (prcmu_base + 0x174) -#define PRCM_MOD_AWAKE_STATUS (_PRCMU_BASE + 0x4A0) +#define PRCM_MOD_AWAKE_STATUS (prcmu_base + 0x4A0) #define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_COREPD_AWAKE BIT(0) #define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_AAPD_AWAKE BIT(1) #define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_VMODEM_OFF_ISO BIT(2) -#define PRCM_ITSTATUS0 (_PRCMU_BASE + 0x148) -#define PRCM_ITSTATUS1 (_PRCMU_BASE + 0x150) -#define PRCM_ITSTATUS2 (_PRCMU_BASE + 0x158) -#define PRCM_ITSTATUS3 (_PRCMU_BASE + 0x160) -#define PRCM_ITSTATUS4 (_PRCMU_BASE + 0x168) -#define PRCM_ITSTATUS5 (_PRCMU_BASE + 0x484) -#define PRCM_ITCLEAR5 (_PRCMU_BASE + 0x488) -#define PRCM_ARMIT_MASKXP70_IT (_PRCMU_BASE + 0x1018) +#define PRCM_ITSTATUS0 (prcmu_base + 0x148) +#define PRCM_ITSTATUS1 (prcmu_base + 0x150) +#define PRCM_ITSTATUS2 (prcmu_base + 0x158) +#define PRCM_ITSTATUS3 (prcmu_base + 0x160) +#define PRCM_ITSTATUS4 (prcmu_base + 0x168) +#define PRCM_ITSTATUS5 (prcmu_base + 0x484) +#define PRCM_ITCLEAR5 (prcmu_base + 0x488) +#define PRCM_ARMIT_MASKXP70_IT (prcmu_base + 0x1018) /* System reset register */ -#define PRCM_APE_SOFTRST (_PRCMU_BASE + 0x228) +#define PRCM_APE_SOFTRST (prcmu_base + 0x228) /* Level shifter and clamp control registers */ -#define PRCM_MMIP_LS_CLAMP_SET (_PRCMU_BASE + 0x420) -#define PRCM_MMIP_LS_CLAMP_CLR (_PRCMU_BASE + 0x424) +#define PRCM_MMIP_LS_CLAMP_SET (prcmu_base + 0x420) +#define PRCM_MMIP_LS_CLAMP_CLR (prcmu_base + 0x424) #define PRCM_MMIP_LS_CLAMP_DSIPLL_CLAMP BIT(11) #define PRCM_MMIP_LS_CLAMP_DSIPLL_CLAMPI BIT(22) /* PRCMU clock/PLL/reset registers */ -#define PRCM_PLLSOC0_FREQ (_PRCMU_BASE + 0x080) -#define PRCM_PLLSOC1_FREQ (_PRCMU_BASE + 0x084) -#define PRCM_PLLARM_FREQ (_PRCMU_BASE + 0x088) -#define PRCM_PLLDDR_FREQ (_PRCMU_BASE + 0x08C) +#define PRCM_PLLSOC0_FREQ (prcmu_base + 0x080) +#define PRCM_PLLSOC1_FREQ (prcmu_base + 0x084) +#define PRCM_PLLARM_FREQ (prcmu_base + 0x088) +#define PRCM_PLLDDR_FREQ (prcmu_base + 0x08C) #define PRCM_PLL_FREQ_D_SHIFT 0 #define PRCM_PLL_FREQ_D_MASK BITS(0, 7) #define PRCM_PLL_FREQ_N_SHIFT 8 @@ -152,14 +148,14 @@ #define PRCM_PLL_FREQ_SELDIV2 BIT(24) #define PRCM_PLL_FREQ_DIV2EN BIT(25) -#define PRCM_PLLDSI_FREQ (_PRCMU_BASE + 0x500) -#define PRCM_PLLDSI_ENABLE (_PRCMU_BASE + 0x504) -#define PRCM_PLLDSI_LOCKP (_PRCMU_BASE + 0x508) -#define PRCM_DSI_PLLOUT_SEL (_PRCMU_BASE + 0x530) -#define PRCM_DSITVCLK_DIV (_PRCMU_BASE + 0x52C) -#define PRCM_PLLDSI_LOCKP (_PRCMU_BASE + 0x508) -#define PRCM_APE_RESETN_SET (_PRCMU_BASE + 0x1E4) -#define PRCM_APE_RESETN_CLR (_PRCMU_BASE + 0x1E8) +#define PRCM_PLLDSI_FREQ (prcmu_base + 0x500) +#define PRCM_PLLDSI_ENABLE (prcmu_base + 0x504) +#define PRCM_PLLDSI_LOCKP (prcmu_base + 0x508) +#define PRCM_DSI_PLLOUT_SEL (prcmu_base + 0x530) +#define PRCM_DSITVCLK_DIV (prcmu_base + 0x52C) +#define PRCM_PLLDSI_LOCKP (prcmu_base + 0x508) +#define PRCM_APE_RESETN_SET (prcmu_base + 0x1E4) +#define PRCM_APE_RESETN_CLR (prcmu_base + 0x1E8) #define PRCM_PLLDSI_ENABLE_PRCM_PLLDSI_ENABLE BIT(0) @@ -188,30 +184,30 @@ #define PRCM_APE_RESETN_DSIPLL_RESETN BIT(14) -#define PRCM_CLKOCR (_PRCMU_BASE + 0x1CC) +#define PRCM_CLKOCR (prcmu_base + 0x1CC) #define PRCM_CLKOCR_CLKOUT0_REF_CLK (1 << 0) #define PRCM_CLKOCR_CLKOUT0_MASK BITS(0, 13) #define PRCM_CLKOCR_CLKOUT1_REF_CLK (1 << 16) #define PRCM_CLKOCR_CLKOUT1_MASK BITS(16, 29) /* ePOD and memory power signal control registers */ -#define PRCM_EPOD_C_SET (_PRCMU_BASE + 0x410) -#define PRCM_SRAM_LS_SLEEP (_PRCMU_BASE + 0x304) +#define PRCM_EPOD_C_SET (prcmu_base + 0x410) +#define PRCM_SRAM_LS_SLEEP (prcmu_base + 0x304) /* Debug power control unit registers */ -#define PRCM_POWER_STATE_SET (_PRCMU_BASE + 0x254) +#define PRCM_POWER_STATE_SET (prcmu_base + 0x254) /* Miscellaneous unit registers */ -#define PRCM_DSI_SW_RESET (_PRCMU_BASE + 0x324) -#define PRCM_GPIOCR (_PRCMU_BASE + 0x138) +#define PRCM_DSI_SW_RESET (prcmu_base + 0x324) +#define PRCM_GPIOCR (prcmu_base + 0x138) #define PRCM_GPIOCR_DBG_STM_MOD_CMD1 0x800 #define PRCM_GPIOCR_DBG_UARTMOD_CMD0 0x1 /* PRCMU HW semaphore */ -#define PRCM_SEM (_PRCMU_BASE + 0x400) +#define PRCM_SEM (prcmu_base + 0x400) #define PRCM_SEM_PRCM_SEM BIT(0) -#define PRCM_TCR (_PRCMU_BASE + 0x1C8) +#define PRCM_TCR (prcmu_base + 0x1C8) #define PRCM_TCR_TENSEL_MASK BITS(0, 7) #define PRCM_TCR_STOP_TIMERS BIT(16) #define PRCM_TCR_DOZE_MODE BIT(17) @@ -239,15 +235,15 @@ /* GPIOCR register */ #define PRCM_GPIOCR_SPI2_SELECT BIT(23) -#define PRCM_DDR_SUBSYS_APE_MINBW (_PRCMU_BASE + 0x438) -#define PRCM_CGATING_BYPASS (_PRCMU_BASE + 0x134) +#define PRCM_DDR_SUBSYS_APE_MINBW (prcmu_base + 0x438) +#define PRCM_CGATING_BYPASS (prcmu_base + 0x134) #define PRCM_CGATING_BYPASS_ICN2 BIT(6) /* Miscellaneous unit registers */ -#define PRCM_RESOUTN_SET (_PRCMU_BASE + 0x214) -#define PRCM_RESOUTN_CLR (_PRCMU_BASE + 0x218) +#define PRCM_RESOUTN_SET (prcmu_base + 0x214) +#define PRCM_RESOUTN_CLR (prcmu_base + 0x218) /* System reset register */ -#define PRCM_APE_SOFTRST (_PRCMU_BASE + 0x228) +#define PRCM_APE_SOFTRST (prcmu_base + 0x228) #endif /* __DB8500_PRCMU_REGS_H */ -- 1.7.11.3 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 4/6] mfd: db8500-prcmu: get base address from resource 2013-03-21 11:49 ` [PATCH 4/6] mfd: db8500-prcmu: get base address from resource Linus Walleij @ 2013-03-21 12:15 ` Arnd Bergmann 2013-03-21 17:10 ` Linus Walleij 0 siblings, 1 reply; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 12:15 UTC (permalink / raw) To: linux-arm-kernel On Thursday 21 March 2013 12:49:11 Linus Walleij wrote: > -#define PRCM_PLLARM_LOCKP (_PRCMU_BASE + 0x0a8) > +#define PRCM_PLLARM_LOCKP (prcmu_base + 0x0a8) > #define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3 0x2 While this is certainly the least invasive way to get rid of _PRCMU_BASE, it sucks to refer to local variables in macros. How hard would it be to find all users of these macros and put the prcmu_base addition there? The rest of this patch looks fine to me. Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 4/6] mfd: db8500-prcmu: get base address from resource 2013-03-21 12:15 ` Arnd Bergmann @ 2013-03-21 17:10 ` Linus Walleij 2013-03-21 19:07 ` Arnd Bergmann 0 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-21 17:10 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 21, 2013 at 1:15 PM, Arnd Bergmann <arnd@arndb.de> wrote: > On Thursday 21 March 2013 12:49:11 Linus Walleij wrote: >> -#define PRCM_PLLARM_LOCKP (_PRCMU_BASE + 0x0a8) >> +#define PRCM_PLLARM_LOCKP (prcmu_base + 0x0a8) >> #define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3 0x2 > > While this is certainly the least invasive way to get rid of _PRCMU_BASE, > it sucks to refer to local variables in macros. How hard would it > be to find all users of these macros and put the prcmu_base addition > there? > > The rest of this patch looks fine to me. Basically I didn't want to disturb Lo?cs work on PRCMU refactoring, but if it is require I can surely do this. Lo?c, are you OK with this? Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 4/6] mfd: db8500-prcmu: get base address from resource 2013-03-21 17:10 ` Linus Walleij @ 2013-03-21 19:07 ` Arnd Bergmann 2013-03-21 20:26 ` Loic PALLARDY 0 siblings, 1 reply; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 19:07 UTC (permalink / raw) To: linux-arm-kernel On Thursday 21 March 2013, Linus Walleij wrote: > On Thu, Mar 21, 2013 at 1:15 PM, Arnd Bergmann <arnd@arndb.de> wrote: > > > On Thursday 21 March 2013 12:49:11 Linus Walleij wrote: > >> -#define PRCM_PLLARM_LOCKP (_PRCMU_BASE + 0x0a8) > >> +#define PRCM_PLLARM_LOCKP (prcmu_base + 0x0a8) > >> #define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3 0x2 > > > > While this is certainly the least invasive way to get rid of _PRCMU_BASE, > > it sucks to refer to local variables in macros. How hard would it > > be to find all users of these macros and put the prcmu_base addition > > there? > > > > The rest of this patch looks fine to me. > > Basically I didn't want to disturb Lo?cs work on PRCMU refactoring, > but if it is require I can surely do this. That's probably a good enough reason to leave it alone for now, but we should remember to fix it up later. How about adding a comment in the header so we don't forget about it? Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 4/6] mfd: db8500-prcmu: get base address from resource 2013-03-21 19:07 ` Arnd Bergmann @ 2013-03-21 20:26 ` Loic PALLARDY 0 siblings, 0 replies; 49+ messages in thread From: Loic PALLARDY @ 2013-03-21 20:26 UTC (permalink / raw) To: linux-arm-kernel On 03/21/2013 08:07 PM, Arnd Bergmann wrote: > On Thursday 21 March 2013, Linus Walleij wrote: >> On Thu, Mar 21, 2013 at 1:15 PM, Arnd Bergmann<arnd@arndb.de> wrote: >> >>> On Thursday 21 March 2013 12:49:11 Linus Walleij wrote: >>>> -#define PRCM_PLLARM_LOCKP (_PRCMU_BASE + 0x0a8) >>>> +#define PRCM_PLLARM_LOCKP (prcmu_base + 0x0a8) >>>> #define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3 0x2 >>> >>> While this is certainly the least invasive way to get rid of _PRCMU_BASE, >>> it sucks to refer to local variables in macros. How hard would it >>> be to find all users of these macros and put the prcmu_base addition >>> there? >>> >>> The rest of this patch looks fine to me. >> >> Basically I didn't want to disturb Lo?cs work on PRCMU refactoring, >> but if it is require I can surely do this. > > That's probably a good enough reason to leave it alone for now, but we > should remember to fix it up later. > > How about adding a comment in the header so we don't forget about it? > I'll prefer to have same way to access all PRCM registers. prcmu_base should be used only in db8500-prcmu.c file and db8500-prcmu-regs.h should contain register offset. Register should be accessed in db8500-prcmu.c file like: val = readl(prcmu_base + PRCM_XXX); Linus, I'll propose you a patch derived from prcmu refactoring stuff. /Loic > Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij ` (3 preceding siblings ...) 2013-03-21 11:49 ` [PATCH 4/6] mfd: db8500-prcmu: get base address from resource Linus Walleij @ 2013-03-21 11:49 ` Linus Walleij 2013-03-21 12:14 ` Rickard Andersson 2013-03-21 11:49 ` [PATCH 6/6] ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> Linus Walleij 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann 6 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-21 11:49 UTC (permalink / raw) To: linux-arm-kernel From: Linus Walleij <linus.walleij@linaro.org> We are trying to decompose and decentralize the code in the DB8500 PRCMU out into subdrivers. The CPUidle code is calling down into the PRCMU driver basically just to access these registers, so let's remap them locally in the CPUidle driver and move the code there, simply. Besides, the PRCMU code was poking around in the GIC which is the responsibility of the machine. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rickard Andersson <rickard.andersson@stericsson.com> Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- Sam, I'm requesting an ACK for taking this through the ARM SoC tree. --- arch/arm/mach-ux500/cpuidle.c | 148 ++++++++++++++++++++++++++++++++++++++- drivers/mfd/db8500-prcmu.c | 114 ------------------------------ include/linux/mfd/db8500-prcmu.h | 6 -- include/linux/mfd/dbx500-prcmu.h | 30 -------- 4 files changed, 147 insertions(+), 151 deletions(-) diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c index ce91493..df3c1d3 100644 --- a/arch/arm/mach-ux500/cpuidle.c +++ b/arch/arm/mach-ux500/cpuidle.c @@ -16,13 +16,154 @@ #include <linux/atomic.h> #include <linux/smp.h> #include <linux/mfd/dbx500-prcmu.h> +#include <linux/irqchip/arm-gic.h> +#include <linux/delay.h> +#include <linux/io.h> #include <asm/cpuidle.h> #include <asm/proc-fns.h> +#include <mach/hardware.h> + +/* ARM WFI Standby signal register */ +#define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) +#define PRCM_ARM_WFI_STANDBY_WFI0 0x08 +#define PRCM_ARM_WFI_STANDBY_WFI1 0x10 +#define PRCM_IOCR (prcmu_base + 0x310) +#define PRCM_IOCR_IOFORCE 0x1 + +/* Dual A9 core interrupt management unit registers */ +#define PRCM_A9_MASK_REQ (prcmu_base + 0x328) +#define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ 0x1 + +#define PRCM_A9_MASK_ACK (prcmu_base + 0x32c) +#define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c) +#define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120) +#define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124) +#define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128) +#define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C) +#define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260) +#define PRCM_ARMITVAL63TO32 (prcmu_base + 0x264) +#define PRCM_ARMITVAL95TO64 (prcmu_base + 0x268) +#define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C) + static atomic_t master = ATOMIC_INIT(0); static DEFINE_SPINLOCK(master_lock); static DEFINE_PER_CPU(struct cpuidle_device, ux500_cpuidle_device); +static void __iomem *prcmu_base; + +/* This function decouple the gic from the prcmu */ +static int prcmu_gic_decouple(void) +{ + u32 val = readl(PRCM_A9_MASK_REQ); + + /* Set bit 0 register value to 1 */ + writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, + PRCM_A9_MASK_REQ); + + /* Make sure the register is updated */ + readl(PRCM_A9_MASK_REQ); + + /* Wait a few cycles for the gic mask completion */ + udelay(1); + + return 0; +} + +/* This function recouple the gic with the prcmu */ +static int prcmu_gic_recouple(void) +{ + u32 val = readl(PRCM_A9_MASK_REQ); + + /* Set bit 0 register value to 0 */ + writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ); + + return 0; +} + +#define PRCMU_GIC_NUMBER_REGS 5 + +/* + * This function checks if there are pending irq on the gic. It only + * makes sense if the gic has been decoupled before with the + * db8500_prcmu_gic_decouple function. Disabling an interrupt only + * disables the forwarding of the interrupt to any CPU interface. It + * does not prevent the interrupt from changing state, for example + * becoming pending, or active and pending if it is already + * active. Hence, we have to check the interrupt is pending *and* is + * active. + */ +static bool prcmu_gic_pending_irq(void) +{ + u32 pr; /* Pending register */ + u32 er; /* Enable register */ + void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE); + int i; + + /* 5 registers. STI & PPI not skipped */ + for (i = 0; i < PRCMU_GIC_NUMBER_REGS; i++) { + + pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4); + er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); + + if (pr & er) + return true; /* There is a pending interrupt */ + } + + return false; +} + +/* + * This function checks if there are pending interrupt on the + * prcmu which has been delegated to monitor the irqs with the + * db8500_prcmu_copy_gic_settings function. + */ +static bool prcmu_pending_irq(void) +{ + u32 it, im; + int i; + + for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) { + it = readl(PRCM_ARMITVAL31TO0 + i * 4); + im = readl(PRCM_ARMITMSK31TO0 + i * 4); + if (it & im) + return true; /* There is a pending interrupt */ + } + + return false; +} + +/* + * This function checks if the specified cpu is in in WFI. It's usage + * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple + * function. Of course passing smp_processor_id() to this function will + * always return false... + */ +static bool prcmu_is_cpu_in_wfi(int cpu) +{ + return readl(PRCM_ARM_WFI_STANDBY) & cpu ? PRCM_ARM_WFI_STANDBY_WFI1 : + PRCM_ARM_WFI_STANDBY_WFI0; +} + +/* + * This function copies the gic SPI settings to the prcmu in order to + * monitor them and abort/finish the retention/off sequence or state. + */ +static int prcmu_copy_gic_settings(void) +{ + u32 er; /* Enable register */ + void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE); + int i; + + /* We skip the STI and PPI */ + for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) { + er = readl_relaxed(dist_base + + GIC_DIST_ENABLE_SET + (i + 1) * 4); + writel(er, PRCM_ARMITMSK31TO0 + i * 4); + } + + return 0; +} static inline int ux500_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) @@ -130,7 +271,11 @@ int __init ux500_idle_init(void) int ret, cpu; struct cpuidle_device *device; - /* Configure wake up reasons */ + prcmu_base = ioremap(U8500_PRCMU_BASE, SZ_4K); + if (!prcmu_base) + return 0; + + /* Configure wake up reasons */ prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) | PRCMU_WAKEUP(ABB)); @@ -167,6 +312,7 @@ out_unregister: } cpuidle_unregister_driver(&ux500_idle_driver); + iounmap(prcmu_base); goto out; } diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index acb8ef7..2d3a5f6 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -26,7 +26,6 @@ #include <linux/fs.h> #include <linux/platform_device.h> #include <linux/uaccess.h> -#include <linux/irqchip/arm-gic.h> #include <linux/mfd/core.h> #include <linux/mfd/dbx500-prcmu.h> #include <linux/mfd/abx500/ab8500.h> @@ -794,119 +793,6 @@ u8 db8500_prcmu_get_power_state_result(void) return readb(tcdm_base + PRCM_ACK_MB0_AP_PWRSTTR_STATUS); } -/* This function decouple the gic from the prcmu */ -int db8500_prcmu_gic_decouple(void) -{ - u32 val = readl(PRCM_A9_MASK_REQ); - - /* Set bit 0 register value to 1 */ - writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, - PRCM_A9_MASK_REQ); - - /* Make sure the register is updated */ - readl(PRCM_A9_MASK_REQ); - - /* Wait a few cycles for the gic mask completion */ - udelay(1); - - return 0; -} - -/* This function recouple the gic with the prcmu */ -int db8500_prcmu_gic_recouple(void) -{ - u32 val = readl(PRCM_A9_MASK_REQ); - - /* Set bit 0 register value to 0 */ - writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ); - - return 0; -} - -#define PRCMU_GIC_NUMBER_REGS 5 - -/* - * This function checks if there are pending irq on the gic. It only - * makes sense if the gic has been decoupled before with the - * db8500_prcmu_gic_decouple function. Disabling an interrupt only - * disables the forwarding of the interrupt to any CPU interface. It - * does not prevent the interrupt from changing state, for example - * becoming pending, or active and pending if it is already - * active. Hence, we have to check the interrupt is pending *and* is - * active. - */ -bool db8500_prcmu_gic_pending_irq(void) -{ - u32 pr; /* Pending register */ - u32 er; /* Enable register */ - void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE); - int i; - - /* 5 registers. STI & PPI not skipped */ - for (i = 0; i < PRCMU_GIC_NUMBER_REGS; i++) { - - pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4); - er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); - - if (pr & er) - return true; /* There is a pending interrupt */ - } - - return false; -} - -/* - * This function checks if there are pending interrupt on the - * prcmu which has been delegated to monitor the irqs with the - * db8500_prcmu_copy_gic_settings function. - */ -bool db8500_prcmu_pending_irq(void) -{ - u32 it, im; - int i; - - for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) { - it = readl(PRCM_ARMITVAL31TO0 + i * 4); - im = readl(PRCM_ARMITMSK31TO0 + i * 4); - if (it & im) - return true; /* There is a pending interrupt */ - } - - return false; -} - -/* - * This function checks if the specified cpu is in in WFI. It's usage - * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple - * function. Of course passing smp_processor_id() to this function will - * always return false... - */ -bool db8500_prcmu_is_cpu_in_wfi(int cpu) -{ - return readl(PRCM_ARM_WFI_STANDBY) & cpu ? PRCM_ARM_WFI_STANDBY_WFI1 : - PRCM_ARM_WFI_STANDBY_WFI0; -} - -/* - * This function copies the gic SPI settings to the prcmu in order to - * monitor them and abort/finish the retention/off sequence or state. - */ -int db8500_prcmu_copy_gic_settings(void) -{ - u32 er; /* Enable register */ - void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE); - int i; - - /* We skip the STI and PPI */ - for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) { - er = readl_relaxed(dist_base + - GIC_DIST_ENABLE_SET + (i + 1) * 4); - writel(er, PRCM_ARMITMSK31TO0 + i * 4); - } - - return 0; -} - /* This function should only be called while mb0_transfer.lock is held. */ static void config_wakeups(void) { diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index ac943df..0bd6944 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h @@ -522,12 +522,6 @@ int db8500_prcmu_load_a9wdog(u8 id, u32 val); void db8500_prcmu_system_reset(u16 reset_code); int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll); u8 db8500_prcmu_get_power_state_result(void); -int db8500_prcmu_gic_decouple(void); -int db8500_prcmu_gic_recouple(void); -int db8500_prcmu_copy_gic_settings(void); -bool db8500_prcmu_gic_pending_irq(void); -bool db8500_prcmu_pending_irq(void); -bool db8500_prcmu_is_cpu_in_wfi(int cpu); void db8500_prcmu_enable_wakeups(u32 wakeups); int db8500_prcmu_set_epod(u16 epod_id, u8 epod_state); int db8500_prcmu_request_clock(u8 clock, bool enable); diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index 8c546cb..fc43cec 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -293,36 +293,6 @@ static inline u8 prcmu_get_power_state_result(void) return db8500_prcmu_get_power_state_result(); } -static inline int prcmu_gic_decouple(void) -{ - return db8500_prcmu_gic_decouple(); -} - -static inline int prcmu_gic_recouple(void) -{ - return db8500_prcmu_gic_recouple(); -} - -static inline bool prcmu_gic_pending_irq(void) -{ - return db8500_prcmu_gic_pending_irq(); -} - -static inline bool prcmu_is_cpu_in_wfi(int cpu) -{ - return db8500_prcmu_is_cpu_in_wfi(cpu); -} - -static inline int prcmu_copy_gic_settings(void) -{ - return db8500_prcmu_copy_gic_settings(); -} - -static inline bool prcmu_pending_irq(void) -{ - return db8500_prcmu_pending_irq(); -} - static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) { return db8500_prcmu_set_epod(epod_id, epod_state); -- 1.7.11.3 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-21 11:49 ` [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver Linus Walleij @ 2013-03-21 12:14 ` Rickard Andersson 2013-03-21 12:30 ` Daniel Lezcano 0 siblings, 1 reply; 49+ messages in thread From: Rickard Andersson @ 2013-03-21 12:14 UTC (permalink / raw) To: linux-arm-kernel On 03/21/2013 12:49 PM, Linus WALLEIJ wrote: > From: Linus Walleij<linus.walleij@linaro.org> > > We are trying to decompose and decentralize the code in > the DB8500 PRCMU out into subdrivers. The CPUidle code is > calling down into the PRCMU driver basically just to access > these registers, so let's remap them locally in the CPUidle > driver and move the code there, simply. Besides, the PRCMU > code was poking around in the GIC which is the responsibility > of the machine. > > Cc: Daniel Lezcano<daniel.lezcano@linaro.org> > Cc: Rickard Andersson<rickard.andersson@stericsson.com> > Cc: Samuel Ortiz<sameo@linux.intel.com> > Signed-off-by: Linus Walleij<linus.walleij@linaro.org> > --- > Sam, I'm requesting an ACK for taking this through the > ARM SoC tree. > --- This functionality will be used by the platform suspend operation also which I am currently working on. So I would prefer if you can move it to a separate file instead so it can be used by suspend as well. I recommend to have it the same way we have it in our internal track i.e. a file called pm.c in the machine. BR Rickard ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-21 12:14 ` Rickard Andersson @ 2013-03-21 12:30 ` Daniel Lezcano 2013-03-22 8:30 ` Rickard Andersson 2013-03-25 13:44 ` Linus Walleij 0 siblings, 2 replies; 49+ messages in thread From: Daniel Lezcano @ 2013-03-21 12:30 UTC (permalink / raw) To: linux-arm-kernel On 03/21/2013 01:14 PM, Rickard Andersson wrote: > On 03/21/2013 12:49 PM, Linus WALLEIJ wrote: >> From: Linus Walleij<linus.walleij@linaro.org> >> >> We are trying to decompose and decentralize the code in >> the DB8500 PRCMU out into subdrivers. The CPUidle code is >> calling down into the PRCMU driver basically just to access >> these registers, so let's remap them locally in the CPUidle >> driver and move the code there, simply. Besides, the PRCMU >> code was poking around in the GIC which is the responsibility >> of the machine. >> >> Cc: Daniel Lezcano<daniel.lezcano@linaro.org> >> Cc: Rickard Andersson<rickard.andersson@stericsson.com> >> Cc: Samuel Ortiz<sameo@linux.intel.com> >> Signed-off-by: Linus Walleij<linus.walleij@linaro.org> >> --- >> Sam, I'm requesting an ACK for taking this through the >> ARM SoC tree. >> --- > This functionality will be used by the platform suspend operation also > which I am currently working on. So I would prefer if you can move it to > a separate file instead so it can be used by suspend as well. I > recommend to have it the same way we have it in our internal track i.e. > a file called pm.c in the machine. That would be nice to move this driver to drivers/cpuidle. If you are ok with that, I can take care of moving the driver to this directory and then create the pm.c file in the mach-ux500 to move the prcmu specific code inside. Meanwhile this patch can be merged to group the prcmu code needed for the driver and can be easily identified. -- <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-21 12:30 ` Daniel Lezcano @ 2013-03-22 8:30 ` Rickard Andersson 2013-03-25 13:44 ` Linus Walleij 1 sibling, 0 replies; 49+ messages in thread From: Rickard Andersson @ 2013-03-22 8:30 UTC (permalink / raw) To: linux-arm-kernel On 03/21/2013 01:30 PM, Daniel Lezcano wrote: > On 03/21/2013 01:14 PM, Rickard Andersson wrote: >> On 03/21/2013 12:49 PM, Linus WALLEIJ wrote: >>> From: Linus Walleij<linus.walleij@linaro.org> >>> >>> We are trying to decompose and decentralize the code in >>> the DB8500 PRCMU out into subdrivers. The CPUidle code is >>> calling down into the PRCMU driver basically just to access >>> these registers, so let's remap them locally in the CPUidle >>> driver and move the code there, simply. Besides, the PRCMU >>> code was poking around in the GIC which is the responsibility >>> of the machine. >>> >>> Cc: Daniel Lezcano<daniel.lezcano@linaro.org> >>> Cc: Rickard Andersson<rickard.andersson@stericsson.com> >>> Cc: Samuel Ortiz<sameo@linux.intel.com> >>> Signed-off-by: Linus Walleij<linus.walleij@linaro.org> >>> --- >>> Sam, I'm requesting an ACK for taking this through the >>> ARM SoC tree. >>> --- >> This functionality will be used by the platform suspend operation also >> which I am currently working on. So I would prefer if you can move it to >> a separate file instead so it can be used by suspend as well. I >> recommend to have it the same way we have it in our internal track i.e. >> a file called pm.c in the machine. > That would be nice to move this driver to drivers/cpuidle. > > If you are ok with that, I can take care of moving the driver to this > directory and then create the pm.c file in the mach-ux500 to move the > prcmu specific code inside. Meanwhile this patch can be merged to group > the prcmu code needed for the driver and can be easily identified. > > > > It is ok to me. BR Rickard ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-21 12:30 ` Daniel Lezcano 2013-03-22 8:30 ` Rickard Andersson @ 2013-03-25 13:44 ` Linus Walleij 2013-03-25 13:58 ` Daniel Lezcano 1 sibling, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-25 13:44 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 21, 2013 at 1:30 PM, Daniel Lezcano <daniel.lezcano@linaro.org> wrote: > On 03/21/2013 01:14 PM, Rickard Andersson wrote: >> On 03/21/2013 12:49 PM, Linus WALLEIJ wrote: >>> From: Linus Walleij<linus.walleij@linaro.org> >>> >>> We are trying to decompose and decentralize the code in >>> the DB8500 PRCMU out into subdrivers. The CPUidle code is >>> calling down into the PRCMU driver basically just to access >>> these registers, so let's remap them locally in the CPUidle >>> driver and move the code there, simply. Besides, the PRCMU >>> code was poking around in the GIC which is the responsibility >>> of the machine. >>> >>> Cc: Daniel Lezcano<daniel.lezcano@linaro.org> >>> Cc: Rickard Andersson<rickard.andersson@stericsson.com> >>> Cc: Samuel Ortiz<sameo@linux.intel.com> >>> Signed-off-by: Linus Walleij<linus.walleij@linaro.org> >>> --- >>> Sam, I'm requesting an ACK for taking this through the >>> ARM SoC tree. >>> --- >> This functionality will be used by the platform suspend operation also >> which I am currently working on. So I would prefer if you can move it to >> a separate file instead so it can be used by suspend as well. I >> recommend to have it the same way we have it in our internal track i.e. >> a file called pm.c in the machine. > > That would be nice to move this driver to drivers/cpuidle. > > If you are ok with that, I can take care of moving the driver to this > directory and then create the pm.c file in the mach-ux500 to move the > prcmu specific code inside. Meanwhile this patch can be merged to group > the prcmu code needed for the driver and can be easily identified. If you write a patch like that it needs to go with this patch series because I need this split out of the PRCMU driver to be able to move forward with multiplatform. I tried figuring out if I could just make this split as part of my patch series which is simpler (then we just merge that into ARM SoC and you can base CPUidle movement on that). But then I get into the dilemma of where to put the header file for these PM functions. The goal of this series does away with <mach/*> so it can not be any new <mach/pm.h> header. The code will need to be called by idle code in drivers/cpuidle and suspend code in mach-ux500. (Unless suspend/resume shall also be moved to drivers/cpuidle? I guess not?) Shall I put it in <linux/platform_data/arm-ux500-pm.h> or so, with the implementation in arch/arm/mach-ux500/pm.c or so? Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-25 13:44 ` Linus Walleij @ 2013-03-25 13:58 ` Daniel Lezcano 2013-03-25 14:10 ` Linus Walleij 0 siblings, 1 reply; 49+ messages in thread From: Daniel Lezcano @ 2013-03-25 13:58 UTC (permalink / raw) To: linux-arm-kernel On 03/25/2013 02:44 PM, Linus Walleij wrote: > On Thu, Mar 21, 2013 at 1:30 PM, Daniel Lezcano > <daniel.lezcano@linaro.org> wrote: >> On 03/21/2013 01:14 PM, Rickard Andersson wrote: >>> On 03/21/2013 12:49 PM, Linus WALLEIJ wrote: >>>> From: Linus Walleij<linus.walleij@linaro.org> >>>> >>>> We are trying to decompose and decentralize the code in >>>> the DB8500 PRCMU out into subdrivers. The CPUidle code is >>>> calling down into the PRCMU driver basically just to access >>>> these registers, so let's remap them locally in the CPUidle >>>> driver and move the code there, simply. Besides, the PRCMU >>>> code was poking around in the GIC which is the responsibility >>>> of the machine. >>>> >>>> Cc: Daniel Lezcano<daniel.lezcano@linaro.org> >>>> Cc: Rickard Andersson<rickard.andersson@stericsson.com> >>>> Cc: Samuel Ortiz<sameo@linux.intel.com> >>>> Signed-off-by: Linus Walleij<linus.walleij@linaro.org> >>>> --- >>>> Sam, I'm requesting an ACK for taking this through the >>>> ARM SoC tree. >>>> --- >>> This functionality will be used by the platform suspend operation also >>> which I am currently working on. So I would prefer if you can move it to >>> a separate file instead so it can be used by suspend as well. I >>> recommend to have it the same way we have it in our internal track i.e. >>> a file called pm.c in the machine. >> >> That would be nice to move this driver to drivers/cpuidle. >> >> If you are ok with that, I can take care of moving the driver to this >> directory and then create the pm.c file in the mach-ux500 to move the >> prcmu specific code inside. Meanwhile this patch can be merged to group >> the prcmu code needed for the driver and can be easily identified. > > If you write a patch like that it needs to go with this patch series > because I need this split out of the PRCMU driver to be able to > move forward with multiplatform. > > I tried figuring out if I could just make this split as part of my > patch series which is simpler (then we just merge that into > ARM SoC and you can base CPUidle movement on that). > > But then I get into the dilemma of where to put the header > file for these PM functions. > > The goal of this series does away with <mach/*> so it can not be > any new <mach/pm.h> header. Actually, I considered to move the driver to the right place as an answer to Rickard who suggested to create the pm file. As he is ok with that, I am ok with your patch splitting the prcmu code and moving the code inside the cpuidle driver. I proposed to take care of moving the prcmu code which falls in cpuidle.c to a pm.c and then move the cpuidle.c file in driver/cpuidle after your patch is applied. > > The code will need to be called by idle code in drivers/cpuidle > and suspend code in mach-ux500. (Unless suspend/resume shall > also be moved to drivers/cpuidle? I guess not?) No, it shouldn't :) > Shall I put it in <linux/platform_data/arm-ux500-pm.h> or so, > with the implementation in arch/arm/mach-ux500/pm.c > or so? Wouldn't <asm/pm.h> be better ? So we can have the same header name for all the drivers, no ? -- <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-25 13:58 ` Daniel Lezcano @ 2013-03-25 14:10 ` Linus Walleij 2013-03-25 14:11 ` Arnd Bergmann 0 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-25 14:10 UTC (permalink / raw) To: linux-arm-kernel On Mon, Mar 25, 2013 at 2:58 PM, Daniel Lezcano <daniel.lezcano@linaro.org> wrote: > On 03/25/2013 02:44 PM, Linus Walleij wrote: >> Shall I put it in <linux/platform_data/arm-ux500-pm.h> or so, >> with the implementation in arch/arm/mach-ux500/pm.c >> or so? > > Wouldn't <asm/pm.h> be better ? So we can have the same header name for > all the drivers, no ? I don't think that works with multiplatform. When building multiple systems our approach is to not let any two header files have the same name. What we did for debug macro for example was to create the <debug/*> namespace, so the old <mach/debug-macro.S> is now <debug/imx.S>, <debug/vt8500.h>, <debug/ux500.h> ... etc. So what would be needed would then rather be <pm/*> in arch/arm/include/pm and under this we would create <pm/ux500.h>. But that require Russell and Arnds/Olofs consent I think, what do you guys say? Other recommendations? Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-25 14:10 ` Linus Walleij @ 2013-03-25 14:11 ` Arnd Bergmann 2013-03-25 14:36 ` Linus Walleij 0 siblings, 1 reply; 49+ messages in thread From: Arnd Bergmann @ 2013-03-25 14:11 UTC (permalink / raw) To: linux-arm-kernel On Monday 25 March 2013, Linus Walleij wrote: > On Mon, Mar 25, 2013 at 2:58 PM, Daniel Lezcano > <daniel.lezcano@linaro.org> wrote: > > On 03/25/2013 02:44 PM, Linus Walleij wrote: > > >> Shall I put it in <linux/platform_data/arm-ux500-pm.h> or so, > >> with the implementation in arch/arm/mach-ux500/pm.c > >> or so? > > > > Wouldn't <asm/pm.h> be better ? So we can have the same header name for > > all the drivers, no ? > > I don't think that works with multiplatform. When building multiple > systems our approach is to not let any two header files have the same > name. > > What we did for debug macro for example was to create the <debug/*> > namespace, so the old <mach/debug-macro.S> is now <debug/imx.S>, > <debug/vt8500.h>, <debug/ux500.h> ... etc. > > So what would be needed would then rather be <pm/*> in > arch/arm/include/pm and under this we would create > <pm/ux500.h>. > > But that require Russell and Arnds/Olofs consent I think, > what do you guys say? Other recommendations? I would first like to understand what contents you actually need to have in the header file. Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-25 14:11 ` Arnd Bergmann @ 2013-03-25 14:36 ` Linus Walleij 2013-03-25 15:13 ` Arnd Bergmann 0 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-25 14:36 UTC (permalink / raw) To: linux-arm-kernel On Mon, Mar 25, 2013 at 3:11 PM, Arnd Bergmann <arnd@arndb.de> wrote: > On Monday 25 March 2013, Linus Walleij wrote: >> On Mon, Mar 25, 2013 at 2:58 PM, Daniel Lezcano >> <daniel.lezcano@linaro.org> wrote: >> > On 03/25/2013 02:44 PM, Linus Walleij wrote: >> >> >> Shall I put it in <linux/platform_data/arm-ux500-pm.h> or so, >> >> with the implementation in arch/arm/mach-ux500/pm.c >> >> or so? >> > >> > Wouldn't <asm/pm.h> be better ? So we can have the same header name for >> > all the drivers, no ? >> >> I don't think that works with multiplatform. When building multiple >> systems our approach is to not let any two header files have the same >> name. >> >> What we did for debug macro for example was to create the <debug/*> >> namespace, so the old <mach/debug-macro.S> is now <debug/imx.S>, >> <debug/vt8500.h>, <debug/ux500.h> ... etc. >> >> So what would be needed would then rather be <pm/*> in >> arch/arm/include/pm and under this we would create >> <pm/ux500.h>. >> >> But that require Russell and Arnds/Olofs consent I think, >> what do you guys say? Other recommendations? > > I would first like to understand what contents you actually need to > have in the header file. So in this case headers for the PRCMU+GIC code moving out of the PRCMU driver. These are the functions and the comments right above them: /* This function decouple the gic from the prcmu */ prcmu_gic_decouple() /* This function recouple the gic with the prcmu */ prcmu_gic_recouple() /* * This function checks if there are pending irq on the gic. It only * makes sense if the gic has been decoupled before with the * db8500_prcmu_gic_decouple function. Disabling an interrupt only * disables the forwarding of the interrupt to any CPU interface. It * does not prevent the interrupt from changing state, for example * becoming pending, or active and pending if it is already * active. Hence, we have to check the interrupt is pending *and* is * active. */ prcmu_gic_pending_irq() /* * This function checks if there are pending interrupt on the * prcmu which has been delegated to monitor the irqs with the * db8500_prcmu_copy_gic_settings function. */ bool prcmu_pending_irq() /* * This function checks if the specified cpu is in in WFI. It's usage * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple * function. Of course passing smp_processor_id() to this function will * always return false... */ bool prcmu_is_cpu_in_wfi() /* * This function copies the gic SPI settings to the prcmu in order to * monitor them and abort/finish the retention/off sequence or state. */ int prcmu_copy_gic_settings() This set of functions are called both for idling and suspend, i.e. both by the machine-specific cpuidle driver and the machine-specific suspend code. They are conceptually coherent functions but messing with both PRCMU and GIC registers, moving the responsibility of keeping track of the IRQs back and forth between the GIC and the PRCMU. Being able to freeze and decouple the GIC and check if a CPU is in WFI is a ux500-PRCMU-specific pecularity but saves us a lot of criss-cross IPIs when going to idle or sleep. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-25 14:36 ` Linus Walleij @ 2013-03-25 15:13 ` Arnd Bergmann 2013-03-25 15:48 ` Linus Walleij 0 siblings, 1 reply; 49+ messages in thread From: Arnd Bergmann @ 2013-03-25 15:13 UTC (permalink / raw) To: linux-arm-kernel On Monday 25 March 2013, Linus Walleij wrote: > This set of functions are called both for idling and suspend, i.e. > both by the machine-specific cpuidle driver and the machine-specific > suspend code. > > They are conceptually coherent functions but messing with both PRCMU > and GIC registers, moving the responsibility of keeping track of the > IRQs back and forth between the GIC and the PRCMU. > > Being able to freeze and decouple the GIC and check if a CPU is > in WFI is a ux500-PRCMU-specific pecularity but saves us a lot of > criss-cross IPIs when going to idle or sleep. I still don't understand. From what I can tell, all those functions are now statically declared in the cpuidle driver after your patch, so it sounds like you do not need a header file for them any more, where you needed one before. Which of those would you declare in a hypothetical linux/pm/ux500.h header file? Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver 2013-03-25 15:13 ` Arnd Bergmann @ 2013-03-25 15:48 ` Linus Walleij 0 siblings, 0 replies; 49+ messages in thread From: Linus Walleij @ 2013-03-25 15:48 UTC (permalink / raw) To: linux-arm-kernel On Mon, Mar 25, 2013 at 4:13 PM, Arnd Bergmann <arnd@arndb.de> wrote: > On Monday 25 March 2013, Linus Walleij wrote: >> This set of functions are called both for idling and suspend, i.e. >> both by the machine-specific cpuidle driver and the machine-specific >> suspend code. >> >> They are conceptually coherent functions but messing with both PRCMU >> and GIC registers, moving the responsibility of keeping track of the >> IRQs back and forth between the GIC and the PRCMU. >> >> Being able to freeze and decouple the GIC and check if a CPU is >> in WFI is a ux500-PRCMU-specific pecularity but saves us a lot of >> criss-cross IPIs when going to idle or sleep. > > I still don't understand. From what I can tell, all those functions are > now statically declared in the cpuidle driver after your patch, so it > sounds like you do not need a header file for them any more, where > you needed one before. Which of those would you declare in a hypothetical > linux/pm/ux500.h header file? So the issue raised by Rickard was that his suspend code (which was just yesterday posted to linux-pm) is making use of the same functions, so they need to be shared somehow. Reference: http://marc.info/?l=linux-pm&m=136397049416914&w=2 You find that this uses the affected funtions. So they are not only for idling, and there are pending patches for suspend making use of them, and suspend needs to live in the machine. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 6/6] ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij ` (4 preceding siblings ...) 2013-03-21 11:49 ` [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver Linus Walleij @ 2013-03-21 11:49 ` Linus Walleij 2013-03-21 12:21 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann 6 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-21 11:49 UTC (permalink / raw) To: linux-arm-kernel From: Linus Walleij <linus.walleij@linaro.org> This removes <mach/hardware.h> and <mach/db8500-regs.h> from the Ux500, merging them into the local include "db8500-regs.h" in mach-ux500. There is some impact outside the ux500 machine, but most of it is dealt with in earlier patches. Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- Sam, Mike: seeking your ACKs to take this through ARM SoC. --- arch/arm/include/debug/ux500.S | 23 ++- arch/arm/mach-ux500/board-mop500-audio.c | 1 - arch/arm/mach-ux500/board-mop500-pins.c | 2 - arch/arm/mach-ux500/board-mop500-sdi.c | 2 +- arch/arm/mach-ux500/board-mop500-uib.c | 1 - arch/arm/mach-ux500/board-mop500.c | 2 +- arch/arm/mach-ux500/cache-l2x0.c | 2 +- arch/arm/mach-ux500/cpu-db8500.c | 4 +- arch/arm/mach-ux500/cpu.c | 2 +- arch/arm/mach-ux500/cpuidle.c | 2 +- arch/arm/mach-ux500/db8500-regs.h | 201 +++++++++++++++++++++++++ arch/arm/mach-ux500/devices-common.c | 1 - arch/arm/mach-ux500/devices-db8500.c | 8 +- arch/arm/mach-ux500/devices-db8500.h | 1 + arch/arm/mach-ux500/devices.c | 3 +- arch/arm/mach-ux500/id.c | 2 +- arch/arm/mach-ux500/include/mach/db8500-regs.h | 173 --------------------- arch/arm/mach-ux500/include/mach/hardware.h | 45 ------ arch/arm/mach-ux500/include/mach/irqs.h | 2 - arch/arm/mach-ux500/include/mach/uncompress.h | 3 +- arch/arm/mach-ux500/platsmp.c | 2 +- arch/arm/mach-ux500/timer.c | 2 +- arch/arm/mach-ux500/usb.c | 2 +- drivers/clk/ux500/clk-prcc.c | 1 - drivers/clocksource/clksrc-dbx500-prcmu.c | 1 - drivers/mfd/db8500-prcmu.c | 2 - drivers/mfd/dbx500-prcmu-regs.h | 22 --- 27 files changed, 239 insertions(+), 273 deletions(-) create mode 100644 arch/arm/mach-ux500/db8500-regs.h delete mode 100644 arch/arm/mach-ux500/include/mach/db8500-regs.h delete mode 100644 arch/arm/mach-ux500/include/mach/hardware.h diff --git a/arch/arm/include/debug/ux500.S b/arch/arm/include/debug/ux500.S index 6703522..2848857 100644 --- a/arch/arm/include/debug/ux500.S +++ b/arch/arm/include/debug/ux500.S @@ -8,7 +8,7 @@ * published by the Free Software Foundation. * */ -#include <mach/hardware.h> + #if CONFIG_UX500_DEBUG_UART > 2 #error Invalid Ux500 debug UART @@ -21,19 +21,28 @@ */ #ifdef CONFIG_UX500_SOC_DB8500 -#define __UX500_UART(n) U8500_UART##n##_BASE +#define U8500_UART0_PHYS_BASE (0x80120000) +#define U8500_UART1_PHYS_BASE (0x80121000) +#define U8500_UART2_PHYS_BASE (0x80007000) +#define U8500_UART0_VIRT_BASE (0xa8120000) +#define U8500_UART1_VIRT_BASE (0xa8121000) +#define U8500_UART2_VIRT_BASE (0xa8007000) +#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE +#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE #endif -#ifndef __UX500_UART +#if !defined(__UX500_PHYS_UART) || !defined(__UX500_VIRT_UART) #error Unknown SOC #endif -#define UX500_UART(n) __UX500_UART(n) -#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) +#define UX500_PHYS_UART(n) __UX500_PHYS_UART(n) +#define UX500_VIRT_UART(n) __UX500_VIRT_UART(n) +#define UART_PHYS_BASE UX500_PHYS_UART(CONFIG_UX500_DEBUG_UART) +#define UART_VIRT_BASE UX500_VIRT_UART(CONFIG_UX500_DEBUG_UART) .macro addruart, rp, rv, tmp - ldr \rp, =UART_BASE @ no, physical address - ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address + ldr \rp, =UART_PHYS_BASE @ no, physical address + ldr \rv, =UART_VIRT_BASE @ yes, virtual address .endm #include <asm/hardware/debug-pl01x.S> diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c index 7209db7..c8167bf 100644 --- a/arch/arm/mach-ux500/board-mop500-audio.c +++ b/arch/arm/mach-ux500/board-mop500-audio.c @@ -11,7 +11,6 @@ #include <linux/platform_data/dma-ste-dma40.h> #include <mach/devices.h> -#include <mach/hardware.h> #include <mach/irqs.h> #include <mach/msp.h> diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 0a3f30d..f3976f9 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -13,8 +13,6 @@ #include <asm/mach-types.h> -#include <mach/hardware.h> - #include "pins-db8500.h" #include "board-mop500.h" diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index 051b62c..0ada767 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c @@ -15,8 +15,8 @@ #include <asm/mach-types.h> #include <mach/devices.h> -#include <mach/hardware.h> +#include "db8500-regs.h" #include "devices-db8500.h" #include "board-mop500.h" #include "ste-dma40-db8500.h" diff --git a/arch/arm/mach-ux500/board-mop500-uib.c b/arch/arm/mach-ux500/board-mop500-uib.c index 7037d36..bdaa422 100644 --- a/arch/arm/mach-ux500/board-mop500-uib.c +++ b/arch/arm/mach-ux500/board-mop500-uib.c @@ -11,7 +11,6 @@ #include <linux/init.h> #include <linux/i2c.h> -#include <mach/hardware.h> #include "board-mop500.h" #include "id.h" diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index b034578..caad80e 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -41,13 +41,13 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/hardware.h> #include <mach/setup.h> #include <mach/devices.h> #include <mach/irqs.h> #include <linux/platform_data/crypto-ux500.h> #include "ste-dma40-db8500.h" +#include "db8500-regs.h" #include "devices-db8500.h" #include "board-mop500.h" #include "board-mop500-regulators.h" diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c index 1c1609d..e12cc92 100644 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ b/arch/arm/mach-ux500/cache-l2x0.c @@ -9,8 +9,8 @@ #include <asm/cacheflush.h> #include <asm/hardware/cache-l2x0.h> -#include <mach/hardware.h> +#include "db8500-regs.h" #include "id.h" static void __iomem *l2x0_base; diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 8c58dff..d726c06 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -28,15 +28,13 @@ #include <asm/mach/map.h> #include <asm/mach/arch.h> -#include <mach/hardware.h> #include <mach/setup.h> #include <mach/devices.h> -#include <mach/db8500-regs.h> #include <mach/irqs.h> #include "devices-db8500.h" #include "ste-dma40-db8500.h" - +#include "db8500-regs.h" #include "board-mop500.h" #include "id.h" diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 38459e9..1754041 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -23,11 +23,11 @@ #include <asm/mach/map.h> -#include <mach/hardware.h> #include <mach/setup.h> #include <mach/devices.h> #include "board-mop500.h" +#include "db8500-regs.h" #include "id.h" /* diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c index df3c1d3..8e906fb 100644 --- a/arch/arm/mach-ux500/cpuidle.c +++ b/arch/arm/mach-ux500/cpuidle.c @@ -23,7 +23,7 @@ #include <asm/cpuidle.h> #include <asm/proc-fns.h> -#include <mach/hardware.h> +#include "db8500-regs.h" /* ARM WFI Standby signal register */ #define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) diff --git a/arch/arm/mach-ux500/db8500-regs.h b/arch/arm/mach-ux500/db8500-regs.h new file mode 100644 index 0000000..b2d7a0b --- /dev/null +++ b/arch/arm/mach-ux500/db8500-regs.h @@ -0,0 +1,201 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * License terms: GNU General Public License (GPL) version 2 + */ + +#ifndef __MACH_DB8500_REGS_H +#define __MACH_DB8500_REGS_H + +/* Base address and bank offsets for ESRAM */ +#define U8500_ESRAM_BASE 0x40000000 +#define U8500_ESRAM_BANK_SIZE 0x00020000 +#define U8500_ESRAM_BANK0 U8500_ESRAM_BASE +#define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE) +#define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE) +#define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE) +#define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE) +/* + * on V1 DMA uses 4KB for logical parameters position is right after the 64KB + * reserved for security + */ +#define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 + +#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET) + +/* This address fulfills the 256k alignment requirement of the lcla base */ +#define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4 + +#define U8500_PER3_BASE 0x80000000 +#define U8500_STM_BASE 0x80100000 +#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) +#define U8500_PER2_BASE 0x80110000 +#define U8500_PER1_BASE 0x80120000 +#define U8500_B2R2_BASE 0x80130000 +#define U8500_HSEM_BASE 0x80140000 +#define U8500_PER4_BASE 0x80150000 +#define U8500_TPIU_BASE 0x80190000 +#define U8500_ICN_BASE 0x81000000 + +#define U8500_BOOT_ROM_BASE 0x90000000 +/* ASIC ID is at 0xbf4 offset within this region */ +#define U8500_ASIC_ID_BASE 0x9001D000 + +#define U9540_BOOT_ROM_BASE 0xFFFE0000 +/* ASIC ID is at 0xbf4 offset within this region */ +#define U9540_ASIC_ID_BASE 0xFFFFD000 + +#define U8500_PER6_BASE 0xa03c0000 +#define U8500_PER7_BASE 0xa03d0000 +#define U8500_PER5_BASE 0xa03e0000 + +#define U8500_SVA_BASE 0xa0100000 +#define U8500_SIA_BASE 0xa0200000 + +#define U8500_SGA_BASE 0xa0300000 +#define U8500_MCDE_BASE 0xa0350000 +#define U8500_DMA_BASE 0x801C0000 /* v1 */ + +#define U8500_SBAG_BASE 0xa0390000 + +#define U8500_SCU_BASE 0xa0410000 +#define U8500_GIC_CPU_BASE 0xa0410100 +#define U8500_TWD_BASE 0xa0410600 +#define U8500_GIC_DIST_BASE 0xa0411000 +#define U8500_L2CC_BASE 0xa0412000 + +#define U8500_MODEM_I2C 0xb7e02000 + +#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000) +#define U8500_GPIO1_BASE (U8500_PER3_BASE + 0xE000) +#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) +#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) + +#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) +#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) + +/* per6 base addresses */ +#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) +#define U8500_HASH0_BASE (U8500_PER6_BASE + 0x1000) +#define U8500_HASH1_BASE (U8500_PER6_BASE + 0x2000) +#define U8500_PKA_BASE (U8500_PER6_BASE + 0x4000) +#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x5100) +#define U8500_MTU0_BASE (U8500_PER6_BASE + 0x6000) /* v1 */ +#define U8500_MTU1_BASE (U8500_PER6_BASE + 0x7000) /* v1 */ +#define U8500_CR_BASE (U8500_PER6_BASE + 0x8000) /* v1 */ +#define U8500_CRYP0_BASE (U8500_PER6_BASE + 0xa000) +#define U8500_CRYP1_BASE (U8500_PER6_BASE + 0xb000) +#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) + +/* per5 base addresses */ +#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) +#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) + +/* per4 base addresses */ +#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000) +#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000) +#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000) +#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x03000) +#define U8500_RTC_BASE (U8500_PER4_BASE + 0x04000) +#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000) +#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000) +#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) +#define U9540_DMC1_BASE (U8500_PER4_BASE + 0x0A000) +#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000) +#define U9540_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x6A000) +#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000) +#define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338) +#define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450) + +/* per3 base addresses */ +#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000) +#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000) +#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000) +#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000) +#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000) +#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000) +#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) +#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) +#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) + +/* per2 base addresses */ +#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) +#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) +#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) +#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000) +#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000) +#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000) +#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000) +#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000) +#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000) +#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000) +#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000) +#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000) + +/* per1 base addresses */ +#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000) +#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000) +#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000) +#define U8500_MSP3_BASE (U8500_PER1_BASE + 0x5000) +#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000) +#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000) +#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) +#define U8500_I2C4_BASE (U8500_PER1_BASE + 0xa000) +#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xb000) +#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000) + +#define U8500_SHRM_GOP_INTERRUPT_BASE 0xB7C00040 + +#define U8500_GPIOBANK0_BASE U8500_GPIO0_BASE +#define U8500_GPIOBANK1_BASE (U8500_GPIO0_BASE + 0x80) +#define U8500_GPIOBANK2_BASE U8500_GPIO1_BASE +#define U8500_GPIOBANK3_BASE (U8500_GPIO1_BASE + 0x80) +#define U8500_GPIOBANK4_BASE (U8500_GPIO1_BASE + 0x100) +#define U8500_GPIOBANK5_BASE (U8500_GPIO1_BASE + 0x180) +#define U8500_GPIOBANK6_BASE U8500_GPIO2_BASE +#define U8500_GPIOBANK7_BASE (U8500_GPIO2_BASE + 0x80) +#define U8500_GPIOBANK8_BASE U8500_GPIO3_BASE + +#define U8500_MCDE_SIZE 0x1000 +#define U8500_DSI_LINK_SIZE 0x1000 +#define U8500_DSI_LINK1_BASE (U8500_MCDE_BASE + U8500_MCDE_SIZE) +#define U8500_DSI_LINK2_BASE (U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE) +#define U8500_DSI_LINK3_BASE (U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE) +#define U8500_DSI_LINK_COUNT 0x3 + +/* Modem and APE physical addresses */ +#define U8500_MODEM_BASE 0xe000000 +#define U8500_APE_BASE 0x6000000 + +/* SoC identification number information */ +#define U8500_BB_UID_BASE (U8500_BACKUPRAM1_BASE + 0xFC0) + +/* Offsets to specific addresses in some IP blocks for DMA */ +#define MSP_TX_RX_REG_OFFSET 0 +#define CRYP1_RX_REG_OFFSET 0x10 +#define CRYP1_TX_REG_OFFSET 0x8 +#define HASH1_TX_REG_OFFSET 0x4 + +/* + * Macros to get at IO space when running virtually + * We dont map all the peripherals, let ioremap do + * this for us. We map only very basic peripherals here. + */ +#define U8500_IO_VIRTUAL 0xf0000000 +#define U8500_IO_PHYSICAL 0xa0000000 +/* This is where we map in the ROM to check ASIC IDs */ +#define UX500_VIRT_ROM 0xf0000000 + +/* This macro is used in assembly, so no cast */ +#define IO_ADDRESS(x) \ + (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) + +/* typesafe io address */ +#define __io_address(n) IOMEM(IO_ADDRESS(n)) + +/* Used by some plat-nomadik code */ +#define io_p2v(n) __io_address(n) + +#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) + +#endif diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c index 16b5f71..94868b7 100644 --- a/arch/arm/mach-ux500/devices-common.c +++ b/arch/arm/mach-ux500/devices-common.c @@ -13,7 +13,6 @@ #include <linux/platform_device.h> #include <linux/platform_data/pinctrl-nomadik.h> -#include <mach/hardware.h> #include <mach/irqs.h> #include "devices-common.h" diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index f3d9419..9152aca 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c @@ -15,10 +15,10 @@ #include <linux/platform_data/dma-ste-dma40.h> #include <linux/mfd/dbx500-prcmu.h> -#include <mach/hardware.h> #include <mach/setup.h> #include <mach/irqs.h> +#include "db8500-regs.h" #include "devices-db8500.h" #include "ste-dma40-db8500.h" @@ -228,6 +228,12 @@ static struct resource db8500_prcmu_res[] = { .end = U8500_PRCMU_TCPM_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, + { + .name = "gic-distbase", + .start = U8500_GIC_DIST_BASE, + .end = U8500_GIC_DIST_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, }; struct platform_device db8500_prcmu_device = { diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h index dbcb35c..c9db210 100644 --- a/arch/arm/mach-ux500/devices-db8500.h +++ b/arch/arm/mach-ux500/devices-db8500.h @@ -10,6 +10,7 @@ #include <linux/platform_data/usb-musb-ux500.h> #include <mach/irqs.h> +#include "db8500-regs.h" #include "devices-common.h" struct ske_keypad_platform_data; diff --git a/arch/arm/mach-ux500/devices.c b/arch/arm/mach-ux500/devices.c index ea0a2f9..f63a512 100644 --- a/arch/arm/mach-ux500/devices.c +++ b/arch/arm/mach-ux500/devices.c @@ -11,9 +11,10 @@ #include <linux/io.h> #include <linux/amba/bus.h> -#include <mach/hardware.h> #include <mach/setup.h> +#include "db8500-regs.h" + void __init amba_add_devices(struct amba_device *devs[], int num) { int i; diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c index 9f95184..a847cf2 100644 --- a/arch/arm/mach-ux500/id.c +++ b/arch/arm/mach-ux500/id.c @@ -14,9 +14,9 @@ #include <asm/cacheflush.h> #include <asm/mach/map.h> -#include <mach/hardware.h> #include <mach/setup.h> +#include "db8500-regs.h" #include "id.h" struct dbx500_asic_id dbx500_id; diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h deleted file mode 100644 index 1530d49..0000000 --- a/arch/arm/mach-ux500/include/mach/db8500-regs.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License terms: GNU General Public License (GPL) version 2 - */ - -#ifndef __MACH_DB8500_REGS_H -#define __MACH_DB8500_REGS_H - -/* Base address and bank offsets for ESRAM */ -#define U8500_ESRAM_BASE 0x40000000 -#define U8500_ESRAM_BANK_SIZE 0x00020000 -#define U8500_ESRAM_BANK0 U8500_ESRAM_BASE -#define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE) -#define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE) -#define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE) -#define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE) -/* - * on V1 DMA uses 4KB for logical parameters position is right after the 64KB - * reserved for security - */ -#define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 - -#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET) - -/* This address fulfills the 256k alignment requirement of the lcla base */ -#define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4 - -#define U8500_PER3_BASE 0x80000000 -#define U8500_STM_BASE 0x80100000 -#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) -#define U8500_PER2_BASE 0x80110000 -#define U8500_PER1_BASE 0x80120000 -#define U8500_B2R2_BASE 0x80130000 -#define U8500_HSEM_BASE 0x80140000 -#define U8500_PER4_BASE 0x80150000 -#define U8500_TPIU_BASE 0x80190000 -#define U8500_ICN_BASE 0x81000000 - -#define U8500_BOOT_ROM_BASE 0x90000000 -/* ASIC ID is at 0xbf4 offset within this region */ -#define U8500_ASIC_ID_BASE 0x9001D000 - -#define U9540_BOOT_ROM_BASE 0xFFFE0000 -/* ASIC ID is at 0xbf4 offset within this region */ -#define U9540_ASIC_ID_BASE 0xFFFFD000 - -#define U8500_PER6_BASE 0xa03c0000 -#define U8500_PER7_BASE 0xa03d0000 -#define U8500_PER5_BASE 0xa03e0000 - -#define U8500_SVA_BASE 0xa0100000 -#define U8500_SIA_BASE 0xa0200000 - -#define U8500_SGA_BASE 0xa0300000 -#define U8500_MCDE_BASE 0xa0350000 -#define U8500_DMA_BASE 0x801C0000 /* v1 */ - -#define U8500_SBAG_BASE 0xa0390000 - -#define U8500_SCU_BASE 0xa0410000 -#define U8500_GIC_CPU_BASE 0xa0410100 -#define U8500_TWD_BASE 0xa0410600 -#define U8500_GIC_DIST_BASE 0xa0411000 -#define U8500_L2CC_BASE 0xa0412000 - -#define U8500_MODEM_I2C 0xb7e02000 - -#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000) -#define U8500_GPIO1_BASE (U8500_PER3_BASE + 0xE000) -#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) -#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) - -#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) -#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) - -/* per6 base addresses */ -#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) -#define U8500_HASH0_BASE (U8500_PER6_BASE + 0x1000) -#define U8500_HASH1_BASE (U8500_PER6_BASE + 0x2000) -#define U8500_PKA_BASE (U8500_PER6_BASE + 0x4000) -#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x5100) -#define U8500_MTU0_BASE (U8500_PER6_BASE + 0x6000) /* v1 */ -#define U8500_MTU1_BASE (U8500_PER6_BASE + 0x7000) /* v1 */ -#define U8500_CR_BASE (U8500_PER6_BASE + 0x8000) /* v1 */ -#define U8500_CRYP0_BASE (U8500_PER6_BASE + 0xa000) -#define U8500_CRYP1_BASE (U8500_PER6_BASE + 0xb000) -#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) - -/* per5 base addresses */ -#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) -#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) - -/* per4 base addresses */ -#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000) -#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000) -#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000) -#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x03000) -#define U8500_RTC_BASE (U8500_PER4_BASE + 0x04000) -#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000) -#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000) -#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) -#define U9540_DMC1_BASE (U8500_PER4_BASE + 0x0A000) -#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000) -#define U9540_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x6A000) -#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000) -#define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338) -#define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450) - -/* per3 base addresses */ -#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000) -#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000) -#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000) -#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000) -#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000) -#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000) -#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) -#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) -#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) - -/* per2 base addresses */ -#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) -#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) -#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) -#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000) -#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000) -#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000) -#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000) -#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000) -#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000) -#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000) -#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000) -#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000) - -/* per1 base addresses */ -#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000) -#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000) -#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000) -#define U8500_MSP3_BASE (U8500_PER1_BASE + 0x5000) -#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000) -#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000) -#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) -#define U8500_I2C4_BASE (U8500_PER1_BASE + 0xa000) -#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xb000) -#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000) - -#define U8500_SHRM_GOP_INTERRUPT_BASE 0xB7C00040 - -#define U8500_GPIOBANK0_BASE U8500_GPIO0_BASE -#define U8500_GPIOBANK1_BASE (U8500_GPIO0_BASE + 0x80) -#define U8500_GPIOBANK2_BASE U8500_GPIO1_BASE -#define U8500_GPIOBANK3_BASE (U8500_GPIO1_BASE + 0x80) -#define U8500_GPIOBANK4_BASE (U8500_GPIO1_BASE + 0x100) -#define U8500_GPIOBANK5_BASE (U8500_GPIO1_BASE + 0x180) -#define U8500_GPIOBANK6_BASE U8500_GPIO2_BASE -#define U8500_GPIOBANK7_BASE (U8500_GPIO2_BASE + 0x80) -#define U8500_GPIOBANK8_BASE U8500_GPIO3_BASE - -#define U8500_MCDE_SIZE 0x1000 -#define U8500_DSI_LINK_SIZE 0x1000 -#define U8500_DSI_LINK1_BASE (U8500_MCDE_BASE + U8500_MCDE_SIZE) -#define U8500_DSI_LINK2_BASE (U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE) -#define U8500_DSI_LINK3_BASE (U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE) -#define U8500_DSI_LINK_COUNT 0x3 - -/* Modem and APE physical addresses */ -#define U8500_MODEM_BASE 0xe000000 -#define U8500_APE_BASE 0x6000000 - -/* SoC identification number information */ -#define U8500_BB_UID_BASE (U8500_BACKUPRAM1_BASE + 0xFC0) - -#endif diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h deleted file mode 100644 index 4eece2a..0000000 --- a/arch/arm/mach-ux500/include/mach/hardware.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (C) 2009 ST-Ericsson. - * - * U8500 hardware definitions - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#ifndef __MACH_HARDWARE_H -#define __MACH_HARDWARE_H - -/* - * Macros to get at IO space when running virtually - * We dont map all the peripherals, let ioremap do - * this for us. We map only very basic peripherals here. - */ -#define U8500_IO_VIRTUAL 0xf0000000 -#define U8500_IO_PHYSICAL 0xa0000000 -/* This is where we map in the ROM to check ASIC IDs */ -#define UX500_VIRT_ROM 0xf0000000 - -/* This macro is used in assembly, so no cast */ -#define IO_ADDRESS(x) \ - (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) - -/* typesafe io address */ -#define __io_address(n) IOMEM(IO_ADDRESS(n)) - -/* Used by some plat-nomadik code */ -#define io_p2v(n) __io_address(n) - -#include <mach/db8500-regs.h> - -#define MSP_TX_RX_REG_OFFSET 0 -#define CRYP1_RX_REG_OFFSET 0x10 -#define CRYP1_TX_REG_OFFSET 0x8 -#define HASH1_TX_REG_OFFSET 0x4 - -#ifndef __ASSEMBLY__ - -#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) - -#endif /* __ASSEMBLY__ */ -#endif /* __MACH_HARDWARE_H */ diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h index fc77b42..829947d 100644 --- a/arch/arm/mach-ux500/include/mach/irqs.h +++ b/arch/arm/mach-ux500/include/mach/irqs.h @@ -10,8 +10,6 @@ #ifndef ASM_ARCH_IRQS_H #define ASM_ARCH_IRQS_H -#include <mach/hardware.h> - #define IRQ_LOCALTIMER 29 #define IRQ_LOCALWDOG 30 diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h index 36969d5..533a004 100644 --- a/arch/arm/mach-ux500/include/mach/uncompress.h +++ b/arch/arm/mach-ux500/include/mach/uncompress.h @@ -22,7 +22,8 @@ #include <asm/mach-types.h> #include <linux/io.h> #include <linux/amba/serial.h> -#include <mach/hardware.h> +/* TODO: This goes away in multiplatform boot, this file gets deleted */ +#include "../../db8500-regs.h" void __iomem *ux500_uart_base; diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 18f7af3..8a9c070 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -22,9 +22,9 @@ #include <asm/smp_plat.h> #include <asm/smp_scu.h> -#include <mach/hardware.h> #include <mach/setup.h> +#include "db8500-regs.h" #include "id.h" /* This is called from headsmp.S to wakeup the secondary core */ diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index a6af0b8..5b91fac 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -14,9 +14,9 @@ #include <asm/smp_twd.h> #include <mach/setup.h> -#include <mach/hardware.h> #include <mach/irqs.h> +#include "db8500-regs.h" #include "id.h" #ifdef CONFIG_HAVE_ARM_TWD diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c index 78ac65f..2dfc72f 100644 --- a/arch/arm/mach-ux500/usb.c +++ b/arch/arm/mach-ux500/usb.c @@ -10,7 +10,7 @@ #include <linux/platform_data/usb-musb-ux500.h> #include <linux/platform_data/dma-ste-dma40.h> -#include <mach/hardware.h> +#include "db8500-regs.h" #define MUSB_DMA40_RX_CH { \ .mode = STEDMA40_MODE_LOGICAL, \ diff --git a/drivers/clk/ux500/clk-prcc.c b/drivers/clk/ux500/clk-prcc.c index 7eee7f7..bd4769a 100644 --- a/drivers/clk/ux500/clk-prcc.c +++ b/drivers/clk/ux500/clk-prcc.c @@ -13,7 +13,6 @@ #include <linux/io.h> #include <linux/err.h> #include <linux/types.h> -#include <mach/hardware.h> #include "clk.h" diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index c26c369..4f34093 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -18,7 +18,6 @@ #include <asm/sched_clock.h> #include <mach/setup.h> -#include <mach/hardware.h> #define RATE_32K 32768 diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 2d3a5f6..03e2aed 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -33,9 +33,7 @@ #include <linux/regulator/machine.h> #include <linux/cpufreq.h> #include <linux/platform_data/ux500_wdt.h> -#include <mach/hardware.h> #include <mach/irqs.h> -#include <mach/db8500-regs.h> #include "dbx500-prcmu-regs.h" /* Index of different voltages to be used when accessing AVSData */ diff --git a/drivers/mfd/dbx500-prcmu-regs.h b/drivers/mfd/dbx500-prcmu-regs.h index 439254d..d14836e 100644 --- a/drivers/mfd/dbx500-prcmu-regs.h +++ b/drivers/mfd/dbx500-prcmu-regs.h @@ -74,33 +74,11 @@ #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN BIT(0) #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN BIT(1) -/* ARM WFI Standby signal register */ -#define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) -#define PRCM_ARM_WFI_STANDBY_WFI0 0x08 -#define PRCM_ARM_WFI_STANDBY_WFI1 0x10 -#define PRCM_IOCR (prcmu_base + 0x310) -#define PRCM_IOCR_IOFORCE 0x1 - /* CPU mailbox registers */ #define PRCM_MBOX_CPU_VAL (prcmu_base + 0x0fc) #define PRCM_MBOX_CPU_SET (prcmu_base + 0x100) #define PRCM_MBOX_CPU_CLR (prcmu_base + 0x104) -/* Dual A9 core interrupt management unit registers */ -#define PRCM_A9_MASK_REQ (prcmu_base + 0x328) -#define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ 0x1 - -#define PRCM_A9_MASK_ACK (prcmu_base + 0x32c) -#define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c) -#define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120) -#define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124) -#define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128) -#define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C) -#define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260) -#define PRCM_ARMITVAL63TO32 (prcmu_base + 0x264) -#define PRCM_ARMITVAL95TO64 (prcmu_base + 0x268) -#define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C) - #define PRCM_HOSTACCESS_REQ (prcmu_base + 0x334) #define PRCM_HOSTACCESS_REQ_HOSTACCESS_REQ 0x1 #define PRCM_HOSTACCESS_REQ_WAKE_REQ BIT(16) -- 1.7.11.3 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 6/6] ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> 2013-03-21 11:49 ` [PATCH 6/6] ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> Linus Walleij @ 2013-03-21 12:21 ` Arnd Bergmann 0 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 12:21 UTC (permalink / raw) To: linux-arm-kernel On Thursday 21 March 2013 12:49:13 Linus Walleij wrote: > From: Linus Walleij <linus.walleij@linaro.org> > > This removes <mach/hardware.h> and <mach/db8500-regs.h> > from the Ux500, merging them into the local include > "db8500-regs.h" in mach-ux500. There is some impact > outside the ux500 machine, but most of it is dealt with > in earlier patches. Nice > diff --git a/arch/arm/include/debug/ux500.S b/arch/arm/include/debug/ux500.S > index 6703522..2848857 100644 > --- a/arch/arm/include/debug/ux500.S > +++ b/arch/arm/include/debug/ux500.S > @@ -8,7 +8,7 @@ > * published by the Free Software Foundation. > * > */ > -#include <mach/hardware.h> > + > > #if CONFIG_UX500_DEBUG_UART > 2 > #error Invalid Ux500 debug UART > @@ -21,19 +21,28 @@ > */ > > #ifdef CONFIG_UX500_SOC_DB8500 > -#define __UX500_UART(n) U8500_UART##n##_BASE > +#define U8500_UART0_PHYS_BASE (0x80120000) > +#define U8500_UART1_PHYS_BASE (0x80121000) > +#define U8500_UART2_PHYS_BASE (0x80007000) > +#define U8500_UART0_VIRT_BASE (0xa8120000) > +#define U8500_UART1_VIRT_BASE (0xa8121000) > +#define U8500_UART2_VIRT_BASE (0xa8007000) > +#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE > +#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE > #endif > > -#ifndef __UX500_UART > +#if !defined(__UX500_PHYS_UART) || !defined(__UX500_VIRT_UART) > #error Unknown SOC > #endif > > -#define UX500_UART(n) __UX500_UART(n) > -#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) > +#define UX500_PHYS_UART(n) __UX500_PHYS_UART(n) > +#define UX500_VIRT_UART(n) __UX500_VIRT_UART(n) > +#define UART_PHYS_BASE UX500_PHYS_UART(CONFIG_UX500_DEBUG_UART) > +#define UART_VIRT_BASE UX500_VIRT_UART(CONFIG_UX500_DEBUG_UART) > > .macro addruart, rp, rv, tmp > - ldr \rp, =UART_BASE @ no, physical address > - ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address > + ldr \rp, =UART_PHYS_BASE @ no, physical address > + ldr \rv, =UART_VIRT_BASE @ yes, virtual address > .endm > > #include <asm/hardware/debug-pl01x.S> I would suggest splitting this change out into a separate patch, or folding it into the one that creates the ux500.S file. > diff --git a/arch/arm/mach-ux500/db8500-regs.h b/arch/arm/mach-ux500/db8500-regs.h > new file mode 100644 > index 0000000..b2d7a0b > --- /dev/null > +++ b/arch/arm/mach-ux500/db8500-regs.h > @@ -0,0 +1,201 @@ > +/* > + * Copyright (C) ST-Ericsson SA 2010 > + * > + * License terms: GNU General Public License (GPL) version 2 > + */ Did you forget to pass '-M' to git-format-patch? You can set 'git config diff.renames true' to get this right in the future. > @@ -228,6 +228,12 @@ static struct resource db8500_prcmu_res[] = { > .end = U8500_PRCMU_TCPM_BASE + SZ_4K - 1, > .flags = IORESOURCE_MEM, > }, > + { > + .name = "gic-distbase", > + .start = U8500_GIC_DIST_BASE, > + .end = U8500_GIC_DIST_BASE + SZ_4K - 1, > + .flags = IORESOURCE_MEM, > + }, > }; > > struct platform_device db8500_prcmu_device = { Was this meant to have been in a different patch? I don't see what it does here. Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 0/9] More ux500 multiplatform stuff 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij ` (5 preceding siblings ...) 2013-03-21 11:49 ` [PATCH 6/6] ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> Linus Walleij @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 1/9] ARM: ux500: move mach/msp.h to include/linux/platform_data.h Arnd Bergmann ` (9 more replies) 6 siblings, 10 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel Hi Linus, Your patches from this morning made me curious about how much is still missing to actually enable multiplatform support on ux500. This is what I came up with, on top of your patches. Feel free to take what you need if you don't already have the same patches. I've successfully built "allmodconfig" with all the other v6/v7 platforms enabled as well. Arnd Arnd Bergmann (9): ARM: ux500: move mach/msp.h to include/linux/platform_data.h ARM: ux500: split out prcmu initialization ARM: ux500: make irqs.h local to platform ARM: ux500: kill mach/hardware.h some more staging: ste_rmi4: kill platform_data hack power: pm2301_charger: remove __devinit annotations ARM: ux500: make remaining headers local ARM: ux500: move to multiplatform ARM: ux500: build hotplug.o for ARMv7-a arch/arm/Kconfig | 16 --- arch/arm/mach-ux500/Kconfig | 14 +++ arch/arm/mach-ux500/Makefile | 2 + arch/arm/mach-ux500/board-mop500-audio.c | 6 +- arch/arm/mach-ux500/board-mop500-sdi.c | 2 +- arch/arm/mach-ux500/board-mop500-u8500uib.c | 9 +- arch/arm/mach-ux500/board-mop500.c | 64 +--------- arch/arm/mach-ux500/board-mop500.h | 4 +- arch/arm/mach-ux500/cpu-db8500.c | 6 +- arch/arm/mach-ux500/cpu.c | 4 +- arch/arm/mach-ux500/devices-common.c | 2 +- arch/arm/mach-ux500/devices-db8500.c | 6 +- arch/arm/mach-ux500/devices-db8500.h | 2 +- arch/arm/mach-ux500/devices.c | 2 +- arch/arm/mach-ux500/{include/mach => }/devices.h | 0 arch/arm/mach-ux500/hotplug.c | 2 +- arch/arm/mach-ux500/id.c | 2 +- arch/arm/mach-ux500/include/mach/timex.h | 6 - arch/arm/mach-ux500/include/mach/uncompress.h | 58 --------- .../{include/mach => }/irqs-board-mop500.h | 0 .../mach-ux500/{include/mach => }/irqs-db8500.h | 25 ---- arch/arm/mach-ux500/{include/mach => }/irqs.h | 4 +- arch/arm/mach-ux500/platsmp.c | 2 +- arch/arm/mach-ux500/{include/mach => }/setup.h | 0 arch/arm/mach-ux500/timer.c | 4 +- drivers/clocksource/clksrc-dbx500-prcmu.c | 2 - drivers/crypto/ux500/cryp/cryp.c | 2 - drivers/crypto/ux500/cryp/cryp_core.c | 1 - drivers/crypto/ux500/hash/hash_core.c | 1 - drivers/mfd/db8500-prcmu.c | 140 ++++++++++++++++----- drivers/power/pm2301_charger.c | 6 +- drivers/staging/ste_rmi4/Makefile | 1 - .../staging/ste_rmi4/board-mop500-u8500uib-rmi4.c | 31 ----- drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c | 31 +++-- drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h | 1 - include/linux/mfd/dbx500-prcmu.h | 2 + .../linux/platform_data/asoc-ux500-msp.h | 0 sound/soc/ux500/mop500_ab8500.c | 2 - sound/soc/ux500/ux500_msp_dai.c | 3 +- sound/soc/ux500/ux500_msp_i2s.c | 3 +- sound/soc/ux500/ux500_msp_i2s.h | 2 +- 41 files changed, 187 insertions(+), 283 deletions(-) rename arch/arm/mach-ux500/{include/mach => }/devices.h (100%) delete mode 100644 arch/arm/mach-ux500/include/mach/timex.h delete mode 100644 arch/arm/mach-ux500/include/mach/uncompress.h rename arch/arm/mach-ux500/{include/mach => }/irqs-board-mop500.h (100%) rename arch/arm/mach-ux500/{include/mach => }/irqs-db8500.h (83%) rename arch/arm/mach-ux500/{include/mach => }/irqs.h (95%) rename arch/arm/mach-ux500/{include/mach => }/setup.h (100%) delete mode 100644 drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c rename arch/arm/mach-ux500/include/mach/msp.h => include/linux/platform_data/asoc-ux500-msp.h (100%) -- 1.8.1.2 ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 1/9] ARM: ux500: move mach/msp.h to include/linux/platform_data.h 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 2/9] ARM: ux500: split out prcmu initialization Arnd Bergmann ` (8 subsequent siblings) 9 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel This header file only contains platform data structure definitions, so it's straightforward to move. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm/mach-ux500/board-mop500-audio.c | 2 +- arch/arm/mach-ux500/board-mop500.h | 2 +- .../include/mach/msp.h => include/linux/platform_data/asoc-ux500-msp.h | 0 sound/soc/ux500/ux500_msp_dai.c | 2 +- sound/soc/ux500/ux500_msp_i2s.c | 2 +- sound/soc/ux500/ux500_msp_i2s.h | 2 +- 6 files changed, 5 insertions(+), 5 deletions(-) rename arch/arm/mach-ux500/include/mach/msp.h => include/linux/platform_data/asoc-ux500-msp.h (100%) diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c index c8167bf..96e62ef 100644 --- a/arch/arm/mach-ux500/board-mop500-audio.c +++ b/arch/arm/mach-ux500/board-mop500-audio.c @@ -12,7 +12,7 @@ #include <mach/devices.h> #include <mach/irqs.h> -#include <mach/msp.h> +#include <linux/platform_data/asoc-ux500-msp.h> #include "ste-dma40-db8500.h" #include "board-mop500.h" diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h index eaa605f..eb81caf1 100644 --- a/arch/arm/mach-ux500/board-mop500.h +++ b/arch/arm/mach-ux500/board-mop500.h @@ -9,7 +9,7 @@ /* For NOMADIK_NR_GPIO */ #include <mach/irqs.h> -#include <mach/msp.h> +#include <linux/platform_data/asoc-ux500-msp.h> #include <linux/amba/mmci.h> /* Snowball specific GPIO assignments, this board has no GPIO expander */ diff --git a/arch/arm/mach-ux500/include/mach/msp.h b/include/linux/platform_data/asoc-ux500-msp.h similarity index 100% rename from arch/arm/mach-ux500/include/mach/msp.h rename to include/linux/platform_data/asoc-ux500-msp.h diff --git a/sound/soc/ux500/ux500_msp_dai.c b/sound/soc/ux500/ux500_msp_dai.c index 94a3e57..1e671f4 100644 --- a/sound/soc/ux500/ux500_msp_dai.c +++ b/sound/soc/ux500/ux500_msp_dai.c @@ -21,7 +21,7 @@ #include <linux/mfd/dbx500-prcmu.h> #include <mach/hardware.h> -#include <mach/msp.h> +#include <linux/platform_data/asoc-ux500-msp.h> #include <sound/soc.h> #include <sound/soc-dai.h> diff --git a/sound/soc/ux500/ux500_msp_i2s.c b/sound/soc/ux500/ux500_msp_i2s.c index a26c6bf..124a78a 100644 --- a/sound/soc/ux500/ux500_msp_i2s.c +++ b/sound/soc/ux500/ux500_msp_i2s.c @@ -22,7 +22,7 @@ #include <linux/of.h> #include <mach/hardware.h> -#include <mach/msp.h> +#include <linux/platform_data/asoc-ux500-msp.h> #include <sound/soc.h> diff --git a/sound/soc/ux500/ux500_msp_i2s.h b/sound/soc/ux500/ux500_msp_i2s.h index 1311c0d..31223ca 100644 --- a/sound/soc/ux500/ux500_msp_i2s.h +++ b/sound/soc/ux500/ux500_msp_i2s.h @@ -17,7 +17,7 @@ #include <linux/platform_device.h> -#include <mach/msp.h> +#include <linux/platform_data/asoc-ux500-msp.h> #define MSP_INPUT_FREQ_APB 48000000 -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 2/9] ARM: ux500: split out prcmu initialization 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann 2013-03-21 21:51 ` [PATCH 1/9] ARM: ux500: move mach/msp.h to include/linux/platform_data.h Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 3/9] ARM: ux500: make irqs.h local to platform Arnd Bergmann ` (7 subsequent siblings) 9 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel This untangles the final bits of the prcmu code from the platform code: * The IRQ_PRCMU_* definitions move from irqs-db8500.h into prcmu.c because they are only of local significance. * u8500_thsens_device goes into the prcmu, because it uses a PRCMU IRQ that the platform does not see. * IRQ_DB8500_AB8500 and IRQ_PRCMU_BASE go into the platform data because the PRCMU does not see it. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm/mach-ux500/board-mop500.c | 58 ---------- arch/arm/mach-ux500/devices-db8500.c | 2 + arch/arm/mach-ux500/include/mach/irqs-db8500.h | 25 ----- drivers/mfd/db8500-prcmu.c | 140 ++++++++++++++++++++----- include/linux/mfd/dbx500-prcmu.h | 2 + 5 files changed, 115 insertions(+), 112 deletions(-) diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 215a389..682b321 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -239,63 +239,6 @@ struct ab8500_platform_data ab8500_platdata = { .codec = &ab8500_codec_pdata, }; -/* - * Thermal Sensor - */ - -static struct resource db8500_thsens_resources[] = { - { - .name = "IRQ_HOTMON_LOW", - .start = IRQ_PRCMU_HOTMON_LOW, - .end = IRQ_PRCMU_HOTMON_LOW, - .flags = IORESOURCE_IRQ, - }, - { - .name = "IRQ_HOTMON_HIGH", - .start = IRQ_PRCMU_HOTMON_HIGH, - .end = IRQ_PRCMU_HOTMON_HIGH, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct db8500_thsens_platform_data db8500_thsens_data = { - .trip_points[0] = { - .temp = 70000, - .type = THERMAL_TRIP_ACTIVE, - .cdev_name = { - [0] = "thermal-cpufreq-0", - }, - }, - .trip_points[1] = { - .temp = 75000, - .type = THERMAL_TRIP_ACTIVE, - .cdev_name = { - [0] = "thermal-cpufreq-0", - }, - }, - .trip_points[2] = { - .temp = 80000, - .type = THERMAL_TRIP_ACTIVE, - .cdev_name = { - [0] = "thermal-cpufreq-0", - }, - }, - .trip_points[3] = { - .temp = 85000, - .type = THERMAL_TRIP_CRITICAL, - }, - .num_trips = 4, -}; - -static struct platform_device u8500_thsens_device = { - .name = "db8500-thermal", - .resource = db8500_thsens_resources, - .num_resources = ARRAY_SIZE(db8500_thsens_resources), - .dev = { - .platform_data = &db8500_thsens_data, - }, -}; - static struct platform_device u8500_cpufreq_cooling_device = { .name = "db8500-cpufreq-cooling", }; @@ -656,7 +599,6 @@ static struct platform_device *snowball_platform_devs[] __initdata = { &snowball_key_dev, &snowball_sbnet_dev, &snowball_gpio_en_3v3_regulator_dev, - &u8500_thsens_device, &u8500_cpufreq_cooling_device, &sdi0_regulator, }; diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index 9152aca..3b7599d 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c @@ -199,6 +199,8 @@ struct platform_device u8500_ske_keypad_device = { struct prcmu_pdata db8500_prcmu_pdata = { .ab_platdata = &ab8500_platdata, + .ab_irq = IRQ_DB8500_AB8500, + .irq_base = IRQ_PRCMU_BASE, .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET, .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET, }; diff --git a/arch/arm/mach-ux500/include/mach/irqs-db8500.h b/arch/arm/mach-ux500/include/mach/irqs-db8500.h index 68bc149..f3a9d59 100644 --- a/arch/arm/mach-ux500/include/mach/irqs-db8500.h +++ b/arch/arm/mach-ux500/include/mach/irqs-db8500.h @@ -109,31 +109,6 @@ /* Virtual interrupts corresponding to the PRCMU wakeups. */ #define IRQ_PRCMU_BASE IRQ_SOC_START -#define NUM_PRCMU_WAKEUPS (IRQ_PRCMU_END - IRQ_PRCMU_BASE) - -#define IRQ_PRCMU_RTC (IRQ_PRCMU_BASE) -#define IRQ_PRCMU_RTT0 (IRQ_PRCMU_BASE + 1) -#define IRQ_PRCMU_RTT1 (IRQ_PRCMU_BASE + 2) -#define IRQ_PRCMU_HSI0 (IRQ_PRCMU_BASE + 3) -#define IRQ_PRCMU_HSI1 (IRQ_PRCMU_BASE + 4) -#define IRQ_PRCMU_CA_WAKE (IRQ_PRCMU_BASE + 5) -#define IRQ_PRCMU_USB (IRQ_PRCMU_BASE + 6) -#define IRQ_PRCMU_ABB (IRQ_PRCMU_BASE + 7) -#define IRQ_PRCMU_ABB_FIFO (IRQ_PRCMU_BASE + 8) -#define IRQ_PRCMU_ARM (IRQ_PRCMU_BASE + 9) -#define IRQ_PRCMU_MODEM_SW_RESET_REQ (IRQ_PRCMU_BASE + 10) -#define IRQ_PRCMU_GPIO0 (IRQ_PRCMU_BASE + 11) -#define IRQ_PRCMU_GPIO1 (IRQ_PRCMU_BASE + 12) -#define IRQ_PRCMU_GPIO2 (IRQ_PRCMU_BASE + 13) -#define IRQ_PRCMU_GPIO3 (IRQ_PRCMU_BASE + 14) -#define IRQ_PRCMU_GPIO4 (IRQ_PRCMU_BASE + 15) -#define IRQ_PRCMU_GPIO5 (IRQ_PRCMU_BASE + 16) -#define IRQ_PRCMU_GPIO6 (IRQ_PRCMU_BASE + 17) -#define IRQ_PRCMU_GPIO7 (IRQ_PRCMU_BASE + 18) -#define IRQ_PRCMU_GPIO8 (IRQ_PRCMU_BASE + 19) -#define IRQ_PRCMU_CA_SLEEP (IRQ_PRCMU_BASE + 20) -#define IRQ_PRCMU_HOTMON_LOW (IRQ_PRCMU_BASE + 21) -#define IRQ_PRCMU_HOTMON_HIGH (IRQ_PRCMU_BASE + 22) #define IRQ_PRCMU_END (IRQ_PRCMU_BASE + 23) /* diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 03e2aed..bc8f870 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -33,7 +33,7 @@ #include <linux/regulator/machine.h> #include <linux/cpufreq.h> #include <linux/platform_data/ux500_wdt.h> -#include <mach/irqs.h> +#include <linux/platform_data/db8500_thermal.h> #include "dbx500-prcmu-regs.h" /* Index of different voltages to be used when accessing AVSData */ @@ -273,8 +273,34 @@ static struct irq_domain *db8500_irq_domain; * the bits in the bit field are not. (The bits also have a tendency to move * around, to further complicate matters.) */ -#define IRQ_INDEX(_name) ((IRQ_PRCMU_##_name) - IRQ_PRCMU_BASE) +#define IRQ_INDEX(_name) ((IRQ_PRCMU_##_name)) #define IRQ_ENTRY(_name)[IRQ_INDEX(_name)] = (WAKEUP_BIT_##_name) + +#define IRQ_PRCMU_RTC 0 +#define IRQ_PRCMU_RTT0 1 +#define IRQ_PRCMU_RTT1 2 +#define IRQ_PRCMU_HSI0 3 +#define IRQ_PRCMU_HSI1 4 +#define IRQ_PRCMU_CA_WAKE 5 +#define IRQ_PRCMU_USB 6 +#define IRQ_PRCMU_ABB 7 +#define IRQ_PRCMU_ABB_FIFO 8 +#define IRQ_PRCMU_ARM 9 +#define IRQ_PRCMU_MODEM_SW_RESET_REQ 10 +#define IRQ_PRCMU_GPIO0 11 +#define IRQ_PRCMU_GPIO1 12 +#define IRQ_PRCMU_GPIO2 13 +#define IRQ_PRCMU_GPIO3 14 +#define IRQ_PRCMU_GPIO4 15 +#define IRQ_PRCMU_GPIO5 16 +#define IRQ_PRCMU_GPIO6 17 +#define IRQ_PRCMU_GPIO7 18 +#define IRQ_PRCMU_GPIO8 19 +#define IRQ_PRCMU_CA_SLEEP 20 +#define IRQ_PRCMU_HOTMON_LOW 21 +#define IRQ_PRCMU_HOTMON_HIGH 22 +#define NUM_PRCMU_WAKEUPS 23 + static u32 prcmu_irq_bit[NUM_PRCMU_WAKEUPS] = { IRQ_ENTRY(RTC), IRQ_ENTRY(RTT0), @@ -2649,14 +2675,13 @@ static struct irq_domain_ops db8500_irq_ops = { .xlate = irq_domain_xlate_twocell, }; -static int db8500_irq_init(struct device_node *np) +static int db8500_irq_init(struct device_node *np, int irq_base) { - int irq_base = 0; int i; /* In the device tree case, just take some IRQs */ if (!np) - irq_base = IRQ_PRCMU_BASE; + irq_base = 0; db8500_irq_domain = irq_domain_add_simple( np, NUM_PRCMU_WAKEUPS, irq_base, @@ -2717,7 +2742,7 @@ void __init db8500_prcmu_early_init(u32 phy_base, u32 size) * subsequently replaces with a real remap. After the merge of * the mailbox subsystem all of this early code goes away, and the * clock driver can probe independently. An early initcall will - * still be needed, but it can be diverted into drivers/clk/ux500/*. + * still be needed, but it can be diverted into drivers/clk/ux500/. */ prcmu_base = ioremap(phy_base, size); if (!prcmu_base) @@ -2988,18 +3013,57 @@ static struct regulator_init_data db8500_regulators[DB8500_NUM_REGULATORS] = { }, }; -static struct resource ab8500_resources[] = { - [0] = { - .start = IRQ_DB8500_AB8500, - .end = IRQ_DB8500_AB8500, - .flags = IORESOURCE_IRQ - } -}; - static struct ux500_wdt_data db8500_wdt_pdata = { .timeout = 600, /* 10 minutes */ .has_28_bits_resolution = true, }; +/* + * Thermal Sensor + */ + +static struct resource db8500_thsens_resources[] = { + { + .name = "IRQ_HOTMON_LOW", + .start = IRQ_PRCMU_HOTMON_LOW, + .end = IRQ_PRCMU_HOTMON_LOW, + .flags = IORESOURCE_IRQ, + }, + { + .name = "IRQ_HOTMON_HIGH", + .start = IRQ_PRCMU_HOTMON_HIGH, + .end = IRQ_PRCMU_HOTMON_HIGH, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct db8500_thsens_platform_data db8500_thsens_data = { + .trip_points[0] = { + .temp = 70000, + .type = THERMAL_TRIP_ACTIVE, + .cdev_name = { + [0] = "thermal-cpufreq-0", + }, + }, + .trip_points[1] = { + .temp = 75000, + .type = THERMAL_TRIP_ACTIVE, + .cdev_name = { + [0] = "thermal-cpufreq-0", + }, + }, + .trip_points[2] = { + .temp = 80000, + .type = THERMAL_TRIP_ACTIVE, + .cdev_name = { + [0] = "thermal-cpufreq-0", + }, + }, + .trip_points[3] = { + .temp = 85000, + .type = THERMAL_TRIP_CRITICAL, + }, + .num_trips = 4, +}; static struct mfd_cell db8500_prcmu_devs[] = { { @@ -3021,11 +3085,10 @@ static struct mfd_cell db8500_prcmu_devs[] = { .id = -1, }, { - .name = "ab8500-core", - .of_compatible = "stericsson,ab8500", - .num_resources = ARRAY_SIZE(ab8500_resources), - .resources = ab8500_resources, - .id = AB8500_VERSION_AB8500, + .name = "db8500-thermal", + .num_resources = ARRAY_SIZE(db8500_thsens_resources), + .resources = db8500_thsens_resources, + .platform_data = &db8500_thsens_data, }, }; @@ -3037,6 +3100,24 @@ static void db8500_prcmu_update_cpufreq(void) } } +static int db8500_prcmu_register_ab8500(struct device *parent, + struct ab8500_platform_data *pdata, + int irq) +{ + struct resource ab8500_resource = DEFINE_RES_IRQ(irq); + struct mfd_cell ab8500_cell = { + .name = "ab8500-core", + .of_compatible = "stericsson,ab8500", + .id = AB8500_VERSION_AB8500, + .platform_data = pdata, + .pdata_size = sizeof(struct ab8500_platform_data), + .resources = &ab8500_resource, + .num_resources = 1, + }; + + return mfd_add_devices(parent, 0, &ab8500_cell, 1, NULL, 0, NULL); +} + /** * prcmu_fw_init - arch init call for the Linux PRCMU fw init logic * @@ -3045,7 +3126,7 @@ static int db8500_prcmu_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct prcmu_pdata *pdata = dev_get_platdata(&pdev->dev); - int irq = 0, err = 0, i; + int irq = 0, err = 0; struct resource *res; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcmu"); @@ -3086,26 +3167,27 @@ static int db8500_prcmu_probe(struct platform_device *pdev) goto no_irq_return; } - db8500_irq_init(np); - - for (i = 0; i < ARRAY_SIZE(db8500_prcmu_devs); i++) { - if (!strcmp(db8500_prcmu_devs[i].name, "ab8500-core")) { - db8500_prcmu_devs[i].platform_data = pdata->ab_platdata; - db8500_prcmu_devs[i].pdata_size = sizeof(struct ab8500_platform_data); - } - } + db8500_irq_init(np, pdata->irq_base); prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); db8500_prcmu_update_cpufreq(); err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs, - ARRAY_SIZE(db8500_prcmu_devs), NULL, 0, NULL); + ARRAY_SIZE(db8500_prcmu_devs), NULL, 0, db8500_irq_domain); if (err) { pr_err("prcmu: Failed to add subdevices\n"); return err; } + err = db8500_prcmu_register_ab8500(&pdev->dev, pdata->ab_platdata, + pdata->ab_irq); + if (err) { + mfd_remove_devices(&pdev->dev); + pr_err("prcmu: Failed to add ab8500 subdevice\n"); + goto no_irq_return; + } + pr_info("DB8500 PRCMU initialized\n"); no_irq_return: diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index fc43cec..689e6a0 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -237,6 +237,8 @@ struct prcmu_pdata bool enable_set_ddr_opp; bool enable_ape_opp_100_voltage; struct ab8500_platform_data *ab_platdata; + int ab_irq; + int irq_base; u32 version_offset; u32 legacy_offset; u32 adt_offset; -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 3/9] ARM: ux500: make irqs.h local to platform 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann 2013-03-21 21:51 ` [PATCH 1/9] ARM: ux500: move mach/msp.h to include/linux/platform_data.h Arnd Bergmann 2013-03-21 21:51 ` [PATCH 2/9] ARM: ux500: split out prcmu initialization Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 4/9] ARM: ux500: kill mach/hardware.h some more Arnd Bergmann ` (6 subsequent siblings) 9 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel With the PRCMU out of the way, nothing outside of mach-ux500 uses mach/irqs.h any more, so we can make it a local header file, including the two sub-headers. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm/mach-ux500/board-mop500-audio.c | 2 +- arch/arm/mach-ux500/board-mop500-u8500uib.c | 2 +- arch/arm/mach-ux500/board-mop500.c | 2 +- arch/arm/mach-ux500/board-mop500.h | 2 +- arch/arm/mach-ux500/cpu-db8500.c | 2 +- arch/arm/mach-ux500/devices-common.c | 2 +- arch/arm/mach-ux500/devices-db8500.c | 2 +- arch/arm/mach-ux500/devices-db8500.h | 2 +- arch/arm/mach-ux500/{include/mach => }/irqs-board-mop500.h | 0 arch/arm/mach-ux500/{include/mach => }/irqs-db8500.h | 0 arch/arm/mach-ux500/{include/mach => }/irqs.h | 4 ++-- arch/arm/mach-ux500/timer.c | 2 +- 12 files changed, 11 insertions(+), 11 deletions(-) rename arch/arm/mach-ux500/{include/mach => }/irqs-board-mop500.h (100%) rename arch/arm/mach-ux500/{include/mach => }/irqs-db8500.h (100%) rename arch/arm/mach-ux500/{include/mach => }/irqs.h (95%) diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c index 96e62ef..def0637 100644 --- a/arch/arm/mach-ux500/board-mop500-audio.c +++ b/arch/arm/mach-ux500/board-mop500-audio.c @@ -11,7 +11,7 @@ #include <linux/platform_data/dma-ste-dma40.h> #include <mach/devices.h> -#include <mach/irqs.h> +#include "irqs.h" #include <linux/platform_data/asoc-ux500-msp.h> #include "ste-dma40-db8500.h" diff --git a/arch/arm/mach-ux500/board-mop500-u8500uib.c b/arch/arm/mach-ux500/board-mop500-u8500uib.c index ead91c9..6619628 100644 --- a/arch/arm/mach-ux500/board-mop500-u8500uib.c +++ b/arch/arm/mach-ux500/board-mop500-u8500uib.c @@ -12,7 +12,7 @@ #include <linux/mfd/tc3589x.h> #include <linux/input/matrix_keypad.h> -#include <mach/irqs.h> +#include "irqs.h" #include "board-mop500.h" diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 682b321..76d381d 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -45,7 +45,7 @@ #include <mach/setup.h> #include <mach/devices.h> -#include <mach/irqs.h> +#include "irqs.h" #include <linux/platform_data/crypto-ux500.h> #include "ste-dma40-db8500.h" diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h index eb81caf1..16bf1ac 100644 --- a/arch/arm/mach-ux500/board-mop500.h +++ b/arch/arm/mach-ux500/board-mop500.h @@ -8,7 +8,7 @@ #define __BOARD_MOP500_H /* For NOMADIK_NR_GPIO */ -#include <mach/irqs.h> +#include "irqs.h" #include <linux/platform_data/asoc-ux500-msp.h> #include <linux/amba/mmci.h> diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index eb6d31e..563b77b 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -30,7 +30,7 @@ #include <mach/setup.h> #include <mach/devices.h> -#include <mach/irqs.h> +#include "irqs.h" #include "devices-db8500.h" #include "ste-dma40-db8500.h" diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c index 94868b7..f71b3d7 100644 --- a/arch/arm/mach-ux500/devices-common.c +++ b/arch/arm/mach-ux500/devices-common.c @@ -13,7 +13,7 @@ #include <linux/platform_device.h> #include <linux/platform_data/pinctrl-nomadik.h> -#include <mach/irqs.h> +#include "irqs.h" #include "devices-common.h" diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index 3b7599d..3a3a582 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c @@ -16,7 +16,7 @@ #include <linux/mfd/dbx500-prcmu.h> #include <mach/setup.h> -#include <mach/irqs.h> +#include "irqs.h" #include "db8500-regs.h" #include "devices-db8500.h" diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h index c9db210..3219983 100644 --- a/arch/arm/mach-ux500/devices-db8500.h +++ b/arch/arm/mach-ux500/devices-db8500.h @@ -9,7 +9,7 @@ #define __DEVICES_DB8500_H #include <linux/platform_data/usb-musb-ux500.h> -#include <mach/irqs.h> +#include "irqs.h" #include "db8500-regs.h" #include "devices-common.h" diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h b/arch/arm/mach-ux500/irqs-board-mop500.h similarity index 100% rename from arch/arm/mach-ux500/include/mach/irqs-board-mop500.h rename to arch/arm/mach-ux500/irqs-board-mop500.h diff --git a/arch/arm/mach-ux500/include/mach/irqs-db8500.h b/arch/arm/mach-ux500/irqs-db8500.h similarity index 100% rename from arch/arm/mach-ux500/include/mach/irqs-db8500.h rename to arch/arm/mach-ux500/irqs-db8500.h diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/irqs.h similarity index 95% rename from arch/arm/mach-ux500/include/mach/irqs.h rename to arch/arm/mach-ux500/irqs.h index 829947d..15b2af6 100644 --- a/arch/arm/mach-ux500/include/mach/irqs.h +++ b/arch/arm/mach-ux500/irqs.h @@ -34,14 +34,14 @@ /* This will be overridden by SoC-specific irq headers */ #define IRQ_SOC_END IRQ_SOC_START -#include <mach/irqs-db8500.h> +#include "irqs-db8500.h" #define IRQ_BOARD_START IRQ_SOC_END /* This will be overridden by board-specific irq headers */ #define IRQ_BOARD_END IRQ_BOARD_START #ifdef CONFIG_MACH_MOP500 -#include <mach/irqs-board-mop500.h> +#include "irqs-board-mop500.h" #endif #define UX500_NR_IRQS IRQ_BOARD_END diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index 6dcec9a..5952161 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -15,7 +15,7 @@ #include <asm/smp_twd.h> #include <mach/setup.h> -#include <mach/irqs.h> +#include "irqs.h" #include "db8500-regs.h" #include "id.h" -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 4/9] ARM: ux500: kill mach/hardware.h some more 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann ` (2 preceding siblings ...) 2013-03-21 21:51 ` [PATCH 3/9] ARM: ux500: make irqs.h local to platform Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 5/9] staging: ste_rmi4: kill platform_data hack Arnd Bergmann ` (5 subsequent siblings) 9 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel A number of ux500 specific drivers include mach/hardware.h without actually needing it. Let's remove all remaining instances. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- drivers/crypto/ux500/cryp/cryp.c | 2 -- drivers/crypto/ux500/cryp/cryp_core.c | 1 - drivers/crypto/ux500/hash/hash_core.c | 1 - sound/soc/ux500/mop500_ab8500.c | 2 -- sound/soc/ux500/ux500_msp_dai.c | 1 - sound/soc/ux500/ux500_msp_i2s.c | 1 - 6 files changed, 8 deletions(-) diff --git a/drivers/crypto/ux500/cryp/cryp.c b/drivers/crypto/ux500/cryp/cryp.c index e208cea..3eafa90 100644 --- a/drivers/crypto/ux500/cryp/cryp.c +++ b/drivers/crypto/ux500/cryp/cryp.c @@ -12,8 +12,6 @@ #include <linux/kernel.h> #include <linux/types.h> -#include <mach/hardware.h> - #include "cryp_p.h" #include "cryp.h" diff --git a/drivers/crypto/ux500/cryp/cryp_core.c b/drivers/crypto/ux500/cryp/cryp_core.c index 22c9063..32f4806 100644 --- a/drivers/crypto/ux500/cryp/cryp_core.c +++ b/drivers/crypto/ux500/cryp/cryp_core.c @@ -32,7 +32,6 @@ #include <crypto/scatterwalk.h> #include <linux/platform_data/crypto-ux500.h> -#include <mach/hardware.h> #include "cryp_p.h" #include "cryp.h" diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c index 632c333..1827e9f 100644 --- a/drivers/crypto/ux500/hash/hash_core.c +++ b/drivers/crypto/ux500/hash/hash_core.c @@ -32,7 +32,6 @@ #include <crypto/algapi.h> #include <linux/platform_data/crypto-ux500.h> -#include <mach/hardware.h> #include "hash_alg.h" diff --git a/sound/soc/ux500/mop500_ab8500.c b/sound/soc/ux500/mop500_ab8500.c index 78cce23..892ad9a 100644 --- a/sound/soc/ux500/mop500_ab8500.c +++ b/sound/soc/ux500/mop500_ab8500.c @@ -17,8 +17,6 @@ #include <linux/io.h> #include <linux/clk.h> -#include <mach/hardware.h> - #include <sound/soc.h> #include <sound/soc-dapm.h> #include <sound/pcm.h> diff --git a/sound/soc/ux500/ux500_msp_dai.c b/sound/soc/ux500/ux500_msp_dai.c index 1e671f4..1551460 100644 --- a/sound/soc/ux500/ux500_msp_dai.c +++ b/sound/soc/ux500/ux500_msp_dai.c @@ -20,7 +20,6 @@ #include <linux/regulator/consumer.h> #include <linux/mfd/dbx500-prcmu.h> -#include <mach/hardware.h> #include <linux/platform_data/asoc-ux500-msp.h> #include <sound/soc.h> diff --git a/sound/soc/ux500/ux500_msp_i2s.c b/sound/soc/ux500/ux500_msp_i2s.c index 124a78a..78fc26a 100644 --- a/sound/soc/ux500/ux500_msp_i2s.c +++ b/sound/soc/ux500/ux500_msp_i2s.c @@ -21,7 +21,6 @@ #include <linux/io.h> #include <linux/of.h> -#include <mach/hardware.h> #include <linux/platform_data/asoc-ux500-msp.h> #include <sound/soc.h> -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 5/9] staging: ste_rmi4: kill platform_data hack 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann ` (3 preceding siblings ...) 2013-03-21 21:51 ` [PATCH 4/9] ARM: ux500: kill mach/hardware.h some more Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-25 13:12 ` Linus Walleij 2013-03-21 21:51 ` [PATCH 6/9] power: pm2301_charger: remove __devinit annotations Arnd Bergmann ` (4 subsequent siblings) 9 siblings, 1 reply; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel There is only one instance of the platform data for synaptics_i2c_rmi4 in the mainline kernel, so there is no point of pretending its variable here. The only member that has a dependency on the platform is actually the interrupt number, and there is a field in the i2c_client structure that gets initialized from the board info, so we can trivially move the board_into into the platform without knowledge of the platform_data structure. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm/mach-ux500/board-mop500-u8500uib.c | 7 +++-- drivers/staging/ste_rmi4/Makefile | 1 - .../staging/ste_rmi4/board-mop500-u8500uib-rmi4.c | 31 ---------------------- drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c | 31 +++++++++++++--------- drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h | 1 - 5 files changed, 23 insertions(+), 48 deletions(-) delete mode 100644 drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c diff --git a/arch/arm/mach-ux500/board-mop500-u8500uib.c b/arch/arm/mach-ux500/board-mop500-u8500uib.c index 6619628..d397c19 100644 --- a/arch/arm/mach-ux500/board-mop500-u8500uib.c +++ b/arch/arm/mach-ux500/board-mop500-u8500uib.c @@ -16,8 +16,11 @@ #include "board-mop500.h" -/* Dummy data that can be overridden by staging driver */ -struct i2c_board_info __initdata __weak mop500_i2c3_devices_u8500[] = { +static struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = { + { + I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B), + .irq = NOMADIK_GPIO_TO_IRQ(84), + }, }; /* diff --git a/drivers/staging/ste_rmi4/Makefile b/drivers/staging/ste_rmi4/Makefile index e4c0335..6cce2ed 100644 --- a/drivers/staging/ste_rmi4/Makefile +++ b/drivers/staging/ste_rmi4/Makefile @@ -2,4 +2,3 @@ # Makefile for the RMI4 touchscreen driver. # obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += synaptics_i2c_rmi4.o -obj-$(CONFIG_MACH_MOP500) += board-mop500-u8500uib-rmi4.o diff --git a/drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c b/drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c deleted file mode 100644 index 47439c3..0000000 --- a/drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Some platform data for the RMI4 touchscreen that will override the __weak - * platform data in the Ux500 machine if this driver is activated. - */ -#include <linux/i2c.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <mach/irqs.h> -#include "synaptics_i2c_rmi4.h" - -/* - * Synaptics RMI4 touchscreen interface on the U8500 UIB - */ - -/* - * Descriptor structure. - * Describes the number of i2c devices on the bus that speak RMI. - */ -static struct synaptics_rmi4_platform_data rmi4_i2c_dev_platformdata = { - .irq_number = NOMADIK_GPIO_TO_IRQ(84), - .irq_type = (IRQF_TRIGGER_FALLING | IRQF_SHARED), - .x_flip = false, - .y_flip = true, -}; - -struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = { - { - I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B), - .platform_data = &rmi4_i2c_dev_platformdata, - }, -}; diff --git a/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c b/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c index 6a21f67..2e35307 100644 --- a/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c +++ b/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c @@ -864,6 +864,16 @@ static int synaptics_rmi4_i2c_query_device(struct synaptics_rmi4_data *pdata) return 0; } +/* + * Descriptor structure. + * Describes the number of i2c devices on the bus that speak RMI. + */ +static struct synaptics_rmi4_platform_data synaptics_rmi4_platformdata = { + .irq_type = (IRQF_TRIGGER_FALLING | IRQF_SHARED), + .x_flip = false, + .y_flip = true, +}; + /** * synaptics_rmi4_probe() - Initialze the i2c-client touchscreen driver * @i2c: i2c client structure pointer @@ -890,10 +900,8 @@ static int synaptics_rmi4_probe return -EIO; } - if (!platformdata) { - dev_err(&client->dev, "%s: no platform data\n", __func__); - return -EINVAL; - } + if (!platformdata) + platformdata = &synaptics_rmi4_platformdata; /* Allocate and initialize the instance data for this client */ rmi4_data = kcalloc(2, sizeof(struct synaptics_rmi4_data), @@ -977,13 +985,13 @@ static int synaptics_rmi4_probe synaptics_rmi4_i2c_block_read(rmi4_data, rmi4_data->fn01_data_base_addr + 1, intr_status, rmi4_data->number_of_interrupt_register); - retval = request_threaded_irq(platformdata->irq_number, NULL, + retval = request_threaded_irq(client->irq, NULL, synaptics_rmi4_irq, platformdata->irq_type, DRIVER_NAME, rmi4_data); if (retval) { dev_err(&client->dev, "%s:Unable to get attn irq %d\n", - __func__, platformdata->irq_number); + __func__, client->irq); goto err_query_dev; } @@ -996,7 +1004,7 @@ static int synaptics_rmi4_probe return retval; err_free_irq: - free_irq(platformdata->irq_number, rmi4_data); + free_irq(client->irq, rmi4_data); err_query_dev: regulator_disable(rmi4_data->regulator); err_regulator_enable: @@ -1019,11 +1027,10 @@ err_input: static int synaptics_rmi4_remove(struct i2c_client *client) { struct synaptics_rmi4_data *rmi4_data = i2c_get_clientdata(client); - const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board; rmi4_data->touch_stopped = true; wake_up(&rmi4_data->wait); - free_irq(pdata->irq_number, rmi4_data); + free_irq(client->irq, rmi4_data); input_unregister_device(rmi4_data->input_dev); regulator_disable(rmi4_data->regulator); regulator_put(rmi4_data->regulator); @@ -1046,10 +1053,9 @@ static int synaptics_rmi4_suspend(struct device *dev) int retval; unsigned char intr_status; struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev); - const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board; rmi4_data->touch_stopped = true; - disable_irq(pdata->irq_number); + disable_irq(rmi4_data->i2c_client->irq); retval = synaptics_rmi4_i2c_block_read(rmi4_data, rmi4_data->fn01_data_base_addr + 1, @@ -1080,11 +1086,10 @@ static int synaptics_rmi4_resume(struct device *dev) int retval; unsigned char intr_status; struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev); - const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board; regulator_enable(rmi4_data->regulator); - enable_irq(pdata->irq_number); + enable_irq(rmi4_data->i2c_client->irq); rmi4_data->touch_stopped = false; retval = synaptics_rmi4_i2c_block_read(rmi4_data, diff --git a/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h b/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h index 384436e..8c9166b 100644 --- a/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h +++ b/drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h @@ -38,7 +38,6 @@ * This structure gives platform data for rmi4. */ struct synaptics_rmi4_platform_data { - int irq_number; int irq_type; bool x_flip; bool y_flip; -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 5/9] staging: ste_rmi4: kill platform_data hack 2013-03-21 21:51 ` [PATCH 5/9] staging: ste_rmi4: kill platform_data hack Arnd Bergmann @ 2013-03-25 13:12 ` Linus Walleij 2013-03-25 18:00 ` Greg KH 0 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-25 13:12 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: > There is only one instance of the platform data for synaptics_i2c_rmi4 > in the mainline kernel, so there is no point of pretending its > variable here. The only member that has a dependency on the platform > is actually the interrupt number, and there is a field in the > i2c_client structure that gets initialized from the board info, > so we can trivially move the board_into into the platform without > knowledge of the platform_data structure. > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Greg can we have your ACK on this patch to staging so we can take it through the ARM SoC tree? (Tell me if you can't retrieve it and I'll send it verbose.) Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 5/9] staging: ste_rmi4: kill platform_data hack 2013-03-25 13:12 ` Linus Walleij @ 2013-03-25 18:00 ` Greg KH 0 siblings, 0 replies; 49+ messages in thread From: Greg KH @ 2013-03-25 18:00 UTC (permalink / raw) To: linux-arm-kernel On Mon, Mar 25, 2013 at 02:12:25PM +0100, Linus Walleij wrote: > On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: > > > There is only one instance of the platform data for synaptics_i2c_rmi4 > > in the mainline kernel, so there is no point of pretending its > > variable here. The only member that has a dependency on the platform > > is actually the interrupt number, and there is a field in the > > i2c_client structure that gets initialized from the board info, > > so we can trivially move the board_into into the platform without > > knowledge of the platform_data structure. > > > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > > Greg can we have your ACK on this patch to staging so we can take > it through the ARM SoC tree? > > (Tell me if you can't retrieve it and I'll send it verbose.) Please resend it as I don't see it in my mailboxes anywhere... thanks, greg k-h ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 6/9] power: pm2301_charger: remove __devinit annotations 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann ` (4 preceding siblings ...) 2013-03-21 21:51 ` [PATCH 5/9] staging: ste_rmi4: kill platform_data hack Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-22 12:14 ` Linus Walleij 2013-03-21 21:51 ` [PATCH 7/9] ARM: ux500: make remaining headers local Arnd Bergmann ` (3 subsequent siblings) 9 siblings, 1 reply; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel These got missed in the treewide changes because they came in through a new branch, and it now breaks allmodconfig builds. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- drivers/power/pm2301_charger.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/power/pm2301_charger.c b/drivers/power/pm2301_charger.c index ed48d75..ca424b8 100644 --- a/drivers/power/pm2301_charger.c +++ b/drivers/power/pm2301_charger.c @@ -851,7 +851,7 @@ static int pm2xxx_wall_charger_suspend(struct i2c_client *i2c_client, return 0; } -static int __devinit pm2xxx_wall_charger_probe(struct i2c_client *i2c_client, +static int pm2xxx_wall_charger_probe(struct i2c_client *i2c_client, const struct i2c_device_id *id) { struct pm2xxx_platform_data *pl_data = i2c_client->dev.platform_data; @@ -1021,7 +1021,7 @@ free_device_info: return ret; } -static int __devexit pm2xxx_wall_charger_remove(struct i2c_client *i2c_client) +static int pm2xxx_wall_charger_remove(struct i2c_client *i2c_client) { struct pm2xxx_charger *pm2 = i2c_get_clientdata(i2c_client); @@ -1058,7 +1058,7 @@ MODULE_DEVICE_TABLE(i2c, pm2xxx_id); static struct i2c_driver pm2xxx_charger_driver = { .probe = pm2xxx_wall_charger_probe, - .remove = __devexit_p(pm2xxx_wall_charger_remove), + .remove = pm2xxx_wall_charger_remove, .suspend = pm2xxx_wall_charger_suspend, .resume = pm2xxx_wall_charger_resume, .driver = { -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 6/9] power: pm2301_charger: remove __devinit annotations 2013-03-21 21:51 ` [PATCH 6/9] power: pm2301_charger: remove __devinit annotations Arnd Bergmann @ 2013-03-22 12:14 ` Linus Walleij 2013-03-22 15:16 ` Anton Vorontsov 2013-03-25 3:09 ` Anton Vorontsov 0 siblings, 2 replies; 49+ messages in thread From: Linus Walleij @ 2013-03-22 12:14 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: > These got missed in the treewide changes because they came in through > a new branch, and it now breaks allmodconfig builds. > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Anton can you pick this fix directly to the power subsystem tree? Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 6/9] power: pm2301_charger: remove __devinit annotations 2013-03-22 12:14 ` Linus Walleij @ 2013-03-22 15:16 ` Anton Vorontsov 2013-03-25 3:09 ` Anton Vorontsov 1 sibling, 0 replies; 49+ messages in thread From: Anton Vorontsov @ 2013-03-22 15:16 UTC (permalink / raw) To: linux-arm-kernel On Fri, Mar 22, 2013 at 01:14:55PM +0100, Linus Walleij wrote: > On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: > > > These got missed in the treewide changes because they came in through > > a new branch, and it now breaks allmodconfig builds. > > > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > > Acked-by: Linus Walleij <linus.walleij@linaro.org> > > Anton can you pick this fix directly to the power subsystem > tree? Yup, will do. Thanks! Anton ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 6/9] power: pm2301_charger: remove __devinit annotations 2013-03-22 12:14 ` Linus Walleij 2013-03-22 15:16 ` Anton Vorontsov @ 2013-03-25 3:09 ` Anton Vorontsov 1 sibling, 0 replies; 49+ messages in thread From: Anton Vorontsov @ 2013-03-25 3:09 UTC (permalink / raw) To: linux-arm-kernel On Fri, Mar 22, 2013 at 01:14:55PM +0100, Linus Walleij wrote: > On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: > > > These got missed in the treewide changes because they came in through > > a new branch, and it now breaks allmodconfig builds. > > > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > > Acked-by: Linus Walleij <linus.walleij@linaro.org> > > Anton can you pick this fix directly to the power subsystem > tree? It appears that Lars-Peter Clausen sent a similar patch a bit earlier. I added Arnd's Signed-off-by to give a credit, though. So, it is in battery-urgent now. Thanks! Anton ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 7/9] ARM: ux500: make remaining headers local 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann ` (5 preceding siblings ...) 2013-03-21 21:51 ` [PATCH 6/9] power: pm2301_charger: remove __devinit annotations Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 8/9] ARM: ux500: move to multiplatform Arnd Bergmann ` (2 subsequent siblings) 9 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel mach/setup.h and mach/devices.h are only needed from inside of mach-ux500 now, so we can simply move them out of the include/mach directory. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm/mach-ux500/board-mop500-audio.c | 2 +- arch/arm/mach-ux500/board-mop500-sdi.c | 2 +- arch/arm/mach-ux500/board-mop500.c | 4 ++-- arch/arm/mach-ux500/cpu-db8500.c | 4 ++-- arch/arm/mach-ux500/cpu.c | 4 ++-- arch/arm/mach-ux500/devices-db8500.c | 2 +- arch/arm/mach-ux500/devices.c | 2 +- arch/arm/mach-ux500/{include/mach => }/devices.h | 0 arch/arm/mach-ux500/hotplug.c | 2 +- arch/arm/mach-ux500/id.c | 2 +- arch/arm/mach-ux500/platsmp.c | 2 +- arch/arm/mach-ux500/{include/mach => }/setup.h | 0 arch/arm/mach-ux500/timer.c | 2 +- drivers/clocksource/clksrc-dbx500-prcmu.c | 2 -- 14 files changed, 14 insertions(+), 16 deletions(-) rename arch/arm/mach-ux500/{include/mach => }/devices.h (100%) rename arch/arm/mach-ux500/{include/mach => }/setup.h (100%) diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c index def0637..aba9e56 100644 --- a/arch/arm/mach-ux500/board-mop500-audio.c +++ b/arch/arm/mach-ux500/board-mop500-audio.c @@ -10,7 +10,7 @@ #include <linux/platform_data/pinctrl-nomadik.h> #include <linux/platform_data/dma-ste-dma40.h> -#include <mach/devices.h> +#include "devices.h" #include "irqs.h" #include <linux/platform_data/asoc-ux500-msp.h> diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index e71a203..0ef3877 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c @@ -14,7 +14,7 @@ #include <linux/platform_data/dma-ste-dma40.h> #include <asm/mach-types.h> -#include <mach/devices.h> +#include "devices.h" #include "db8500-regs.h" #include "devices-db8500.h" diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 76d381d..18b1fbd 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -43,8 +43,8 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/setup.h> -#include <mach/devices.h> +#include "setup.h" +#include "devices.h" #include "irqs.h" #include <linux/platform_data/crypto-ux500.h> diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 563b77b..a98e3b3 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -28,8 +28,8 @@ #include <asm/mach/map.h> #include <asm/mach/arch.h> -#include <mach/setup.h> -#include <mach/devices.h> +#include "setup.h" +#include "devices.h" #include "irqs.h" #include "devices-db8500.h" diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 1754041..5976e14 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -23,8 +23,8 @@ #include <asm/mach/map.h> -#include <mach/setup.h> -#include <mach/devices.h> +#include "setup.h" +#include "devices.h" #include "board-mop500.h" #include "db8500-regs.h" diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index 3a3a582..cdcd010 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c @@ -15,7 +15,7 @@ #include <linux/platform_data/dma-ste-dma40.h> #include <linux/mfd/dbx500-prcmu.h> -#include <mach/setup.h> +#include "setup.h" #include "irqs.h" #include "db8500-regs.h" diff --git a/arch/arm/mach-ux500/devices.c b/arch/arm/mach-ux500/devices.c index f63a512..0f9e52b 100644 --- a/arch/arm/mach-ux500/devices.c +++ b/arch/arm/mach-ux500/devices.c @@ -11,7 +11,7 @@ #include <linux/io.h> #include <linux/amba/bus.h> -#include <mach/setup.h> +#include "setup.h" #include "db8500-regs.h" diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/devices.h similarity index 100% rename from arch/arm/mach-ux500/include/mach/devices.h rename to arch/arm/mach-ux500/devices.h diff --git a/arch/arm/mach-ux500/hotplug.c b/arch/arm/mach-ux500/hotplug.c index 2f6af25..87abcf2 100644 --- a/arch/arm/mach-ux500/hotplug.c +++ b/arch/arm/mach-ux500/hotplug.c @@ -15,7 +15,7 @@ #include <asm/cacheflush.h> #include <asm/smp_plat.h> -#include <mach/setup.h> +#include "setup.h" /* * platform-specific code to shutdown a CPU diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c index a847cf2..0d33d1a 100644 --- a/arch/arm/mach-ux500/id.c +++ b/arch/arm/mach-ux500/id.c @@ -14,7 +14,7 @@ #include <asm/cacheflush.h> #include <asm/mach/map.h> -#include <mach/setup.h> +#include "setup.h" #include "db8500-regs.h" #include "id.h" diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 8a9c070..12ad8ad 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -22,7 +22,7 @@ #include <asm/smp_plat.h> #include <asm/smp_scu.h> -#include <mach/setup.h> +#include "setup.h" #include "db8500-regs.h" #include "id.h" diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/setup.h similarity index 100% rename from arch/arm/mach-ux500/include/mach/setup.h rename to arch/arm/mach-ux500/setup.h diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index 5952161..b6bd0ef 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -14,7 +14,7 @@ #include <asm/smp_twd.h> -#include <mach/setup.h> +#include "setup.h" #include "irqs.h" #include "db8500-regs.h" diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index 4f34093..54f3d11 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -17,8 +17,6 @@ #include <asm/sched_clock.h> -#include <mach/setup.h> - #define RATE_32K 32768 #define TIMER_MODE_CONTINOUS 0x1 -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 8/9] ARM: ux500: move to multiplatform 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann ` (6 preceding siblings ...) 2013-03-21 21:51 ` [PATCH 7/9] ARM: ux500: make remaining headers local Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 9/9] ARM: ux500: build hotplug.o for ARMv7-a Arnd Bergmann 2013-03-22 13:21 ` [PATCH 0/9] More ux500 multiplatform stuff Linus Walleij 9 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel Nothing is holding us up any more, and we can make ux500 coexist with the rest of the platforms. The timex.h and uncompress.h headers are no longer needed now. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm/Kconfig | 16 -------- arch/arm/mach-ux500/Kconfig | 14 +++++++ arch/arm/mach-ux500/include/mach/timex.h | 6 --- arch/arm/mach-ux500/include/mach/uncompress.h | 58 --------------------------- 4 files changed, 14 insertions(+), 80 deletions(-) delete mode 100644 arch/arm/mach-ux500/include/mach/timex.h delete mode 100644 arch/arm/mach-ux500/include/mach/uncompress.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a4cfede..2de2084 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -888,22 +888,6 @@ config ARCH_U300 help Support for ST-Ericsson U300 series mobile platforms. -config ARCH_U8500 - bool "ST-Ericsson U8500 Series" - depends on MMU - select ARCH_HAS_CPUFREQ - select ARCH_REQUIRE_GPIOLIB - select ARM_AMBA - select CLKDEV_LOOKUP - select CPU_V7 - select GENERIC_CLOCKEVENTS - select HAVE_SMP - select MIGHT_HAVE_CACHE_L2X0 - select SPARSE_IRQ - help - Support for ST-Ericsson's Ux500 architecture - - config ARCH_DAVINCI bool "TI DaVinci" select ARCH_HAS_HOLES_MEMORYMODEL diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 3e5bbd0..eeea3bf 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig @@ -1,3 +1,17 @@ +config ARCH_U8500 + bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7 + depends on MMU + select ARCH_HAS_CPUFREQ + select ARCH_REQUIRE_GPIOLIB + select ARM_AMBA + select CLKDEV_LOOKUP + select CPU_V7 + select GENERIC_CLOCKEVENTS + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 + help + Support for ST-Ericsson's Ux500 architecture + if ARCH_U8500 config UX500_SOC_COMMON diff --git a/arch/arm/mach-ux500/include/mach/timex.h b/arch/arm/mach-ux500/include/mach/timex.h deleted file mode 100644 index d0942c1..0000000 --- a/arch/arm/mach-ux500/include/mach/timex.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -#define CLOCK_TICK_RATE 110000000 - -#endif diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h deleted file mode 100644 index 533a004..0000000 --- a/arch/arm/mach-ux500/include/mach/uncompress.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (C) 2009 ST-Ericsson - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <linux/io.h> -#include <linux/amba/serial.h> -/* TODO: This goes away in multiplatform boot, this file gets deleted */ -#include "../../db8500-regs.h" - -void __iomem *ux500_uart_base; - -static void putc(const char c) -{ - /* Do nothing if the UART is not enabled. */ - if (!(__raw_readb(ux500_uart_base + UART011_CR) & 0x1)) - return; - - if (c == '\n') - putc('\r'); - - while (__raw_readb(ux500_uart_base + UART01x_FR) & (1 << 5)) - barrier(); - __raw_writeb(c, ux500_uart_base + UART01x_DR); -} - -static void flush(void) -{ - if (!(__raw_readb(ux500_uart_base + UART011_CR) & 0x1)) - return; - while (__raw_readb(ux500_uart_base + UART01x_FR) & (1 << 3)) - barrier(); -} - -static inline void arch_decomp_setup(void) -{ - /* Use machine_is_foo() macro if you need to switch base someday */ - ux500_uart_base = (void __iomem *)U8500_UART2_BASE; -} - -#endif /* __ASM_ARCH_UNCOMPRESS_H */ -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 9/9] ARM: ux500: build hotplug.o for ARMv7-a 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann ` (7 preceding siblings ...) 2013-03-21 21:51 ` [PATCH 8/9] ARM: ux500: move to multiplatform Arnd Bergmann @ 2013-03-21 21:51 ` Arnd Bergmann 2013-03-22 13:21 ` [PATCH 0/9] More ux500 multiplatform stuff Linus Walleij 9 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-21 21:51 UTC (permalink / raw) To: linux-arm-kernel If we try to build this file in a multiplatform configuration with ARMv6 enabled, gas complains about the dsb operation being undefined. Adding -march=armv7-a is safe because that code is only ever run on ux500, which is Cortex-A9. Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm/mach-ux500/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile index f24710d..4d91505 100644 --- a/arch/arm/mach-ux500/Makefile +++ b/arch/arm/mach-ux500/Makefile @@ -15,3 +15,5 @@ obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \ board-mop500-audio.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o + +CFLAGS_hotplug.o += -march=armv7-a -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 0/9] More ux500 multiplatform stuff 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann ` (8 preceding siblings ...) 2013-03-21 21:51 ` [PATCH 9/9] ARM: ux500: build hotplug.o for ARMv7-a Arnd Bergmann @ 2013-03-22 13:21 ` Linus Walleij 2013-03-22 13:34 ` Arnd Bergmann 9 siblings, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-22 13:21 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: > Your patches from this morning made me curious about how much is still > missing to actually enable multiplatform support on ux500. On the surface of it, not that much as you see :-D > This is > what I came up with, on top of your patches. Feel free to take what > you need if you don't already have the same patches. > > I've successfully built "allmodconfig" with all the other v6/v7 > platforms enabled as well. Unfortunately the platform stops booting after 2/9 "ARM: ux500: split out prcmu initialization" so I will look closer at this. This patch: "ARM: ux500: kill mach/hardware.h some more" I will squash into the actual removal patch, it's just some sloppy work by me :-/ I will try to move some of the patches to the front of the series so we only have the tricky stuff to fix. And there are some non-bisectable patches due to the driver in staging (which was put there because Synaptics would submit another driver "real soon now" and that was something like two years ago), so I might have to squash some of them together to one. Thanks! Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 0/9] More ux500 multiplatform stuff 2013-03-22 13:21 ` [PATCH 0/9] More ux500 multiplatform stuff Linus Walleij @ 2013-03-22 13:34 ` Arnd Bergmann 2013-03-22 13:36 ` Linus Walleij 2013-03-22 14:39 ` Linus Walleij 0 siblings, 2 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-22 13:34 UTC (permalink / raw) To: linux-arm-kernel On Friday 22 March 2013, Linus Walleij wrote: > On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: > > This is > > what I came up with, on top of your patches. Feel free to take what > > you need if you don't already have the same patches. > > > > I've successfully built "allmodconfig" with all the other v6/v7 > > platforms enabled as well. > > Unfortunately the platform stops booting after > 2/9 "ARM: ux500: split out prcmu initialization" > so I will look closer at this. Yes, I can see how it has potential for introducing bugs. I hope it's something obvious that you can find easily. > This patch: > "ARM: ux500: kill mach/hardware.h some more" > I will squash into the actual removal patch, it's just > some sloppy work by me :-/ Yes, I expected that. > I will try to move some of the patches to the > front of the series so we only have the tricky stuff to > fix. Ok. > And there are some non-bisectable patches due to the > driver in staging (which was put there because Synaptics would > submit another driver "real soon now" and that was something like > two years ago), so I might have to squash some of them together to one. What breaks bisection here? The "[PATCH 5/9] staging: ste_rmi4: kill platform_data hack" patch should be independent of everything else, it just touches more files than we'd like. Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 0/9] More ux500 multiplatform stuff 2013-03-22 13:34 ` Arnd Bergmann @ 2013-03-22 13:36 ` Linus Walleij 2013-03-22 14:16 ` Arnd Bergmann 2013-03-22 14:39 ` Linus Walleij 1 sibling, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-22 13:36 UTC (permalink / raw) To: linux-arm-kernel On Fri, Mar 22, 2013 at 2:34 PM, Arnd Bergmann <arnd@arndb.de> wrote: > [Me] >> And there are some non-bisectable patches due to the >> driver in staging (which was put there because Synaptics would >> submit another driver "real soon now" and that was something like >> two years ago), so I might have to squash some of them together to one. > > What breaks bisection here? The "[PATCH 5/9] staging: ste_rmi4: kill > platform_data hack" patch should be independent of everything else, > it just touches more files than we'd like. It includes <mach/irqs.h> that is removed by earlier patches, so it stops compiling before this patch. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 0/9] More ux500 multiplatform stuff 2013-03-22 13:36 ` Linus Walleij @ 2013-03-22 14:16 ` Arnd Bergmann 0 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-22 14:16 UTC (permalink / raw) To: linux-arm-kernel On Friday 22 March 2013, Linus Walleij wrote: > On Fri, Mar 22, 2013 at 2:34 PM, Arnd Bergmann <arnd@arndb.de> wrote: > > [Me] > >> And there are some non-bisectable patches due to the > >> driver in staging (which was put there because Synaptics would > >> submit another driver "real soon now" and that was something like > >> two years ago), so I might have to squash some of them together to one. > > > > What breaks bisection here? The "[PATCH 5/9] staging: ste_rmi4: kill > > platform_data hack" patch should be independent of everything else, > > it just touches more files than we'd like. > > It includes <mach/irqs.h> that is removed by earlier patches, so > it stops compiling before this patch. > Ah right. I think I reordered the patches in the end and must have gotten that one wrong. Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH 0/9] More ux500 multiplatform stuff 2013-03-22 13:34 ` Arnd Bergmann 2013-03-22 13:36 ` Linus Walleij @ 2013-03-22 14:39 ` Linus Walleij 2013-03-22 15:25 ` Arnd Bergmann 1 sibling, 1 reply; 49+ messages in thread From: Linus Walleij @ 2013-03-22 14:39 UTC (permalink / raw) To: linux-arm-kernel On Fri, Mar 22, 2013 at 2:34 PM, Arnd Bergmann <arnd@arndb.de> wrote: > On Friday 22 March 2013, Linus Walleij wrote: >> On Thu, Mar 21, 2013 at 10:51 PM, Arnd Bergmann <arnd@arndb.de> wrote: >> > This is >> > what I came up with, on top of your patches. Feel free to take what >> > you need if you don't already have the same patches. >> > >> > I've successfully built "allmodconfig" with all the other v6/v7 >> > platforms enabled as well. >> >> Unfortunately the platform stops booting after >> 2/9 "ARM: ux500: split out prcmu initialization" >> so I will look closer at this. > > Yes, I can see how it has potential for introducing bugs. I hope it's > something obvious that you can find easily. You bet: diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index bc8f870..8eb8c49 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2680,7 +2680,7 @@ static int db8500_irq_init(struct device_node *np, int irq_base) int i; /* In the device tree case, just take some IRQs */ - if (!np) + if (np) irq_base = 0; db8500_irq_domain = irq_domain_add_simple( After this the U8500 and U8520 boot to prompt with all the patches applied! Patches only need to be agreed upon and ACKed. I now feel confident that we can merge ux500 multiplatform support for v3.10. Yours, Linus Walleij ^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH 0/9] More ux500 multiplatform stuff 2013-03-22 14:39 ` Linus Walleij @ 2013-03-22 15:25 ` Arnd Bergmann 0 siblings, 0 replies; 49+ messages in thread From: Arnd Bergmann @ 2013-03-22 15:25 UTC (permalink / raw) To: linux-arm-kernel On Friday 22 March 2013, Linus Walleij wrote: > diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c > index bc8f870..8eb8c49 100644 > --- a/drivers/mfd/db8500-prcmu.c > +++ b/drivers/mfd/db8500-prcmu.c > @@ -2680,7 +2680,7 @@ static int db8500_irq_init(struct device_node > *np, int irq_base) > int i; > > /* In the device tree case, just take some IRQs */ > - if (!np) > + if (np) > irq_base = 0; > > db8500_irq_domain = irq_domain_add_simple( I think I dreamed about this bug last night but didn't remember until now, and I had not looked there to confirm ;-) > After this the U8500 and U8520 boot to prompt with all the patches > applied! Ah, very good. Arnd ^ permalink raw reply [flat|nested] 49+ messages in thread
end of thread, other threads:[~2013-03-25 18:00 UTC | newest] Thread overview: 49+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2013-03-21 11:49 [PATCH 0/6] ARM: ux500: first multiplatform series Linus Walleij 2013-03-21 11:49 ` [PATCH 1/6] ARM: ux500: move debugmacro to debug includes Linus Walleij 2013-03-21 12:06 ` Arnd Bergmann 2013-03-21 11:49 ` [PATCH 2/6] clk: ux500: pass clock base adresses in init call Linus Walleij 2013-03-21 12:10 ` Arnd Bergmann 2013-03-21 14:05 ` Ulf Hansson 2013-03-21 17:50 ` Mike Turquette 2013-03-21 11:49 ` [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall Linus Walleij 2013-03-21 12:11 ` Arnd Bergmann 2013-03-21 14:01 ` Ulf Hansson 2013-03-21 11:49 ` [PATCH 4/6] mfd: db8500-prcmu: get base address from resource Linus Walleij 2013-03-21 12:15 ` Arnd Bergmann 2013-03-21 17:10 ` Linus Walleij 2013-03-21 19:07 ` Arnd Bergmann 2013-03-21 20:26 ` Loic PALLARDY 2013-03-21 11:49 ` [PATCH 5/6] ARM: ux500: move PRCMU functions into the CPUidle driver Linus Walleij 2013-03-21 12:14 ` Rickard Andersson 2013-03-21 12:30 ` Daniel Lezcano 2013-03-22 8:30 ` Rickard Andersson 2013-03-25 13:44 ` Linus Walleij 2013-03-25 13:58 ` Daniel Lezcano 2013-03-25 14:10 ` Linus Walleij 2013-03-25 14:11 ` Arnd Bergmann 2013-03-25 14:36 ` Linus Walleij 2013-03-25 15:13 ` Arnd Bergmann 2013-03-25 15:48 ` Linus Walleij 2013-03-21 11:49 ` [PATCH 6/6] ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> Linus Walleij 2013-03-21 12:21 ` Arnd Bergmann 2013-03-21 21:51 ` [PATCH 0/9] More ux500 multiplatform stuff Arnd Bergmann 2013-03-21 21:51 ` [PATCH 1/9] ARM: ux500: move mach/msp.h to include/linux/platform_data.h Arnd Bergmann 2013-03-21 21:51 ` [PATCH 2/9] ARM: ux500: split out prcmu initialization Arnd Bergmann 2013-03-21 21:51 ` [PATCH 3/9] ARM: ux500: make irqs.h local to platform Arnd Bergmann 2013-03-21 21:51 ` [PATCH 4/9] ARM: ux500: kill mach/hardware.h some more Arnd Bergmann 2013-03-21 21:51 ` [PATCH 5/9] staging: ste_rmi4: kill platform_data hack Arnd Bergmann 2013-03-25 13:12 ` Linus Walleij 2013-03-25 18:00 ` Greg KH 2013-03-21 21:51 ` [PATCH 6/9] power: pm2301_charger: remove __devinit annotations Arnd Bergmann 2013-03-22 12:14 ` Linus Walleij 2013-03-22 15:16 ` Anton Vorontsov 2013-03-25 3:09 ` Anton Vorontsov 2013-03-21 21:51 ` [PATCH 7/9] ARM: ux500: make remaining headers local Arnd Bergmann 2013-03-21 21:51 ` [PATCH 8/9] ARM: ux500: move to multiplatform Arnd Bergmann 2013-03-21 21:51 ` [PATCH 9/9] ARM: ux500: build hotplug.o for ARMv7-a Arnd Bergmann 2013-03-22 13:21 ` [PATCH 0/9] More ux500 multiplatform stuff Linus Walleij 2013-03-22 13:34 ` Arnd Bergmann 2013-03-22 13:36 ` Linus Walleij 2013-03-22 14:16 ` Arnd Bergmann 2013-03-22 14:39 ` Linus Walleij 2013-03-22 15:25 ` Arnd Bergmann
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