[PATCH 0/6] clk: sunxi: gates support

[emilio@elopez.com.ar (Emilio López)]

Hi,

This patchset adds support for the main sunxi gates; namely, those found 
on AXI, AHB, APB0 and APB1 clocks. The series depends on Maxime's UART 
rework and on the basic sunxi clock driver by me.

Patches 1 and 2 implement the actual gate support, and patch 3 switches 
the UARTs to use the correct gates now that they are available.

Patch 4 and 5 add clock support to our pinctrl driver, as we need to 
keep the pio clock running for gpio to work.

Patch 6 drops the ignore flags; now that we have actual clock users that 
will keep the important clocks running.

Thanks,

Emilio

Emilio L?pez (6):
  clk: sunxi: Add support for AXI, AHB, APB0 and APB1 gates
  arm: sunxi: Add clock definitions for AXI, AHB, APB0, APB1 gates
  arm: sunxi: use the right clock phandles for UARTs
  pinctrl: sunxi: add clock support
  arm: sunxi: Add clock to pinctrl node
  clk: sunxi: drop CLK_IGNORE_UNUSED

 Documentation/devicetree/bindings/clock/sunxi.txt | 108 +++++++++++++++++++++-
 arch/arm/boot/dts/sun4i-a10.dtsi                  |  13 +--
 arch/arm/boot/dts/sun5i-a13.dtsi                  |   1 +
 arch/arm/boot/dts/sunxi.dtsi                      |  53 ++++++++++-
 drivers/clk/sunxi/clk-sunxi.c                     |  98 +++++++++++++++++++-
 drivers/pinctrl/pinctrl-sunxi.c                   |   8 ++
 6 files changed, 267 insertions(+), 14 deletions(-)

-- 
1.8.2