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* [PATCH] drm/i915: fix Haswell pfit power well check
@ 2013-05-02 22:24 Jesse Barnes
  2013-05-02 22:30 ` [PATCH] drm/i915: fix Haswell pfit power well check v2 Jesse Barnes
  0 siblings, 1 reply; 6+ messages in thread
From: Jesse Barnes @ 2013-05-02 22:24 UTC (permalink / raw)
  To: intel-gfx

We can't read the pfit regs if the power well is off, so use the cached
value.

However, I think this check is incorrect (it was taken from an earlier
check against dev_priv).  We should probably just drop it altogether,
since the panel fitter isn't useful without a pipe to fetch from and
an encoder to feed.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6504337..c451940 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5917,8 +5917,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
 		/* XXX: Should check for edp transcoder here, but thanks to init
 		 * sequence that's not yet available. Just in case desktop eDP
 		 * on PORT D is possible on haswell, too. */
-		/* Even the eDP panel fitter is outside the always-on well. */
-		if (I915_READ(PF_WIN_SZ(crtc->pipe)))
+		if (crtc->config.pch_pfit.size)
 			enable = true;
 	}
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH] drm/i915: fix Haswell pfit power well check v2
  2013-05-02 22:24 [PATCH] drm/i915: fix Haswell pfit power well check Jesse Barnes
@ 2013-05-02 22:30 ` Jesse Barnes
  2013-05-03 11:22   ` Daniel Vetter
  2013-05-03 12:55   ` Mika Kuoppala
  0 siblings, 2 replies; 6+ messages in thread
From: Jesse Barnes @ 2013-05-02 22:30 UTC (permalink / raw)
  To: intel-gfx

We can't read the pfit regs if the power well is off, so use the cached
value.

v2: re-add lost comment (Jesse)
    make sure the crtc using the fitter is actually enabled (Jesse)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6504337..6be34f2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5918,7 +5918,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
 		 * sequence that's not yet available. Just in case desktop eDP
 		 * on PORT D is possible on haswell, too. */
 		/* Even the eDP panel fitter is outside the always-on well. */
-		if (I915_READ(PF_WIN_SZ(crtc->pipe)))
+		if (crtc->config.pch_pfit.size && crtc->base.enabled)
 			enable = true;
 	}
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: fix Haswell pfit power well check v2
  2013-05-02 22:30 ` [PATCH] drm/i915: fix Haswell pfit power well check v2 Jesse Barnes
@ 2013-05-03 11:22   ` Daniel Vetter
  2013-05-03 12:55   ` Mika Kuoppala
  1 sibling, 0 replies; 6+ messages in thread
From: Daniel Vetter @ 2013-05-03 11:22 UTC (permalink / raw)
  To: Jesse Barnes; +Cc: intel-gfx

On Fri, May 3, 2013 at 12:30 AM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> We can't read the pfit regs if the power well is off, so use the cached
> value.
>
> v2: re-add lost comment (Jesse)
>     make sure the crtc using the fitter is actually enabled (Jesse)
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Just a quick maintainer bikeshed: For fixups I highly prefer a quick
git commit citation of the regressing commit plus all the cc+reviewers
of the original patch in the cc section of this one. Just so that
reviewers don't miss a good chance to learn something.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6504337..6be34f2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5918,7 +5918,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
>                  * sequence that's not yet available. Just in case desktop eDP
>                  * on PORT D is possible on haswell, too. */
>                 /* Even the eDP panel fitter is outside the always-on well. */
> -               if (I915_READ(PF_WIN_SZ(crtc->pipe)))
> +               if (crtc->config.pch_pfit.size && crtc->base.enabled)
>                         enable = true;
>         }
>
> --
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: fix Haswell pfit power well check v2
  2013-05-02 22:30 ` [PATCH] drm/i915: fix Haswell pfit power well check v2 Jesse Barnes
  2013-05-03 11:22   ` Daniel Vetter
@ 2013-05-03 12:55   ` Mika Kuoppala
  2013-05-03 15:01     ` Paulo Zanoni
  1 sibling, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2013-05-03 12:55 UTC (permalink / raw)
  To: Jesse Barnes, intel-gfx

Jesse Barnes <jbarnes@virtuousgeek.org> writes:

> We can't read the pfit regs if the power well is off, so use the cached
> value.
>
> v2: re-add lost comment (Jesse)
>     make sure the crtc using the fitter is actually enabled (Jesse)
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6504337..6be34f2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5918,7 +5918,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
>  		 * sequence that's not yet available. Just in case desktop eDP
>  		 * on PORT D is possible on haswell, too. */
>  		/* Even the eDP panel fitter is outside the always-on well. */
> -		if (I915_READ(PF_WIN_SZ(crtc->pipe)))
> +		if (crtc->config.pch_pfit.size && crtc->base.enabled)
>  			enable = true;
>  	}
>

Remove the now useless *dev_priv to remove compiler warning and then add

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: fix Haswell pfit power well check v2
  2013-05-03 12:55   ` Mika Kuoppala
@ 2013-05-03 15:01     ` Paulo Zanoni
  2013-05-03 16:22       ` Daniel Vetter
  0 siblings, 1 reply; 6+ messages in thread
From: Paulo Zanoni @ 2013-05-03 15:01 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

2013/5/3 Mika Kuoppala <mika.kuoppala@linux.intel.com>:
> Jesse Barnes <jbarnes@virtuousgeek.org> writes:
>
>> We can't read the pfit regs if the power well is off, so use the cached
>> value.
>>
>> v2: re-add lost comment (Jesse)
>>     make sure the crtc using the fitter is actually enabled (Jesse)
>>
>> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>> ---
>>  drivers/gpu/drm/i915/intel_display.c |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index 6504337..6be34f2 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -5918,7 +5918,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
>>                * sequence that's not yet available. Just in case desktop eDP
>>                * on PORT D is possible on haswell, too. */
>>               /* Even the eDP panel fitter is outside the always-on well. */
>> -             if (I915_READ(PF_WIN_SZ(crtc->pipe)))
>> +             if (crtc->config.pch_pfit.size && crtc->base.enabled)
>>                       enable = true;
>>       }
>>
>
> Remove the now useless *dev_priv to remove compiler warning and then add
>
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

Yay, dmesg is clean again with this patch + Daniel's patch 06 + my
local patches which I'll resend today.

With the warn pointed by Mika removed:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: fix Haswell pfit power well check v2
  2013-05-03 15:01     ` Paulo Zanoni
@ 2013-05-03 16:22       ` Daniel Vetter
  0 siblings, 0 replies; 6+ messages in thread
From: Daniel Vetter @ 2013-05-03 16:22 UTC (permalink / raw)
  To: Paulo Zanoni; +Cc: intel-gfx

On Fri, May 03, 2013 at 12:01:49PM -0300, Paulo Zanoni wrote:
> 2013/5/3 Mika Kuoppala <mika.kuoppala@linux.intel.com>:
> > Jesse Barnes <jbarnes@virtuousgeek.org> writes:
> >
> >> We can't read the pfit regs if the power well is off, so use the cached
> >> value.
> >>
> >> v2: re-add lost comment (Jesse)
> >>     make sure the crtc using the fitter is actually enabled (Jesse)
> >>
> >> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >> ---
> >>  drivers/gpu/drm/i915/intel_display.c |    2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index 6504337..6be34f2 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -5918,7 +5918,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
> >>                * sequence that's not yet available. Just in case desktop eDP
> >>                * on PORT D is possible on haswell, too. */
> >>               /* Even the eDP panel fitter is outside the always-on well. */
> >> -             if (I915_READ(PF_WIN_SZ(crtc->pipe)))
> >> +             if (crtc->config.pch_pfit.size && crtc->base.enabled)
> >>                       enable = true;
> >>       }
> >>
> >
> > Remove the now useless *dev_priv to remove compiler warning and then add
> >
> > Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> 
> Yay, dmesg is clean again with this patch + Daniel's patch 06 + my
> local patches which I'll resend today.
> 
> With the warn pointed by Mika removed:
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2013-05-03 16:19 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-05-02 22:24 [PATCH] drm/i915: fix Haswell pfit power well check Jesse Barnes
2013-05-02 22:30 ` [PATCH] drm/i915: fix Haswell pfit power well check v2 Jesse Barnes
2013-05-03 11:22   ` Daniel Vetter
2013-05-03 12:55   ` Mika Kuoppala
2013-05-03 15:01     ` Paulo Zanoni
2013-05-03 16:22       ` Daniel Vetter

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