[PATCH 0/3] MIPS: Repair some of the microMIPS patches.

[PATCH 0/3] MIPS: Repair some of the microMIPS patches.

[David Daney]

From: David Daney <david.daney@cavium.com>

These are a few things I noticed while working on unrelated code.
They should make the kernel smaller for systems that don't have
microMIPS.

David Daney (3):
  MIPS: Declare emulate_load_store_microMIPS as a static function.
  MIPS: Don't try to decode microMIPS branch instructions where they
    cannot exist.
  MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS

 arch/mips/include/asm/cpu-features.h | 6 +++++-
 arch/mips/kernel/unaligned.c         | 3 ++-
 arch/mips/math-emu/cp1emu.c          | 3 +++
 3 files changed, 10 insertions(+), 2 deletions(-)

-- 
1.7.11.7

[PATCH 1/3] MIPS: Declare emulate_load_store_microMIPS as a static function.

[David Daney]

From: David Daney <david.daney@cavium.com>

It is only used from within a single file, it should not be globally
visible.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
---
 arch/mips/kernel/unaligned.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 203d885..5563e9b 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -684,7 +684,8 @@ const int reg16to32[] = { 16, 17, 2, 3, 4, 5, 6, 7 };
 /* Recode table from 16-bit STORE register notation to 32-bit GPR. */
 const int reg16to32st[] = { 0, 17, 2, 3, 4, 5, 6, 7 };
 
-void emulate_load_store_microMIPS(struct pt_regs *regs, void __user * addr)
+static void emulate_load_store_microMIPS(struct pt_regs *regs,
+					 void __user *addr)
 {
 	unsigned long value;
 	unsigned int res;
-- 
1.7.11.7

[PATCH 2/3] MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.

[David Daney]

From: David Daney <david.daney@cavium.com>

In mm_isBranchInstr() we can short circuit the entire function if
!cpu_has_mmips.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
---
 arch/mips/math-emu/cp1emu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index f03771900..e773659 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -471,6 +471,9 @@ int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
 	unsigned int fcr31;
 	unsigned int bit;
 
+	if (!cpu_has_mmips)
+		return 0;
+
 	switch (insn.mm_i_format.opcode) {
 	case mm_pool32a_op:
 		if ((insn.mm_i_format.simmediate & MM_POOL32A_MINOR_MASK) ==
-- 
1.7.11.7

[PATCH 3/3] MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS

[David Daney]

From: David Daney <david.daney@cavium.com>

As Jonas Gorske said in his patch:

   Disable cpu_has_mmips for everything but SEAD3 and MALTA. Most of
   these platforms are from before the micromips introduction, so they
   are very unlikely to implement it.

   Reduces an -Os compiled, uncompressed kernel image by 8KiB for
   BCM63XX.

This patch taks a different approach than his, we gate the runtime
test for microMIPS by the config symbol SYS_SUPPORTS_MICROMIPS.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
---
 arch/mips/include/asm/cpu-features.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index e5ec8fc..2cdfd24 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -99,7 +99,11 @@
 #define cpu_has_rixi		(cpu_data[0].options & MIPS_CPU_RIXI)
 #endif
 #ifndef cpu_has_mmips
-#define cpu_has_mmips		(cpu_data[0].options & MIPS_CPU_MICROMIPS)
+# ifdef CONFIG_SYS_SUPPORTS_MICROMIPS
+#  define cpu_has_mmips		(cpu_data[0].options & MIPS_CPU_MICROMIPS)
+# else
+#  define cpu_has_mmips		0
+# endif
 #endif
 #ifndef cpu_has_vtag_icache
 #define cpu_has_vtag_icache	(cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
-- 
1.7.11.7

Re: [PATCH 1/3] MIPS: Declare emulate_load_store_microMIPS as a static function.

[Steven J. Hill]

On 05/24/2013 04:54 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> It is only used from within a single file, it should not be globally
> visible.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>

Re: [PATCH 1/3] MIPS: Declare emulate_load_store_microMIPS as a static function.

[Steven J. Hill]

On 05/24/2013 04:54 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> It is only used from within a single file, it should not be globally
> visible.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>

Re: [PATCH 2/3] MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.

[Steven J. Hill]

On 05/24/2013 04:54 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> In mm_isBranchInstr() we can short circuit the entire function if
> !cpu_has_mmips.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>

Re: [PATCH 2/3] MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.

[Steven J. Hill]

On 05/24/2013 04:54 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> In mm_isBranchInstr() we can short circuit the entire function if
> !cpu_has_mmips.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>

Re: [PATCH 3/3] MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS

[Steven J. Hill]

On 05/24/2013 04:54 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> As Jonas Gorske said in his patch:
>
>     Disable cpu_has_mmips for everything but SEAD3 and MALTA. Most of
>     these platforms are from before the micromips introduction, so they
>     are very unlikely to implement it.
>
>     Reduces an -Os compiled, uncompressed kernel image by 8KiB for
>     BCM63XX.
>
> This patch taks a different approach than his, we gate the runtime
> test for microMIPS by the config symbol SYS_SUPPORTS_MICROMIPS.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Cc: Jonas Gorski <jogo@openwrt.org>
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>

Re: [PATCH 3/3] MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS

[Steven J. Hill]

On 05/24/2013 04:54 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> As Jonas Gorske said in his patch:
>
>     Disable cpu_has_mmips for everything but SEAD3 and MALTA. Most of
>     these platforms are from before the micromips introduction, so they
>     are very unlikely to implement it.
>
>     Reduces an -Os compiled, uncompressed kernel image by 8KiB for
>     BCM63XX.
>
> This patch taks a different approach than his, we gate the runtime
> test for microMIPS by the config symbol SYS_SUPPORTS_MICROMIPS.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Cc: Jonas Gorski <jogo@openwrt.org>
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>

Re: [PATCH 3/3] MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS

[Ralf Baechle]

On Fri, May 24, 2013 at 02:54:10PM -0700, David Daney wrote:

> From: David Daney <david.daney@cavium.com>
> 
> As Jonas Gorske said in his patch:
> 
>    Disable cpu_has_mmips for everything but SEAD3 and MALTA. Most of
>    these platforms are from before the micromips introduction, so they
>    are very unlikely to implement it.
> 
>    Reduces an -Os compiled, uncompressed kernel image by 8KiB for
>    BCM63XX.
> 
> This patch taks a different approach than his, we gate the runtime
> test for microMIPS by the config symbol SYS_SUPPORTS_MICROMIPS.

Sounds like a good approach also for other ASEs.

Applied.

  Ralf