From: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
Prashant Gaikwad
<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 0/2] PLL m,n,p init from SoC files
Date: Wed, 5 Jun 2013 16:51:24 +0300 [thread overview]
Message-ID: <1370440301-3562-1-git-send-email-pdeschrijver@nvidia.com> (raw)
The m,n,p fields don't have the same bit offset and width across all PLLs.
This patchset allows SoC specific files to indicate the offset and width.
It also provides the data for Tegra114.
Peter De Schrijver (2):
clk: tegra: allow PLL m,n,p init from SoC files
clk: tegra: PLL m,n,p init for Tegra114
drivers/clk/tegra/clk-pll.c | 60 ++++++++++++++++-------------
drivers/clk/tegra/clk-tegra114.c | 77 ++++++++++++++++++++++++++++++++++++++
drivers/clk/tegra/clk.h | 32 ++++++++++------
3 files changed, 130 insertions(+), 39 deletions(-)
--
1.7.7.rc0.72.g4b5ea.dirty
WARNING: multiple messages have this Message-ID (diff)
From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: <linux-arm-kernel@lists.infradead.org>, <mturquette@linaro.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Thierry Reding <thierry.reding@gmail.com>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH 0/2] PLL m,n,p init from SoC files
Date: Wed, 5 Jun 2013 16:51:24 +0300 [thread overview]
Message-ID: <1370440301-3562-1-git-send-email-pdeschrijver@nvidia.com> (raw)
The m,n,p fields don't have the same bit offset and width across all PLLs.
This patchset allows SoC specific files to indicate the offset and width.
It also provides the data for Tegra114.
Peter De Schrijver (2):
clk: tegra: allow PLL m,n,p init from SoC files
clk: tegra: PLL m,n,p init for Tegra114
drivers/clk/tegra/clk-pll.c | 60 ++++++++++++++++-------------
drivers/clk/tegra/clk-tegra114.c | 77 ++++++++++++++++++++++++++++++++++++++
drivers/clk/tegra/clk.h | 32 ++++++++++------
3 files changed, 130 insertions(+), 39 deletions(-)
--
1.7.7.rc0.72.g4b5ea.dirty
WARNING: multiple messages have this Message-ID (diff)
From: pdeschrijver@nvidia.com (Peter De Schrijver)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/2] PLL m,n,p init from SoC files
Date: Wed, 5 Jun 2013 16:51:24 +0300 [thread overview]
Message-ID: <1370440301-3562-1-git-send-email-pdeschrijver@nvidia.com> (raw)
The m,n,p fields don't have the same bit offset and width across all PLLs.
This patchset allows SoC specific files to indicate the offset and width.
It also provides the data for Tegra114.
Peter De Schrijver (2):
clk: tegra: allow PLL m,n,p init from SoC files
clk: tegra: PLL m,n,p init for Tegra114
drivers/clk/tegra/clk-pll.c | 60 ++++++++++++++++-------------
drivers/clk/tegra/clk-tegra114.c | 77 ++++++++++++++++++++++++++++++++++++++
drivers/clk/tegra/clk.h | 32 ++++++++++------
3 files changed, 130 insertions(+), 39 deletions(-)
--
1.7.7.rc0.72.g4b5ea.dirty
next reply other threads:[~2013-06-05 13:51 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-05 13:51 Peter De Schrijver [this message]
2013-06-05 13:51 ` [PATCH 0/2] PLL m,n,p init from SoC files Peter De Schrijver
2013-06-05 13:51 ` Peter De Schrijver
[not found] ` <1370440301-3562-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-05 13:51 ` [PATCH 1/2] clk: tegra: allow " Peter De Schrijver
2013-06-05 13:51 ` Peter De Schrijver
2013-06-05 13:51 ` Peter De Schrijver
2013-06-05 13:51 ` [PATCH 2/2] clk: tegra: PLL m,n,p init for Tegra114 Peter De Schrijver
2013-06-05 13:51 ` Peter De Schrijver
2013-06-05 13:51 ` Peter De Schrijver
2013-06-05 13:54 ` [PATCH 0/2] PLL m,n,p init from SoC files Peter De Schrijver
2013-06-05 13:54 ` Peter De Schrijver
2013-06-05 13:54 ` Peter De Schrijver
2013-06-05 16:25 ` Stephen Warren
2013-06-05 16:25 ` Stephen Warren
2013-06-05 16:25 ` Stephen Warren
2013-06-12 0:39 ` Mike Turquette
2013-06-12 0:39 ` Mike Turquette
2013-06-12 0:39 ` Mike Turquette
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