[U-Boot] [PATCH 1/7 v6] powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL

[U-Boot] [PATCH 1/7 v6] powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL

[ying.zhang at freescale.com]

From: Ying Zhang <b40530@freescale.com>

1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "boot from SD card/SPI flash with SPL".
2. Split from "Add the symbol for the minimal SPL used to eliminate
    unused code"
3. Give up new symbol and delete the line
    ifndef CONFIG_SPL_BUILD in common/env_common.c
4. Use !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL)
    to replace to new symbols.
5. No change.

 arch/powerpc/cpu/mpc85xx/tlb.c |    3 ++-
 arch/powerpc/cpu/mpc8xxx/law.c |    6 ++++--
 include/configs/MPC8313ERDB.h  |    1 -
 include/configs/P1022DS.h      |    1 -
 include/configs/p1_p2_rdb_pc.h |    1 -
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 0dff37f..b903d02 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -55,7 +55,8 @@ void init_tlbs(void)
 	return ;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
 		       phys_addr_t *rpn)
 {
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 6f9d568..6c0a307 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -92,7 +92,8 @@ void disable_law(u8 idx)
 	return;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 static int get_law_entry(u8 i, struct law_entry *e)
 {
 	u32 lawar;
@@ -122,7 +123,8 @@ int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 	return idx;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 {
 	u32 idx;
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 1d753e7..0c15195 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -40,7 +40,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
 #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 9c27182..bcbda30 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -41,7 +41,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 2fa5372..b35b966 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -159,7 +159,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
 
-- 
1.7.0.4

[U-Boot] [PATCH 2/7 v6] spl: env_common.c: add new symbol CONFIG_SPL_ENV_IMPORT to contain function env_import

[ying.zhang at freescale.com]

From: Ying Zhang <b40530@freescale.com>

The functionality env_import will be used in the SPL. They
had been excluded by ifndef CONFIG_SPL_BUILD. Now, add new
symbol CONFIG_SPL_ENV_IMPORT to contian the functionality
env_import in SPL.

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "boot from SD card/SPI flash with SPL".
2. Split from "spl: Make CONFIG_SPL_BUILD contain more functionality"
3. No change.
4. No change.
5. Add new symbol CONFIG_SPL_ENV_IMPORT

 README              |    3 +++
 common/env_common.c |    2 +-
 2 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/README b/README
index 137e8cb..8a6c26c 100644
--- a/README
+++ b/README
@@ -3046,6 +3046,9 @@ FIT uImage format:
 		It conflicts with SPL env from storage medium specified by
 		CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE
 
+		CONFIG_SPL_ENV_IMPORT
+		Support for importing the environment in SPL.
+
 		CONFIG_SPL_PAD_TO
 		Image offset to which the SPL should be padded before appending
 		the SPL payload. By default, this is defined as
diff --git a/common/env_common.c b/common/env_common.c
index 906b41f..1a36660 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -156,7 +156,7 @@ int set_default_vars(int nvars, char * const vars[])
 				H_NOCLEAR | H_INTERACTIVE, nvars, vars);
 }
 
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_ENV_IMPORT)
 /*
  * Check if CRC is valid and (if yes) import the environment.
  * Note that "buf" may or may not be aligned.
-- 
1.7.0.4

[U-Boot] [PATCH 3/7 v6] powerpc/p1022ds: boot from SD Card with SPL

[ying.zhang at freescale.com]

From: Ying Zhang <b40530@freescale.com>

This patch introduces SPL to enable a loader stub that runs in the L2 SRAM,
after being loaded by the code from the internal on-chip ROM. It loads the
final uboot image into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
	* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so
	that ddr spd code can get the interleaving mode setting in env. It
	loads final uboot image from offset 96KB.
	* final uboot image, size is variable depends on the functions
	enabled.

This patch is on top of the following patch:
    1. common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment
        in SPL.
    2. Makefile: move the common makefile line to public area
    3. powerpc/mpc85xx: support application without resetvec segment in the
        linker script.
    4. powerpc/mpc85xx: modify the function clear_bss and the end address of
        the BSS
    5. powerpc: spl: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and
        enabled some functionality for common SPL
    6. spl: env_common.c: add new symbol CONFIG_SPL_ENV_IMPORT to contain
	function env_import

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "boot from SD card/SPI flash with SPL".
2. No change.
3. No change.
4. No change.
5. Add new symbol CONFIG_SPL_ENV_IMPORT for contain
   the functionality env_import.

 README                                             |    7 +
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds            |    5 +
 .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c        |    4 +
 board/freescale/common/Makefile                    |    2 -
 board/freescale/p1022ds/Makefile                   |    3 +
 board/freescale/p1022ds/spl.c                      |  112 +++++++++++++++++
 board/freescale/p1022ds/tlb.c                      |    9 ++-
 doc/README.mpc85xx-sd-spi-boot                     |   81 ++++++++++++
 drivers/mmc/Makefile                               |    3 +
 drivers/mmc/fsl_esdhc_spl.c                        |  131 ++++++++++++++++++++
 drivers/mmc/mmc.c                                  |    2 +
 include/configs/P1022DS.h                          |   56 ++++++++-
 include/fsl_esdhc.h                                |    1 +
 spl/Makefile                                       |    3 +
 14 files changed, 409 insertions(+), 10 deletions(-)
 create mode 100644 board/freescale/p1022ds/spl.c
 create mode 100644 doc/README.mpc85xx-sd-spi-boot
 create mode 100644 drivers/mmc/fsl_esdhc_spl.c

diff --git a/README b/README
index 8a6c26c..b941a56 100644
--- a/README
+++ b/README
@@ -2995,6 +2995,13 @@ FIT uImage format:
 		Support for NAND boot using simple NAND drivers that
 		expose the cmd_ctrl() interface.
 
+		CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+		Set for the SPL on PPC mpc8xxx targets, support for
+		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
+
+		CONFIG_SPL_COMMON_INIT_DDR
+		Set for common ddr init with serial presence detect in
+		SPL binary.
 		CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
 		CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
 		CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 20284ed..8aeb1a0 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -60,6 +60,11 @@ SECTIONS
 	}
 	_edata  =  .;
 
+	. = .;
+	__start___ex_table = .;
+	__ex_table : { *(__ex_table) }
+	__stop___ex_table = .;
+
 	. = ALIGN(8);
 	__init_begin = .;
 	__init_end = .;
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index e958e13..56128a7 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -218,12 +218,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
 		if (dimm_params[i].n_ranks) {
 			if (dimm_params[i].registered_dimm) {
 				temp1 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected RDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			} else {
 				temp2 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected UDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			}
 		}
 	}
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 37236d0..e991def 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -61,9 +61,7 @@ COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
 COBJS-$(CONFIG_MPC8536DS)	+= ics307_clk.o
 COBJS-$(CONFIG_MPC8572DS)	+= ics307_clk.o
-ifndef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_P1022DS)		+= ics307_clk.o
-endif
 COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 COBJS-$(CONFIG_P3041DS)		+= ics307_clk.o
 COBJS-$(CONFIG_P4080DS)		+= ics307_clk.o
diff --git a/board/freescale/p1022ds/Makefile b/board/freescale/p1022ds/Makefile
index 0eeef05..9746063 100644
--- a/board/freescale/p1022ds/Makefile
+++ b/board/freescale/p1022ds/Makefile
@@ -24,6 +24,9 @@ ifdef MINIMAL
 COBJS-y        += spl_minimal.o tlb.o law.o
 
 else
+ifdef CONFIG_SPL_BUILD
+COBJS-y += spl.o
+endif
 COBJS-y	+= $(BOARD).o
 COBJS-y	+= ddr.o
 COBJS-y	+= law.o
diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c
new file mode 100644
index 0000000..40f000f
--- /dev/null
+++ b/board/freescale/p1022ds/spl.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <asm/fsl_law.h>
+#include <asm/fsl_ddr_sdram.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <i2c.h>
+#include "../common/ngpixis.h"
+#include <fsl_esdhc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const u32 sysclk_tbl[] = {
+	66666000, 7499900, 83332500, 8999900,
+	99999000, 11111000, 12499800, 13333200
+};
+
+ulong get_effective_memsize(void)
+{
+	return CONFIG_SYS_L2_SIZE;
+}
+
+void board_init_f(ulong bootflag)
+{
+	int px_spd;
+	u32 plat_ratio, sys_clk, bus_clk;
+	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+	console_init_f();
+
+	/* Set pmuxcr to allow both i2c1 and i2c2 */
+	setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
+	setbits_be32(&gur->pmuxcr,
+		in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
+
+	/* Read back the register to synchronize the write. */
+	in_be32(&gur->pmuxcr);
+
+	/* initialize selected port with appropriate baud rate */
+	px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
+	sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK];
+	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+	bus_clk = sys_clk * plat_ratio / 2;
+
+	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+			bus_clk / 16 / CONFIG_BAUDRATE);
+#ifdef CONFIG_SPL_MMC_BOOT
+	puts("\nSD boot...\n");
+#endif
+
+	/* copy code to RAM and jump to it - this should not return */
+	/* NOTE - code has to be copied out of NAND buffer before
+	 * other blocks can be read.
+	 */
+	relocate_code(CONFIG_SPL_RELOC_STACK, 0,
+			CONFIG_SPL_RELOC_TEXT_BASE);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	/* Pointer is writable since we allocated a register for it */
+	gd = (gd_t *)CONFIG_SPL_GD_ADDR;
+	bd_t *bd;
+
+	memset(gd, 0, sizeof(gd_t));
+	bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+	memset(bd, 0, sizeof(bd_t));
+	gd->bd = bd;
+	bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
+	bd->bi_memsize = CONFIG_SYS_L2_SIZE;
+
+	probecpu();
+	get_clocks();
+	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, \
+			CONFIG_SPL_RELOC_MALLOC_SIZE);
+	env_init();
+#ifdef CONFIG_SPL_MMC_BOOT
+	mmc_initialize(bd);
+#endif
+	/* relocate environment function pointers etc. */
+	env_relocate();
+
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+	gd->ram_size = initdram(0);
+	puts("Second program loader running in sram...\n");
+
+#ifdef CONFIG_SPL_MMC_BOOT
+	mmc_boot();
+#endif
+}
diff --git a/board/freescale/p1022ds/tlb.c b/board/freescale/p1022ds/tlb.c
index 3acc449..9b14c37 100644
--- a/board/freescale/p1022ds/tlb.c
+++ b/board/freescale/p1022ds/tlb.c
@@ -74,7 +74,8 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 7, BOOKE_PAGESZ_4K, 1),
 
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
+#if defined(CONFIG_SYS_RAMBOOT) || \
+	(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
 	/* **** - eSDHC/eSPI/NAND boot */
 	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
 			MAS3_SX|MAS3_SW|MAS3_SR, 0,
@@ -93,6 +94,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
 			0, 10, BOOKE_PAGESZ_16K, 1),
 #endif
 
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+	/* *I*G - L2SRAM */
+	SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+			MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
+			0, 11, BOOKE_PAGESZ_256K, 1)
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot
new file mode 100644
index 0000000..d5043cc
--- /dev/null
+++ b/doc/README.mpc85xx-sd-spi-boot
@@ -0,0 +1,81 @@
+----------------------------------------
+Booting from On-Chip ROM (eSDHC or eSPI)
+----------------------------------------
+
+boot_format is a tool to write SD bootable images to a filesystem and build
+SD/SPI images to a binary file for writing later.
+
+When booting from an SD card/MMC, boot_format puts the configuration file and
+the RAM-based U-Boot image on the card.
+When booting from an EEPROM, boot_format generates a binary image that is used
+to boot from this EEPROM.
+
+Where to get boot_format:
+========================
+
+you can browse it online at:
+http://git.freescale.com/git/cgit.cgi/ppc/sdk/boot-format.git/
+
+Building
+========
+
+Run the following to build this project
+
+	$ make
+
+Execution
+=========
+
+boot_format runs under a regular Linux machine and requires a super user mode
+to run. Execute boot_format as follows.
+
+For building SD images by writing directly to a file system on SD media:
+
+	$ boot_format $config u-boot.bin -sd $device
+
+Where $config is the included config.dat file for your platform and $device
+is the target block device for the SD media on your computer.
+
+For build binary images directly a local file:
+
+	$ boot_format $config u-boot.bin -spi $file
+
+Where $file is the target file. Also keep in mind the u-boot.bin file needs
+to be the u-boot built for your particular platform and target media.
+
+Example: To generate a u-boot.bin for a P1022DS booting from SD, run the
+following in the u-boot repository:
+
+	$ make P1022DS_SDCARD
+
+Configuration Files
+===================
+
+Below are the configuration files to be used with a particular platform. Keep
+in mind that some of these config files are tied to the platforms DDR speed.
+Please see the SoC reference manual for more documentation.
+
+P1022DS		config_sram_p1022ds.dat
+P2020DS		config_sram_p2020ds.dat
+P2010DS		config_sram_p2020ds.dat
+P1020RDB	config_ddr2_1g_p1020rdb_533M.dat
+P1020RDB	config_ddr2_1g_p1020rdb_667M.dat
+P2020RDB	config_ddr2_1g_p2020rdb_800M.dat
+P2020RDB	config_ddr2_1g_p2020rdb_667M.dat
+P2020RDB	config_ddr3_1gb_64bit_p2020rdb_pc.dat
+P2010RDB	config_ddr3_1gb_64bit_p2020rdb_pc.dat
+P1020RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1011RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1010RDB	config_ddr3_1gb_p1010rdb_800M.dat
+P1014RDB	config_ddr3_1gb_p1014rdb_800M.dat
+P1021RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1012RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1022DS		config_ddr3_2gb_p1022ds.dat
+P1013DS		config_ddr3_2gb_p1022ds.dat
+P1024RDB	config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
+P1013RDB	config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
+P1025RDB	config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
+P1016RDB	config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
+P1020UTM	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1020MBG	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+MPC8536DS	config_ddr2_512m_mpc8536ds_667M.dat
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 24648a2..7e1628b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -48,6 +48,9 @@ COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
 COBJS-$(CONFIG_DWMMC) += dw_mmc.o
 COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
 COBJS-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
+ifdef CONFIG_SPL_BUILD
+COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
+endif
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c
new file mode 100644
index 0000000..37d8df3
--- /dev/null
+++ b/drivers/mmc/fsl_esdhc_spl.c
@@ -0,0 +1,131 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include <malloc.h>
+
+/*
+ * The environment variables are written to just after the u-boot image
+ * on SDCard, so we must read the MBR to get the start address and code
+ * length of the u-boot image, then calculate the address of the env.
+ */
+#define ESDHC_BOOT_IMAGE_SIZE	0x48
+#define ESDHC_BOOT_IMAGE_ADDR	0x50
+#define MBRDBR_BOOT_SIG_55	0x1fe
+#define MBRDBR_BOOT_SIG_AA	0x1ff
+#define CONFIG_CFG_DATA_SECTOR	0
+
+/*
+ * The main entry for mmc booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from mmc into SDRAM and starts it from there.
+ */
+
+void mmc_boot(void)
+{
+	__attribute__((noreturn)) void (*uboot)(void);
+	uint blk_start, blk_cnt, err;
+	u32 blklen;
+	uchar *tmp_buf;
+	uchar val;
+	uint i, byte_num;
+	u32 offset, code_len;
+	struct mmc *mmc;
+
+	mmc = find_mmc_device(0);
+	if (!mmc) {
+		puts("spl: mmc device not found!!\n");
+		hang();
+	}
+
+	blklen = mmc->read_bl_len;
+	tmp_buf = malloc(blklen);
+	if (!tmp_buf) {
+		puts("spl: malloc memory failed!!\n");
+		hang();
+	}
+	memset(tmp_buf, 0, blklen);
+
+	/*
+	* Read source addr from sd card
+	*/
+	err = mmc->block_dev.block_read(0, CONFIG_CFG_DATA_SECTOR, \
+					1, tmp_buf);
+	if (err != 1) {
+		puts("spl: mmc read failed!!\n");
+		free(tmp_buf);
+		hang();
+	}
+
+	val = *(tmp_buf + MBRDBR_BOOT_SIG_55);
+	if (0x55 != val) {
+		puts("spl: mmc signature is not valid!!\n");
+		free(tmp_buf);
+		hang();
+	}
+	val = *(tmp_buf + MBRDBR_BOOT_SIG_AA);
+	if (0xAA != val) {
+		puts("spl: mmc signature is not valid!!\n");
+		free(tmp_buf);
+		hang();
+	}
+
+	byte_num = 4;
+	offset = 0;
+	for (i = 0; i < byte_num; i++) {
+		val = *(tmp_buf + ESDHC_BOOT_IMAGE_ADDR + i);
+		offset = (offset << 8) + val;
+	}
+	offset += CONFIG_SYS_MMC_U_BOOT_OFFS;
+	/* Get the code size from offset 0x48 */
+	byte_num = 4;
+	code_len = 0;
+	for (i = 0; i < byte_num; i++) {
+		val = *(tmp_buf + ESDHC_BOOT_IMAGE_SIZE + i);
+		code_len = (code_len << 8) + val;
+	}
+	code_len -= CONFIG_SYS_MMC_U_BOOT_OFFS;
+	/*
+	* Load U-Boot image from mmc into RAM
+	*/
+	blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
+	blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
+	err = mmc->block_dev.block_read(0, blk_start, blk_cnt,
+					(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
+	if (err != blk_cnt) {
+		puts("spl: mmc read failed!!\n");
+		free(tmp_buf);
+		hang();
+	}
+
+	/*
+	* Clean d-cache and invalidate i-cache, to
+	* make sure that no stale data is executed.
+	*/
+	flush_cache(CONFIG_SYS_MMC_U_BOOT_DST, CONFIG_SYS_MMC_U_BOOT_SIZE);
+
+	/*
+	* Jump to U-Boot image
+	*/
+	uboot = (void *)CONFIG_SYS_MMC_U_BOOT_START;
+	(*uboot)();
+}
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 83d2df7..373d2bb 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1498,7 +1498,9 @@ int mmc_initialize(bd_t *bis)
 	if (board_mmc_init(bis) < 0)
 		cpu_mmc_init(bis);
 
+#ifndef CONFIG_SPL_BUILD
 	print_mmc_devices(',');
+#endif
 
 	do_preinit();
 	return 0;
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index bcbda30..0c6e0ec 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -19,11 +19,33 @@
 #endif
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_RAMBOOT_SDCARD
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_ENV_IMPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW                 /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE		0x11001000
+#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_SPL_PAD_TO		0x18000
+#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_DST	(0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT		"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_MMC_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
 #endif
 
 #ifdef CONFIG_SPIFLASH
@@ -294,6 +316,25 @@
 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
 
 /*
+ * Config the L2 Cache as L2 SRAM
+*/
+#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SDCARD)
+#define CONFIG_SYS_INIT_L2_ADDR		0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE		(256 << 10)
+#define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE	0xf8f81000
+#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_STACK_SIZE	(32 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE	(96 << 10)
+#define CONFIG_SPL_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#endif
+#endif
+
+
+/*
  * Serial Port
  */
 #define CONFIG_CONS_INDEX		1
@@ -301,7 +342,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 #define CONFIG_NS16550_MIN_FUNCTIONS
 #endif
 
@@ -532,8 +573,9 @@
 #define CONFIG_ENV_SIZE		0x2000	/* 8KB */
 #define CONFIG_ENV_OFFSET	0x100000	/* 1MB */
 #define CONFIG_ENV_SECT_SIZE	0x10000
-#elif defined(CONFIG_RAMBOOT_SDCARD)
+#elif defined(CONFIG_SDCARD)
 #define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_FSL_FIXED_MMC_LOCATION
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_SYS_MMC_ENV_DEV	0
 #elif defined(CONFIG_NAND)
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 67d6057..b17c424 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -198,5 +198,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd);
 static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
 static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
 #endif /* CONFIG_FSL_ESDHC */
+void mmc_boot(void);
 
 #endif  /* __FSL_ESDHC_H__ */
diff --git a/spl/Makefile b/spl/Makefile
index 01873de..eef8c87 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -51,6 +51,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 endif
 ifeq ($(CPU),mpc85xx)
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
+ifdef CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
+endif
 endif
 ifeq ($(CPU),mpc86xx)
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
-- 
1.7.0.4

[U-Boot] [PATCH 4/7 v6] SPL : spi flash : support to start from eSPI with SPL

[ying.zhang at freescale.com]

From: Ying Zhang <b40530@freescale.com>

This patch introduces SPL to enable a loader stub that runs in the L2 SRAM,
after being loaded by the code from the internal on-chip ROM. It loads the
final uboot image into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
	* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so
	that ddr spd code can get the interleaving mode setting in env. It
	loads final uboot image from offset 96KB.
	* final uboot image, size is variable depends on the functions
	enabled.

This patch is on top of the patch:
powerpc/p1022ds: boot from SD Card with SPL

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "boot from SD card/SPI flash with SPL".
2. No change.
3. No change.
4. No change.
5. Split from "powerpc/p1022ds: boot from spi flash with SPL"
   this patch add the capability starting from eSPI with SPL.

 drivers/mtd/spi/Makefile       |    1 +
 drivers/mtd/spi/fsl_espi_spl.c |   78 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash.c    |    2 +
 3 files changed, 81 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/spi/fsl_espi_spl.c

diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index ecbb210..39e4e1d 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -27,6 +27,7 @@ LIB	:= $(obj)libspi_flash.o
 
 ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_SPI_LOAD)	+= spi_spl_load.o
+COBJS-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
 endif
 
 COBJS-$(CONFIG_SPI_FLASH)	+= spi_flash.o
diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c
new file mode 100644
index 0000000..8375a75
--- /dev/null
+++ b/drivers/mtd/spi/fsl_espi_spl.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <spi_flash.h>
+#include <malloc.h>
+
+#define ESPI_BOOT_IMAGE_SIZE	0x48
+#define ESPI_BOOT_IMAGE_ADDR	0x50
+#define CONFIG_CFG_DATA_SECTOR	0
+
+/*
+ * The main entry for SPI booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from SPI into SDRAM and starts it from there.
+ */
+void spi_boot(void)
+{
+	void (*uboot)(void) __noreturn;
+	u32 offset, code_len, i;
+	unsigned char *buf = NULL;
+	struct spi_flash *flash;
+
+	flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+			CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
+	if (flash == NULL) {
+		puts("\nspi_flash_probe failed");
+		hang();
+	}
+
+	/*
+	* Load U-Boot image from SPI flash into RAM
+	*/
+	buf = malloc(flash->page_size);
+	if (buf == NULL) {
+		puts("\nmalloc failed");
+		hang();
+	}
+	memset(buf, 0, flash->page_size);
+
+	spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR, \
+			flash->page_size, (void *)buf);
+	offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR);
+	/* Skip spl code */
+	offset += CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS;
+	/* Get the code size from offset 0x48 */
+	code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE);
+	/* Skip spl code */
+	code_len = code_len - CONFIG_SPL_MAX_SIZE;
+	/* copy code to DDR */
+	spi_flash_read(flash, offset, code_len, \
+			(void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST);
+	/*
+	* Jump to U-Boot image
+	*/
+	flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, \
+			code_len);
+	uboot = (void *) CONFIG_SYS_SPI_FLASH_U_BOOT_START;
+	(*uboot)();
+}
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 6a6fe37..e474f5c 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -554,12 +554,14 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		goto err_manufacturer_probe;
 	}
 #endif
+#ifndef CONFIG_SPL_BUILD
 	printf("SF: Detected %s with page size ", flash->name);
 	print_size(flash->sector_size, ", total ");
 	print_size(flash->size, "");
 	if (flash->memory_map)
 		printf(", mapped at %p", flash->memory_map);
 	puts("\n");
+#endif
 #ifndef CONFIG_SPI_FLASH_BAR
 	if (flash->size > SPI_FLASH_16MB_BOUN) {
 		puts("SF: Warning - Only lower 16MiB accessible,");
-- 
1.7.0.4

[U-Boot] [PATCH 5/7 v6] powerpc : p1022ds : enable p1022ds to start from eSPI with SPL

[ying.zhang at freescale.com]

From: Ying Zhang <b40530@freescale.com>

enable p1022ds to start from eSPI with SPL.

This patch is on top of the patch:
SPL : spi flash : support to start from eSPI with SPL

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "boot from SD card/SPI flash with SPL".
2. No change.
3. No change.
4. No change.
5. Split from "powerpc/p1022ds: boot from spi flash with SPL"
   this patch enable P1022DS to start from eSPI with SPL.

 board/freescale/p1022ds/spl.c |   12 ++++++++++--
 include/configs/P1022DS.h     |   37 ++++++++++++++++++++++++++++++-------
 2 files changed, 40 insertions(+), 9 deletions(-)

diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c
index 40f000f..a041e35 100644
--- a/board/freescale/p1022ds/spl.c
+++ b/board/freescale/p1022ds/spl.c
@@ -21,13 +21,12 @@
 
 #include <common.h>
 #include <ns16550.h>
-#include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <i2c.h>
 #include "../common/ngpixis.h"
 #include <fsl_esdhc.h>
+#include <spi_flash.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -54,6 +53,11 @@ void board_init_f(ulong bootflag)
 	setbits_be32(&gur->pmuxcr,
 		in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
 
+#ifdef CONFIG_SPL_SPI_BOOT
+	/* Enable the SPI */
+	clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI);
+#endif
+
 	/* Read back the register to synchronize the write. */
 	in_be32(&gur->pmuxcr);
 
@@ -67,6 +71,8 @@ void board_init_f(ulong bootflag)
 			bus_clk / 16 / CONFIG_BAUDRATE);
 #ifdef CONFIG_SPL_MMC_BOOT
 	puts("\nSD boot...\n");
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	puts("\nSPI Flash boot...\n");
 #endif
 
 	/* copy code to RAM and jump to it - this should not return */
@@ -108,5 +114,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	spi_boot();
 #endif
 }
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 0c6e0ec..9e012c4 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -49,11 +49,34 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_RAMBOOT_SPIFLASH
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_ENV_IMPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW                 /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE		0x11001000
+#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_SPL_PAD_TO		0x18000
+#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
 #endif
 
 #define CONFIG_NAND_FSL_ELBC
@@ -319,7 +342,7 @@
  * Config the L2 Cache as L2 SRAM
 */
 #if defined(CONFIG_SPL_BUILD)
-#if defined(CONFIG_SDCARD)
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_INIT_L2_ADDR		0xf8f80000
 #define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
 #define CONFIG_SYS_L2_SIZE		(256 << 10)
@@ -564,7 +587,7 @@
 /*
  * Environment
  */
-#ifdef CONFIG_RAMBOOT_SPIFLASH
+#ifdef CONFIG_SPIFLASH
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BUS	0
 #define CONFIG_ENV_SPI_CS	0
-- 
1.7.0.4

[U-Boot] [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

[ying.zhang at freescale.com]

From: Ying Zhang <b40530@freescale.com>

Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that runs in the
L2 SRAM, after being loaded by the code from the SPL. It initializes the
DDR with the SPD or other operations.

The TPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are three stage uboot images:
	* spl_boot, * tpl_boot, * final uboot image,

This patch is on top of the patch:
SPL : spi flash : support to start from eSPI with SPL

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "powerpc/p1022ds: nand: introduce the TPL based on the SPL".
2. No change.
3. No change.
4. No change.
5. Use ifdef to define "nand_load_image" to non-static for non-SPL

 Makefile                                           |   21 +++-
 README                                             |   57 +++++++-
 arch/powerpc/config.mk                             |    2 +
 .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c        |    4 +-
 arch/powerpc/lib/Makefile                          |    2 +
 common/Makefile                                    |    9 +
 common/cmd_nvedit.c                                |    8 +-
 config.mk                                          |   32 ++++
 doc/README.TPL                                     |   69 +++++++++
 drivers/mtd/nand/Makefile                          |    7 +
 drivers/mtd/nand/fsl_elbc_spl.c                    |    5 +-
 drivers/serial/serial.c                            |    2 +-
 include/bootstage.h                                |    3 +-
 tpl/Makefile                                       |  161 ++++++++++++++++++++
 14 files changed, 368 insertions(+), 14 deletions(-)
 create mode 100644 doc/README.TPL
 create mode 100644 tpl/Makefile

diff --git a/Makefile b/Makefile
index fdaddb9..0513e4d 100644
--- a/Makefile
+++ b/Makefile
@@ -118,10 +118,11 @@ endif # ifneq ($(BUILD_DIR),)
 
 OBJTREE		:= $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
 SPLTREE		:= $(OBJTREE)/spl
+TPLTREE		:= $(OBJTREE)/tpl
 SRCTREE		:= $(CURDIR)
 TOPDIR		:= $(SRCTREE)
 LNDIR		:= $(OBJTREE)
-export	TOPDIR SRCTREE OBJTREE SPLTREE
+export	TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE
 
 MKCONFIG	:= $(SRCTREE)/mkconfig
 export MKCONFIG
@@ -412,6 +413,7 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
 ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
 ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
 ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
+ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin
 ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
 ifneq ($(CONFIG_SPL_TARGET),)
 ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))
@@ -498,6 +500,18 @@ $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
 		rm $(obj)spl/u-boot-spl-pad.bin
 
+$(obj)u-boot-with-tpl.bin: $(obj)spl/u-boot-spl.bin $(obj)tpl/u-boot-tpl.bin \
+		$(obj)u-boot.bin
+		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+			-I binary -O binary \
+			$(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl-pad.bin
+		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_PAD_TO) \
+			-I binary -O binary \
+			$(obj)tpl/u-boot-tpl.bin $(obj)tpl/u-boot-tpl-pad.bin
+		cat $(obj)spl/u-boot-spl-pad.bin $(obj)tpl/u-boot-tpl-pad.bin \
+			$(obj)u-boot.bin > $@
+		rm $(obj)spl/u-boot-spl-pad.bin $(obj)tpl/u-boot-tpl-pad.bin
+
 $(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
 			$(OBJTREE)/u-boot-with-spl.imx
@@ -622,6 +636,9 @@ $(obj)u-boot-nand.bin:	nand_spl $(obj)u-boot.bin
 $(obj)spl/u-boot-spl.bin:	$(SUBDIR_TOOLS) depend
 		$(MAKE) -C spl all
 
+$(obj)tpl/u-boot-tpl.bin:	$(SUBDIR_TOOLS) depend
+		$(MAKE) -C tpl all
+
 updater:
 		$(MAKE) -C tools/updater all
 
@@ -877,6 +894,8 @@ clobber:	tidy
 	@rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map}
 	@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
 	@rm -f $(obj)spl/u-boot-spl.lds
+	@rm -f $(obj)tpl/{u-boot-tpl,u-boot-tpl.bin,u-boot-tpl.map}
+	@rm -f $(obj)tpl/u-boot-tpl.lds
 	@rm -f $(obj)MLO MLO.byteswap
 	@rm -f $(obj)SPL
 	@rm -f $(obj)tools/xway-swap-bytes
diff --git a/README b/README
index b941a56..0c20253 100644
--- a/README
+++ b/README
@@ -2999,9 +2999,10 @@ FIT uImage format:
 		Set for the SPL on PPC mpc8xxx targets, support for
 		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
 
-		CONFIG_SPL_COMMON_INIT_DDR
+		CONFIG_COMMON_INIT_DDR
 		Set for common ddr init with serial presence detect in
-		SPL binary.
+		SPL binary or TPL binary.
+
 		CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
 		CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
 		CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
@@ -3050,8 +3051,9 @@ FIT uImage format:
 
 		CONFIG_SPL_NET_SUPPORT
 		Support for the net/libnet.o in SPL binary.
-		It conflicts with SPL env from storage medium specified by
-		CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE
+		It only co-exist with CONFIG_ENV_IS_NOWHERE in the SPL. it
+		conflicts with SPL env from storage medium specified by
+		CONFIG_ENV_IS_xxx.
 
 		CONFIG_SPL_ENV_IMPORT
 		Support for importing the environment in SPL.
@@ -3074,6 +3076,13 @@ FIT uImage format:
 		option to re-enable it. This will affect the output of the
 		bootm command when booting a FIT image.
 
+- TPL framework
+		CONFIG_TPL
+		Enable building of TPL globally.
+
+		CONFIG_TPL_TEXT_BASE
+		TEXT_BASE for linking the TPL binary.
+
 Modem Support:
 --------------
 
@@ -4111,11 +4120,51 @@ Low Level (hardware related) configuration options:
 		that is executed before the actual U-Boot. E.g. when
 		compiling a NAND SPL.
 
+- CONFIG_TPL_BUILD
+		Modifies the behaviour of start.S when compiling a loader
+		that is executed after the SPL and before the actual U-Boot.
+		It is loaded by the SPL.
+
 - CONFIG_SYS_MPC85XX_NO_RESETVEC
 		Only for 85xx systems. If this variable is specified, the section
 		.resetvec is not kept and the section .bootpg is placed in the
 		previous 4k of the .text section.
 
+- CONFIG_SYS_MPC8XXX_INIT_DDR_SUPPORT
+		Set for the SPL on PPC mpc8xxx targets, support for
+		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o.
+
+- CONFIG_SYS_ENV_SUPPORT
+		Support for the environment operating.
+
+- CONFIG_SYS_SERIAL_SUPPORT
+		Support for drivers/serial/libserial.o.
+
+- CONFIG_SYS_LIBGENERIC_SUPPORT
+		Support for lib/libgeneric.o.
+
+- CONFIG_SYS_LIBCOMMON_SUPPORT
+		Support for common/libcommon.o.
+
+- CONFIG_SYS_I2C_SUPPORT
+		Support for drivers/i2c/libi2c.o.
+
+- CONFIG_SYS_NAND_SUPPORT
+		Support for drivers/mtd/nand/libnand.o.
+
+- CONFIG_SYS_MAX_SIZE
+		Maximum size of the image (text, data, rodata, and
+		linker lists sections), BSS excluded.
+		When defined, the linker checks that the actual size does
+		not exceed it.
+
+- CONFIG_SYS_PAD_TO
+		Image offset to which the image should be padded before appending
+		the image payload. By default, this is defined as
+		CONFIG_SYS_MAX_SIZE, or 0 if CONFIG_SYS_MAX_SIZE is undefined.
+		CONFIG_SYS_PAD_TO must be either 0, meaning to append the image
+		payload without any padding, or >= CONFIG_SYS_MAX_SIZE.
+
 - CONFIG_ARCH_MAP_SYSMEM
 		Generally U-Boot (and in particular the md command) uses
 		effective address. It is therefore not necessary to regard
diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk
index e32d2bf..aebb0aa 100644
--- a/arch/powerpc/config.mk
+++ b/arch/powerpc/config.mk
@@ -48,5 +48,7 @@ endif
 
 # Only test once
 ifneq ($(CONFIG_SPL_BUILD),y)
+ifneq ($(CONFIG_TPL_BUILD),y)
 ALL-y += checkgcc4
 endif
+endif
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index 56128a7..e46100a 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -218,13 +218,13 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
 		if (dimm_params[i].n_ranks) {
 			if (dimm_params[i].registered_dimm) {
 				temp1 = 1;
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 				printf("Detected RDIMM %s\n",
 					dimm_params[i].mpart);
 #endif
 			} else {
 				temp2 = 1;
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 				printf("Detected UDIMM %s\n",
 					dimm_params[i].mpart);
 #endif
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 59c723b..c61eb06 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -59,10 +59,12 @@ SOBJS-y	+= reloc.o
 
 COBJS-$(CONFIG_BAT_RW) += bat_rw.o
 ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_TPL_BUILD
 ifndef CONFIG_SYS_GENERIC_BOARD
 COBJS-y	+= board.o
 endif
 endif
+endif
 COBJS-y	+= bootm.o
 COBJS-y	+= cache.o
 COBJS-y	+= extable.o
diff --git a/common/Makefile b/common/Makefile
index 3581603..b797e0c 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -27,6 +27,7 @@ LIB	= $(obj)libcommon.o
 
 # core
 ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_TPL_BUILD
 COBJS-y += main.o
 COBJS-y += command.o
 COBJS-y += exports.o
@@ -204,6 +205,7 @@ COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
 COBJS-$(CONFIG_CMD_DFU) += cmd_dfu.o
 COBJS-$(CONFIG_CMD_GPT) += cmd_gpt.o
 endif
+endif
 
 ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
@@ -223,6 +225,13 @@ else
 COBJS-y += env_nowhere.o
 endif
 endif
+
+ifdef CONFIG_TPL_BUILD
+COBJS-$(CONFIG_SYS_ENV_SUPPORT) += env_attr.o
+COBJS-$(CONFIG_SYS_ENV_SUPPORT) += env_flags.o
+COBJS-$(CONFIG_SYS_ENV_SUPPORT) += env_callback.o
+endif
+
 # core command
 COBJS-y += cmd_nvedit.o
 #environment
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 2478c95..d91a2ef 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -87,7 +87,7 @@ int get_env_id(void)
 	return env_id;
 }
 
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 /*
  * Command interface: print one or all environment variables
  *
@@ -356,7 +356,7 @@ ulong getenv_hex(const char *varname, ulong default_val)
 	return value;
 }
 
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 static int do_env_set(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	if (argc < 2)
@@ -700,7 +700,7 @@ ulong getenv_ulong(const char *name, int base, ulong default_val)
 	return str ? simple_strtoul(str, NULL, base) : default_val;
 }
 
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 #if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
 static int do_env_save(cmd_tbl_t *cmdtp, int flag, int argc,
 		       char * const argv[])
@@ -741,7 +741,7 @@ int envmatch(uchar *s1, int i2)
 	return -1;
 }
 
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 static int do_env_default(cmd_tbl_t *cmdtp, int __flag,
 			  int argc, char * const argv[])
 {
diff --git a/config.mk b/config.mk
index ddf350e..f2938f1 100644
--- a/config.mk
+++ b/config.mk
@@ -41,8 +41,12 @@ ifneq ($(OBJTREE),$(SRCTREE))
 ifeq ($(CONFIG_SPL_BUILD),y)
 obj := $(if $(dir),$(SPLTREE)/$(dir)/,$(SPLTREE)/)
 else
+ifeq ($(CONFIG_TPL_BUILD),y)
+obj := $(if $(dir),$(TPLTREE)/$(dir)/,$(TPLTREE)/)
+else
 obj := $(if $(dir),$(OBJTREE)/$(dir)/,$(OBJTREE)/)
 endif
+endif
 src := $(if $(dir),$(SRCTREE)/$(dir)/,$(SRCTREE)/)
 
 $(shell mkdir -p $(obj))
@@ -53,8 +57,14 @@ obj := $(if $(dir),$(SPLTREE)/$(dir)/,$(SPLTREE)/)
 
 $(shell mkdir -p $(obj))
 else
+ifeq ($(CONFIG_TPL_BUILD),y)
+obj := $(if $(dir),$(TPLTREE)/$(dir)/,$(TPLTREE)/)
+
+$(shell mkdir -p $(obj))
+else
 obj :=
 endif
+endif
 src :=
 endif
 
@@ -210,6 +220,11 @@ CPPFLAGS += -ffunction-sections -fdata-sections
 LDFLAGS_FINAL += --gc-sections
 endif
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+CPPFLAGS += -ffunction-sections -fdata-sections
+LDFLAGS_FINAL += --gc-sections
+endif
+
 ifneq ($(CONFIG_SYS_TEXT_BASE),)
 CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
 endif
@@ -218,10 +233,18 @@ ifneq ($(CONFIG_SPL_TEXT_BASE),)
 CPPFLAGS += -DCONFIG_SPL_TEXT_BASE=$(CONFIG_SPL_TEXT_BASE)
 endif
 
+ifneq ($(CONFIG_TPL_TEXT_BASE),)
+CPPFLAGS += -DCONFIG_TPL_TEXT_BASE=$(CONFIG_TPL_TEXT_BASE)
+endif
+
 ifneq ($(CONFIG_SPL_PAD_TO),)
 CPPFLAGS += -DCONFIG_SPL_PAD_TO=$(CONFIG_SPL_PAD_TO)
 endif
 
+ifneq ($(CONFIG_SYS_PAD_TO),)
+CPPFLAGS += -DCONFIG_SYS_PAD_TO=$(CONFIG_SYS_PAD_TO)
+endif
+
 ifneq ($(CONFIG_UBOOT_PAD_TO),)
 CPPFLAGS += -DCONFIG_UBOOT_PAD_TO=$(CONFIG_UBOOT_PAD_TO)
 endif
@@ -230,6 +253,10 @@ ifeq ($(CONFIG_SPL_BUILD),y)
 CPPFLAGS += -DCONFIG_SPL_BUILD
 endif
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+CPPFLAGS += -DCONFIG_TPL_BUILD
+endif
+
 # Does this architecture support generic board init?
 ifeq ($(__HAVE_ARCH_GENERIC_BOARD),)
 ifneq ($(CONFIG_SYS_GENERIC_BOARD),)
@@ -294,6 +321,11 @@ ifneq ($(CONFIG_SPL_TEXT_BASE),)
 LDFLAGS_u-boot-spl += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
 
+LDFLAGS_u-boot-tpl += -T $(obj)u-boot-spl.lds $(LDFLAGS_FINAL)
+ifneq ($(CONFIG_TPL_TEXT_BASE),)
+LDFLAGS_u-boot-tpl += -Ttext $(CONFIG_TPL_TEXT_BASE)
+endif
+
 # Linus' kernel sanity checking tool
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
                   -Wbitwise -Wno-return-void -D__CHECK_ENDIAN__ $(CF)
diff --git a/doc/README.TPL b/doc/README.TPL
new file mode 100644
index 0000000..dc135af
--- /dev/null
+++ b/doc/README.TPL
@@ -0,0 +1,69 @@
+Generic TPL framework
+=====================
+
+Overview
+--------
+
+Due to the SPL on some boards(powerpc mpc85xx) has a size limit and cannot
+be compatible with all the external device(e.g. DDR). So add a tertiary
+program loader (TPL) to enable a loader stub that runs in the L2 SRAM,
+after being loaded by the code from the SPL. It loads the final uboot image
+into DDR, then jump to it to begin execution. Now, only the powerpc mpc85xx
+has this requirement and will implemente it.
+
+Keep consistent with SPL, with this framework almost all source files for a
+board can be reused. No code duplication or symlinking is necessary anymore.
+
+How it works
+------------
+
+There is a new directory TOPDIR/tpl which contains only a Makefile.
+The object files are built separately for TPL and placed in this directory.
+The final binaries which are generated are u-boot-tpl, u-boot-tpl.bin and
+u-boot-tpl.map.
+
+During the TPL build a variable named CONFIG_TPL_BUILD is exported
+in the make environment and also appended to CPPFLAGS with -DCONFIG_TPL_BUILD.
+Source files can therefore be compiled for TPL with different settings.
+
+For example:
+
+ifeq ($(CONFIG_TPL_BUILD),y)
+COBJS-y += board_tpl.o
+else
+COBJS-y += board.o
+endif
+
+COBJS-$(CONFIG_TPL_BUILD) += foo.o
+
+#ifdef CONFIG_TPL_BUILD
+	foo();
+#endif
+
+
+The building of TPL images can be with:
+
+#define CONFIG_TPL
+
+Because TPL images normally have a different text base, one has to be
+configured by defining CONFIG_TPL_TEXT_BASE. The linker script has to be
+defined with CONFIG_TPL_LDSCRIPT.
+
+To support generic U-Boot libraries and drivers in the TPL binary one can
+optionally define CONFIG_SYS_XXX_SUPPORT. Currently following options
+are supported:
+
+CONFIG_SYS_LIBCOMMON_SUPPORT (common/libcommon.o)
+CONFIG_SYS_LIBDISK_SUPPORT (disk/libdisk.o)
+CONFIG_SYS_I2C_SUPPORT (drivers/i2c/libi2c.o)
+CONFIG_SYS_GPIO_SUPPORT (drivers/gpio/libgpio.o)
+CONFIG_SYS_MMC_SUPPORT (drivers/mmc/libmmc.o)
+CONFIG_SYS_SERIAL_SUPPORT (drivers/serial/libserial.o)
+CONFIG_SYS_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
+CONFIG_SYS_SPI_SUPPORT (drivers/spi/libspi.o)
+CONFIG_SYS_FAT_SUPPORT (fs/fat/libfat.o)
+CONFIG_SYS_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SYS_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SYS_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
+CONFIG_SYS_DMA_SUPPORT (drivers/dma/libdma.o)
+CONFIG_SYS_POST_MEM_SUPPORT (post/drivers/memory.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index bb81e84..5113642 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_SPL_NAND_BASE) += nand_base.o
 
 else # not spl
 
+ifndef CONFIG_TPL_BUILD
 NORMAL_DRIVERS=y
 
 COBJS-y += nand.o
@@ -51,6 +52,7 @@ COBJS-y += nand_util.o
 COBJS-y += nand_ecc.o
 COBJS-y += nand_base.o
 
+endif
 endif # not spl
 
 ifdef NORMAL_DRIVERS
@@ -82,9 +84,14 @@ COBJS-$(CONFIG_NAND_DOCG4) += docg4.o
 
 else  # minimal SPL drivers
 
+ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
 COBJS-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
+endif
+ifdef CONFIG_TPL_BUILD
+COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
+endif
 
 endif # drivers
 endif # nand
diff --git a/drivers/mtd/nand/fsl_elbc_spl.c b/drivers/mtd/nand/fsl_elbc_spl.c
index 50ff4fe..ab208fd 100644
--- a/drivers/mtd/nand/fsl_elbc_spl.c
+++ b/drivers/mtd/nand/fsl_elbc_spl.c
@@ -47,7 +47,10 @@ static void nand_wait(void)
 	}
 }
 
-static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
+#ifdef CONFIG_SPL_BUILD
+static
+#endif
+int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
 {
 	fsl_lbc_t *regs = LBC_BASE_ADDR;
 	uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index daa8003..81aca81 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -371,7 +371,7 @@ static struct serial_device *get_current(void)
 
 	/* We must have a console device */
 	if (!dev) {
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_TPL_BUILD)
 		puts("Cannot find console\n");
 		hang();
 #else
diff --git a/include/bootstage.h b/include/bootstage.h
index ef07a87..1e8c492 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -220,7 +220,8 @@ enum bootstage_id {
  */
 ulong timer_get_boot_us(void);
 
-#if !defined(CONFIG_SPL_BUILD) && !defined(USE_HOSTCC)
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \
+	!defined(USE_HOSTCC)
 /*
  * Board code can implement show_boot_progress() if needed.
  *
diff --git a/tpl/Makefile b/tpl/Makefile
new file mode 100644
index 0000000..bb947e5
--- /dev/null
+++ b/tpl/Makefile
@@ -0,0 +1,161 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+
+CONFIG_TPL_BUILD := y
+export CONFIG_TPL_BUILD
+
+include $(TOPDIR)/config.mk
+
+# We want the final binaries in this directory
+obj := $(OBJTREE)/tpl/
+
+HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(SRCTREE)/board/$(VENDOR)/common/Makefile),y,n)
+
+ifdef	CONFIG_TPL_START_S_PATH
+START_PATH := $(subst ",,$(CONFIG_TPL_START_S_PATH))
+else
+START_PATH := $(CPUDIR)
+endif
+
+START := $(START_PATH)/start.o
+ifeq ($(CPU),x86)
+START += $(START_PATH)/start16.o
+START += $(START_PATH)/resetvec.o
+endif
+ifeq ($(CPU),ppc4xx)
+START += $(START_PATH)/resetvec.o
+endif
+ifeq ($(CPU),mpc85xx)
+START += $(START_PATH)/resetvec.o
+endif
+
+LIBS-y += arch/$(ARCH)/lib/lib$(ARCH).o
+
+LIBS-y += $(CPUDIR)/lib$(CPU).o
+ifeq ($(CPU),mpc83xx)
+LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
+endif
+ifeq ($(CPU),mpc85xx)
+LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
+ifdef CONFIG_SYS_MPC8XXX_INIT_DDR_SUPPORT
+LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
+endif
+endif
+ifeq ($(CPU),mpc86xx)
+LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
+endif
+
+ifdef SOC
+LIBS-y += $(CPUDIR)/$(SOC)/lib$(SOC).o
+endif
+LIBS-y += board/$(BOARDDIR)/lib$(BOARD).o
+LIBS-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/lib$(VENDOR).o
+
+LIBS-$(CONFIG_SYS_LIBCOMMON_SUPPORT) += common/libcommon.o
+LIBS-$(CONFIG_SYS_LIBDISK_SUPPORT) += disk/libdisk.o
+LIBS-$(CONFIG_SYS_I2C_SUPPORT) += drivers/i2c/libi2c.o
+LIBS-$(CONFIG_SYS_GPIO_SUPPORT) += drivers/gpio/libgpio.o
+LIBS-$(CONFIG_SYS_MMC_SUPPORT) += drivers/mmc/libmmc.o
+LIBS-$(CONFIG_SYS_SERIAL_SUPPORT) += drivers/serial/libserial.o
+LIBS-$(CONFIG_SYS_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
+LIBS-$(CONFIG_SYS_SPI_SUPPORT) += drivers/spi/libspi.o
+LIBS-$(CONFIG_SYS_FAT_SUPPORT) += fs/fat/libfat.o
+LIBS-$(CONFIG_SYS_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SYS_POWER_SUPPORT) += drivers/power/libpower.o
+LIBS-$(CONFIG_SYS_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
+LIBS-$(CONFIG_SYS_ONENAND_SUPPORT) += drivers/mtd/onenand/libonenand.o
+LIBS-$(CONFIG_SYS_DMA_SUPPORT) += drivers/dma/libdma.o
+LIBS-$(CONFIG_SYS_POST_MEM_SUPPORT) += post/drivers/memory.o
+LIBS-$(CONFIG_SYS_NET_SUPPORT) += net/libnet.o
+LIBS-$(CONFIG_SYS_ETH_SUPPORT) += drivers/net/libnet.o
+LIBS-$(CONFIG_SYS_ETH_SUPPORT) += drivers/net/phy/libphy.o
+LIBS-$(CONFIG_SYS_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/libusb_musb-new.o
+LIBS-$(CONFIG_SYS_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o
+
+# Add GCC lib
+ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
+PLATFORM_LIBGCC = $(TPLTREE)/arch/$(ARCH)/lib/libgcc.o
+PLATFORM_LIBS := $(filter-out %/libgcc.o, $(filter-out -lgcc, $(PLATFORM_LIBS))) $(PLATFORM_LIBGCC)
+endif
+
+START := $(addprefix $(TPLTREE)/,$(START))
+LIBS := $(addprefix $(TPLTREE)/,$(sort $(LIBS-y)))
+
+__START := $(subst $(obj),,$(START))
+__LIBS := $(subst $(obj),,$(LIBS))
+
+# Linker Script
+ifdef CONFIG_SPL_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(addprefix $(SRCTREE)/,$(subst ",,$(CONFIG_SPL_LDSCRIPT)))
+endif
+
+ifeq ($(wildcard $(LDSCRIPT)),)
+	LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-spl.lds
+endif
+ifeq ($(wildcard $(LDSCRIPT)),)
+	LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-spl.lds
+endif
+ifeq ($(wildcard $(LDSCRIPT)),)
+	LDSCRIPT := $(TOPDIR)/arch/$(ARCH)/cpu/u-boot-spl.lds
+endif
+ifeq ($(wildcard $(LDSCRIPT)),)
+$(error could not find linker script)
+endif
+
+# Special flags for CPP when processing the linker script.
+# Pass the version down so we can handle backwards compatibility
+# on the fly.
+LDPPFLAGS += \
+	-include $(TOPDIR)/include/u-boot/u-boot.lds.h \
+	-include $(OBJTREE)/include/config.h \
+	-DCPUDIR=$(CPUDIR) \
+	$(shell $(LD) --version | \
+	  sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
+
+$(OBJTREE)/MLO:	$(obj)u-boot-tpl.bin
+	$(OBJTREE)/tools/mkimage -T omapimage \
+		-a $(CONFIG_TPL_TEXT_BASE) -d $< $@
+
+$(OBJTREE)/MLO.byteswap: $(obj)u-boot-tpl.bin
+	$(OBJTREE)/tools/mkimage -T omapimage -n byteswap \
+		-a $(CONFIG_TPL_TEXT_BASE) -d $< $@
+
+$(OBJTREE)/TPL : $(obj)u-boot-tpl.bin depend
+		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common $@
+
+ALL-y	+= $(obj)u-boot-tpl.bin
+
+all:	$(ALL-y)
+
+$(obj)u-boot-tpl.bin:	$(obj)u-boot-tpl
+	$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@
+
+GEN_UBOOT = \
+	cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $(__START) \
+		--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
+		-Map u-boot-tpl.map -o u-boot-tpl
+
+$(obj)u-boot-tpl:	depend $(START) $(LIBS) $(obj)u-boot-spl.lds
+	$(GEN_UBOOT)
+
+$(START):	depend
+	$(MAKE) -C $(SRCTREE)/$(START_PATH) $@
+
+$(LIBS):	depend
+	$(MAKE) -C $(SRCTREE)$(dir $(subst $(TPLTREE),,$@))
+
+$(obj)u-boot-spl.lds: $(LDSCRIPT) depend
+	$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(obj). -ansi -D__ASSEMBLY__ -P - < $< > $@
+
+depend:	$(obj).depend
+.PHONY: depend
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-- 
1.7.0.4

[U-Boot] [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

[Scott Wood]

On 06/26/2013 02:18:31 AM, ying.zhang at freescale.com wrote:
> From: Ying Zhang <b40530@freescale.com>
> 
> Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it  
> can
> not be more than 4K. So, the SPL cannot initialize the DDR with the  
> SPD
> code. This patch introduces TPL to enable a loader stub that runs in  
> the
> L2 SRAM, after being loaded by the code from the SPL. It initializes  
> the
> DDR with the SPD or other operations.
> 
> The TPL's size is sizeable, the maximum size must not exceed the size  
> of L2
> SRAM.

Using L2 SRAM for this is an implementation detail, and not appropriate  
for a description of the generic TPL infrastructure.  For example, on  
newer QorIQ chips you'd be using CPC (L3) SRAM.

> It initializes the DDR through SPD code, and copys final uboot image
> to DDR. So there are three stage uboot images:
> 	* spl_boot, * tpl_boot, * final uboot image,
> 
> This patch is on top of the patch:
> SPL : spi flash : support to start from eSPI with SPL

You don't need to mention a dependency on an earlier patch in the same  
patchset (and when you do need to mention a dependency, it should be  
below the --- line so it doesn't go into the git history).  OTOH, you  
do need to mention the dependency on the patch to have a separate  
autoconf.mk.

> Signed-off-by: Ying Zhang <b40530@freescale.com>
> ---
> Compared with the original version, Changed as below:
> 1. Split from "powerpc/p1022ds: nand: introduce the TPL based on the  
> SPL".
> 2. No change.
> 3. No change.
> 4. No change.
> 5. Use ifdef to define "nand_load_image" to non-static for non-SPL
> 
>  Makefile                                           |   21 +++-
>  README                                             |   57 +++++++-
>  arch/powerpc/config.mk                             |    2 +
>  .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c        |    4 +-
>  arch/powerpc/lib/Makefile                          |    2 +
>  common/Makefile                                    |    9 +
>  common/cmd_nvedit.c                                |    8 +-
>  config.mk                                          |   32 ++++
>  doc/README.TPL                                     |   69 +++++++++
>  drivers/mtd/nand/Makefile                          |    7 +
>  drivers/mtd/nand/fsl_elbc_spl.c                    |    5 +-
>  drivers/serial/serial.c                            |    2 +-
>  include/bootstage.h                                |    3 +-
>  tpl/Makefile                                       |  161  
> ++++++++++++++++++++
>  14 files changed, 368 insertions(+), 14 deletions(-)
>  create mode 100644 doc/README.TPL
>  create mode 100644 tpl/Makefile
> 
> diff --git a/Makefile b/Makefile
> index fdaddb9..0513e4d 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -118,10 +118,11 @@ endif # ifneq ($(BUILD_DIR),)
> 
>  OBJTREE		:= $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
>  SPLTREE		:= $(OBJTREE)/spl
> +TPLTREE		:= $(OBJTREE)/tpl
>  SRCTREE		:= $(CURDIR)
>  TOPDIR		:= $(SRCTREE)
>  LNDIR		:= $(OBJTREE)
> -export	TOPDIR SRCTREE OBJTREE SPLTREE
> +export	TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE
> 
>  MKCONFIG	:= $(SRCTREE)/mkconfig
>  export MKCONFIG
> @@ -412,6 +413,7 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin  
> $(obj)System.map
>  ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
>  ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
>  ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
> +ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin
>  ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
>  ifneq ($(CONFIG_SPL_TARGET),)
>  ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))
> @@ -498,6 +500,18 @@ $(obj)u-boot-with-spl.bin:  
> $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
>  		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
>  		rm $(obj)spl/u-boot-spl-pad.bin
> 
> +$(obj)u-boot-with-tpl.bin: $(obj)spl/u-boot-spl.bin  
> $(obj)tpl/u-boot-tpl.bin \
> +		$(obj)u-boot.bin
> +		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
> +			-I binary -O binary \
> +			$(obj)spl/u-boot-spl.bin  
> $(obj)spl/u-boot-spl-pad.bin
> +		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_PAD_TO) \
> +			-I binary -O binary \
> +			$(obj)tpl/u-boot-tpl.bin  
> $(obj)tpl/u-boot-tpl-pad.bin
> +		cat $(obj)spl/u-boot-spl-pad.bin  
> $(obj)tpl/u-boot-tpl-pad.bin \
> +			$(obj)u-boot.bin > $@
> +		rm $(obj)spl/u-boot-spl-pad.bin  
> $(obj)tpl/u-boot-tpl-pad.bin

Can we do this with less duplication?  Ideally u-boot-with-tpl.bin  
would be just TPL and the main U-Boot, and then we'd feed that into the  
u-boot-with-spl.bin rule.  Or even call the same code twice (pattern  
rule, make function, etc).

> @@ -877,6 +894,8 @@ clobber:	tidy
>  	@rm -f  
> $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map}
>  	@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
>  	@rm -f $(obj)spl/u-boot-spl.lds
> +	@rm -f $(obj)tpl/{u-boot-tpl,u-boot-tpl.bin,u-boot-tpl.map}
> +	@rm -f $(obj)tpl/u-boot-tpl.lds
>  	@rm -f $(obj)MLO MLO.byteswap
>  	@rm -f $(obj)SPL
>  	@rm -f $(obj)tools/xway-swap-bytes
> diff --git a/README b/README
> index b941a56..0c20253 100644
> --- a/README
> +++ b/README
> @@ -2999,9 +2999,10 @@ FIT uImage format:
>  		Set for the SPL on PPC mpc8xxx targets, support for
>  		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
> 
> -		CONFIG_SPL_COMMON_INIT_DDR
> +		CONFIG_COMMON_INIT_DDR
>  		Set for common ddr init with serial presence detect in
> -		SPL binary.
> +		SPL binary or TPL binary.

Please keep SPL in the name of these.  Consider TPL as a type of SPL.   
Changing the name just causes a lot of churn, and it is confusing  
because you end up with a name that looks like it applies to the main  
U-Boot, when it actually applies just to SPL/TPL.

> +- CONFIG_SYS_MPC8XXX_INIT_DDR_SUPPORT
> +		Set for the SPL on PPC mpc8xxx targets, support for
> +		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o.
> +
> +- CONFIG_SYS_ENV_SUPPORT
> +		Support for the environment operating.
> +
> +- CONFIG_SYS_SERIAL_SUPPORT
> +		Support for drivers/serial/libserial.o.
> +
> +- CONFIG_SYS_LIBGENERIC_SUPPORT
> +		Support for lib/libgeneric.o.
> +
> +- CONFIG_SYS_LIBCOMMON_SUPPORT
> +		Support for common/libcommon.o.
> +
> +- CONFIG_SYS_I2C_SUPPORT
> +		Support for drivers/i2c/libi2c.o.
> +
> +- CONFIG_SYS_NAND_SUPPORT
> +		Support for drivers/mtd/nand/libnand.o.

Likewise, except here you seem to still be duplicating the SPL defines  
rather than renaming them.  Also, CONFIG_SYS_ is generally used to  
describe the hardware or similar, not to indicate which parts of the  
source code to enable.

> diff --git a/tpl/Makefile b/tpl/Makefile
> new file mode 100644
> index 0000000..bb947e5
> --- /dev/null
> +++ b/tpl/Makefile
> @@ -0,0 +1,161 @@
> +#
> +# Copyright 2013 Freescale Semiconductor, Inc.
> +#
> +# This program is free software; you can redistribute it and/or  
> modify it
> +# under the terms of the GNU General Public License as published by  
> the Free
> +# Software Foundation; either version 2 of the License, or (at your  
> option)
> +# any later version.
> +#
> +
> +CONFIG_TPL_BUILD := y
> +export CONFIG_TPL_BUILD

Please find a way to reuse spl/Makefile by invoking it twice.

-Scott

[U-Boot] [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

[Zhang Ying-B40530]

-----Original Message-----
From: Wood Scott-B07421 
Sent: Thursday, June 27, 2013 6:33 AM
To: Zhang Ying-B40530
Cc: u-boot at lists.denx.de; afleming at gmail.com; Xie Xiaobo-R63061; Zhang Ying-B40530
Subject: Re: [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

On 06/26/2013 02:18:31 AM, ying.zhang at freescale.com wrote:
> From: Ying Zhang <b40530@freescale.com>
> 
> Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it  
> can
> not be more than 4K. So, the SPL cannot initialize the DDR with the  
> SPD
> code. This patch introduces TPL to enable a loader stub that runs in  
> the
> L2 SRAM, after being loaded by the code from the SPL. It initializes  
> the
> DDR with the SPD or other operations.
> 
> The TPL's size is sizeable, the maximum size must not exceed the size  
> of L2
> SRAM.

Using L2 SRAM for this is an implementation detail, and not appropriate  
for a description of the generic TPL infrastructure.  For example, on  
newer QorIQ chips you'd be using CPC (L3) SRAM.

> It initializes the DDR through SPD code, and copys final uboot image
> to DDR. So there are three stage uboot images:
> 	* spl_boot, * tpl_boot, * final uboot image,
> 
> This patch is on top of the patch:
> SPL : spi flash : support to start from eSPI with SPL

You don't need to mention a dependency on an earlier patch in the same  
patchset (and when you do need to mention a dependency, it should be  
below the --- line so it doesn't go into the git history).  OTOH, you  
do need to mention the dependency on the patch to have a separate  
autoconf.mk.
[Zhang Ying] 
I want to know when the patch that creates a separate autoconf.mk can
be merged?
My patch need to be verified on the basis of it.

[U-Boot] [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

[Scott Wood]

On 06/28/2013 02:57:55 AM, Zhang Ying-B40530 wrote:
> You don't need to mention a dependency on an earlier patch in the same
> patchset (and when you do need to mention a dependency, it should be
> below the --- line so it doesn't go into the git history).  OTOH, you
> do need to mention the dependency on the patch to have a separate
> autoconf.mk.
> [Zhang Ying]
> I want to know when the patch that creates a separate autoconf.mk can
> be merged?
> My patch need to be verified on the basis of it.

You could include it as the first patch in your series (be sure to  
leave the authorship intact).

-Scott

[U-Boot] [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

[Zhang Ying-B40530]

I haven't subscribe the mail list and I didn't find the patch 
"creates a separate autoconf.mk". Can you tell me where I can
find it? Thanks.

-----Original Message-----
From: Wood Scott-B07421 
Sent: Saturday, June 29, 2013 3:40 AM
To: Zhang Ying-B40530
Cc: Wood Scott-B07421; u-boot at lists.denx.de; afleming at gmail.com; Xie Xiaobo-R63061
Subject: Re: [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

On 06/28/2013 02:57:55 AM, Zhang Ying-B40530 wrote:
> You don't need to mention a dependency on an earlier patch in the same 
> patchset (and when you do need to mention a dependency, it should be 
> below the --- line so it doesn't go into the git history).  OTOH, you 
> do need to mention the dependency on the patch to have a separate 
> autoconf.mk.
> [Zhang Ying]
> I want to know when the patch that creates a separate autoconf.mk can 
> be merged?
> My patch need to be verified on the basis of it.

You could include it as the first patch in your series (be sure to leave the authorship intact).

-Scott

[U-Boot] [PATCH 6/7 v6] nand: tpl : introduce the TPL based on the SPL

[Scott Wood]

On 07/01/2013 03:48:16 AM, Zhang Ying-B40530 wrote:
> I haven't subscribe the mail list and I didn't find the patch
> "creates a separate autoconf.mk". Can you tell me where I can
> find it? Thanks.

Search in http://patchwork.ozlabs.org/project/uboot/list/

-Scott

[U-Boot] [PATCH 7/7 v6] powerpc: p1022ds: support TPL on the P1022DS

[ying.zhang at freescale.com]

From: Ying Zhang <b40530@freescale.com>

Support TPL on the P1022DS.
The TPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are three stage uboot images:
	* spl_boot, 4KB size, pad to 128K byte.
	* tpl_boot, 88K size, pad to 128K size. The env variables are
	copied to L2 SRAM, so that ddr SPD code can get the interleaving
	mode setting in env. It loads final uboot image from offset 256KB.
	* final uboot image, size is variable depends on the functions
	enabled.

This patch is on top of the patch:
nand: tpl : introduce the TPL based on the SPL

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "powerpc/p1022ds: nand: introduce the TPL based on the SPL".
2. No change.
3. No change.
4. No change.
5. Change functionality nand_load_image to nand_load, it is called in TPL.

 Makefile                                |    3 +-
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds |    4 +
 board/freescale/p1022ds/Makefile        |    3 +
 board/freescale/p1022ds/spl_minimal.c   |   57 ++---------------
 board/freescale/p1022ds/tlb.c           |    4 +-
 board/freescale/p1022ds/tpl.c           |  102 +++++++++++++++++++++++++++++++
 drivers/mtd/nand/fsl_elbc_spl.c         |    8 +-
 include/configs/P1022DS.h               |   77 ++++++++++++++++++-----
 8 files changed, 184 insertions(+), 74 deletions(-)
 create mode 100644 board/freescale/p1022ds/tpl.c

diff --git a/Makefile b/Makefile
index 0513e4d..a3c7282 100644
--- a/Makefile
+++ b/Makefile
@@ -895,7 +895,7 @@ clobber:	tidy
 	@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
 	@rm -f $(obj)spl/u-boot-spl.lds
 	@rm -f $(obj)tpl/{u-boot-tpl,u-boot-tpl.bin,u-boot-tpl.map}
-	@rm -f $(obj)tpl/u-boot-tpl.lds
+	@rm -f $(obj)tpl/u-boot-spl.lds
 	@rm -f $(obj)MLO MLO.byteswap
 	@rm -f $(obj)SPL
 	@rm -f $(obj)tools/xway-swap-bytes
@@ -906,6 +906,7 @@ clobber:	tidy
 	@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
 	@rm -f $(obj)dts/*.tmp
 	@rm -f $(obj)spl/u-boot-spl{,-pad}.ais
+	@rm -f $(obj)tpl/u-boot-tpl{,-pad}.ais
 
 mrproper \
 distclean:	clobber unconfig
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 8aeb1a0..3167d2d 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -35,7 +35,11 @@ PHDRS
 #endif
 SECTIONS
 {
+#ifdef CONFIG_SPL_BUILD
 	. = CONFIG_SPL_TEXT_BASE;
+#else
+	. = CONFIG_TPL_TEXT_BASE;
+#endif
 	.text : {
 		*(.text*)
 	}
diff --git a/board/freescale/p1022ds/Makefile b/board/freescale/p1022ds/Makefile
index 9746063..58f224e 100644
--- a/board/freescale/p1022ds/Makefile
+++ b/board/freescale/p1022ds/Makefile
@@ -27,6 +27,9 @@ else
 ifdef CONFIG_SPL_BUILD
 COBJS-y += spl.o
 endif
+ifdef CONFIG_TPL_BUILD
+COBJS-y += tpl.o
+endif
 COBJS-y	+= $(BOARD).o
 COBJS-y	+= ddr.o
 COBJS-y	+= law.o
diff --git a/board/freescale/p1022ds/spl_minimal.c b/board/freescale/p1022ds/spl_minimal.c
index 8d12fa6..8ab5ec2 100644
--- a/board/freescale/p1022ds/spl_minimal.c
+++ b/board/freescale/p1022ds/spl_minimal.c
@@ -27,51 +27,6 @@
 #include <asm/fsl_ddr_sdram.h>
 
 
-/*
- * Fixed sdram init -- doesn't use serial presence detect.
- */
-void sdram_init(void)
-{
-	volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
-
-	__raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);
-	__raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);
-#if CONFIG_CHIP_SELECTS_PER_CTRL > 1
-	__raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds);
-	__raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config);
-#endif
-	__raw_writel(CONFIG_SYS_DDR_TIMING_3, &ddr->timing_cfg_3);
-	__raw_writel(CONFIG_SYS_DDR_TIMING_0, &ddr->timing_cfg_0);
-	__raw_writel(CONFIG_SYS_DDR_TIMING_1, &ddr->timing_cfg_1);
-	__raw_writel(CONFIG_SYS_DDR_TIMING_2, &ddr->timing_cfg_2);
-
-	__raw_writel(CONFIG_SYS_DDR_CONTROL_2, &ddr->sdram_cfg_2);
-	__raw_writel(CONFIG_SYS_DDR_MODE_1, &ddr->sdram_mode);
-	__raw_writel(CONFIG_SYS_DDR_MODE_2, &ddr->sdram_mode_2);
-
-	__raw_writel(CONFIG_SYS_DDR_INTERVAL, &ddr->sdram_interval);
-	__raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init);
-	__raw_writel(CONFIG_SYS_DDR_CLK_CTRL, &ddr->sdram_clk_cntl);
-
-	__raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4);
-	__raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5);
-	__raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl);
-	__raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL, &ddr->ddr_wrlvl_cntl);
-
-	/* Set, but do not enable the memory */
-	__raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN,
-			&ddr->sdram_cfg);
-
-	in_be32(&ddr->sdram_cfg);
-	udelay(500);
-
-	/* Let the controller go */
-	out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN);
-	in_be32(&ddr->sdram_cfg);
-
-	set_next_law(0, CONFIG_SYS_SDRAM_SIZE_LAW, LAW_TRGT_IF_DDR_1);
-}
-
 const static u32 sysclk_tbl[] = {
 	66666000, 7499900, 83332500, 8999900,
 	99999000, 11111000, 12499800, 13333200
@@ -83,6 +38,10 @@ void board_init_f(ulong bootflag)
 	u32 plat_ratio, sys_clk, bus_clk;
 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 
+#if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM)
+	set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
+	set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM);
+#endif
 	/* for FPGA */
 	set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
 	set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
@@ -98,19 +57,17 @@ void board_init_f(ulong bootflag)
 
 	puts("\nNAND boot... ");
 
-	/* Initialize the DDR3 */
-	sdram_init();
-
 	/* copy code to RAM and jump to it - this should not return */
 	/* NOTE - code has to be copied out of NAND buffer before
 	 * other blocks can be read.
 	 */
-	relocate_code(CONFIG_SPL_RELOC_STACK, 0,
-			CONFIG_SPL_RELOC_TEXT_BASE);
+	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
+			CONFIG_SYS_NAND_U_BOOT_RELOC);
 }
 
 void board_init_r(gd_t *gd, ulong dest_addr)
 {
+	puts("\nSecond program loader running in sram...");
 	nand_boot();
 }
 
diff --git a/board/freescale/p1022ds/tlb.c b/board/freescale/p1022ds/tlb.c
index 9b14c37..aed8b86 100644
--- a/board/freescale/p1022ds/tlb.c
+++ b/board/freescale/p1022ds/tlb.c
@@ -41,7 +41,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 1, BOOKE_PAGESZ_1M, 1),
 
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 	/* W**G* - Flash/promjet, localbus */
 	/* This will be changed to *I*G* after relocation to RAM. */
 	SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
@@ -75,7 +75,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      0, 7, BOOKE_PAGESZ_4K, 1),
 
 #if defined(CONFIG_SYS_RAMBOOT) || \
-	(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
+	(defined(CONFIG_SPL) && !defined(CONFIG_COMMON_INIT_DDR))
 	/* **** - eSDHC/eSPI/NAND boot */
 	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
 			MAS3_SX|MAS3_SW|MAS3_SR, 0,
diff --git a/board/freescale/p1022ds/tpl.c b/board/freescale/p1022ds/tpl.c
new file mode 100644
index 0000000..628b9e8
--- /dev/null
+++ b/board/freescale/p1022ds/tpl.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <malloc.h>
+#include <i2c.h>
+#include <nand.h>
+#include "../common/ngpixis.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const u32 sysclk_tbl[] = {
+	66666000, 7499900, 83332500, 8999900,
+	99999000, 11111000, 12499800, 13333200
+};
+
+ulong get_effective_memsize(void)
+{
+	return CONFIG_SYS_L2_SIZE;
+}
+
+void board_init_f(ulong bootflag)
+{
+	int px_spd;
+	u32 plat_ratio, sys_clk, bus_clk;
+	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+	console_init_f();
+	/* Set pmuxcr to allow both i2c1 and i2c2 */
+	setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
+	setbits_be32(&gur->pmuxcr,
+		in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
+
+	/* Read back the register to synchronize the write. */
+	in_be32(&gur->pmuxcr);
+
+	/* initialize selected port with appropriate baud rate */
+	px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
+	sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK];
+	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+	bus_clk = sys_clk * plat_ratio / 2;
+
+	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+			bus_clk / 16 / CONFIG_BAUDRATE);
+	/* copy code to RAM and jump to it - this should not return */
+	/* NOTE - code has to be copied out of NAND buffer before
+	 * other blocks can be read.
+	 */
+	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
+			CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	/* Pointer is writable since we allocated a register for it */
+	gd = (gd_t *)CONFIG_SYS_GD_ADDR;
+	bd_t *bd;
+
+	memset(gd, 0, sizeof(gd_t));
+	bd = (bd_t *)(CONFIG_SYS_GD_ADDR + sizeof(gd_t));
+	memset(bd, 0, sizeof(bd_t));
+	gd->bd = bd;
+	bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
+	bd->bi_memsize = CONFIG_SYS_L2_SIZE;
+
+	probecpu();
+	get_clocks();
+	mem_malloc_init(CONFIG_SYS_RELOC_MALLOC_ADDR, \
+			CONFIG_SYS_RELOC_MALLOC_SIZE);
+	/* relocate environment function pointers etc. */
+	nand_load(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+		(uchar *)CONFIG_ENV_ADDR);
+
+	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
+	gd->env_valid = 1;
+
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+	gd->ram_size = initdram(0);
+	puts("Tertiary program loader running in sram...");
+
+	nand_boot();
+}
diff --git a/drivers/mtd/nand/fsl_elbc_spl.c b/drivers/mtd/nand/fsl_elbc_spl.c
index ab208fd..8924e2d 100644
--- a/drivers/mtd/nand/fsl_elbc_spl.c
+++ b/drivers/mtd/nand/fsl_elbc_spl.c
@@ -50,7 +50,7 @@ static void nand_wait(void)
 #ifdef CONFIG_SPL_BUILD
 static
 #endif
-int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
+int nand_load(uint32_t offs, unsigned int uboot_size, void *vdst)
 {
 	fsl_lbc_t *regs = LBC_BASE_ADDR;
 	uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
@@ -140,16 +140,16 @@ void nand_boot(void)
 	/*
 	 * Load U-Boot image from NAND into RAM
 	 */
-	nand_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+	nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS,
 			CONFIG_SYS_NAND_U_BOOT_SIZE,
 			(void *)CONFIG_SYS_NAND_U_BOOT_DST);
 
 #ifdef CONFIG_NAND_ENV_DST
-	nand_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+	nand_load(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 			(void *)CONFIG_NAND_ENV_DST);
 
 #ifdef CONFIG_ENV_OFFSET_REDUND
-	nand_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+	nand_load(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
 			(void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
 #endif
 #endif
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 9e012c4..42e4f42 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -44,7 +44,7 @@
 #define CONFIG_SYS_LDSCRIPT		"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_MMC_BOOT
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_COMMON_INIT_DDR
+#define CONFIG_COMMON_INIT_DDR
 #endif
 #endif
 
@@ -75,7 +75,7 @@
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_SPI_BOOT
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_COMMON_INIT_DDR
+#define CONFIG_COMMON_INIT_DDR
 #endif
 #endif
 
@@ -83,22 +83,41 @@
 
 #ifdef CONFIG_NAND
 #define CONFIG_SPL
+#define CONFIG_TPL
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-
-#define CONFIG_SYS_TEXT_BASE           0x00201000
-#define CONFIG_SPL_TEXT_BASE           0xfffff000
-#define CONFIG_SPL_MAX_SIZE            4096
-#define CONFIG_SPL_RELOC_TEXT_BASE     0x00100000
-#define CONFIG_SPL_RELOC_STACK         0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    ((512 << 10) + CONFIG_SPL_MAX_SIZE)
-#define CONFIG_SYS_NAND_U_BOOT_DST     (0x00200000 - CONFIG_SPL_MAX_SIZE)
-#define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    0
-#define CONFIG_SYS_LDSCRIPT            "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#define CONFIG_SPL_TEXT_BASE		0xff800000
+#define CONFIG_SPL_MAX_SIZE		4096
+#define CONFIG_SPL_PAD_TO		0x20000
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(128 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST	0xf8f80000
+#define CONFIG_SYS_NAND_U_BOOT_START	0xf8f80000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	(128 << 10)
+#endif
+#define CONFIG_SYS_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SYS_ENV_SUPPORT
+#define CONFIG_SYS_SERIAL_SUPPORT
+#define CONFIG_SYS_LIBGENERIC_SUPPORT
+#define CONFIG_SYS_LIBCOMMON_SUPPORT
+#define CONFIG_SYS_I2C_SUPPORT
+#define CONFIG_SYS_NAND_SUPPORT
+#define CONFIG_TPL_TEXT_BASE		0xf8f81000
+#define CONFIG_SYS_MAX_SIZE		(128 << 10)
+#define CONFIG_SYS_PAD_TO		0x20000
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_COMMON_INIT_DDR
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
+#endif
+#define CONFIG_SPL_TARGET		"u-boot-with-tpl.bin"
+#define CONFIG_SYS_TEXT_BASE		0x11001000
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #endif
 
 /* High Level Configuration Options */
@@ -153,7 +172,7 @@
 
 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
        SPL code*/
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_TPL_BUILD)
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 #endif
 
@@ -254,6 +273,8 @@
 #ifndef CONFIG_SYS_MONITOR_BASE
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SPL_TEXT_BASE
+#elif defined(CONFIG_TPL_BUILD)
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_TPL_TEXT_BASE
 #else
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE	/* start of monitor */
 #endif
@@ -335,7 +356,7 @@
 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_MONITOR_LEN		(576 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
 
 /*
@@ -353,7 +374,24 @@
 #define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
 #define CONFIG_SPL_RELOC_MALLOC_SIZE	(96 << 10)
 #define CONFIG_SPL_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#elif defined(CONFIG_NAND)
+#define CONFIG_SYS_INIT_L2_ADDR		0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE		(256 << 10)
+#define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SYS_NAND_U_BOOT_RELOC	(CONFIG_SYS_INIT_L2_END - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
 #endif
+#elif defined(CONFIG_TPL_BUILD)
+#define CONFIG_SYS_INIT_L2_ADDR		0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE		(256 << 10)
+#define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SYS_NAND_U_BOOT_RELOC	0xf8f81000
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	(CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
+#define CONFIG_SYS_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
+#define CONFIG_SYS_RELOC_MALLOC_SIZE	(48 << 10)
+#define CONFIG_SYS_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
 #endif
 
 
@@ -603,8 +641,13 @@
 #define CONFIG_SYS_MMC_ENV_DEV	0
 #elif defined(CONFIG_NAND)
 #define CONFIG_ENV_IS_IN_NAND
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
+#else
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET	((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#endif
+#define CONFIG_ENV_OFFSET	(1024 * 1024)
 #define CONFIG_ENV_RANGE	(3 * CONFIG_ENV_SIZE)
 #elif defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_ENV_IS_NOWHERE	/* Store ENV in memory only */
-- 
1.7.0.4

[U-Boot] [PATCH 7/7 v6] powerpc: p1022ds: support TPL on the P1022DS

[Scott Wood]

On 06/26/2013 02:18:32 AM, ying.zhang at freescale.com wrote:
> diff --git a/Makefile b/Makefile
> index 0513e4d..a3c7282 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -895,7 +895,7 @@ clobber:	tidy
>  	@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
>  	@rm -f $(obj)spl/u-boot-spl.lds
>  	@rm -f $(obj)tpl/{u-boot-tpl,u-boot-tpl.bin,u-boot-tpl.map}
> -	@rm -f $(obj)tpl/u-boot-tpl.lds
> +	@rm -f $(obj)tpl/u-boot-spl.lds

Huh?

>  	@rm -f $(obj)MLO MLO.byteswap
>  	@rm -f $(obj)SPL
>  	@rm -f $(obj)tools/xway-swap-bytes
> @@ -906,6 +906,7 @@ clobber:	tidy
>  	@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type  
> l -print | xargs rm -f
>  	@rm -f $(obj)dts/*.tmp
>  	@rm -f $(obj)spl/u-boot-spl{,-pad}.ais
> +	@rm -f $(obj)tpl/u-boot-tpl{,-pad}.ais

Is there ever a TPL that ends in .ais?

> diff --git a/board/freescale/p1022ds/tpl.c  
> b/board/freescale/p1022ds/tpl.c
> new file mode 100644
> index 0000000..628b9e8
> --- /dev/null
> +++ b/board/freescale/p1022ds/tpl.c
> @@ -0,0 +1,102 @@
> +/*
> + * Copyright 2013 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + *
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#include <common.h>
> +#include <ns16550.h>
> +#include <malloc.h>
> +#include <i2c.h>
> +#include <nand.h>
> +#include "../common/ngpixis.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static const u32 sysclk_tbl[] = {
> +	66666000, 7499900, 83332500, 8999900,
> +	99999000, 11111000, 12499800, 13333200
> +};
> +
> +ulong get_effective_memsize(void)
> +{
> +	return CONFIG_SYS_L2_SIZE;
> +}
> +
> +void board_init_f(ulong bootflag)
> +{
> +	int px_spd;
> +	u32 plat_ratio, sys_clk, bus_clk;
> +	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
> +
> +	console_init_f();
> +	/* Set pmuxcr to allow both i2c1 and i2c2 */
> +	setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
> +	setbits_be32(&gur->pmuxcr,
> +		in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
> +
> +	/* Read back the register to synchronize the write. */
> +	in_be32(&gur->pmuxcr);
> +
> +	/* initialize selected port with appropriate baud rate */
> +	px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
> +	sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK];
> +	plat_ratio = in_be32(&gur->porpllsr) &  
> MPC85xx_PORPLLSR_PLAT_RATIO;
> +	bus_clk = sys_clk * plat_ratio / 2;
> +
> +	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
> +			bus_clk / 16 / CONFIG_BAUDRATE);
> +	/* copy code to RAM and jump to it - this should not return */
> +	/* NOTE - code has to be copied out of NAND buffer before
> +	 * other blocks can be read.
> +	 */
> +	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
> +			CONFIG_SYS_NAND_U_BOOT_RELOC);
> +}
> +
> +void board_init_r(gd_t *gd, ulong dest_addr)
> +{
> +	/* Pointer is writable since we allocated a register for it */
> +	gd = (gd_t *)CONFIG_SYS_GD_ADDR;
> +	bd_t *bd;
> +
> +	memset(gd, 0, sizeof(gd_t));
> +	bd = (bd_t *)(CONFIG_SYS_GD_ADDR + sizeof(gd_t));
> +	memset(bd, 0, sizeof(bd_t));
> +	gd->bd = bd;
> +	bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
> +	bd->bi_memsize = CONFIG_SYS_L2_SIZE;
> +
> +	probecpu();
> +	get_clocks();
> +	mem_malloc_init(CONFIG_SYS_RELOC_MALLOC_ADDR, \
> +			CONFIG_SYS_RELOC_MALLOC_SIZE);
> +	/* relocate environment function pointers etc. */
> +	nand_load(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> +		(uchar *)CONFIG_ENV_ADDR);
> +
> +	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
> +	gd->env_valid = 1;
> +
> +	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
> +
> +	gd->ram_size = initdram(0);
> +	puts("Tertiary program loader running in sram...");
> +
> +	nand_boot();
> +}

This looks a lot like board/freescale/p1022ds/spl.c.  Find a way to  
share them.

Don't hardcode that it's NAND boot.

> diff --git a/drivers/mtd/nand/fsl_elbc_spl.c  
> b/drivers/mtd/nand/fsl_elbc_spl.c
> index ab208fd..8924e2d 100644
> --- a/drivers/mtd/nand/fsl_elbc_spl.c
> +++ b/drivers/mtd/nand/fsl_elbc_spl.c
> @@ -50,7 +50,7 @@ static void nand_wait(void)
>  #ifdef CONFIG_SPL_BUILD
>  static
>  #endif
> -int nand_load_image(uint32_t offs, unsigned int uboot_size, void  
> *vdst)
> +int nand_load(uint32_t offs, unsigned int uboot_size, void *vdst)
>  {
>  	fsl_lbc_t *regs = LBC_BASE_ADDR;
>  	uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
> @@ -140,16 +140,16 @@ void nand_boot(void)
>  	/*
>  	 * Load U-Boot image from NAND into RAM
>  	 */
> -	nand_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
> +	nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS,
>  			CONFIG_SYS_NAND_U_BOOT_SIZE,
>  			(void *)CONFIG_SYS_NAND_U_BOOT_DST);
> 
>  #ifdef CONFIG_NAND_ENV_DST
> -	nand_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> +	nand_load(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>  			(void *)CONFIG_NAND_ENV_DST);
> 
>  #ifdef CONFIG_ENV_OFFSET_REDUND
> -	nand_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> +	nand_load(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>  			(void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>  #endif
>  #endif

Why?

-Scott