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* [RFC 0/9] Consolidate AM335x and OMAP4 PRM/CM APIs
@ 2013-07-02 11:28 ` Vaibhav Bedia
  0 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

Even though there are differences in the PRCM features on different
TI SoCs (mostly OMAP3+) the underlying PRCM architecture is similar
on OMAP4+, AM335x, AM437x (and DM81xx). With some rework of the OMAP4
APIs we can easily consolidate the low level PRM/CM APIs for these
SoCs and cut down 800+ lines under mach-omap2.

These patches go on top of v3.10-rc7 (would rebase once 3.11-rc1 is out)
and have been boot tested on AM335x EVM. I have tried to ensure OMAP4+
is not affected but any testing on OMAP4+ would be helpful.

NOTE: The last patch which has the AM335x restart function would need
to be reworked since the OMAP4 code is moving to a different file.

Vaibhav Bedia (9):
  ARM: OMAP2+: AM335X: Add a constant CM_INST for all the clkdomains
  ARM: OMAP2+: CM code: Reintroduce SW_SLEEP for OMAP4 class of devices
  ARM: OMAP2+: AM335X: Add a constant PRCM_PARITION for the pwrdomains
  ARM: OMAP4: PRM: Get rid of hardcoded offsets
  ARM: OMAP4: Add offsets for pwrstctrl and pwrstst
  ARM: OMAP4: CM code: Remove the check for non-zero clkctrl_offs
  ARM: OMAP4: Generalize reset handling API
  ARM: OMAP2+: AM335x: Migrate to OMAP4 PRM/CM APIs
  ARM: OMAP2+: AM33XX: Get rid of custom PRM, CM APIs

 arch/arm/mach-omap2/Makefile                |   3 +-
 arch/arm/mach-omap2/am33xx-restart.c        |  34 ---
 arch/arm/mach-omap2/clockdomains33xx_data.c |  18 ++
 arch/arm/mach-omap2/cm33xx.c                | 364 ----------------------------
 arch/arm/mach-omap2/cm33xx.h                |  41 +---
 arch/arm/mach-omap2/cminst44xx.c            |  31 ++-
 arch/arm/mach-omap2/io.c                    |   3 +
 arch/arm/mach-omap2/omap4-common.c          |  14 ++
 arch/arm/mach-omap2/omap_hwmod.c            | 184 +-------------
 arch/arm/mach-omap2/powerdomains33xx_data.c |   6 +
 arch/arm/mach-omap2/powerdomains44xx_data.c |  32 +++
 arch/arm/mach-omap2/prm33xx.c               | 338 --------------------------
 arch/arm/mach-omap2/prm33xx.h               |  12 +-
 arch/arm/mach-omap2/prm44xx.c               |  45 ++--
 arch/arm/mach-omap2/prminst44xx.c           |  47 +++-
 arch/arm/mach-omap2/prminst44xx.h           |   6 +-
 16 files changed, 183 insertions(+), 995 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/am33xx-restart.c
 delete mode 100644 arch/arm/mach-omap2/cm33xx.c
 delete mode 100644 arch/arm/mach-omap2/prm33xx.c

-- 
1.8.1


^ permalink raw reply	[flat|nested] 11+ messages in thread
* [RFC 0/9] Consolidate AM335x and OMAP4 PRM/CM APIs
@ 2013-07-02 11:28 ` Vaibhav Bedia
  0 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-arm-kernel

Even though there are differences in the PRCM features on different
TI SoCs (mostly OMAP3+) the underlying PRCM architecture is similar
on OMAP4+, AM335x, AM437x (and DM81xx). With some rework of the OMAP4
APIs we can easily consolidate the low level PRM/CM APIs for these
SoCs and cut down 800+ lines under mach-omap2.

These patches go on top of v3.10-rc7 (would rebase once 3.11-rc1 is out)
and have been boot tested on AM335x EVM. I have tried to ensure OMAP4+
is not affected but any testing on OMAP4+ would be helpful.

NOTE: The last patch which has the AM335x restart function would need
to be reworked since the OMAP4 code is moving to a different file.

Vaibhav Bedia (9):
  ARM: OMAP2+: AM335X: Add a constant CM_INST for all the clkdomains
  ARM: OMAP2+: CM code: Reintroduce SW_SLEEP for OMAP4 class of devices
  ARM: OMAP2+: AM335X: Add a constant PRCM_PARITION for the pwrdomains
  ARM: OMAP4: PRM: Get rid of hardcoded offsets
  ARM: OMAP4: Add offsets for pwrstctrl and pwrstst
  ARM: OMAP4: CM code: Remove the check for non-zero clkctrl_offs
  ARM: OMAP4: Generalize reset handling API
  ARM: OMAP2+: AM335x: Migrate to OMAP4 PRM/CM APIs
  ARM: OMAP2+: AM33XX: Get rid of custom PRM, CM APIs

 arch/arm/mach-omap2/Makefile                |   3 +-
 arch/arm/mach-omap2/am33xx-restart.c        |  34 ---
 arch/arm/mach-omap2/clockdomains33xx_data.c |  18 ++
 arch/arm/mach-omap2/cm33xx.c                | 364 ----------------------------
 arch/arm/mach-omap2/cm33xx.h                |  41 +---
 arch/arm/mach-omap2/cminst44xx.c            |  31 ++-
 arch/arm/mach-omap2/io.c                    |   3 +
 arch/arm/mach-omap2/omap4-common.c          |  14 ++
 arch/arm/mach-omap2/omap_hwmod.c            | 184 +-------------
 arch/arm/mach-omap2/powerdomains33xx_data.c |   6 +
 arch/arm/mach-omap2/powerdomains44xx_data.c |  32 +++
 arch/arm/mach-omap2/prm33xx.c               | 338 --------------------------
 arch/arm/mach-omap2/prm33xx.h               |  12 +-
 arch/arm/mach-omap2/prm44xx.c               |  45 ++--
 arch/arm/mach-omap2/prminst44xx.c           |  47 +++-
 arch/arm/mach-omap2/prminst44xx.h           |   6 +-
 16 files changed, 183 insertions(+), 995 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/am33xx-restart.c
 delete mode 100644 arch/arm/mach-omap2/cm33xx.c
 delete mode 100644 arch/arm/mach-omap2/prm33xx.c

-- 
1.8.1

^ permalink raw reply	[flat|nested] 11+ messages in thread
* [RFC 1/9] ARM: OMAP2+: AM335X: Add a constant CM_INST for all the clkdomains
  2013-07-02 11:28 ` Vaibhav Bedia
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

OMAP4 style PRM, CM APIs expect the clkdomains to specify a
cm_inst. Introduce a CM_INST for the AM335x clkdomains so that
we can eventually consolidate the code.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/clockdomains33xx_data.c | 18 ++++++++++++++++++
 arch/arm/mach-omap2/cm33xx.h                |  2 ++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm/mach-omap2/clockdomains33xx_data.c b/arch/arm/mach-omap2/clockdomains33xx_data.c
index 32c90fd..819a6bf 100644
--- a/arch/arm/mach-omap2/clockdomains33xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains33xx_data.c
@@ -25,6 +25,7 @@
 static struct clockdomain l4ls_am33xx_clkdm = {
 	.name		= "l4ls_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -33,6 +34,7 @@ static struct clockdomain l4ls_am33xx_clkdm = {
 static struct clockdomain l3s_am33xx_clkdm = {
 	.name		= "l3s_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_L3S_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -41,6 +43,7 @@ static struct clockdomain l3s_am33xx_clkdm = {
 static struct clockdomain l4fw_am33xx_clkdm = {
 	.name		= "l4fw_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_L4FW_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -49,6 +52,7 @@ static struct clockdomain l4fw_am33xx_clkdm = {
 static struct clockdomain l3_am33xx_clkdm = {
 	.name		= "l3_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_L3_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -57,6 +61,7 @@ static struct clockdomain l3_am33xx_clkdm = {
 static struct clockdomain l4hs_am33xx_clkdm = {
 	.name		= "l4hs_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_L4HS_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -65,6 +70,7 @@ static struct clockdomain l4hs_am33xx_clkdm = {
 static struct clockdomain ocpwp_l3_am33xx_clkdm = {
 	.name		= "ocpwp_l3_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -73,6 +79,7 @@ static struct clockdomain ocpwp_l3_am33xx_clkdm = {
 static struct clockdomain pruss_ocp_am33xx_clkdm = {
 	.name		= "pruss_ocp_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_PRUSS_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -81,6 +88,7 @@ static struct clockdomain pruss_ocp_am33xx_clkdm = {
 static struct clockdomain cpsw_125mhz_am33xx_clkdm = {
 	.name		= "cpsw_125mhz_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_CPSW_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -89,6 +97,7 @@ static struct clockdomain cpsw_125mhz_am33xx_clkdm = {
 static struct clockdomain lcdc_am33xx_clkdm = {
 	.name		= "lcdc_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_LCDC_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -97,6 +106,7 @@ static struct clockdomain lcdc_am33xx_clkdm = {
 static struct clockdomain clk_24mhz_am33xx_clkdm = {
 	.name		= "clk_24mhz_clkdm",
 	.pwrdm		= { .name = "per_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_PER_MOD,
 	.clkdm_offs	= AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -105,6 +115,7 @@ static struct clockdomain clk_24mhz_am33xx_clkdm = {
 static struct clockdomain l4_wkup_am33xx_clkdm = {
 	.name		= "l4_wkup_clkdm",
 	.pwrdm		= { .name = "wkup_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_WKUP_MOD,
 	.clkdm_offs	= AM33XX_CM_WKUP_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -113,6 +124,7 @@ static struct clockdomain l4_wkup_am33xx_clkdm = {
 static struct clockdomain l3_aon_am33xx_clkdm = {
 	.name		= "l3_aon_clkdm",
 	.pwrdm		= { .name = "wkup_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_WKUP_MOD,
 	.clkdm_offs	= AM33XX_CM_L3_AON_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -121,6 +133,7 @@ static struct clockdomain l3_aon_am33xx_clkdm = {
 static struct clockdomain l4_wkup_aon_am33xx_clkdm = {
 	.name		= "l4_wkup_aon_clkdm",
 	.pwrdm		= { .name = "wkup_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_WKUP_MOD,
 	.clkdm_offs	= AM33XX_CM_L4_WKUP_AON_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -129,6 +142,7 @@ static struct clockdomain l4_wkup_aon_am33xx_clkdm = {
 static struct clockdomain mpu_am33xx_clkdm = {
 	.name		= "mpu_clkdm",
 	.pwrdm		= { .name = "mpu_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_MPU_MOD,
 	.clkdm_offs	= AM33XX_CM_MPU_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -137,6 +151,7 @@ static struct clockdomain mpu_am33xx_clkdm = {
 static struct clockdomain l4_rtc_am33xx_clkdm = {
 	.name		= "l4_rtc_clkdm",
 	.pwrdm		= { .name = "rtc_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_RTC_MOD,
 	.clkdm_offs	= AM33XX_CM_RTC_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -145,6 +160,7 @@ static struct clockdomain l4_rtc_am33xx_clkdm = {
 static struct clockdomain gfx_l3_am33xx_clkdm = {
 	.name		= "gfx_l3_clkdm",
 	.pwrdm		= { .name = "gfx_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_GFX_MOD,
 	.clkdm_offs	= AM33XX_CM_GFX_L3_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -153,6 +169,7 @@ static struct clockdomain gfx_l3_am33xx_clkdm = {
 static struct clockdomain gfx_l4ls_gfx_am33xx_clkdm = {
 	.name		= "gfx_l4ls_gfx_clkdm",
 	.pwrdm		= { .name = "gfx_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_GFX_MOD,
 	.clkdm_offs	= AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
@@ -161,6 +178,7 @@ static struct clockdomain gfx_l4ls_gfx_am33xx_clkdm = {
 static struct clockdomain l4_cefuse_am33xx_clkdm = {
 	.name		= "l4_cefuse_clkdm",
 	.pwrdm		= { .name = "cefuse_pwrdm" },
+	.prcm_partition	= AM33XX_CM_PARTITION,
 	.cm_inst	= AM33XX_CM_CEFUSE_MOD,
 	.clkdm_offs	= AM33XX_CM_CEFUSE_CLKSTCTRL_OFFSET,
 	.flags		= CLKDM_CAN_SWSUP,
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 64f4baf..452351f 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -29,6 +29,8 @@
 #define AM33XX_CM_REGADDR(inst, reg)				\
 	AM33XX_L4_WK_IO_ADDRESS(AM33XX_CM_BASE + (inst) + (reg))
 
+#define AM33XX_CM_PARTITION	1
+
 /* CM instances */
 #define AM33XX_CM_PER_MOD		0x0000
 #define AM33XX_CM_WKUP_MOD		0x0400
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 2/9] ARM: OMAP2+: CM code: Reintroduce SW_SLEEP for OMAP4 class of devices
  2013-07-02 11:28 ` Vaibhav Bedia
  (?)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

Commit 65aa94b (ARM: OMAP4: clockdomain/CM code: Update supported transition modes)
removed SW_SLEEP mode for clockdomains on OMAP4 class of devices. Not having
SW_SLEEP mode works fine for OMAP4/5 devices but it gets in the way of other
devices like AM335x which have the same hardware underneath but support only
SW_SLEEP/SW_WKUP modes. So far, AM335x has been uses its own set of PRM/CM
APIs and hence the lack of SW_SLEEP mode in the OMAP4 code was not a problem.
However we would like to consolidate the AM335x and OMAP4 code and reintroducing
this mode is necessary. Doing so also makes the API consistent with what
the comments states.

While here also fixup a trivial typo in the comment.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/cminst44xx.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index f0290f5..2d1d4ef 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -237,7 +237,7 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs)
 }
 
 /**
- * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
+ * omap4_cminst_clkdm_force_wakeup - try to take a clockdomain out of idle
  * @part: PRCM partition ID that the clockdomain registers exist in
  * @inst: CM instance register offset (*_INST macro)
  * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
@@ -250,6 +250,20 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs)
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
 }
 
+/**
+ * omap4_cminst_clkdm_force_sleep - try to put a clockdomain to idle
+ * @part: PRCM partition ID that the clockdomain registers exist in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ *
+ * Put a clockdomain referred to by (@part, @inst, @cdoffs) to idle,
+ * forcing it to sleep.  No return value.
+ */
+void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs)
+{
+	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
+}
+
 /*
  *
  */
@@ -404,7 +418,7 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
 
 static int omap4_clkdm_sleep(struct clockdomain *clkdm)
 {
-	omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
+	omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
 					clkdm->cm_inst, clkdm->clkdm_offs);
 	return 0;
 }
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 3/9] ARM: OMAP2+: AM335X: Add a constant PRCM_PARITION for the pwrdomains
  2013-07-02 11:28 ` Vaibhav Bedia
                   ` (2 preceding siblings ...)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

OMAP4 style PRM, CM APIs expect the pwrdomains to specify a
prcm_partition. Introduce a PRCM_PARTITION for the AM335x
pwrdomains so that we can eventually consolidate the code.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/powerdomains33xx_data.c | 6 ++++++
 arch/arm/mach-omap2/prm33xx.h               | 1 +
 2 files changed, 7 insertions(+)

diff --git a/arch/arm/mach-omap2/powerdomains33xx_data.c b/arch/arm/mach-omap2/powerdomains33xx_data.c
index 869adb8..646e912 100644
--- a/arch/arm/mach-omap2/powerdomains33xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains33xx_data.c
@@ -24,6 +24,7 @@
 static struct powerdomain gfx_33xx_pwrdm = {
 	.name			= "gfx_pwrdm",
 	.voltdm			= { .name = "core" },
+	.prcm_partition		= AM33XX_PRM_PARTITION,
 	.prcm_offs		= AM33XX_PRM_GFX_MOD,
 	.pwrstctrl_offs		= AM33XX_PM_GFX_PWRSTCTRL_OFFSET,
 	.pwrstst_offs		= AM33XX_PM_GFX_PWRSTST_OFFSET,
@@ -55,6 +56,7 @@ static struct powerdomain gfx_33xx_pwrdm = {
 static struct powerdomain rtc_33xx_pwrdm = {
 	.name			= "rtc_pwrdm",
 	.voltdm			= { .name = "rtc" },
+	.prcm_partition		= AM33XX_PRM_PARTITION,
 	.prcm_offs		= AM33XX_PRM_RTC_MOD,
 	.pwrstctrl_offs		= AM33XX_PM_RTC_PWRSTCTRL_OFFSET,
 	.pwrstst_offs		= AM33XX_PM_RTC_PWRSTST_OFFSET,
@@ -65,6 +67,7 @@ static struct powerdomain rtc_33xx_pwrdm = {
 static struct powerdomain wkup_33xx_pwrdm = {
 	.name			= "wkup_pwrdm",
 	.voltdm			= { .name = "core" },
+	.prcm_partition		= AM33XX_PRM_PARTITION,
 	.prcm_offs		= AM33XX_PRM_WKUP_MOD,
 	.pwrstctrl_offs		= AM33XX_PM_WKUP_PWRSTCTRL_OFFSET,
 	.pwrstst_offs		= AM33XX_PM_WKUP_PWRSTST_OFFSET,
@@ -75,6 +78,7 @@ static struct powerdomain wkup_33xx_pwrdm = {
 static struct powerdomain per_33xx_pwrdm = {
 	.name			= "per_pwrdm",
 	.voltdm			= { .name = "core" },
+	.prcm_partition		= AM33XX_PRM_PARTITION,
 	.prcm_offs		= AM33XX_PRM_PER_MOD,
 	.pwrstctrl_offs		= AM33XX_PM_PER_PWRSTCTRL_OFFSET,
 	.pwrstst_offs		= AM33XX_PM_PER_PWRSTST_OFFSET,
@@ -118,6 +122,7 @@ static struct powerdomain per_33xx_pwrdm = {
 static struct powerdomain mpu_33xx_pwrdm = {
 	.name			= "mpu_pwrdm",
 	.voltdm			= { .name = "mpu" },
+	.prcm_partition		= AM33XX_PRM_PARTITION,
 	.prcm_offs		= AM33XX_PRM_MPU_MOD,
 	.pwrstctrl_offs		= AM33XX_PM_MPU_PWRSTCTRL_OFFSET,
 	.pwrstst_offs		= AM33XX_PM_MPU_PWRSTST_OFFSET,
@@ -161,6 +166,7 @@ static struct powerdomain mpu_33xx_pwrdm = {
 static struct powerdomain cefuse_33xx_pwrdm = {
 	.name		= "cefuse_pwrdm",
 	.voltdm		= { .name = "core" },
+	.prcm_partition	= AM33XX_PRM_PARTITION,
 	.prcm_offs	= AM33XX_PRM_CEFUSE_MOD,
 	.pwrstctrl_offs	= AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET,
 	.pwrstst_offs	= AM33XX_PM_CEFUSE_PWRSTST_OFFSET,
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 9b9918d..c82b22b2 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -24,6 +24,7 @@
 #define AM33XX_PRM_REGADDR(inst, reg)                         \
 	AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRM_BASE + (inst) + (reg))
 
+#define AM33XX_PRM_PARTITION	1
 
 /* PRM instances */
 #define AM33XX_PRM_OCP_SOCKET_MOD	0x0B00
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 4/9] ARM: OMAP4: PRM: Get rid of hardcoded offsets
  2013-07-02 11:28 ` Vaibhav Bedia
                   ` (3 preceding siblings ...)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

Instead of hardcoded offsets of PWRSTCTRL and PWRSTST
use the offsets from the pwrdomain data. This helps
us in reusing the same code across OMAP4 and AM335x.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 415c7e0..11f56a7 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -384,7 +384,8 @@ static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
 	omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK,
 					(pwrst << OMAP_POWERSTATE_SHIFT),
 					pwrdm->prcm_partition,
-					pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
+					pwrdm->prcm_offs,
+					pwrdm->pwrstctrl_offs);
 	return 0;
 }
 
@@ -393,7 +394,7 @@ static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
 	u32 v;
 
 	v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTCTRL);
+					pwrdm->pwrstctrl_offs);
 	v &= OMAP_POWERSTATE_MASK;
 	v >>= OMAP_POWERSTATE_SHIFT;
 
@@ -405,7 +406,7 @@ static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
 	u32 v;
 
 	v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTST);
+					pwrdm->pwrstst_offs);
 	v &= OMAP_POWERSTATEST_MASK;
 	v >>= OMAP_POWERSTATEST_SHIFT;
 
@@ -417,7 +418,7 @@ static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
 	u32 v;
 
 	v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTST);
+					pwrdm->pwrstst_offs);
 	v &= OMAP4430_LASTPOWERSTATEENTERED_MASK;
 	v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT;
 
@@ -429,7 +430,8 @@ static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
 	omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
 					(1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
 					pwrdm->prcm_partition,
-					pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
+					pwrdm->prcm_offs,
+					pwrdm->pwrstctrl_offs);
 	return 0;
 }
 
@@ -438,7 +440,7 @@ static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
 	omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
 					OMAP4430_LASTPOWERSTATEENTERED_MASK,
 					pwrdm->prcm_partition,
-					pwrdm->prcm_offs, OMAP4_PM_PWSTST);
+					pwrdm->prcm_offs, pwrdm->pwrstst_offs);
 	return 0;
 }
 
@@ -449,7 +451,7 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
 	v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
 	omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
 					pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTCTRL);
+					pwrdm->pwrstctrl_offs);
 
 	return 0;
 }
@@ -463,7 +465,7 @@ static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
 
 	omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
 					pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTCTRL);
+					pwrdm->pwrstctrl_offs);
 
 	return 0;
 }
@@ -477,7 +479,7 @@ static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
 
 	omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
 					pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTCTRL);
+					pwrdm->pwrstctrl_offs);
 
 	return 0;
 }
@@ -487,7 +489,7 @@ static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
 	u32 v;
 
 	v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTST);
+					pwrdm->pwrstst_offs);
 	v &= OMAP4430_LOGICSTATEST_MASK;
 	v >>= OMAP4430_LOGICSTATEST_SHIFT;
 
@@ -499,7 +501,7 @@ static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
 	u32 v;
 
 	v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTCTRL);
+					pwrdm->pwrstctrl_offs);
 	v &= OMAP4430_LOGICRETSTATE_MASK;
 	v >>= OMAP4430_LOGICRETSTATE_SHIFT;
 
@@ -541,7 +543,7 @@ static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
 	m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
 
 	v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTST);
+					pwrdm->pwrstst_offs);
 	v &= m;
 	v >>= __ffs(m);
 
@@ -555,7 +557,7 @@ static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
 	m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
 
 	v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-					OMAP4_PM_PWSTCTRL);
+					pwrdm->pwrstctrl_offs);
 	v &= m;
 	v >>= __ffs(m);
 
@@ -604,7 +606,7 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
 	/* XXX Is this udelay() value meaningful? */
 	while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition,
 					    pwrdm->prcm_offs,
-					    OMAP4_PM_PWSTST) &
+					    pwrdm->pwrstst_offs) &
 		OMAP_INTRANSITION_MASK) &&
 	       (c++ < PWRDM_TRANSITION_BAILOUT))
 		udelay(1);
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 5/9] ARM: OMAP4: Add offsets for pwrstctrl and pwrstst
  2013-07-02 11:28 ` Vaibhav Bedia
                   ` (4 preceding siblings ...)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

OMAP4 powerdomains have a consistent register layout
and so far the pwrstctrl and pwrstst offsets were
hardcoded in the lowlevel APIs.

AM335x powerdomains don't have a consistent register
layout and hence the offsets used in the lowlevel APIs
need to be removed. As part of the AM335x work two additional
fields pwrstctrl_offs and pwrstst_offs were introduced in
the pwrdomain data structure. To enable consolidation of
AM335x and OMAP4 lowlevel APIs add in the appropriate
offsets to the OMAP4 pwrdomains.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/powerdomains44xx_data.c | 32 +++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 704664c..ed53787 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -36,6 +36,8 @@ static struct powerdomain core_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_CORE_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 5,
@@ -62,6 +64,8 @@ static struct powerdomain gfx_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_GFX_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
 	.pwrsts_mem_ret	= {
@@ -79,6 +83,8 @@ static struct powerdomain abe_44xx_pwrdm = {
 	.voltdm		  = { .name = "iva" },
 	.prcm_offs	  = OMAP4430_PRM_ABE_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF,
 	.banks		  = 2,
@@ -99,6 +105,8 @@ static struct powerdomain dss_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_DSS_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF,
 	.banks		  = 1,
@@ -117,6 +125,8 @@ static struct powerdomain tesla_44xx_pwrdm = {
 	.voltdm		  = { .name = "iva" },
 	.prcm_offs	  = OMAP4430_PRM_TESLA_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 3,
@@ -139,6 +149,8 @@ static struct powerdomain wkup_44xx_pwrdm = {
 	.voltdm		  = { .name = "wakeup" },
 	.prcm_offs	  = OMAP4430_PRM_WKUP_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_ON,
 	.banks		  = 1,
 	.pwrsts_mem_ret	= {
@@ -155,6 +167,8 @@ static struct powerdomain cpu0_44xx_pwrdm = {
 	.voltdm		  = { .name = "mpu" },
 	.prcm_offs	  = OMAP4430_PRCM_MPU_CPU0_INST,
 	.prcm_partition	  = OMAP4430_PRCM_MPU_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 1,
@@ -172,6 +186,8 @@ static struct powerdomain cpu1_44xx_pwrdm = {
 	.voltdm		  = { .name = "mpu" },
 	.prcm_offs	  = OMAP4430_PRCM_MPU_CPU1_INST,
 	.prcm_partition	  = OMAP4430_PRCM_MPU_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 1,
@@ -189,6 +205,8 @@ static struct powerdomain emu_44xx_pwrdm = {
 	.voltdm		  = { .name = "wakeup" },
 	.prcm_offs	  = OMAP4430_PRM_EMU_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
 	.pwrsts_mem_ret	= {
@@ -205,6 +223,8 @@ static struct powerdomain mpu_44xx_pwrdm = {
 	.voltdm		  = { .name = "mpu" },
 	.prcm_offs	  = OMAP4430_PRM_MPU_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 3,
@@ -226,6 +246,8 @@ static struct powerdomain ivahd_44xx_pwrdm = {
 	.voltdm		  = { .name = "iva" },
 	.prcm_offs	  = OMAP4430_PRM_IVAHD_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF,
 	.banks		  = 4,
@@ -250,6 +272,8 @@ static struct powerdomain cam_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_CAM_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
 	.pwrsts_mem_ret	= {
@@ -267,6 +291,8 @@ static struct powerdomain l3init_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_L3INIT_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 1,
@@ -285,6 +311,8 @@ static struct powerdomain l4per_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_L4PER_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 2,
@@ -308,6 +336,8 @@ static struct powerdomain always_on_core_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_ALWAYS_ON_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_ON,
 };
 
@@ -317,6 +347,8 @@ static struct powerdomain cefuse_44xx_pwrdm = {
 	.voltdm		  = { .name = "core" },
 	.prcm_offs	  = OMAP4430_PRM_CEFUSE_INST,
 	.prcm_partition	  = OMAP4430_PRM_PARTITION,
+	.pwrstctrl_offs	  = OMAP4_PM_PWSTCTRL,
+	.pwrstst_offs	  = OMAP4_PM_PWSTST,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 6/9] ARM: OMAP4: CM code: Remove the check for non-zero clkctrl_offs
  2013-07-02 11:28 ` Vaibhav Bedia
                   ` (5 preceding siblings ...)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

AM335x which will migrate to the OMAP4 APIs in subsequent patches
has one CLKCTRL at offset 0. A similar check existed in the AM335x
custom APIs and that was removed to fix a crash on boot in commit
169c82a (ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bug).

Do the same in the OMAP4 API to avoid any regressions on AM335x
when it switches over to these APIs.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/cminst44xx.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 2d1d4ef..4ec9712 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -285,9 +285,6 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs,
 {
 	int i = 0;
 
-	if (!clkctrl_offs)
-		return 0;
-
 	omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs),
 			  MAX_MODULE_READY_TIME, i);
 
@@ -310,9 +307,6 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off
 {
 	int i = 0;
 
-	if (!clkctrl_offs)
-		return 0;
-
 	omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
 			   CLKCTRL_IDLEST_DISABLED),
 			  MAX_MODULE_DISABLE_TIME, i);
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 7/9] ARM: OMAP4: Generalize reset handling API
  2013-07-02 11:28 ` Vaibhav Bedia
                   ` (6 preceding siblings ...)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

Reset status bits on AM335x have different masks and register
is not consistent across powerdomains. Generalize the OMAP4
reset handling code to take care of these.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c  |  7 +++----
 arch/arm/mach-omap2/prminst44xx.c | 27 +++++++++++++++++++--------
 arch/arm/mach-omap2/prminst44xx.h |  5 +++--
 3 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 7341eff..0f756b4 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -3011,13 +3011,12 @@ static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
 	if (!oh->clkdm)
 		return -EINVAL;
 
-	if (ohri->st_shift)
-		pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
-		       oh->name, ohri->name);
 	return omap4_prminst_deassert_hardreset(ohri->rst_shift,
+				ohri->st_shift,
 				oh->clkdm->pwrdm.ptr->prcm_partition,
 				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+				oh->prcm.omap4.rstctrl_offs,
+				oh->prcm.omap4.rstst_offs);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index c12320c..5e165ea 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -136,26 +136,37 @@ int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
-				     u16 rstctrl_offs)
+int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst,
+				     u16 rstctrl_offs, u16 rstst_offs)
 {
 	int c;
-	u32 mask = 1 << shift;
-	u16 rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET;
+	u32 ctrl_mask = 1 << shift;
+	u32 st_mask;
+
+	if (!rstst_offs)
+		rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET;
+
+	if (!st_shift) {
+		st_mask = 1 << shift;
+		st_shift = shift;
+	} else {
+		st_mask = 1 << st_shift;
+	}
 
 	/* Check the current status to avoid de-asserting the line twice */
 	if (omap4_prminst_is_hardreset_asserted(shift, part, inst,
 						rstctrl_offs) == 0)
 		return -EEXIST;
 
+
 	/* Clear the reset status by writing 1 to the status bit */
-	omap4_prminst_rmw_inst_reg_bits(0xffffffff, mask, part, inst,
+	omap4_prminst_rmw_inst_reg_bits(0xffffffff, st_mask, part, inst,
 					rstst_offs);
 	/* de-assert the reset control line */
-	omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs);
+	omap4_prminst_rmw_inst_reg_bits(ctrl_mask, 0, part, inst, rstctrl_offs);
 	/* wait the status to be set */
-	omap_test_timeout(omap4_prminst_is_hardreset_asserted(shift, part, inst,
-							      rstst_offs),
+	omap_test_timeout(omap4_prminst_is_hardreset_asserted(st_shift, part,
+							inst, rstst_offs),
 			  MAX_MODULE_HARDRESET_WAIT, c);
 
 	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
index a2ede2d..3973212 100644
--- a/arch/arm/mach-omap2/prminst44xx.h
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -27,8 +27,9 @@ extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
 					       u16 rstctrl_offs);
 extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
 					  u16 rstctrl_offs);
-extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
-					    u16 rstctrl_offs);
+extern int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
+					    s16 inst, u16 rstctrl_offs,
+					    u16 rstst_offs);
 
 extern void omap_prm_base_init(void);
 
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 8/9] ARM: OMAP2+: AM335x: Migrate to OMAP4 PRM/CM APIs
  2013-07-02 11:28 ` Vaibhav Bedia
                   ` (7 preceding siblings ...)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

With all the minor issues addressed in previous patches
we can now safely migrate over AM335x to OMAP4 APIs and
get rid of the AM335x version of the same.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/cminst44xx.c |   7 ++
 arch/arm/mach-omap2/io.c         |   3 +
 arch/arm/mach-omap2/omap_hwmod.c | 177 ++-------------------------------------
 arch/arm/mach-omap2/prm44xx.c    |  15 ++++
 4 files changed, 31 insertions(+), 171 deletions(-)

diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 4ec9712..2937c54 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -491,3 +491,10 @@ struct clkdm_ops omap4_clkdm_operations = {
 	.clkdm_clk_enable	= omap4_clkdm_clk_enable,
 	.clkdm_clk_disable	= omap4_clkdm_clk_disable,
 };
+
+struct clkdm_ops am33xx_clkdm_operations = {
+	.clkdm_sleep		= omap4_clkdm_sleep,
+	.clkdm_wakeup		= omap4_clkdm_wakeup,
+	.clkdm_clk_enable	= omap4_clkdm_clk_enable,
+	.clkdm_clk_disable	= omap4_clkdm_clk_disable,
+};
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 09abf99..dbfabab 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -575,8 +575,11 @@ void __init am33xx_init_early(void)
 				  NULL);
 	omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
 	omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
+	omap_prm_base_init();
+	omap_cm_base_init();
 	omap3xxx_check_revision();
 	ti81xx_check_features();
+	omap44xx_prm_init();
 	am33xx_voltagedomains_init();
 	am33xx_powerdomains_init();
 	am33xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 0f756b4..3385bab 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -953,26 +953,6 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Enables the PRCM module mode related to the hwmod @oh.
- * No return value.
- */
-static void _am33xx_enable_module(struct omap_hwmod *oh)
-{
-	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
-		return;
-
-	pr_debug("omap_hwmod: %s: %s: %d\n",
-		 oh->name, __func__, oh->prcm.omap4.modulemode);
-
-	am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
-				oh->clkdm->clkdm_offs,
-				oh->prcm.omap4.clkctrl_offs);
-}
-
-/**
  * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  * @oh: struct omap_hwmod *
  *
@@ -999,31 +979,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to enter slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully enters
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_idle() function.
- */
-static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
-{
-	if (!oh)
-		return -EINVAL;
-
-	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
-		return 0;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
-					     oh->clkdm->clkdm_offs,
-					     oh->prcm.omap4.clkctrl_offs);
-}
-
-/**
  * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  * @oh: struct omap_hwmod *oh
  *
@@ -1837,36 +1792,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Disable the PRCM module mode related to the hwmod @oh.
- * Return EINVAL if the modulemode is not supported and 0 in case of success.
- */
-static int _am33xx_disable_module(struct omap_hwmod *oh)
-{
-	int v;
-
-	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
-		return -EINVAL;
-
-	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
-
-	if (_are_any_hardreset_lines_asserted(oh))
-		return 0;
-
-	am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
-				 oh->prcm.omap4.clkctrl_offs);
-
-	v = _am33xx_wait_target_disable(oh);
-	if (v)
-		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
-			oh->name);
-
-	return 0;
-}
-
-/**
  * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  * @oh: struct omap_hwmod *
  *
@@ -2887,33 +2812,6 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_wait_target_ready - wait for a module to leave slave idle
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to leave slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully leaves
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_ready() function.
- */
-static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
-{
-	if (!oh || !oh->clkdm)
-		return -EINVAL;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	if (!_find_mpu_rt_port(oh))
-		return 0;
-
-	/* XXX check module SIDLEMODE, hardreset status */
-
-	return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
-					      oh->clkdm->clkdm_offs,
-					      oh->prcm.omap4.clkctrl_offs);
-}
-
-/**
  * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  * @oh: struct omap_hwmod * to assert hardreset
  * @ohri: hardreset line data
@@ -3043,69 +2941,6 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
 				oh->prcm.omap4.rstctrl_offs);
 }
 
-/**
- * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
- * @oh: struct omap_hwmod * to assert hardreset
- * @ohri: hardreset line data
- *
- * Call am33xx_prminst_assert_hardreset() with parameters extracted
- * from the hwmod @oh and the hardreset line data @ohri.  Only
- * intended for use as an soc_ops function pointer.  Passes along the
- * return value from am33xx_prminst_assert_hardreset().  XXX This
- * function is scheduled for removal when the PRM code is moved into
- * drivers/.
- */
-static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
-				   struct omap_hwmod_rst_info *ohri)
-
-{
-	return am33xx_prm_assert_hardreset(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
-}
-
-/**
- * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
- * @oh: struct omap_hwmod * to deassert hardreset
- * @ohri: hardreset line data
- *
- * Call am33xx_prminst_deassert_hardreset() with parameters extracted
- * from the hwmod @oh and the hardreset line data @ohri.  Only
- * intended for use as an soc_ops function pointer.  Passes along the
- * return value from am33xx_prminst_deassert_hardreset().  XXX This
- * function is scheduled for removal when the PRM code is moved into
- * drivers/.
- */
-static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
-				     struct omap_hwmod_rst_info *ohri)
-{
-	return am33xx_prm_deassert_hardreset(ohri->rst_shift,
-				ohri->st_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs,
-				oh->prcm.omap4.rstst_offs);
-}
-
-/**
- * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
- * @oh: struct omap_hwmod * to test hardreset
- * @ohri: hardreset line data
- *
- * Call am33xx_prminst_is_hardreset_asserted() with parameters
- * extracted from the hwmod @oh and the hardreset line data @ohri.
- * Only intended for use as an soc_ops function pointer.  Passes along
- * the return value from am33xx_prminst_is_hardreset_asserted().  XXX
- * This function is scheduled for removal when the PRM code is moved
- * into drivers/.
- */
-static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
-					struct omap_hwmod_rst_info *ohri)
-{
-	return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
-}
-
 /* Public functions */
 
 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
@@ -4123,12 +3958,12 @@ void __init omap_hwmod_init(void)
 		soc_ops.update_context_lost = _omap4_update_context_lost;
 		soc_ops.get_context_lost = _omap4_get_context_lost;
 	} else if (soc_is_am33xx()) {
-		soc_ops.enable_module = _am33xx_enable_module;
-		soc_ops.disable_module = _am33xx_disable_module;
-		soc_ops.wait_target_ready = _am33xx_wait_target_ready;
-		soc_ops.assert_hardreset = _am33xx_assert_hardreset;
-		soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
-		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
+		soc_ops.enable_module = _omap4_enable_module;
+		soc_ops.disable_module = _omap4_disable_module;
+		soc_ops.wait_target_ready = _omap4_wait_target_ready;
+		soc_ops.assert_hardreset = _omap4_assert_hardreset;
+		soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
+		soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
 		soc_ops.init_clkdm = _init_clkdm;
 	} else {
 		WARN(1, "omap_hwmod: unknown SoC type\n");
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 11f56a7..9c1d1b5 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -641,6 +641,21 @@ struct pwrdm_ops omap4_pwrdm_operations = {
 	.pwrdm_wait_transition	= omap4_pwrdm_wait_transition,
 };
 
+struct pwrdm_ops am33xx_pwrdm_operations = {
+	.pwrdm_set_next_pwrst	= omap4_pwrdm_set_next_pwrst,
+	.pwrdm_read_next_pwrst	= omap4_pwrdm_read_next_pwrst,
+	.pwrdm_read_pwrst	= omap4_pwrdm_read_pwrst,
+	.pwrdm_set_lowpwrstchange	= omap4_pwrdm_set_lowpwrstchange,
+	.pwrdm_set_logic_retst	= omap4_pwrdm_set_logic_retst,
+	.pwrdm_read_logic_pwrst	= omap4_pwrdm_read_logic_pwrst,
+	.pwrdm_read_logic_retst	= omap4_pwrdm_read_logic_retst,
+	.pwrdm_read_mem_pwrst	= omap4_pwrdm_read_mem_pwrst,
+	.pwrdm_read_mem_retst	= omap4_pwrdm_read_mem_retst,
+	.pwrdm_set_mem_onst	= omap4_pwrdm_set_mem_onst,
+	.pwrdm_set_mem_retst	= omap4_pwrdm_set_mem_retst,
+	.pwrdm_wait_transition	= omap4_pwrdm_wait_transition,
+};
+
 /*
  * XXX document
  */
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [RFC 9/9] ARM: OMAP2+: AM33XX: Get rid of custom PRM, CM APIs
  2013-07-02 11:28 ` Vaibhav Bedia
                   ` (8 preceding siblings ...)
  (?)
@ 2013-07-02 11:28 ` Vaibhav Bedia
  -1 siblings, 0 replies; 11+ messages in thread
From: Vaibhav Bedia @ 2013-07-02 11:28 UTC (permalink / raw)
  To: linux-omap, linux-arm-kernel; +Cc: tony, paul, rnayak, Vaibhav Bedia

Now that we have migrated AM335x over to use OMAP4 style
PRM, CM APIs we can delete the custom APIs

To avoid build breakage the reset function is reimplemented
in the same patch.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
---
 arch/arm/mach-omap2/Makefile         |   3 +-
 arch/arm/mach-omap2/am33xx-restart.c |  34 ----
 arch/arm/mach-omap2/cm33xx.c         | 364 -----------------------------------
 arch/arm/mach-omap2/cm33xx.h         |  39 ----
 arch/arm/mach-omap2/omap4-common.c   |  14 ++
 arch/arm/mach-omap2/prm33xx.c        | 338 --------------------------------
 arch/arm/mach-omap2/prm33xx.h        |  11 --
 arch/arm/mach-omap2/prminst44xx.c    |  20 ++
 arch/arm/mach-omap2/prminst44xx.h    |   1 +
 9 files changed, 36 insertions(+), 788 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/am33xx-restart.c
 delete mode 100644 arch/arm/mach-omap2/cm33xx.c
 delete mode 100644 arch/arm/mach-omap2/prm33xx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 55a9d67..a47b517 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -56,7 +56,7 @@ AFLAGS_sram34xx.o			:=-Wa,-march=armv7-a
 # Restart code (OMAP4/5 currently in omap4-common.c)
 obj-$(CONFIG_SOC_OMAP2420)		+= omap2-restart.o
 obj-$(CONFIG_SOC_OMAP2430)		+= omap2-restart.o
-obj-$(CONFIG_SOC_AM33XX)		+= am33xx-restart.o
+obj-$(CONFIG_SOC_AM33XX)		+= omap4-common.o
 obj-$(CONFIG_ARCH_OMAP3)		+= omap3-restart.o
 
 # Pin multiplexing
@@ -109,7 +109,6 @@ obj-y					+= prm_common.o cm_common.o
 obj-$(CONFIG_ARCH_OMAP2)		+= prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= vc3xxx_data.o vp3xxx_data.o
-obj-$(CONFIG_SOC_AM33XX)		+= prm33xx.o cm33xx.o
 omap-prcm-4-5-common			=  cminst44xx.o cm44xx.o prm44xx.o \
 					   prcm_mpu44xx.o prminst44xx.o \
 					   vc44xx_data.o vp44xx_data.o
diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
deleted file mode 100644
index 88e4fa8..0000000
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * am33xx-restart.c - Code common to all AM33xx machines.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-
-#include "common.h"
-#include "prm-regbits-33xx.h"
-#include "prm33xx.h"
-
-/**
- * am3xx_restart - trigger a software restart of the SoC
- * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
- * @cmd: passed from the userspace program rebooting the system (if provided)
- *
- * Resets the SoC.  For @cmd, see the 'reboot' syscall in
- * kernel/sys.c.  No return value.
- */
-void am33xx_restart(char mode, const char *cmd)
-{
-	/* TODO: Handle mode and cmd if necessary */
-
-	am33xx_prm_rmw_reg_bits(AM33XX_GLOBAL_WARM_SW_RST_MASK,
-				AM33XX_GLOBAL_WARM_SW_RST_MASK,
-				AM33XX_PRM_DEVICE_MOD,
-				AM33XX_PRM_RSTCTRL_OFFSET);
-
-	/* OCP barrier */
-	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
-				  AM33XX_PRM_RSTCTRL_OFFSET);
-}
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
deleted file mode 100644
index 325a515..0000000
--- a/arch/arm/mach-omap2/cm33xx.c
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- * AM33XX CM functions
- *
- * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
- * Vaibhav Hiremath <hvaibhav@ti.com>
- *
- * Reference taken from from OMAP4 cminst44xx.c
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include "clockdomain.h"
-#include "cm.h"
-#include "cm33xx.h"
-#include "cm-regbits-34xx.h"
-#include "cm-regbits-33xx.h"
-#include "prm33xx.h"
-
-/*
- * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
- *
- *   0x0 func:     Module is fully functional, including OCP
- *   0x1 trans:    Module is performing transition: wakeup, or sleep, or sleep
- *                 abortion
- *   0x2 idle:     Module is in Idle mode (only OCP part). It is functional if
- *                 using separate functional clock
- *   0x3 disabled: Module is disabled and cannot be accessed
- *
- */
-#define CLKCTRL_IDLEST_FUNCTIONAL		0x0
-#define CLKCTRL_IDLEST_INTRANSITION		0x1
-#define CLKCTRL_IDLEST_INTERFACE_IDLE		0x2
-#define CLKCTRL_IDLEST_DISABLED			0x3
-
-/* Private functions */
-
-/* Read a register in a CM instance */
-static inline u32 am33xx_cm_read_reg(s16 inst, u16 idx)
-{
-	return __raw_readl(cm_base + inst + idx);
-}
-
-/* Write into a register in a CM */
-static inline void am33xx_cm_write_reg(u32 val, s16 inst, u16 idx)
-{
-	__raw_writel(val, cm_base + inst + idx);
-}
-
-/* Read-modify-write a register in CM */
-static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
-{
-	u32 v;
-
-	v = am33xx_cm_read_reg(inst, idx);
-	v &= ~mask;
-	v |= bits;
-	am33xx_cm_write_reg(v, inst, idx);
-
-	return v;
-}
-
-static inline u32 am33xx_cm_set_reg_bits(u32 bits, s16 inst, s16 idx)
-{
-	return am33xx_cm_rmw_reg_bits(bits, bits, inst, idx);
-}
-
-static inline u32 am33xx_cm_clear_reg_bits(u32 bits, s16 inst, s16 idx)
-{
-	return am33xx_cm_rmw_reg_bits(bits, 0x0, inst, idx);
-}
-
-static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask)
-{
-	u32 v;
-
-	v = am33xx_cm_read_reg(inst, idx);
-	v &= mask;
-	v >>= __ffs(mask);
-
-	return v;
-}
-
-/**
- * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
- *
- * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
- * bit 0.
- */
-static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
-{
-	u32 v = am33xx_cm_read_reg(inst, clkctrl_offs);
-	v &= AM33XX_IDLEST_MASK;
-	v >>= AM33XX_IDLEST_SHIFT;
-	return v;
-}
-
-/**
- * _is_module_ready - can module registers be accessed without causing an abort?
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
- *
- * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
- * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
- */
-static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
-{
-	u32 v;
-
-	v = _clkctrl_idlest(inst, cdoffs, clkctrl_offs);
-
-	return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
-		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
-}
-
-/**
- * _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield
- * @c: CLKTRCTRL register bitfield (LSB = bit 0, i.e., unshifted)
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- *
- * @c must be the unshifted value for CLKTRCTRL - i.e., this function
- * will handle the shift itself.
- */
-static void _clktrctrl_write(u8 c, s16 inst, u16 cdoffs)
-{
-	u32 v;
-
-	v = am33xx_cm_read_reg(inst, cdoffs);
-	v &= ~AM33XX_CLKTRCTRL_MASK;
-	v |= c << AM33XX_CLKTRCTRL_SHIFT;
-	am33xx_cm_write_reg(v, inst, cdoffs);
-}
-
-/* Public functions */
-
-/**
- * am33xx_cm_is_clkdm_in_hwsup - is a clockdomain in hwsup idle mode?
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- *
- * Returns true if the clockdomain referred to by (@inst, @cdoffs)
- * is in hardware-supervised idle mode, or 0 otherwise.
- */
-bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs)
-{
-	u32 v;
-
-	v = am33xx_cm_read_reg(inst, cdoffs);
-	v &= AM33XX_CLKTRCTRL_MASK;
-	v >>= AM33XX_CLKTRCTRL_SHIFT;
-
-	return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false;
-}
-
-/**
- * am33xx_cm_clkdm_enable_hwsup - put a clockdomain in hwsup-idle mode
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- *
- * Put a clockdomain referred to by (@inst, @cdoffs) into
- * hardware-supervised idle mode.  No return value.
- */
-void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs)
-{
-	_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
-}
-
-/**
- * am33xx_cm_clkdm_disable_hwsup - put a clockdomain in swsup-idle mode
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- *
- * Put a clockdomain referred to by (@inst, @cdoffs) into
- * software-supervised idle mode, i.e., controlled manually by the
- * Linux OMAP clockdomain code.  No return value.
- */
-void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs)
-{
-	_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
-}
-
-/**
- * am33xx_cm_clkdm_force_sleep - try to put a clockdomain into idle
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- *
- * Put a clockdomain referred to by (@inst, @cdoffs) into idle
- * No return value.
- */
-void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs)
-{
-	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
-}
-
-/**
- * am33xx_cm_clkdm_force_wakeup - try to take a clockdomain out of idle
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- *
- * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
- * waking it up.  No return value.
- */
-void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs)
-{
-	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
-}
-
-/*
- *
- */
-
-/**
- * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
- *
- * Wait for the module IDLEST to be functional. If the idle state is in any
- * the non functional state (trans, idle or disabled), module and thus the
- * sysconfig cannot be accessed and will probably lead to an "imprecise
- * external abort"
- */
-int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
-{
-	int i = 0;
-
-	omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs),
-			  MAX_MODULE_READY_TIME, i);
-
-	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
-}
-
-/**
- * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
- * state
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
- *
- * Wait for the module IDLEST to be disabled. Some PRCM transition,
- * like reset assertion or parent clock de-activation must wait the
- * module to be fully disabled.
- */
-int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, u16 clkctrl_offs)
-{
-	int i = 0;
-
-	if (!clkctrl_offs)
-		return 0;
-
-	omap_test_timeout((_clkctrl_idlest(inst, cdoffs, clkctrl_offs) ==
-				CLKCTRL_IDLEST_DISABLED),
-				MAX_MODULE_READY_TIME, i);
-
-	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
-}
-
-/**
- * am33xx_cm_module_enable - Enable the modulemode inside CLKCTRL
- * @mode: Module mode (SW or HW)
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
- *
- * No return value.
- */
-void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, u16 clkctrl_offs)
-{
-	u32 v;
-
-	v = am33xx_cm_read_reg(inst, clkctrl_offs);
-	v &= ~AM33XX_MODULEMODE_MASK;
-	v |= mode << AM33XX_MODULEMODE_SHIFT;
-	am33xx_cm_write_reg(v, inst, clkctrl_offs);
-}
-
-/**
- * am33xx_cm_module_disable - Disable the module inside CLKCTRL
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
- *
- * No return value.
- */
-void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs)
-{
-	u32 v;
-
-	v = am33xx_cm_read_reg(inst, clkctrl_offs);
-	v &= ~AM33XX_MODULEMODE_MASK;
-	am33xx_cm_write_reg(v, inst, clkctrl_offs);
-}
-
-/*
- * Clockdomain low-level functions
- */
-
-static int am33xx_clkdm_sleep(struct clockdomain *clkdm)
-{
-	am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs);
-	return 0;
-}
-
-static int am33xx_clkdm_wakeup(struct clockdomain *clkdm)
-{
-	am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs);
-	return 0;
-}
-
-static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm)
-{
-	am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
-}
-
-static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm)
-{
-	am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
-}
-
-static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm)
-{
-	if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
-		return am33xx_clkdm_wakeup(clkdm);
-
-	return 0;
-}
-
-static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
-{
-	bool hwsup = false;
-
-	hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
-
-	if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
-		am33xx_clkdm_sleep(clkdm);
-
-	return 0;
-}
-
-struct clkdm_ops am33xx_clkdm_operations = {
-	.clkdm_sleep		= am33xx_clkdm_sleep,
-	.clkdm_wakeup		= am33xx_clkdm_wakeup,
-	.clkdm_allow_idle	= am33xx_clkdm_allow_idle,
-	.clkdm_deny_idle	= am33xx_clkdm_deny_idle,
-	.clkdm_clk_enable	= am33xx_clkdm_clk_enable,
-	.clkdm_clk_disable	= am33xx_clkdm_clk_disable,
-};
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 452351f..bce96fd 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -377,43 +377,4 @@
 #define AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET		0x0020
 #define AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL			AM33XX_CM_REGADDR(AM33XX_CM_CEFUSE_MOD, 0x0020)
 
-
-#ifndef __ASSEMBLER__
-extern bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs);
-extern void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs);
-extern void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs);
-extern void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs);
-extern void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs);
-
-#ifdef CONFIG_SOC_AM33XX
-extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-extern int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-#else
-static inline int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-	return 0;
-}
-static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-}
-static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-}
-static inline int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-	return 0;
-}
-#endif
-
-#endif /* ASSEMBLER */
 #endif
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 13b27ff..aad2159 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -355,3 +355,17 @@ void omap44xx_restart(char mode, const char *cmd)
 	while (1);
 }
 
+/**
+ * omap44xx_restart - trigger a software restart of the SoC
+ * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
+ * @cmd: passed from the userspace program rebooting the system (if provided)
+ *
+ * Resets the SoC.  For @cmd, see the 'reboot' syscall in
+ * kernel/sys.c.  No return value.
+ */
+void am33xx_restart(char mode, const char *cmd)
+{
+	/* XXX Should save 'cmd' into scratchpad for use after reboot */
+	am33xx_prminst_global_warm_sw_reset(); /* never returns */
+	while (1);
+}
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
deleted file mode 100644
index 44c0d72..0000000
--- a/arch/arm/mach-omap2/prm33xx.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/*
- * AM33XX PRM functions
- *
- * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include "common.h"
-#include "powerdomain.h"
-#include "prm33xx.h"
-#include "prm-regbits-33xx.h"
-
-/* Read a register in a PRM instance */
-u32 am33xx_prm_read_reg(s16 inst, u16 idx)
-{
-	return __raw_readl(prm_base + inst + idx);
-}
-
-/* Write into a register in a PRM instance */
-void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
-{
-	__raw_writel(val, prm_base + inst + idx);
-}
-
-/* Read-modify-write a register in PRM. Caller must lock */
-u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
-{
-	u32 v;
-
-	v = am33xx_prm_read_reg(inst, idx);
-	v &= ~mask;
-	v |= bits;
-	am33xx_prm_write_reg(v, inst, idx);
-
-	return v;
-}
-
-/**
- * am33xx_prm_is_hardreset_asserted - read the HW reset line state of
- * submodules contained in the hwmod module
- * @shift: register bit shift corresponding to the reset line to check
- * @inst: CM instance register offset (*_INST macro)
- * @rstctrl_offs: RM_RSTCTRL register address offset for this module
- *
- * Returns 1 if the (sub)module hardreset line is currently asserted,
- * 0 if the (sub)module hardreset line is not currently asserted, or
- * -EINVAL upon parameter error.
- */
-int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs)
-{
-	u32 v;
-
-	v = am33xx_prm_read_reg(inst, rstctrl_offs);
-	v &= 1 << shift;
-	v >>= shift;
-
-	return v;
-}
-
-/**
- * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule
- * @shift: register bit shift corresponding to the reset line to assert
- * @inst: CM instance register offset (*_INST macro)
- * @rstctrl_reg: RM_RSTCTRL register address for this module
- *
- * Some IPs like dsp, ipu or iva contain processors that require an HW
- * reset line to be asserted / deasserted in order to fully enable the
- * IP.  These modules may have multiple hard-reset lines that reset
- * different 'submodules' inside the IP block.  This function will
- * place the submodule into reset.  Returns 0 upon success or -EINVAL
- * upon an argument error.
- */
-int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs)
-{
-	u32 mask = 1 << shift;
-
-	am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs);
-
-	return 0;
-}
-
-/**
- * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and
- * wait
- * @shift: register bit shift corresponding to the reset line to deassert
- * @inst: CM instance register offset (*_INST macro)
- * @rstctrl_reg: RM_RSTCTRL register address for this module
- * @rstst_reg: RM_RSTST register address for this module
- *
- * Some IPs like dsp, ipu or iva contain processors that require an HW
- * reset line to be asserted / deasserted in order to fully enable the
- * IP.  These modules may have multiple hard-reset lines that reset
- * different 'submodules' inside the IP block.  This function will
- * take the submodule out of reset and wait until the PRCM indicates
- * that the reset has completed before returning.  Returns 0 upon success or
- * -EINVAL upon an argument error, -EEXIST if the submodule was already out
- * of reset, or -EBUSY if the submodule did not exit reset promptly.
- */
-int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
-		u16 rstctrl_offs, u16 rstst_offs)
-{
-	int c;
-	u32 mask = 1 << st_shift;
-
-	/* Check the current status to avoid  de-asserting the line twice */
-	if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0)
-		return -EEXIST;
-
-	/* Clear the reset status by writing 1 to the status bit */
-	am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs);
-
-	/* de-assert the reset control line */
-	mask = 1 << shift;
-
-	am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
-
-	/* wait the status to be set */
-	omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, inst,
-							   rstst_offs),
-			  MAX_MODULE_HARDRESET_WAIT, c);
-
-	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
-}
-
-static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
-{
-	am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
-				(pwrst << OMAP_POWERSTATE_SHIFT),
-				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-	return 0;
-}
-
-static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
-{
-	u32 v;
-
-	v = am33xx_prm_read_reg(pwrdm->prcm_offs,  pwrdm->pwrstctrl_offs);
-	v &= OMAP_POWERSTATE_MASK;
-	v >>= OMAP_POWERSTATE_SHIFT;
-
-	return v;
-}
-
-static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
-{
-	u32 v;
-
-	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-	v &= OMAP_POWERSTATEST_MASK;
-	v >>= OMAP_POWERSTATEST_SHIFT;
-
-	return v;
-}
-
-static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
-{
-	u32 v;
-
-	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-	v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
-	v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
-
-	return v;
-}
-
-static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
-{
-	am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
-				(1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT),
-				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-	return 0;
-}
-
-static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
-{
-	am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK,
-				AM33XX_LASTPOWERSTATEENTERED_MASK,
-				pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-	return 0;
-}
-
-static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
-{
-	u32 m;
-
-	m = pwrdm->logicretstate_mask;
-	if (!m)
-		return -EINVAL;
-
-	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
-				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-
-	return 0;
-}
-
-static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
-{
-	u32 v;
-
-	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-	v &= AM33XX_LOGICSTATEST_MASK;
-	v >>= AM33XX_LOGICSTATEST_SHIFT;
-
-	return v;
-}
-
-static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
-{
-	u32 v, m;
-
-	m = pwrdm->logicretstate_mask;
-	if (!m)
-		return -EINVAL;
-
-	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-	v &= m;
-	v >>= __ffs(m);
-
-	return v;
-}
-
-static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
-		u8 pwrst)
-{
-	u32 m;
-
-	m = pwrdm->mem_on_mask[bank];
-	if (!m)
-		return -EINVAL;
-
-	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
-				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-
-	return 0;
-}
-
-static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
-					u8 pwrst)
-{
-	u32 m;
-
-	m = pwrdm->mem_ret_mask[bank];
-	if (!m)
-		return -EINVAL;
-
-	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
-				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-
-	return 0;
-}
-
-static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
-{
-	u32 m, v;
-
-	m = pwrdm->mem_pwrst_mask[bank];
-	if (!m)
-		return -EINVAL;
-
-	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-	v &= m;
-	v >>= __ffs(m);
-
-	return v;
-}
-
-static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
-{
-	u32 m, v;
-
-	m = pwrdm->mem_retst_mask[bank];
-	if (!m)
-		return -EINVAL;
-
-	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-	v &= m;
-	v >>= __ffs(m);
-
-	return v;
-}
-
-static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
-{
-	u32 c = 0;
-
-	/*
-	 * REVISIT: pwrdm_wait_transition() may be better implemented
-	 * via a callback and a periodic timer check -- how long do we expect
-	 * powerdomain transitions to take?
-	 */
-
-	/* XXX Is this udelay() value meaningful? */
-	while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs)
-			& OMAP_INTRANSITION_MASK) &&
-			(c++ < PWRDM_TRANSITION_BAILOUT))
-		udelay(1);
-
-	if (c > PWRDM_TRANSITION_BAILOUT) {
-		pr_err("powerdomain: %s: waited too long to complete transition\n",
-		       pwrdm->name);
-		return -EAGAIN;
-	}
-
-	pr_debug("powerdomain: completed transition in %d loops\n", c);
-
-	return 0;
-}
-
-struct pwrdm_ops am33xx_pwrdm_operations = {
-	.pwrdm_set_next_pwrst		= am33xx_pwrdm_set_next_pwrst,
-	.pwrdm_read_next_pwrst		= am33xx_pwrdm_read_next_pwrst,
-	.pwrdm_read_pwrst		= am33xx_pwrdm_read_pwrst,
-	.pwrdm_read_prev_pwrst		= am33xx_pwrdm_read_prev_pwrst,
-	.pwrdm_set_logic_retst		= am33xx_pwrdm_set_logic_retst,
-	.pwrdm_read_logic_pwrst		= am33xx_pwrdm_read_logic_pwrst,
-	.pwrdm_read_logic_retst		= am33xx_pwrdm_read_logic_retst,
-	.pwrdm_clear_all_prev_pwrst	= am33xx_pwrdm_clear_all_prev_pwrst,
-	.pwrdm_set_lowpwrstchange	= am33xx_pwrdm_set_lowpwrstchange,
-	.pwrdm_read_mem_pwrst		= am33xx_pwrdm_read_mem_pwrst,
-	.pwrdm_read_mem_retst		= am33xx_pwrdm_read_mem_retst,
-	.pwrdm_set_mem_onst		= am33xx_pwrdm_set_mem_onst,
-	.pwrdm_set_mem_retst		= am33xx_pwrdm_set_mem_retst,
-	.pwrdm_wait_transition		= am33xx_pwrdm_wait_transition,
-};
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index c82b22b2..e070745 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -118,15 +118,4 @@
 #define AM33XX_PM_CEFUSE_PWRSTST_OFFSET		0x0004
 #define AM33XX_PM_CEFUSE_PWRSTST		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
 
-#ifndef __ASSEMBLER__
-extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
-extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
-extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-extern void am33xx_prm_global_warm_sw_reset(void);
-extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
-		u16 rstctrl_offs);
-extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
-extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
-		u16 rstctrl_offs, u16 rstst_offs);
-#endif /* ASSEMBLER */
 #endif
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 5e165ea..667ffb0 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -19,8 +19,10 @@
 #include "iomap.h"
 #include "common.h"
 #include "prcm-common.h"
+#include "prm33xx.h"
 #include "prm44xx.h"
 #include "prminst44xx.h"
+#include "prm-regbits-33xx.h"
 #include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prcm_mpu44xx.h"
@@ -190,3 +192,21 @@ void omap4_prminst_global_warm_sw_reset(void)
 				    OMAP4430_PRM_DEVICE_INST,
 				    OMAP4_PRM_RSTCTRL_OFFSET);
 }
+
+void am33xx_prminst_global_warm_sw_reset(void)
+{
+	u32 v;
+
+	v = omap4_prminst_read_inst_reg(AM33XX_PRM_PARTITION,
+				    AM33XX_PRM_DEVICE_MOD,
+				    AM33XX_PRM_RSTCTRL_OFFSET);
+	v |= AM33XX_GLOBAL_WARM_SW_RST_MASK;
+	omap4_prminst_write_inst_reg(v, AM33XX_PRM_PARTITION,
+				 AM33XX_PRM_DEVICE_MOD,
+				 AM33XX_PRM_RSTCTRL_OFFSET);
+
+	/* OCP barrier */
+	v = omap4_prminst_read_inst_reg(AM33XX_PRM_PARTITION,
+				    AM33XX_PRM_DEVICE_MOD,
+				    AM33XX_PRM_RSTCTRL_OFFSET);
+}
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
index 3973212..7a1fec10 100644
--- a/arch/arm/mach-omap2/prminst44xx.h
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -22,6 +22,7 @@ extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
 					   s16 inst, u16 idx);
 
 extern void omap4_prminst_global_warm_sw_reset(void);
+extern void am33xx_prminst_global_warm_sw_reset(void);
 
 extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
 					       u16 rstctrl_offs);
-- 
1.8.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
end of thread, other threads:[~2013-07-02 11:29 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-07-02 11:28 [RFC 0/9] Consolidate AM335x and OMAP4 PRM/CM APIs Vaibhav Bedia
2013-07-02 11:28 ` Vaibhav Bedia
2013-07-02 11:28 ` [RFC 1/9] ARM: OMAP2+: AM335X: Add a constant CM_INST for all the clkdomains Vaibhav Bedia
2013-07-02 11:28 ` [RFC 2/9] ARM: OMAP2+: CM code: Reintroduce SW_SLEEP for OMAP4 class of devices Vaibhav Bedia
2013-07-02 11:28 ` [RFC 3/9] ARM: OMAP2+: AM335X: Add a constant PRCM_PARITION for the pwrdomains Vaibhav Bedia
2013-07-02 11:28 ` [RFC 4/9] ARM: OMAP4: PRM: Get rid of hardcoded offsets Vaibhav Bedia
2013-07-02 11:28 ` [RFC 5/9] ARM: OMAP4: Add offsets for pwrstctrl and pwrstst Vaibhav Bedia
2013-07-02 11:28 ` [RFC 6/9] ARM: OMAP4: CM code: Remove the check for non-zero clkctrl_offs Vaibhav Bedia
2013-07-02 11:28 ` [RFC 7/9] ARM: OMAP4: Generalize reset handling API Vaibhav Bedia
2013-07-02 11:28 ` [RFC 8/9] ARM: OMAP2+: AM335x: Migrate to OMAP4 PRM/CM APIs Vaibhav Bedia
2013-07-02 11:28 ` [RFC 9/9] ARM: OMAP2+: AM33XX: Get rid of custom PRM, CM APIs Vaibhav Bedia

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