* [RFC] Split i.MX pinctrl groups
@ 2013-07-18 7:46 Sascha Hauer
2013-07-18 7:46 ` [PATCH 1/4] ARM: dts: i.MX6: split enet pins into smaller groups Sascha Hauer
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Sascha Hauer @ 2013-07-18 7:46 UTC (permalink / raw)
To: linux-arm-kernel
We currently introduce completely new pinctrl groups for each slight
variant of the pinctrl setup of a device. For several devices the
groups can be split into smaller groups to increase the flexibility
and to reduce the devicetree sizes (both source and dtb).
For example SDHC controller groups can be split into a base group
and an 8bit extension. The FEC groups can be split into base group
and several MDIO groups. The UARTs can be split into a base group
and RTS/CTS extensions.
Doing this makes the group names more obvious. Instead of having
just index _1, _2 and so on we now have base_1, 8bit_1.
This is not meant for inclusion right now, just some preliminary
patches to demonstrate the idea to see if this is acceptable/desired.
Sascha
----------------------------------------------------------------
Sascha Hauer (4):
ARM: dts: i.MX6: split enet pins into smaller groups
ARM: dts: i.MX53: split esdhc1 pins into base and 8bit groups
ARM: dts: i.MX53: split esdhc2 pins into base and 8bit groups
ARM: dts: i.MX53: split esdhc3 pins into base and 8bit groups
arch/arm/boot/dts/imx53-ard.dts | 2 +-
arch/arm/boot/dts/imx53-evk.dts | 4 +--
arch/arm/boot/dts/imx53-m53evk.dts | 2 +-
arch/arm/boot/dts/imx53-qsb.dts | 4 +--
arch/arm/boot/dts/imx53-smd.dts | 6 ++--
arch/arm/boot/dts/imx53-tqma53.dtsi | 4 +--
arch/arm/boot/dts/imx53.dtsi | 23 ++++++++--------
arch/arm/boot/dts/imx6dl-wandboard.dts | 2 +-
arch/arm/boot/dts/imx6dl.dtsi | 31 ++++++++++-----------
arch/arm/boot/dts/imx6q-arm2.dts | 2 +-
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 2 +-
arch/arm/boot/dts/imx6q-sabrelite.dts | 2 +-
arch/arm/boot/dts/imx6q-sbc6x.dts | 2 +-
arch/arm/boot/dts/imx6q.dtsi | 44 +++++++-----------------------
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +-
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 +-
16 files changed, 53 insertions(+), 81 deletions(-)
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/4] ARM: dts: i.MX6: split enet pins into smaller groups
2013-07-18 7:46 [RFC] Split i.MX pinctrl groups Sascha Hauer
@ 2013-07-18 7:46 ` Sascha Hauer
2013-07-18 7:46 ` [PATCH 2/4] ARM: dts: i.MX53: split esdhc1 pins into base and 8bit groups Sascha Hauer
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Sascha Hauer @ 2013-07-18 7:46 UTC (permalink / raw)
To: linux-arm-kernel
We used to have complete pinctrl groups for each device. This turns
out to be quite inflexible since we have to introduce a new pinctrl
group for each slight difference. This splits the enet pinctrl groups
into:
- a base group
- two mdio groups
- one enet ref clk group
This results in smaller devicetrees (both binary and source code) and
increased flexibility.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boot/dts/imx6dl-wandboard.dts | 2 +-
arch/arm/boot/dts/imx6dl.dtsi | 31 ++++++++++-----------
arch/arm/boot/dts/imx6q-arm2.dts | 2 +-
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 2 +-
arch/arm/boot/dts/imx6q-sabrelite.dts | 2 +-
arch/arm/boot/dts/imx6q-sbc6x.dts | 2 +-
arch/arm/boot/dts/imx6q.dtsi | 44 +++++++-----------------------
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +-
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 +-
9 files changed, 31 insertions(+), 58 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-wandboard.dts b/arch/arm/boot/dts/imx6dl-wandboard.dts
index bfc59c3..e3d3e11 100644
--- a/arch/arm/boot/dts/imx6dl-wandboard.dts
+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts
@@ -22,7 +22,7 @@
&fec {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet_1>;
+ pinctrl-0 = <&pinctrl_enet_1 &pinctrl_enet_mdio_1 &pinctrl_enet_ref_1>;
phy-mode = "rgmii";
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 2b3ecd6..8a740f1 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -61,8 +61,6 @@
enet {
pinctrl_enet_1: enetgrp-1 {
fsl,pins = <
- MX6DL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
- MX6DL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6DL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6DL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6DL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
@@ -76,27 +74,26 @@
MX6DL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6DL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
- MX6DL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
- pinctrl_enet_2: enetgrp-2 {
+ pinctrl_enet_mdio_1: enet-mdiogrp-1 {
+ fsl,pins = <
+ MX6DL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6DL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ >;
+ };
+
+ pinctrl_enet_mdio_2: enet-mdiogrp-2 {
fsl,pins = <
MX6DL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
MX6DL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
- MX6DL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
- MX6DL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
- MX6DL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
- MX6DL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
- MX6DL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
- MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
- MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
- MX6DL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
- MX6DL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
- MX6DL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
- MX6DL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
- MX6DL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
- MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ >;
+ };
+
+ pinctrl_enet_ref_1: enet-refgrp-1 {
+ fsl,pins = <
+ MX6DL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
};
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index 4e54fde..3425bc1 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -74,7 +74,7 @@
&fec {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet_2>;
+ pinctrl-0 = <&pinctrl_enet_1 &pinctrl_enet_mdio_2>;
phy-mode = "rgmii";
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
index f5e1981..c2ed29c 100644
--- a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
@@ -44,7 +44,7 @@
&fec {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet_3>;
+ pinctrl-0 = <&pinctrl_enet_1 &pinctrl_enet_mdio_1>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
status = "disabled";
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 6a00066..48661a4 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -118,7 +118,7 @@
&fec {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet_1>;
+ pinctrl-0 = <&pinctrl_enet_1 &pinctrl_enet_mdio_1 &pinctrl_enet_ref_1>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx6q-sbc6x.dts b/arch/arm/boot/dts/imx6q-sbc6x.dts
index ee6addf..8d0e4ad 100644
--- a/arch/arm/boot/dts/imx6q-sbc6x.dts
+++ b/arch/arm/boot/dts/imx6q-sbc6x.dts
@@ -19,7 +19,7 @@
&fec {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet_1>;
+ pinctrl-0 = <&pinctrl_enet_1 &pinctrl_enet_mdio_1 &pinctrl_enet_ref_1>;
phy-mode = "rgmii";
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index ba09dc3..09797ca 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -123,8 +123,6 @@
enet {
pinctrl_enet_1: enetgrp-1 {
fsl,pins = <
- MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
- MX6Q_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
@@ -138,48 +136,26 @@
MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
- MX6Q_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
- pinctrl_enet_2: enetgrp-2 {
+ pinctrl_enet_mdio_1: enet-mdiogrp-1 {
+ fsl,pins = <
+ MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6Q_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ >;
+ };
+
+ pinctrl_enet_mdio_2: enet-mdiogrp-2 {
fsl,pins = <
MX6Q_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
MX6Q_PAD_KEY_COL2__ENET_MDC 0x1b0b0
- MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
- MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
- MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
- MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
- MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
- MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
- MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
- MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
- MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
- MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
- MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
- MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
- MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>;
};
- pinctrl_enet_3: enetgrp-3 {
+ pinctrl_enet_ref_1: enet-refgrp-1 {
fsl,pins = <
- MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
- MX6Q_PAD_ENET_MDC__ENET_MDC 0x1b0b0
- MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
- MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
- MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
- MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
- MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
- MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
- MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
- MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
- MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
- MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
- MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
- MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
- MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
- MX6Q_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ MX6Q_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index e994011..32a0f55 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -34,7 +34,7 @@
&fec {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet_2>;
+ pinctrl-0 = <&pinctrl_enet_1 &pinctrl_enet_mdio_2>;
phy-mode = "rgmii";
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 6e5dfdb..906d267 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -79,7 +79,7 @@
&fec {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet_1>;
+ pinctrl-0 = <&pinctrl_enet_1 &pinctrl_enet_mdio_1 &pinctrl_enet_ref_1>;
phy-mode = "rgmii";
status = "okay";
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/4] ARM: dts: i.MX53: split esdhc1 pins into base and 8bit groups
2013-07-18 7:46 [RFC] Split i.MX pinctrl groups Sascha Hauer
2013-07-18 7:46 ` [PATCH 1/4] ARM: dts: i.MX6: split enet pins into smaller groups Sascha Hauer
@ 2013-07-18 7:46 ` Sascha Hauer
2013-07-18 7:46 ` [PATCH 3/4] ARM: dts: i.MX53: split esdhc2 " Sascha Hauer
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Sascha Hauer @ 2013-07-18 7:46 UTC (permalink / raw)
To: linux-arm-kernel
This splits the esdhc1 groups into a base group and an 8bit extension
which results in smaller devicetrees and more obvious pinctrl group
names.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boot/dts/imx53-ard.dts | 2 +-
arch/arm/boot/dts/imx53-evk.dts | 2 +-
arch/arm/boot/dts/imx53-m53evk.dts | 2 +-
arch/arm/boot/dts/imx53-qsb.dts | 2 +-
arch/arm/boot/dts/imx53-smd.dts | 2 +-
arch/arm/boot/dts/imx53.dtsi | 10 ++--------
6 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 174f869..2d47fd6 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -99,7 +99,7 @@
&esdhc1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc1_2>;
+ pinctrl-0 = <&pinctrl_esdhc1_base_1 &pinctrl_esdhc1_8bit_1>;
cd-gpios = <&gpio1 1 0>;
wp-gpios = <&gpio1 9 0>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 801fda7..2d093b5 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -34,7 +34,7 @@
&esdhc1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc1_1>;
+ pinctrl-0 = <&pinctrl_esdhc1_base_1>;
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio3 14 0>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index 7d304d0..91c08f7 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -120,7 +120,7 @@
&esdhc1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc1_1>;
+ pinctrl-0 = <&pinctrl_esdhc1_base_1>;
cd-gpios = <&gpio1 1 0>;
wp-gpios = <&gpio1 9 0>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 512a1f6..508390f 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -112,7 +112,7 @@
&esdhc1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc1_1>;
+ pinctrl-0 = <&pinctrl_esdhc1_base_1>;
cd-gpios = <&gpio3 13 0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index a9b6e10..a8fb844 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -40,7 +40,7 @@
&esdhc1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc1_1>;
+ pinctrl-0 = <&pinctrl_esdhc1_base_1>;
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio4 11 0>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 3895fbb..6e317766 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -455,7 +455,7 @@
};
esdhc1 {
- pinctrl_esdhc1_1: esdhc1grp-1 {
+ pinctrl_esdhc1_base_1: esdhc1-basegrp-1 {
fsl,pins = <
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
@@ -466,18 +466,12 @@
>;
};
- pinctrl_esdhc1_2: esdhc1grp-2 {
+ pinctrl_esdhc1_8bit_1: esdhc1-8bitgrp-1 {
fsl,pins = <
- MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
- MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
- MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
- MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x1d5
MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x1d5
MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x1d5
MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x1d5
- MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
- MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
>;
};
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/4] ARM: dts: i.MX53: split esdhc2 pins into base and 8bit groups
2013-07-18 7:46 [RFC] Split i.MX pinctrl groups Sascha Hauer
2013-07-18 7:46 ` [PATCH 1/4] ARM: dts: i.MX6: split enet pins into smaller groups Sascha Hauer
2013-07-18 7:46 ` [PATCH 2/4] ARM: dts: i.MX53: split esdhc1 pins into base and 8bit groups Sascha Hauer
@ 2013-07-18 7:46 ` Sascha Hauer
2013-07-18 7:46 ` [PATCH 4/4] ARM: dts: i.MX53: split esdhc3 " Sascha Hauer
2013-07-18 11:59 ` [RFC] Split i.MX pinctrl groups Shawn Guo
4 siblings, 0 replies; 6+ messages in thread
From: Sascha Hauer @ 2013-07-18 7:46 UTC (permalink / raw)
To: linux-arm-kernel
This splits the esdhc2 groups into a base group and an 8bit extension
which results in smaller devicetrees and more obvious pinctrl group
names.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boot/dts/imx53-smd.dts | 2 +-
arch/arm/boot/dts/imx53-tqma53.dtsi | 2 +-
arch/arm/boot/dts/imx53.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index a8fb844..74d34872 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -48,7 +48,7 @@
&esdhc2 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc2_1>;
+ pinctrl-0 = <&pinctrl_esdhc2_base_1>;
non-removable;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx53-tqma53.dtsi b/arch/arm/boot/dts/imx53-tqma53.dtsi
index abd72af..82b0bd8 100644
--- a/arch/arm/boot/dts/imx53-tqma53.dtsi
+++ b/arch/arm/boot/dts/imx53-tqma53.dtsi
@@ -35,7 +35,7 @@
&esdhc2 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc2_1>,
+ pinctrl-0 = <&pinctrl_esdhc2_base_1>,
<&pinctrl_tqma53_esdhc2_2>;
vmmc-supply = <®_3p3v>;
wp-gpios = <&gpio1 2 0>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 6e317766..bfbeaef 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -477,7 +477,7 @@
};
esdhc2 {
- pinctrl_esdhc2_1: esdhc2grp-1 {
+ pinctrl_esdhc2_base_1: esdhc2-basegrp-1 {
fsl,pins = <
MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
--
1.8.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 4/4] ARM: dts: i.MX53: split esdhc3 pins into base and 8bit groups
2013-07-18 7:46 [RFC] Split i.MX pinctrl groups Sascha Hauer
` (2 preceding siblings ...)
2013-07-18 7:46 ` [PATCH 3/4] ARM: dts: i.MX53: split esdhc2 " Sascha Hauer
@ 2013-07-18 7:46 ` Sascha Hauer
2013-07-18 11:59 ` [RFC] Split i.MX pinctrl groups Shawn Guo
4 siblings, 0 replies; 6+ messages in thread
From: Sascha Hauer @ 2013-07-18 7:46 UTC (permalink / raw)
To: linux-arm-kernel
This splits the esdhc3 groups into a base group and an 8bit extension
which results in smaller devicetrees and more obvious pinctrl group
names.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boot/dts/imx53-evk.dts | 2 +-
arch/arm/boot/dts/imx53-qsb.dts | 2 +-
arch/arm/boot/dts/imx53-smd.dts | 2 +-
arch/arm/boot/dts/imx53-tqma53.dtsi | 2 +-
arch/arm/boot/dts/imx53.dtsi | 11 ++++++++---
5 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 2d093b5..ed5a41a 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -69,7 +69,7 @@
&esdhc3 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc3_1>;
+ pinctrl-0 = <&pinctrl_esdhc3_base_1 &pinctrl_esdhc3_8bit_1>;
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 508390f..dbdd807 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -124,7 +124,7 @@
&esdhc3 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc3_1>;
+ pinctrl-0 = <&pinctrl_esdhc3_base_1 &pinctrl_esdhc3_8bit_1>;
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index 74d34872..668c518 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -95,7 +95,7 @@
&esdhc3 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc3_1>;
+ pinctrl-0 = <&pinctrl_esdhc3_base_1 &pinctrl_esdhc3_8bit_1>;
non-removable;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx53-tqma53.dtsi b/arch/arm/boot/dts/imx53-tqma53.dtsi
index 82b0bd8..4c95c93 100644
--- a/arch/arm/boot/dts/imx53-tqma53.dtsi
+++ b/arch/arm/boot/dts/imx53-tqma53.dtsi
@@ -60,7 +60,7 @@
&esdhc3 { /* EMMC */
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc3_1>;
+ pinctrl-0 = <&pinctrl_esdhc3_base_1 &pinctrl_esdhc3_8bit_1>;
vmmc-supply = <®_3p3v>;
non-removable;
bus-width = <8>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index bfbeaef..a3e1eee 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -490,18 +490,23 @@
};
esdhc3 {
- pinctrl_esdhc3_1: esdhc3grp-1 {
+ pinctrl_esdhc3_base_1: esdhc3-basegrp-1 {
fsl,pins = <
MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
+ MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
+ MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
+ >;
+ };
+
+ pinctrl_esdhc3_8bit_1: esdhc3-8bitgrp-1 {
+ fsl,pins = <
MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
- MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
- MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
>;
};
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [RFC] Split i.MX pinctrl groups
2013-07-18 7:46 [RFC] Split i.MX pinctrl groups Sascha Hauer
` (3 preceding siblings ...)
2013-07-18 7:46 ` [PATCH 4/4] ARM: dts: i.MX53: split esdhc3 " Sascha Hauer
@ 2013-07-18 11:59 ` Shawn Guo
4 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2013-07-18 11:59 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jul 18, 2013 at 09:46:07AM +0200, Sascha Hauer wrote:
> We currently introduce completely new pinctrl groups for each slight
> variant of the pinctrl setup of a device. For several devices the
> groups can be split into smaller groups to increase the flexibility
> and to reduce the devicetree sizes (both source and dtb).
>
> For example SDHC controller groups can be split into a base group
> and an 8bit extension. The FEC groups can be split into base group
> and several MDIO groups. The UARTs can be split into a base group
> and RTS/CTS extensions.
>
> Doing this makes the group names more obvious. Instead of having
> just index _1, _2 and so on we now have base_1, 8bit_1.
>
> This is not meant for inclusion right now, just some preliminary
> patches to demonstrate the idea to see if this is acceptable/desired.
Yes, it makes sense to me.
Shawn
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-07-18 11:59 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-07-18 7:46 [RFC] Split i.MX pinctrl groups Sascha Hauer
2013-07-18 7:46 ` [PATCH 1/4] ARM: dts: i.MX6: split enet pins into smaller groups Sascha Hauer
2013-07-18 7:46 ` [PATCH 2/4] ARM: dts: i.MX53: split esdhc1 pins into base and 8bit groups Sascha Hauer
2013-07-18 7:46 ` [PATCH 3/4] ARM: dts: i.MX53: split esdhc2 " Sascha Hauer
2013-07-18 7:46 ` [PATCH 4/4] ARM: dts: i.MX53: split esdhc3 " Sascha Hauer
2013-07-18 11:59 ` [RFC] Split i.MX pinctrl groups Shawn Guo
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