[PATCH v2 0/3] OMAP4+: Get rid of internal SRAM handling

[PATCH v2 0/3] OMAP4+: Get rid of internal SRAM handling

[Rajendra Nayak]

v2:
Removed the static iotable mapping for sram done to handle
errata I688, and used gen_pool instead.

Make all OMAP DT only platforms (am33xx, am43xx, omap4 and omap5)
use drivers/misc/sram.c driver instead of the omap internal
implementation for SRAM handling.

Rajendra Nayak (3):
  ARM: AM335x: Get rid of unused sram init function
  ARM: OMAP4+: Move SRAM data to DT
  ARM: OMAP4+: Remove static iotable mappings for SRAM

 Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++-
 arch/arm/boot/dts/am33xx.dtsi                      |    5 +--
 arch/arm/boot/dts/am4372.dtsi                      |    5 +++
 arch/arm/boot/dts/omap4.dtsi                       |    6 +++
 arch/arm/boot/dts/omap5.dtsi                       |    8 +++-
 arch/arm/configs/omap2plus_defconfig               |    1 +
 arch/arm/mach-omap2/io.c                           |   17 ---------
 arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++-
 arch/arm/mach-omap2/sram.c                         |   39 +-------------------
 arch/arm/mach-omap2/sram.h                         |    7 ----
 10 files changed, 42 insertions(+), 68 deletions(-)

-- 
1.7.9.5

[PATCH v2 0/3] OMAP4+: Get rid of internal SRAM handling

[Rajendra Nayak]

v2:
Removed the static iotable mapping for sram done to handle
errata I688, and used gen_pool instead.

Make all OMAP DT only platforms (am33xx, am43xx, omap4 and omap5)
use drivers/misc/sram.c driver instead of the omap internal
implementation for SRAM handling.

Rajendra Nayak (3):
  ARM: AM335x: Get rid of unused sram init function
  ARM: OMAP4+: Move SRAM data to DT
  ARM: OMAP4+: Remove static iotable mappings for SRAM

 Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++-
 arch/arm/boot/dts/am33xx.dtsi                      |    5 +--
 arch/arm/boot/dts/am4372.dtsi                      |    5 +++
 arch/arm/boot/dts/omap4.dtsi                       |    6 +++
 arch/arm/boot/dts/omap5.dtsi                       |    8 +++-
 arch/arm/configs/omap2plus_defconfig               |    1 +
 arch/arm/mach-omap2/io.c                           |   17 ---------
 arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++-
 arch/arm/mach-omap2/sram.c                         |   39 +-------------------
 arch/arm/mach-omap2/sram.h                         |    7 ----
 10 files changed, 42 insertions(+), 68 deletions(-)

-- 
1.7.9.5

[PATCH v2 1/3] ARM: AM335x: Get rid of unused sram init function

[Rajendra Nayak]

Remove the empty am33xx_sram_init() function.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/sram.c |    7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 4bd0968..305fc2b 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -285,11 +285,6 @@ static inline int omap34xx_sram_init(void)
 }
 #endif /* CONFIG_ARCH_OMAP3 */
 
-static inline int am33xx_sram_init(void)
-{
-	return 0;
-}
-
 int __init omap_sram_init(void)
 {
 	omap_detect_sram();
@@ -299,8 +294,6 @@ int __init omap_sram_init(void)
 		omap242x_sram_init();
 	else if (cpu_is_omap2430())
 		omap243x_sram_init();
-	else if (soc_is_am33xx())
-		am33xx_sram_init();
 	else if (cpu_is_omap34xx())
 		omap34xx_sram_init();
 
-- 
1.7.9.5

[PATCH v2 1/3] ARM: AM335x: Get rid of unused sram init function

[Rajendra Nayak]

Remove the empty am33xx_sram_init() function.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/sram.c |    7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 4bd0968..305fc2b 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -285,11 +285,6 @@ static inline int omap34xx_sram_init(void)
 }
 #endif /* CONFIG_ARCH_OMAP3 */
 
-static inline int am33xx_sram_init(void)
-{
-	return 0;
-}
-
 int __init omap_sram_init(void)
 {
 	omap_detect_sram();
@@ -299,8 +294,6 @@ int __init omap_sram_init(void)
 		omap242x_sram_init();
 	else if (cpu_is_omap2430())
 		omap243x_sram_init();
-	else if (soc_is_am33xx())
-		am33xx_sram_init();
 	else if (cpu_is_omap34xx())
 		omap34xx_sram_init();
 
-- 
1.7.9.5

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Rajendra Nayak]

Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private plat-omap/sram.c

Address and size related data  is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.

Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi        |    5 ++---
 arch/arm/boot/dts/am4372.dtsi        |    5 +++++
 arch/arm/boot/dts/omap4.dtsi         |    5 +++++
 arch/arm/boot/dts/omap5.dtsi         |    5 +++++
 arch/arm/configs/omap2plus_defconfig |    1 +
 arch/arm/mach-omap2/sram.c           |   26 +-------------------------
 arch/arm/mach-omap2/sram.h           |    1 -
 7 files changed, 19 insertions(+), 29 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 38b446b..69cbce9 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -482,9 +482,8 @@
 		};
 
 		ocmcram: ocmcram@40300000 {
-			compatible = "ti,am3352-ocmcram";
-			reg = <0x40300000 0x10000>;
-			ti,hwmods = "ocmcram";
+			compatible = "mmio-sram";
+			reg = <0x40300000 0x10000>; /* 64k */
 		};
 
 		wkup_m3: wkup_m3@44d00000 {
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ddc1df7..5c8cee1 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -64,5 +64,10 @@
 			compatible = "ti,am4372-counter32k","ti,omap-counter32k";
 			reg = <0x44e86000 0x40>;
 		};
+
+		ocmcram: ocmcram@40300000 {
+			compatible = "mmio-sram";
+			reg = <0x40300000 0x40000>; /* 256k */
+		};
 	};
 };
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..1ba6a77 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -126,6 +126,11 @@
 			pinctrl-single,function-mask = <0x7fff>;
 		};
 
+		ocmcram: ocmcram@40304000 {
+			compatible = "mmio-sram";
+			reg = <0x40304000 0xa000>; /* 40k */
+		};
+
 		sdma: dma-controller@4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index e643620..461ffd8 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -119,6 +119,11 @@
 			pinctrl-single,function-mask = <0x7fff>;
 		};
 
+		ocmcram: ocmcram@40300000 {
+			compatible = "mmio-sram";
+			reg = <0x40300000 0x20000>; /* 128k */
+		};
+
 		sdma: dma-controller@4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 5339e6a..5d4c9b8 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -101,6 +101,7 @@ CONFIG_SENSORS_LIS3LV02D=m
 CONFIG_SENSORS_TSL2550=m
 CONFIG_SENSORS_LIS3_I2C=m
 CONFIG_BMP085_I2C=m
+CONFIG_SRAM=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 305fc2b..d5ecb75 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -32,12 +32,6 @@
 
 #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
 #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA		0x40300000
 
 #define SRAM_BOOTLOADER_SZ	0x00
 
@@ -105,32 +99,14 @@ static void __init omap_detect_sram(void)
 			} else {
 				omap_sram_size = 0x8000; /* 32K */
 			}
-		} else if (cpu_is_omap44xx()) {
-			omap_sram_start = OMAP4_SRAM_PUB_PA;
-			omap_sram_size = 0xa000; /* 40K */
-		} else if (soc_is_omap54xx()) {
-			omap_sram_start = OMAP5_SRAM_PA;
-			omap_sram_size = SZ_128K; /* 128KB */
 		} else {
 			omap_sram_start = OMAP2_SRAM_PUB_PA;
 			omap_sram_size = 0x800; /* 2K */
 		}
 	} else {
-		if (soc_is_am33xx()) {
-			omap_sram_start = AM33XX_SRAM_PA;
-			omap_sram_size = 0x10000; /* 64K */
-		} else if (soc_is_am43xx()) {
-			omap_sram_start = AM33XX_SRAM_PA;
-			omap_sram_size = SZ_256K;
-		} else if (cpu_is_omap34xx()) {
+		if (cpu_is_omap34xx()) {
 			omap_sram_start = OMAP3_SRAM_PA;
 			omap_sram_size = 0x10000; /* 64K */
-		} else if (cpu_is_omap44xx()) {
-			omap_sram_start = OMAP4_SRAM_PA;
-			omap_sram_size = 0xe000; /* 56K */
-		} else if (soc_is_omap54xx()) {
-			omap_sram_start = OMAP5_SRAM_PA;
-			omap_sram_size = SZ_128K; /* 128KB */
 		} else {
 			omap_sram_start = OMAP2_SRAM_PA;
 			if (cpu_is_omap242x())
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
index ca7277c..3f83b80 100644
--- a/arch/arm/mach-omap2/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -80,4 +80,3 @@ static inline void omap_push_sram_idle(void) {}
 #else
 #define OMAP4_SRAM_PA		0x40300000
 #endif
-#define AM33XX_SRAM_PA		0x40300000
-- 
1.7.9.5

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Rajendra Nayak]

Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private plat-omap/sram.c

Address and size related data  is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.

Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi        |    5 ++---
 arch/arm/boot/dts/am4372.dtsi        |    5 +++++
 arch/arm/boot/dts/omap4.dtsi         |    5 +++++
 arch/arm/boot/dts/omap5.dtsi         |    5 +++++
 arch/arm/configs/omap2plus_defconfig |    1 +
 arch/arm/mach-omap2/sram.c           |   26 +-------------------------
 arch/arm/mach-omap2/sram.h           |    1 -
 7 files changed, 19 insertions(+), 29 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 38b446b..69cbce9 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -482,9 +482,8 @@
 		};
 
 		ocmcram: ocmcram at 40300000 {
-			compatible = "ti,am3352-ocmcram";
-			reg = <0x40300000 0x10000>;
-			ti,hwmods = "ocmcram";
+			compatible = "mmio-sram";
+			reg = <0x40300000 0x10000>; /* 64k */
 		};
 
 		wkup_m3: wkup_m3 at 44d00000 {
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ddc1df7..5c8cee1 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -64,5 +64,10 @@
 			compatible = "ti,am4372-counter32k","ti,omap-counter32k";
 			reg = <0x44e86000 0x40>;
 		};
+
+		ocmcram: ocmcram at 40300000 {
+			compatible = "mmio-sram";
+			reg = <0x40300000 0x40000>; /* 256k */
+		};
 	};
 };
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..1ba6a77 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -126,6 +126,11 @@
 			pinctrl-single,function-mask = <0x7fff>;
 		};
 
+		ocmcram: ocmcram at 40304000 {
+			compatible = "mmio-sram";
+			reg = <0x40304000 0xa000>; /* 40k */
+		};
+
 		sdma: dma-controller at 4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index e643620..461ffd8 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -119,6 +119,11 @@
 			pinctrl-single,function-mask = <0x7fff>;
 		};
 
+		ocmcram: ocmcram at 40300000 {
+			compatible = "mmio-sram";
+			reg = <0x40300000 0x20000>; /* 128k */
+		};
+
 		sdma: dma-controller at 4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 5339e6a..5d4c9b8 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -101,6 +101,7 @@ CONFIG_SENSORS_LIS3LV02D=m
 CONFIG_SENSORS_TSL2550=m
 CONFIG_SENSORS_LIS3_I2C=m
 CONFIG_BMP085_I2C=m
+CONFIG_SRAM=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 305fc2b..d5ecb75 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -32,12 +32,6 @@
 
 #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
 #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA		0x40300000
 
 #define SRAM_BOOTLOADER_SZ	0x00
 
@@ -105,32 +99,14 @@ static void __init omap_detect_sram(void)
 			} else {
 				omap_sram_size = 0x8000; /* 32K */
 			}
-		} else if (cpu_is_omap44xx()) {
-			omap_sram_start = OMAP4_SRAM_PUB_PA;
-			omap_sram_size = 0xa000; /* 40K */
-		} else if (soc_is_omap54xx()) {
-			omap_sram_start = OMAP5_SRAM_PA;
-			omap_sram_size = SZ_128K; /* 128KB */
 		} else {
 			omap_sram_start = OMAP2_SRAM_PUB_PA;
 			omap_sram_size = 0x800; /* 2K */
 		}
 	} else {
-		if (soc_is_am33xx()) {
-			omap_sram_start = AM33XX_SRAM_PA;
-			omap_sram_size = 0x10000; /* 64K */
-		} else if (soc_is_am43xx()) {
-			omap_sram_start = AM33XX_SRAM_PA;
-			omap_sram_size = SZ_256K;
-		} else if (cpu_is_omap34xx()) {
+		if (cpu_is_omap34xx()) {
 			omap_sram_start = OMAP3_SRAM_PA;
 			omap_sram_size = 0x10000; /* 64K */
-		} else if (cpu_is_omap44xx()) {
-			omap_sram_start = OMAP4_SRAM_PA;
-			omap_sram_size = 0xe000; /* 56K */
-		} else if (soc_is_omap54xx()) {
-			omap_sram_start = OMAP5_SRAM_PA;
-			omap_sram_size = SZ_128K; /* 128KB */
 		} else {
 			omap_sram_start = OMAP2_SRAM_PA;
 			if (cpu_is_omap242x())
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
index ca7277c..3f83b80 100644
--- a/arch/arm/mach-omap2/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -80,4 +80,3 @@ static inline void omap_push_sram_idle(void) {}
 #else
 #define OMAP4_SRAM_PA		0x40300000
 #endif
-#define AM33XX_SRAM_PA		0x40300000
-- 
1.7.9.5

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Rajendra Nayak]

In order to handle errata I688, a page of sram was reserved by doing a
static iotable map. Now that we use gen_pool to manage sram, we can
completely remove all of these static mappings and use gen_pool_alloc()
to get the one page of sram space needed to implement errata I688.

Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++++-
 arch/arm/boot/dts/omap4.dtsi                       |    1 +
 arch/arm/boot/dts/omap5.dtsi                       |    3 ++-
 arch/arm/mach-omap2/io.c                           |   17 -----------------
 arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++++++++++-
 arch/arm/mach-omap2/sram.c                         |    6 ------
 arch/arm/mach-omap2/sram.h                         |    6 ------
 7 files changed, 23 insertions(+), 32 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
index 1a5a42c..8915ba3 100644
--- a/Documentation/devicetree/bindings/arm/omap/mpu.txt
+++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt
@@ -6,9 +6,12 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
 
 Required properties:
 - compatible : Should be "ti,omap3-mpu" for OMAP3
-               Should be "ti,omap4-mpu" for OMAP4
+               Should be "ti,omap4-mpu" for OMAP4 and OMAP5
 - ti,hwmods: "mpu"
 
+Optional properties:
+- sram:	Phandle to the ocmcram node
+
 Examples:
 
 - For an OMAP4 SMP system:
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 1ba6a77..9114241 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -71,6 +71,7 @@
 		mpu {
 			compatible = "ti,omap4-mpu";
 			ti,hwmods = "mpu";
+			sram = <&ocmcram>;
 		};
 
 		dsp {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 461ffd8..e9b735b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -72,8 +72,9 @@
 	soc {
 		compatible = "ti,omap-infra";
 		mpu {
-			compatible = "ti,omap5-mpu";
+			compatible = "ti,omap4-mpu";
 			ti,hwmods = "mpu";
+			sram = <&ocmcram>;
 		};
 	};
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4a3f06f..8b2334e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -239,15 +239,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
 		.length		= L4_PER_44XX_SIZE,
 		.type		= MT_DEVICE,
 	},
-#ifdef CONFIG_OMAP4_ERRATA_I688
-	{
-		.virtual	= OMAP4_SRAM_VA,
-		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
-		.length		= PAGE_SIZE,
-		.type		= MT_MEMORY_SO,
-	},
-#endif
-
 };
 #endif
 
@@ -277,14 +268,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
 		.length		= L4_PER_54XX_SIZE,
 		.type		= MT_DEVICE,
 	},
-#ifdef CONFIG_OMAP4_ERRATA_I688
-	{
-		.virtual	= OMAP4_SRAM_VA,
-		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
-		.length		= PAGE_SIZE,
-		.type		= MT_MEMORY_SO,
-	},
-#endif
 };
 #endif
 
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 5791143..6b5ffb3 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -24,6 +24,7 @@
 #include <linux/irqchip/arm-gic.h>
 #include <linux/of_address.h>
 #include <linux/reboot.h>
+#include <linux/genalloc.h>
 
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/map.h>
@@ -71,6 +72,21 @@ void omap_bus_sync(void)
 }
 EXPORT_SYMBOL(omap_bus_sync);
 
+static int __init omap4_sram_init(void)
+{
+	struct device_node *np;
+	struct gen_pool *sram_pool;
+
+	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
+	if (!np)
+		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
+			 __func__);
+	sram_pool = of_get_named_gen_pool(np, "sram", 0);
+	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
+	return 0;
+}
+omap_arch_initcall(omap4_sram_init);
+
 /* Steal one page physical memory for barrier implementation */
 int __init omap_barrier_reserve_memblock(void)
 {
@@ -91,7 +107,6 @@ void __init omap_barriers_init(void)
 	dram_io_desc[0].type = MT_MEMORY_SO;
 	iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
 	dram_sync = (void __iomem *) dram_io_desc[0].virtual;
-	sram_sync = (void __iomem *) OMAP4_SRAM_VA;
 
 	pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
 		(long long) paddr, dram_io_desc[0].virtual);
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index d5ecb75..8591044 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -124,12 +124,6 @@ static void __init omap2_map_sram(void)
 {
 	int cached = 1;
 
-#ifdef CONFIG_OMAP4_ERRATA_I688
-	if (cpu_is_omap44xx()) {
-		omap_sram_start += PAGE_SIZE;
-		omap_sram_size -= SZ_16K;
-	}
-#endif
 	if (cpu_is_omap34xx()) {
 		/*
 		 * SRAM must be marked as non-cached on OMAP3 since the
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
index 3f83b80..948d3ed 100644
--- a/arch/arm/mach-omap2/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {}
  */
 #define OMAP2_SRAM_PA		0x40200000
 #define OMAP3_SRAM_PA           0x40200000
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PA		0x40304000
-#define OMAP4_SRAM_VA		0xfe404000
-#else
-#define OMAP4_SRAM_PA		0x40300000
-#endif
-- 
1.7.9.5

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Rajendra Nayak]

In order to handle errata I688, a page of sram was reserved by doing a
static iotable map. Now that we use gen_pool to manage sram, we can
completely remove all of these static mappings and use gen_pool_alloc()
to get the one page of sram space needed to implement errata I688.

Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++++-
 arch/arm/boot/dts/omap4.dtsi                       |    1 +
 arch/arm/boot/dts/omap5.dtsi                       |    3 ++-
 arch/arm/mach-omap2/io.c                           |   17 -----------------
 arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++++++++++-
 arch/arm/mach-omap2/sram.c                         |    6 ------
 arch/arm/mach-omap2/sram.h                         |    6 ------
 7 files changed, 23 insertions(+), 32 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
index 1a5a42c..8915ba3 100644
--- a/Documentation/devicetree/bindings/arm/omap/mpu.txt
+++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt
@@ -6,9 +6,12 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
 
 Required properties:
 - compatible : Should be "ti,omap3-mpu" for OMAP3
-               Should be "ti,omap4-mpu" for OMAP4
+               Should be "ti,omap4-mpu" for OMAP4 and OMAP5
 - ti,hwmods: "mpu"
 
+Optional properties:
+- sram:	Phandle to the ocmcram node
+
 Examples:
 
 - For an OMAP4 SMP system:
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 1ba6a77..9114241 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -71,6 +71,7 @@
 		mpu {
 			compatible = "ti,omap4-mpu";
 			ti,hwmods = "mpu";
+			sram = <&ocmcram>;
 		};
 
 		dsp {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 461ffd8..e9b735b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -72,8 +72,9 @@
 	soc {
 		compatible = "ti,omap-infra";
 		mpu {
-			compatible = "ti,omap5-mpu";
+			compatible = "ti,omap4-mpu";
 			ti,hwmods = "mpu";
+			sram = <&ocmcram>;
 		};
 	};
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4a3f06f..8b2334e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -239,15 +239,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
 		.length		= L4_PER_44XX_SIZE,
 		.type		= MT_DEVICE,
 	},
-#ifdef CONFIG_OMAP4_ERRATA_I688
-	{
-		.virtual	= OMAP4_SRAM_VA,
-		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
-		.length		= PAGE_SIZE,
-		.type		= MT_MEMORY_SO,
-	},
-#endif
-
 };
 #endif
 
@@ -277,14 +268,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
 		.length		= L4_PER_54XX_SIZE,
 		.type		= MT_DEVICE,
 	},
-#ifdef CONFIG_OMAP4_ERRATA_I688
-	{
-		.virtual	= OMAP4_SRAM_VA,
-		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
-		.length		= PAGE_SIZE,
-		.type		= MT_MEMORY_SO,
-	},
-#endif
 };
 #endif
 
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 5791143..6b5ffb3 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -24,6 +24,7 @@
 #include <linux/irqchip/arm-gic.h>
 #include <linux/of_address.h>
 #include <linux/reboot.h>
+#include <linux/genalloc.h>
 
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/map.h>
@@ -71,6 +72,21 @@ void omap_bus_sync(void)
 }
 EXPORT_SYMBOL(omap_bus_sync);
 
+static int __init omap4_sram_init(void)
+{
+	struct device_node *np;
+	struct gen_pool *sram_pool;
+
+	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
+	if (!np)
+		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
+			 __func__);
+	sram_pool = of_get_named_gen_pool(np, "sram", 0);
+	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
+	return 0;
+}
+omap_arch_initcall(omap4_sram_init);
+
 /* Steal one page physical memory for barrier implementation */
 int __init omap_barrier_reserve_memblock(void)
 {
@@ -91,7 +107,6 @@ void __init omap_barriers_init(void)
 	dram_io_desc[0].type = MT_MEMORY_SO;
 	iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
 	dram_sync = (void __iomem *) dram_io_desc[0].virtual;
-	sram_sync = (void __iomem *) OMAP4_SRAM_VA;
 
 	pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
 		(long long) paddr, dram_io_desc[0].virtual);
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index d5ecb75..8591044 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -124,12 +124,6 @@ static void __init omap2_map_sram(void)
 {
 	int cached = 1;
 
-#ifdef CONFIG_OMAP4_ERRATA_I688
-	if (cpu_is_omap44xx()) {
-		omap_sram_start += PAGE_SIZE;
-		omap_sram_size -= SZ_16K;
-	}
-#endif
 	if (cpu_is_omap34xx()) {
 		/*
 		 * SRAM must be marked as non-cached on OMAP3 since the
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
index 3f83b80..948d3ed 100644
--- a/arch/arm/mach-omap2/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {}
  */
 #define OMAP2_SRAM_PA		0x40200000
 #define OMAP3_SRAM_PA           0x40200000
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PA		0x40304000
-#define OMAP4_SRAM_VA		0xfe404000
-#else
-#define OMAP4_SRAM_PA		0x40300000
-#endif
-- 
1.7.9.5

Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Santosh Shilimkar]

On Thursday 29 August 2013 07:23 AM, Rajendra Nayak wrote:
> In order to handle errata I688, a page of sram was reserved by doing a
> static iotable map. Now that we use gen_pool to manage sram, we can
> completely remove all of these static mappings and use gen_pool_alloc()
> to get the one page of sram space needed to implement errata I688.
> 
> Suggested-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> ---
>  Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++++-
>  arch/arm/boot/dts/omap4.dtsi                       |    1 +
>  arch/arm/boot/dts/omap5.dtsi                       |    3 ++-
>  arch/arm/mach-omap2/io.c                           |   17 -----------------
>  arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++++++++++-
>  arch/arm/mach-omap2/sram.c                         |    6 ------
>  arch/arm/mach-omap2/sram.h                         |    6 ------
>  7 files changed, 23 insertions(+), 32 deletions(-)
>
Add a note in the change-log about about omap_bus_sync() being NOP till the
SRAM is initialized. Its not a problem since the idle loop hasn't
started yet.

Other than that looks fine.
 
> diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
> index 1a5a42c..8915ba3 100644
> --- a/Documentation/devicetree/bindings/arm/omap/mpu.txt
> +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt
> @@ -6,9 +6,12 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
>  
>  Required properties:
>  - compatible : Should be "ti,omap3-mpu" for OMAP3
> -               Should be "ti,omap4-mpu" for OMAP4
> +               Should be "ti,omap4-mpu" for OMAP4 and OMAP5
>  - ti,hwmods: "mpu"
>  
> +Optional properties:
> +- sram:	Phandle to the ocmcram node
> +
>  Examples:
>  
>  - For an OMAP4 SMP system:
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 1ba6a77..9114241 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -71,6 +71,7 @@
>  		mpu {
>  			compatible = "ti,omap4-mpu";
>  			ti,hwmods = "mpu";
> +			sram = <&ocmcram>;
>  		};
>  
>  		dsp {
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 461ffd8..e9b735b 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -72,8 +72,9 @@
>  	soc {
>  		compatible = "ti,omap-infra";
>  		mpu {
> -			compatible = "ti,omap5-mpu";
> +			compatible = "ti,omap4-mpu";
>  			ti,hwmods = "mpu";
> +			sram = <&ocmcram>;
>  		};
>  	};
>  
> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
> index 4a3f06f..8b2334e 100644
> --- a/arch/arm/mach-omap2/io.c
> +++ b/arch/arm/mach-omap2/io.c
> @@ -239,15 +239,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
>  		.length		= L4_PER_44XX_SIZE,
>  		.type		= MT_DEVICE,
>  	},
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -	{
> -		.virtual	= OMAP4_SRAM_VA,
> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
> -		.length		= PAGE_SIZE,
> -		.type		= MT_MEMORY_SO,
> -	},
> -#endif
> -
>  };
>  #endif
>  
> @@ -277,14 +268,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
>  		.length		= L4_PER_54XX_SIZE,
>  		.type		= MT_DEVICE,
>  	},
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -	{
> -		.virtual	= OMAP4_SRAM_VA,
> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
> -		.length		= PAGE_SIZE,
> -		.type		= MT_MEMORY_SO,
> -	},
> -#endif
>  };
>  #endif
>  
> diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
> index 5791143..6b5ffb3 100644
> --- a/arch/arm/mach-omap2/omap4-common.c
> +++ b/arch/arm/mach-omap2/omap4-common.c
> @@ -24,6 +24,7 @@
>  #include <linux/irqchip/arm-gic.h>
>  #include <linux/of_address.h>
>  #include <linux/reboot.h>
> +#include <linux/genalloc.h>
>  
>  #include <asm/hardware/cache-l2x0.h>
>  #include <asm/mach/map.h>
> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>  }
>  EXPORT_SYMBOL(omap_bus_sync);
>  
> +static int __init omap4_sram_init(void)
> +{
> +	struct device_node *np;
> +	struct gen_pool *sram_pool;
> +
> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
> +	if (!np)
> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
> +			 __func__);
> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
> +	return 0;
> +}
> +omap_arch_initcall(omap4_sram_init);
> +
>  /* Steal one page physical memory for barrier implementation */
>  int __init omap_barrier_reserve_memblock(void)
>  {
> @@ -91,7 +107,6 @@ void __init omap_barriers_init(void)
>  	dram_io_desc[0].type = MT_MEMORY_SO;
>  	iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
>  	dram_sync = (void __iomem *) dram_io_desc[0].virtual;
> -	sram_sync = (void __iomem *) OMAP4_SRAM_VA;
>  
>  	pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
>  		(long long) paddr, dram_io_desc[0].virtual);
> diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
> index d5ecb75..8591044 100644
> --- a/arch/arm/mach-omap2/sram.c
> +++ b/arch/arm/mach-omap2/sram.c
> @@ -124,12 +124,6 @@ static void __init omap2_map_sram(void)
>  {
>  	int cached = 1;
>  
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -	if (cpu_is_omap44xx()) {
> -		omap_sram_start += PAGE_SIZE;
> -		omap_sram_size -= SZ_16K;
> -	}
> -#endif
>  	if (cpu_is_omap34xx()) {
>  		/*
>  		 * SRAM must be marked as non-cached on OMAP3 since the
> diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
> index 3f83b80..948d3ed 100644
> --- a/arch/arm/mach-omap2/sram.h
> +++ b/arch/arm/mach-omap2/sram.h
> @@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {}
>   */
>  #define OMAP2_SRAM_PA		0x40200000
>  #define OMAP3_SRAM_PA           0x40200000
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -#define OMAP4_SRAM_PA		0x40304000
> -#define OMAP4_SRAM_VA		0xfe404000
> -#else
> -#define OMAP4_SRAM_PA		0x40300000
> -#endif
> 

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Santosh Shilimkar]

On Thursday 29 August 2013 07:23 AM, Rajendra Nayak wrote:
> In order to handle errata I688, a page of sram was reserved by doing a
> static iotable map. Now that we use gen_pool to manage sram, we can
> completely remove all of these static mappings and use gen_pool_alloc()
> to get the one page of sram space needed to implement errata I688.
> 
> Suggested-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> ---
>  Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++++-
>  arch/arm/boot/dts/omap4.dtsi                       |    1 +
>  arch/arm/boot/dts/omap5.dtsi                       |    3 ++-
>  arch/arm/mach-omap2/io.c                           |   17 -----------------
>  arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++++++++++-
>  arch/arm/mach-omap2/sram.c                         |    6 ------
>  arch/arm/mach-omap2/sram.h                         |    6 ------
>  7 files changed, 23 insertions(+), 32 deletions(-)
>
Add a note in the change-log about about omap_bus_sync() being NOP till the
SRAM is initialized. Its not a problem since the idle loop hasn't
started yet.

Other than that looks fine.
 
> diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
> index 1a5a42c..8915ba3 100644
> --- a/Documentation/devicetree/bindings/arm/omap/mpu.txt
> +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt
> @@ -6,9 +6,12 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
>  
>  Required properties:
>  - compatible : Should be "ti,omap3-mpu" for OMAP3
> -               Should be "ti,omap4-mpu" for OMAP4
> +               Should be "ti,omap4-mpu" for OMAP4 and OMAP5
>  - ti,hwmods: "mpu"
>  
> +Optional properties:
> +- sram:	Phandle to the ocmcram node
> +
>  Examples:
>  
>  - For an OMAP4 SMP system:
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 1ba6a77..9114241 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -71,6 +71,7 @@
>  		mpu {
>  			compatible = "ti,omap4-mpu";
>  			ti,hwmods = "mpu";
> +			sram = <&ocmcram>;
>  		};
>  
>  		dsp {
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 461ffd8..e9b735b 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -72,8 +72,9 @@
>  	soc {
>  		compatible = "ti,omap-infra";
>  		mpu {
> -			compatible = "ti,omap5-mpu";
> +			compatible = "ti,omap4-mpu";
>  			ti,hwmods = "mpu";
> +			sram = <&ocmcram>;
>  		};
>  	};
>  
> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
> index 4a3f06f..8b2334e 100644
> --- a/arch/arm/mach-omap2/io.c
> +++ b/arch/arm/mach-omap2/io.c
> @@ -239,15 +239,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
>  		.length		= L4_PER_44XX_SIZE,
>  		.type		= MT_DEVICE,
>  	},
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -	{
> -		.virtual	= OMAP4_SRAM_VA,
> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
> -		.length		= PAGE_SIZE,
> -		.type		= MT_MEMORY_SO,
> -	},
> -#endif
> -
>  };
>  #endif
>  
> @@ -277,14 +268,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
>  		.length		= L4_PER_54XX_SIZE,
>  		.type		= MT_DEVICE,
>  	},
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -	{
> -		.virtual	= OMAP4_SRAM_VA,
> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
> -		.length		= PAGE_SIZE,
> -		.type		= MT_MEMORY_SO,
> -	},
> -#endif
>  };
>  #endif
>  
> diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
> index 5791143..6b5ffb3 100644
> --- a/arch/arm/mach-omap2/omap4-common.c
> +++ b/arch/arm/mach-omap2/omap4-common.c
> @@ -24,6 +24,7 @@
>  #include <linux/irqchip/arm-gic.h>
>  #include <linux/of_address.h>
>  #include <linux/reboot.h>
> +#include <linux/genalloc.h>
>  
>  #include <asm/hardware/cache-l2x0.h>
>  #include <asm/mach/map.h>
> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>  }
>  EXPORT_SYMBOL(omap_bus_sync);
>  
> +static int __init omap4_sram_init(void)
> +{
> +	struct device_node *np;
> +	struct gen_pool *sram_pool;
> +
> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
> +	if (!np)
> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
> +			 __func__);
> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
> +	return 0;
> +}
> +omap_arch_initcall(omap4_sram_init);
> +
>  /* Steal one page physical memory for barrier implementation */
>  int __init omap_barrier_reserve_memblock(void)
>  {
> @@ -91,7 +107,6 @@ void __init omap_barriers_init(void)
>  	dram_io_desc[0].type = MT_MEMORY_SO;
>  	iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
>  	dram_sync = (void __iomem *) dram_io_desc[0].virtual;
> -	sram_sync = (void __iomem *) OMAP4_SRAM_VA;
>  
>  	pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
>  		(long long) paddr, dram_io_desc[0].virtual);
> diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
> index d5ecb75..8591044 100644
> --- a/arch/arm/mach-omap2/sram.c
> +++ b/arch/arm/mach-omap2/sram.c
> @@ -124,12 +124,6 @@ static void __init omap2_map_sram(void)
>  {
>  	int cached = 1;
>  
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -	if (cpu_is_omap44xx()) {
> -		omap_sram_start += PAGE_SIZE;
> -		omap_sram_size -= SZ_16K;
> -	}
> -#endif
>  	if (cpu_is_omap34xx()) {
>  		/*
>  		 * SRAM must be marked as non-cached on OMAP3 since the
> diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
> index 3f83b80..948d3ed 100644
> --- a/arch/arm/mach-omap2/sram.h
> +++ b/arch/arm/mach-omap2/sram.h
> @@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {}
>   */
>  #define OMAP2_SRAM_PA		0x40200000
>  #define OMAP3_SRAM_PA           0x40200000
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -#define OMAP4_SRAM_PA		0x40304000
> -#define OMAP4_SRAM_VA		0xfe404000
> -#else
> -#define OMAP4_SRAM_PA		0x40300000
> -#endif
> 

Re: [PATCH v2 0/3] OMAP4+: Get rid of internal SRAM handling

[Santosh Shilimkar]

On Thursday 29 August 2013 07:23 AM, Rajendra Nayak wrote:
> v2:
> Removed the static iotable mapping for sram done to handle
> errata I688, and used gen_pool instead.
> 
> Make all OMAP DT only platforms (am33xx, am43xx, omap4 and omap5)
> use drivers/misc/sram.c driver instead of the omap internal
> implementation for SRAM handling.
> 
> Rajendra Nayak (3):
>   ARM: AM335x: Get rid of unused sram init function
>   ARM: OMAP4+: Move SRAM data to DT
>   ARM: OMAP4+: Remove static iotable mappings for SRAM
> 
>  Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++-
>  arch/arm/boot/dts/am33xx.dtsi                      |    5 +--
>  arch/arm/boot/dts/am4372.dtsi                      |    5 +++
>  arch/arm/boot/dts/omap4.dtsi                       |    6 +++
>  arch/arm/boot/dts/omap5.dtsi                       |    8 +++-
>  arch/arm/configs/omap2plus_defconfig               |    1 +
>  arch/arm/mach-omap2/io.c                           |   17 ---------
>  arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++-
>  arch/arm/mach-omap2/sram.c                         |   39 +-------------------
>  arch/arm/mach-omap2/sram.h                         |    7 ----
>  10 files changed, 42 insertions(+), 68 deletions(-)
> 
Apart from one minor comment of last patch, the series looks
fine ti me.

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>


Regards,
Santosh

[PATCH v2 0/3] OMAP4+: Get rid of internal SRAM handling

[Santosh Shilimkar]

On Thursday 29 August 2013 07:23 AM, Rajendra Nayak wrote:
> v2:
> Removed the static iotable mapping for sram done to handle
> errata I688, and used gen_pool instead.
> 
> Make all OMAP DT only platforms (am33xx, am43xx, omap4 and omap5)
> use drivers/misc/sram.c driver instead of the omap internal
> implementation for SRAM handling.
> 
> Rajendra Nayak (3):
>   ARM: AM335x: Get rid of unused sram init function
>   ARM: OMAP4+: Move SRAM data to DT
>   ARM: OMAP4+: Remove static iotable mappings for SRAM
> 
>  Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++-
>  arch/arm/boot/dts/am33xx.dtsi                      |    5 +--
>  arch/arm/boot/dts/am4372.dtsi                      |    5 +++
>  arch/arm/boot/dts/omap4.dtsi                       |    6 +++
>  arch/arm/boot/dts/omap5.dtsi                       |    8 +++-
>  arch/arm/configs/omap2plus_defconfig               |    1 +
>  arch/arm/mach-omap2/io.c                           |   17 ---------
>  arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++-
>  arch/arm/mach-omap2/sram.c                         |   39 +-------------------
>  arch/arm/mach-omap2/sram.h                         |    7 ----
>  10 files changed, 42 insertions(+), 68 deletions(-)
> 
Apart from one minor comment of last patch, the series looks
fine ti me.

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>


Regards,
Santosh

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 22d9f2b..1ba6a77 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -126,6 +126,11 @@
>  			pinctrl-single,function-mask = <0x7fff>;
>  		};
>  
> +		ocmcram: ocmcram@40304000 {

This can now be changed to 0x40300000 now that you have moved to
gen_pool_alloc()?

Thanks,
Sekhar

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 22d9f2b..1ba6a77 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -126,6 +126,11 @@
>  			pinctrl-single,function-mask = <0x7fff>;
>  		};
>  
> +		ocmcram: ocmcram at 40304000 {

This can now be changed to 0x40300000 now that you have moved to
gen_pool_alloc()?

Thanks,
Sekhar

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Santosh Shilimkar]

On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>> index 22d9f2b..1ba6a77 100644
>> --- a/arch/arm/boot/dts/omap4.dtsi
>> +++ b/arch/arm/boot/dts/omap4.dtsi
>> @@ -126,6 +126,11 @@
>>  			pinctrl-single,function-mask = <0x7fff>;
>>  		};
>>  
>> +		ocmcram: ocmcram@40304000 {
> 
> This can now be changed to 0x40300000 now that you have moved to
> gen_pool_alloc()?
> 
NO.
It won't work on secure devices since first 16 KB is occupied for
default configuration. Its not worth trouble also to handle
secure/non-secure considering the use of SRAM which is actually just
limited to errata. 40304000 will work for both devices.

Regards,
Santosh

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Santosh Shilimkar]

On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>> index 22d9f2b..1ba6a77 100644
>> --- a/arch/arm/boot/dts/omap4.dtsi
>> +++ b/arch/arm/boot/dts/omap4.dtsi
>> @@ -126,6 +126,11 @@
>>  			pinctrl-single,function-mask = <0x7fff>;
>>  		};
>>  
>> +		ocmcram: ocmcram at 40304000 {
> 
> This can now be changed to 0x40300000 now that you have moved to
> gen_pool_alloc()?
> 
NO.
It won't work on secure devices since first 16 KB is occupied for
default configuration. Its not worth trouble also to handle
secure/non-secure considering the use of SRAM which is actually just
limited to errata. 40304000 will work for both devices.

Regards,
Santosh

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 8/29/2013 7:01 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>> index 22d9f2b..1ba6a77 100644
>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>> @@ -126,6 +126,11 @@
>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>  		};
>>>  
>>> +		ocmcram: ocmcram@40304000 {
>>
>> This can now be changed to 0x40300000 now that you have moved to
>> gen_pool_alloc()?
>>
> NO.
> It won't work on secure devices since first 16 KB is occupied for
> default configuration. Its not worth trouble also to handle
> secure/non-secure considering the use of SRAM which is actually just
> limited to errata. 40304000 will work for both devices.

Okay, the same problem is not applicable to OMAP5 and other devices? I
am okay with this as such, may be just add a comment explaining why
there is an offset.

Thanks,
Sekhar

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 8/29/2013 7:01 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>> index 22d9f2b..1ba6a77 100644
>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>> @@ -126,6 +126,11 @@
>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>  		};
>>>  
>>> +		ocmcram: ocmcram at 40304000 {
>>
>> This can now be changed to 0x40300000 now that you have moved to
>> gen_pool_alloc()?
>>
> NO.
> It won't work on secure devices since first 16 KB is occupied for
> default configuration. Its not worth trouble also to handle
> secure/non-secure considering the use of SRAM which is actually just
> limited to errata. 40304000 will work for both devices.

Okay, the same problem is not applicable to OMAP5 and other devices? I
am okay with this as such, may be just add a comment explaining why
there is an offset.

Thanks,
Sekhar

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Santosh Shilimkar]

On Thursday 29 August 2013 09:44 AM, Sekhar Nori wrote:
> On 8/29/2013 7:01 PM, Santosh Shilimkar wrote:
>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>> index 22d9f2b..1ba6a77 100644
>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>> @@ -126,6 +126,11 @@
>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>  		};
>>>>  
>>>> +		ocmcram: ocmcram@40304000 {
>>>
>>> This can now be changed to 0x40300000 now that you have moved to
>>> gen_pool_alloc()?
>>>
>> NO.
>> It won't work on secure devices since first 16 KB is occupied for
>> default configuration. Its not worth trouble also to handle
>> secure/non-secure considering the use of SRAM which is actually just
>> limited to errata. 40304000 will work for both devices.
> 
> Okay, the same problem is not applicable to OMAP5 and other devices? I
> am okay with this as such, may be just add a comment explaining why
> there is an offset.
> 
>From specs the errata is applicable only for O4 though OMAP5 downstream
kernel enabled it. Its ok to limit this one for O5 now.

Regards,
Santosh

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Santosh Shilimkar]

On Thursday 29 August 2013 09:44 AM, Sekhar Nori wrote:
> On 8/29/2013 7:01 PM, Santosh Shilimkar wrote:
>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>> index 22d9f2b..1ba6a77 100644
>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>> @@ -126,6 +126,11 @@
>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>  		};
>>>>  
>>>> +		ocmcram: ocmcram at 40304000 {
>>>
>>> This can now be changed to 0x40300000 now that you have moved to
>>> gen_pool_alloc()?
>>>
>> NO.
>> It won't work on secure devices since first 16 KB is occupied for
>> default configuration. Its not worth trouble also to handle
>> secure/non-secure considering the use of SRAM which is actually just
>> limited to errata. 40304000 will work for both devices.
> 
> Okay, the same problem is not applicable to OMAP5 and other devices? I
> am okay with this as such, may be just add a comment explaining why
> there is an offset.
> 
>From specs the errata is applicable only for O4 though OMAP5 downstream
kernel enabled it. Its ok to limit this one for O5 now.

Regards,
Santosh

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Rajendra Nayak]

On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>> index 22d9f2b..1ba6a77 100644
>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>> @@ -126,6 +126,11 @@
>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>  		};
>>>  
>>> +		ocmcram: ocmcram@40304000 {
>>
>> This can now be changed to 0x40300000 now that you have moved to
>> gen_pool_alloc()?
>>
> NO.
> It won't work on secure devices since first 16 KB is occupied for
> default configuration. Its not worth trouble also to handle
> secure/non-secure considering the use of SRAM which is actually just
> limited to errata. 40304000 will work for both devices.

Right. Sekhar, you might have confused because of the existing buggy code
in sram.c and sram.h which did this (and is removed in this series)

from sram.c
-----------
 #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
 #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA		0x40300000
 
from sram.h
-----------
 #define OMAP2_SRAM_PA		0x40200000
 #define OMAP3_SRAM_PA           0x40200000
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PA		0x40304000
-#define OMAP4_SRAM_VA		0xfe404000
-#else
-#define OMAP4_SRAM_PA		0x40300000
-#endif

I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
came in from, but these are done, like Santosh said, to handle
secure and non-secure sram across GP and HS devices and in
no way related to handling errata I688.

> 
> Regards,
> Santosh
> 

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Rajendra Nayak]

On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>> index 22d9f2b..1ba6a77 100644
>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>> @@ -126,6 +126,11 @@
>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>  		};
>>>  
>>> +		ocmcram: ocmcram at 40304000 {
>>
>> This can now be changed to 0x40300000 now that you have moved to
>> gen_pool_alloc()?
>>
> NO.
> It won't work on secure devices since first 16 KB is occupied for
> default configuration. Its not worth trouble also to handle
> secure/non-secure considering the use of SRAM which is actually just
> limited to errata. 40304000 will work for both devices.

Right. Sekhar, you might have confused because of the existing buggy code
in sram.c and sram.h which did this (and is removed in this series)

from sram.c
-----------
 #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
 #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA		0x40300000
 
from sram.h
-----------
 #define OMAP2_SRAM_PA		0x40200000
 #define OMAP3_SRAM_PA           0x40200000
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PA		0x40304000
-#define OMAP4_SRAM_VA		0xfe404000
-#else
-#define OMAP4_SRAM_PA		0x40300000
-#endif

I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
came in from, but these are done, like Santosh said, to handle
secure and non-secure sram across GP and HS devices and in
no way related to handling errata I688.

> 
> Regards,
> Santosh
> 

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Santosh Shilimkar]

On Thursday 29 August 2013 09:50 AM, Rajendra Nayak wrote:
> On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>> index 22d9f2b..1ba6a77 100644
>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>> @@ -126,6 +126,11 @@
>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>  		};
>>>>  
>>>> +		ocmcram: ocmcram@40304000 {
>>>
>>> This can now be changed to 0x40300000 now that you have moved to
>>> gen_pool_alloc()?
>>>
>> NO.
>> It won't work on secure devices since first 16 KB is occupied for
>> default configuration. Its not worth trouble also to handle
>> secure/non-secure considering the use of SRAM which is actually just
>> limited to errata. 40304000 will work for both devices.
> 
> Right. Sekhar, you might have confused because of the existing buggy code
> in sram.c and sram.h which did this (and is removed in this series)
> 
> from sram.c
> -----------
>  #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
>  #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
> -#else
> -#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
> -#endif
> -#define OMAP5_SRAM_PA		0x40300000
>  
> from sram.h
> -----------
>  #define OMAP2_SRAM_PA		0x40200000
>  #define OMAP3_SRAM_PA           0x40200000
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -#define OMAP4_SRAM_PA		0x40304000
> -#define OMAP4_SRAM_VA		0xfe404000
> -#else
> -#define OMAP4_SRAM_PA		0x40300000
> -#endif
> 
> I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
> came in from, but these are done, like Santosh said, to handle
> secure and non-secure sram across GP and HS devices and in
> no way related to handling errata I688.
> 
The check was to ensure that with errata enabled, we don't care
about first 16 KB ;-)

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Santosh Shilimkar]

On Thursday 29 August 2013 09:50 AM, Rajendra Nayak wrote:
> On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>> index 22d9f2b..1ba6a77 100644
>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>> @@ -126,6 +126,11 @@
>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>  		};
>>>>  
>>>> +		ocmcram: ocmcram at 40304000 {
>>>
>>> This can now be changed to 0x40300000 now that you have moved to
>>> gen_pool_alloc()?
>>>
>> NO.
>> It won't work on secure devices since first 16 KB is occupied for
>> default configuration. Its not worth trouble also to handle
>> secure/non-secure considering the use of SRAM which is actually just
>> limited to errata. 40304000 will work for both devices.
> 
> Right. Sekhar, you might have confused because of the existing buggy code
> in sram.c and sram.h which did this (and is removed in this series)
> 
> from sram.c
> -----------
>  #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
>  #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
> -#else
> -#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
> -#endif
> -#define OMAP5_SRAM_PA		0x40300000
>  
> from sram.h
> -----------
>  #define OMAP2_SRAM_PA		0x40200000
>  #define OMAP3_SRAM_PA           0x40200000
> -#ifdef CONFIG_OMAP4_ERRATA_I688
> -#define OMAP4_SRAM_PA		0x40304000
> -#define OMAP4_SRAM_VA		0xfe404000
> -#else
> -#define OMAP4_SRAM_PA		0x40300000
> -#endif
> 
> I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
> came in from, but these are done, like Santosh said, to handle
> secure and non-secure sram across GP and HS devices and in
> no way related to handling errata I688.
> 
The check was to ensure that with errata enabled, we don't care
about first 16 KB ;-)

Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Rajendra Nayak]

On Thursday 29 August 2013 06:53 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 07:23 AM, Rajendra Nayak wrote:
>> In order to handle errata I688, a page of sram was reserved by doing a
>> static iotable map. Now that we use gen_pool to manage sram, we can
>> completely remove all of these static mappings and use gen_pool_alloc()
>> to get the one page of sram space needed to implement errata I688.
>>
>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>> ---
>>  Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++++-
>>  arch/arm/boot/dts/omap4.dtsi                       |    1 +
>>  arch/arm/boot/dts/omap5.dtsi                       |    3 ++-
>>  arch/arm/mach-omap2/io.c                           |   17 -----------------
>>  arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++++++++++-
>>  arch/arm/mach-omap2/sram.c                         |    6 ------
>>  arch/arm/mach-omap2/sram.h                         |    6 ------
>>  7 files changed, 23 insertions(+), 32 deletions(-)
>>
> Add a note in the change-log about about omap_bus_sync() being NOP till the
> SRAM is initialized. Its not a problem since the idle loop hasn't
> started yet.

ok, will update the changelog, thanks.

> 
> Other than that looks fine.
>  
>> diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
>> index 1a5a42c..8915ba3 100644
>> --- a/Documentation/devicetree/bindings/arm/omap/mpu.txt
>> +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt
>> @@ -6,9 +6,12 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
>>  
>>  Required properties:
>>  - compatible : Should be "ti,omap3-mpu" for OMAP3
>> -               Should be "ti,omap4-mpu" for OMAP4
>> +               Should be "ti,omap4-mpu" for OMAP4 and OMAP5
>>  - ti,hwmods: "mpu"
>>  
>> +Optional properties:
>> +- sram:	Phandle to the ocmcram node
>> +
>>  Examples:
>>  
>>  - For an OMAP4 SMP system:
>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>> index 1ba6a77..9114241 100644
>> --- a/arch/arm/boot/dts/omap4.dtsi
>> +++ b/arch/arm/boot/dts/omap4.dtsi
>> @@ -71,6 +71,7 @@
>>  		mpu {
>>  			compatible = "ti,omap4-mpu";
>>  			ti,hwmods = "mpu";
>> +			sram = <&ocmcram>;
>>  		};
>>  
>>  		dsp {
>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>> index 461ffd8..e9b735b 100644
>> --- a/arch/arm/boot/dts/omap5.dtsi
>> +++ b/arch/arm/boot/dts/omap5.dtsi
>> @@ -72,8 +72,9 @@
>>  	soc {
>>  		compatible = "ti,omap-infra";
>>  		mpu {
>> -			compatible = "ti,omap5-mpu";
>> +			compatible = "ti,omap4-mpu";
>>  			ti,hwmods = "mpu";
>> +			sram = <&ocmcram>;
>>  		};
>>  	};
>>  
>> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
>> index 4a3f06f..8b2334e 100644
>> --- a/arch/arm/mach-omap2/io.c
>> +++ b/arch/arm/mach-omap2/io.c
>> @@ -239,15 +239,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
>>  		.length		= L4_PER_44XX_SIZE,
>>  		.type		= MT_DEVICE,
>>  	},
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -	{
>> -		.virtual	= OMAP4_SRAM_VA,
>> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
>> -		.length		= PAGE_SIZE,
>> -		.type		= MT_MEMORY_SO,
>> -	},
>> -#endif
>> -
>>  };
>>  #endif
>>  
>> @@ -277,14 +268,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
>>  		.length		= L4_PER_54XX_SIZE,
>>  		.type		= MT_DEVICE,
>>  	},
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -	{
>> -		.virtual	= OMAP4_SRAM_VA,
>> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
>> -		.length		= PAGE_SIZE,
>> -		.type		= MT_MEMORY_SO,
>> -	},
>> -#endif
>>  };
>>  #endif
>>  
>> diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
>> index 5791143..6b5ffb3 100644
>> --- a/arch/arm/mach-omap2/omap4-common.c
>> +++ b/arch/arm/mach-omap2/omap4-common.c
>> @@ -24,6 +24,7 @@
>>  #include <linux/irqchip/arm-gic.h>
>>  #include <linux/of_address.h>
>>  #include <linux/reboot.h>
>> +#include <linux/genalloc.h>
>>  
>>  #include <asm/hardware/cache-l2x0.h>
>>  #include <asm/mach/map.h>
>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>  }
>>  EXPORT_SYMBOL(omap_bus_sync);
>>  
>> +static int __init omap4_sram_init(void)
>> +{
>> +	struct device_node *np;
>> +	struct gen_pool *sram_pool;
>> +
>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>> +	if (!np)
>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>> +			 __func__);
>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
>> +	return 0;
>> +}
>> +omap_arch_initcall(omap4_sram_init);
>> +
>>  /* Steal one page physical memory for barrier implementation */
>>  int __init omap_barrier_reserve_memblock(void)
>>  {
>> @@ -91,7 +107,6 @@ void __init omap_barriers_init(void)
>>  	dram_io_desc[0].type = MT_MEMORY_SO;
>>  	iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
>>  	dram_sync = (void __iomem *) dram_io_desc[0].virtual;
>> -	sram_sync = (void __iomem *) OMAP4_SRAM_VA;
>>  
>>  	pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
>>  		(long long) paddr, dram_io_desc[0].virtual);
>> diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
>> index d5ecb75..8591044 100644
>> --- a/arch/arm/mach-omap2/sram.c
>> +++ b/arch/arm/mach-omap2/sram.c
>> @@ -124,12 +124,6 @@ static void __init omap2_map_sram(void)
>>  {
>>  	int cached = 1;
>>  
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -	if (cpu_is_omap44xx()) {
>> -		omap_sram_start += PAGE_SIZE;
>> -		omap_sram_size -= SZ_16K;
>> -	}
>> -#endif
>>  	if (cpu_is_omap34xx()) {
>>  		/*
>>  		 * SRAM must be marked as non-cached on OMAP3 since the
>> diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
>> index 3f83b80..948d3ed 100644
>> --- a/arch/arm/mach-omap2/sram.h
>> +++ b/arch/arm/mach-omap2/sram.h
>> @@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {}
>>   */
>>  #define OMAP2_SRAM_PA		0x40200000
>>  #define OMAP3_SRAM_PA           0x40200000
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -#define OMAP4_SRAM_PA		0x40304000
>> -#define OMAP4_SRAM_VA		0xfe404000
>> -#else
>> -#define OMAP4_SRAM_PA		0x40300000
>> -#endif
>>
> 

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Rajendra Nayak]

On Thursday 29 August 2013 06:53 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 07:23 AM, Rajendra Nayak wrote:
>> In order to handle errata I688, a page of sram was reserved by doing a
>> static iotable map. Now that we use gen_pool to manage sram, we can
>> completely remove all of these static mappings and use gen_pool_alloc()
>> to get the one page of sram space needed to implement errata I688.
>>
>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>> ---
>>  Documentation/devicetree/bindings/arm/omap/mpu.txt |    5 ++++-
>>  arch/arm/boot/dts/omap4.dtsi                       |    1 +
>>  arch/arm/boot/dts/omap5.dtsi                       |    3 ++-
>>  arch/arm/mach-omap2/io.c                           |   17 -----------------
>>  arch/arm/mach-omap2/omap4-common.c                 |   17 ++++++++++++++++-
>>  arch/arm/mach-omap2/sram.c                         |    6 ------
>>  arch/arm/mach-omap2/sram.h                         |    6 ------
>>  7 files changed, 23 insertions(+), 32 deletions(-)
>>
> Add a note in the change-log about about omap_bus_sync() being NOP till the
> SRAM is initialized. Its not a problem since the idle loop hasn't
> started yet.

ok, will update the changelog, thanks.

> 
> Other than that looks fine.
>  
>> diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
>> index 1a5a42c..8915ba3 100644
>> --- a/Documentation/devicetree/bindings/arm/omap/mpu.txt
>> +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt
>> @@ -6,9 +6,12 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
>>  
>>  Required properties:
>>  - compatible : Should be "ti,omap3-mpu" for OMAP3
>> -               Should be "ti,omap4-mpu" for OMAP4
>> +               Should be "ti,omap4-mpu" for OMAP4 and OMAP5
>>  - ti,hwmods: "mpu"
>>  
>> +Optional properties:
>> +- sram:	Phandle to the ocmcram node
>> +
>>  Examples:
>>  
>>  - For an OMAP4 SMP system:
>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>> index 1ba6a77..9114241 100644
>> --- a/arch/arm/boot/dts/omap4.dtsi
>> +++ b/arch/arm/boot/dts/omap4.dtsi
>> @@ -71,6 +71,7 @@
>>  		mpu {
>>  			compatible = "ti,omap4-mpu";
>>  			ti,hwmods = "mpu";
>> +			sram = <&ocmcram>;
>>  		};
>>  
>>  		dsp {
>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>> index 461ffd8..e9b735b 100644
>> --- a/arch/arm/boot/dts/omap5.dtsi
>> +++ b/arch/arm/boot/dts/omap5.dtsi
>> @@ -72,8 +72,9 @@
>>  	soc {
>>  		compatible = "ti,omap-infra";
>>  		mpu {
>> -			compatible = "ti,omap5-mpu";
>> +			compatible = "ti,omap4-mpu";
>>  			ti,hwmods = "mpu";
>> +			sram = <&ocmcram>;
>>  		};
>>  	};
>>  
>> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
>> index 4a3f06f..8b2334e 100644
>> --- a/arch/arm/mach-omap2/io.c
>> +++ b/arch/arm/mach-omap2/io.c
>> @@ -239,15 +239,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
>>  		.length		= L4_PER_44XX_SIZE,
>>  		.type		= MT_DEVICE,
>>  	},
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -	{
>> -		.virtual	= OMAP4_SRAM_VA,
>> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
>> -		.length		= PAGE_SIZE,
>> -		.type		= MT_MEMORY_SO,
>> -	},
>> -#endif
>> -
>>  };
>>  #endif
>>  
>> @@ -277,14 +268,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
>>  		.length		= L4_PER_54XX_SIZE,
>>  		.type		= MT_DEVICE,
>>  	},
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -	{
>> -		.virtual	= OMAP4_SRAM_VA,
>> -		.pfn		= __phys_to_pfn(OMAP4_SRAM_PA),
>> -		.length		= PAGE_SIZE,
>> -		.type		= MT_MEMORY_SO,
>> -	},
>> -#endif
>>  };
>>  #endif
>>  
>> diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
>> index 5791143..6b5ffb3 100644
>> --- a/arch/arm/mach-omap2/omap4-common.c
>> +++ b/arch/arm/mach-omap2/omap4-common.c
>> @@ -24,6 +24,7 @@
>>  #include <linux/irqchip/arm-gic.h>
>>  #include <linux/of_address.h>
>>  #include <linux/reboot.h>
>> +#include <linux/genalloc.h>
>>  
>>  #include <asm/hardware/cache-l2x0.h>
>>  #include <asm/mach/map.h>
>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>  }
>>  EXPORT_SYMBOL(omap_bus_sync);
>>  
>> +static int __init omap4_sram_init(void)
>> +{
>> +	struct device_node *np;
>> +	struct gen_pool *sram_pool;
>> +
>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>> +	if (!np)
>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>> +			 __func__);
>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
>> +	return 0;
>> +}
>> +omap_arch_initcall(omap4_sram_init);
>> +
>>  /* Steal one page physical memory for barrier implementation */
>>  int __init omap_barrier_reserve_memblock(void)
>>  {
>> @@ -91,7 +107,6 @@ void __init omap_barriers_init(void)
>>  	dram_io_desc[0].type = MT_MEMORY_SO;
>>  	iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
>>  	dram_sync = (void __iomem *) dram_io_desc[0].virtual;
>> -	sram_sync = (void __iomem *) OMAP4_SRAM_VA;
>>  
>>  	pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
>>  		(long long) paddr, dram_io_desc[0].virtual);
>> diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
>> index d5ecb75..8591044 100644
>> --- a/arch/arm/mach-omap2/sram.c
>> +++ b/arch/arm/mach-omap2/sram.c
>> @@ -124,12 +124,6 @@ static void __init omap2_map_sram(void)
>>  {
>>  	int cached = 1;
>>  
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -	if (cpu_is_omap44xx()) {
>> -		omap_sram_start += PAGE_SIZE;
>> -		omap_sram_size -= SZ_16K;
>> -	}
>> -#endif
>>  	if (cpu_is_omap34xx()) {
>>  		/*
>>  		 * SRAM must be marked as non-cached on OMAP3 since the
>> diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
>> index 3f83b80..948d3ed 100644
>> --- a/arch/arm/mach-omap2/sram.h
>> +++ b/arch/arm/mach-omap2/sram.h
>> @@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {}
>>   */
>>  #define OMAP2_SRAM_PA		0x40200000
>>  #define OMAP3_SRAM_PA           0x40200000
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -#define OMAP4_SRAM_PA		0x40304000
>> -#define OMAP4_SRAM_VA		0xfe404000
>> -#else
>> -#define OMAP4_SRAM_PA		0x40300000
>> -#endif
>>
> 

Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Kevin Hilman]

Rajendra Nayak <rnayak@ti.com> writes:

> In order to handle errata I688, a page of sram was reserved by doing a
> static iotable map. Now that we use gen_pool to manage sram, we can
> completely remove all of these static mappings and use gen_pool_alloc()
> to get the one page of sram space needed to implement errata I688.
>
> Suggested-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>

[...]

> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>  }
>  EXPORT_SYMBOL(omap_bus_sync);
>  
> +static int __init omap4_sram_init(void)
> +{
> +	struct device_node *np;
> +	struct gen_pool *sram_pool;
> +
> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
> +	if (!np)
> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
> +			 __func__);
> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);

I haven't actually tested this, but if there is no 'sram' property defined...
  
> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);

... does this still behave properly?

> +	return 0;
> +}

Kevin

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Kevin Hilman]

Rajendra Nayak <rnayak@ti.com> writes:

> In order to handle errata I688, a page of sram was reserved by doing a
> static iotable map. Now that we use gen_pool to manage sram, we can
> completely remove all of these static mappings and use gen_pool_alloc()
> to get the one page of sram space needed to implement errata I688.
>
> Suggested-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>

[...]

> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>  }
>  EXPORT_SYMBOL(omap_bus_sync);
>  
> +static int __init omap4_sram_init(void)
> +{
> +	struct device_node *np;
> +	struct gen_pool *sram_pool;
> +
> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
> +	if (!np)
> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
> +			 __func__);
> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);

I haven't actually tested this, but if there is no 'sram' property defined...
  
> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);

... does this still behave properly?

> +	return 0;
> +}

Kevin

Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Santosh Shilimkar]

On Thursday 29 August 2013 01:20 PM, Kevin Hilman wrote:
> Rajendra Nayak <rnayak@ti.com> writes:
> 
>> In order to handle errata I688, a page of sram was reserved by doing a
>> static iotable map. Now that we use gen_pool to manage sram, we can
>> completely remove all of these static mappings and use gen_pool_alloc()
>> to get the one page of sram space needed to implement errata I688.
>>
>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> 
> [...]
> 
>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>  }
>>  EXPORT_SYMBOL(omap_bus_sync);
>>  
>> +static int __init omap4_sram_init(void)
>> +{
>> +	struct device_node *np;
>> +	struct gen_pool *sram_pool;
>> +
>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>> +	if (!np)
>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>> +			 __func__);
>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
> 
> I haven't actually tested this, but if there is no 'sram' property defined...
>   
If the sram property is not defined, the bus_sync will be just a nop. Below
check will take care of it.

 if (dram_sync && sram_sync)

Regards,
Santosh

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Santosh Shilimkar]

On Thursday 29 August 2013 01:20 PM, Kevin Hilman wrote:
> Rajendra Nayak <rnayak@ti.com> writes:
> 
>> In order to handle errata I688, a page of sram was reserved by doing a
>> static iotable map. Now that we use gen_pool to manage sram, we can
>> completely remove all of these static mappings and use gen_pool_alloc()
>> to get the one page of sram space needed to implement errata I688.
>>
>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> 
> [...]
> 
>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>  }
>>  EXPORT_SYMBOL(omap_bus_sync);
>>  
>> +static int __init omap4_sram_init(void)
>> +{
>> +	struct device_node *np;
>> +	struct gen_pool *sram_pool;
>> +
>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>> +	if (!np)
>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>> +			 __func__);
>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
> 
> I haven't actually tested this, but if there is no 'sram' property defined...
>   
If the sram property is not defined, the bus_sync will be just a nop. Below
check will take care of it.

 if (dram_sync && sram_sync)

Regards,
Santosh

Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Rajendra Nayak]

On Thursday 29 August 2013 10:50 PM, Kevin Hilman wrote:
> Rajendra Nayak <rnayak@ti.com> writes:
> 
>> In order to handle errata I688, a page of sram was reserved by doing a
>> static iotable map. Now that we use gen_pool to manage sram, we can
>> completely remove all of these static mappings and use gen_pool_alloc()
>> to get the one page of sram space needed to implement errata I688.
>>
>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> 
> [...]
> 
>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>  }
>>  EXPORT_SYMBOL(omap_bus_sync);
>>  
>> +static int __init omap4_sram_init(void)
>> +{
>> +	struct device_node *np;
>> +	struct gen_pool *sram_pool;
>> +
>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>> +	if (!np)
>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>> +			 __func__);
>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
> 
> I haven't actually tested this, but if there is no 'sram' property defined...
>   
>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
> 
> ... does this still behave properly?

I guess not :(
of_get_named_gen_pool() ends up returning NULL, but passing NULL to gen_pool_alloc()
crashes. Will fix with the additional check for non-NULL sram_pool, thanks.

regards,
Rajendra
> 
>> +	return 0;
>> +}
> 
> Kevin
> 

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Rajendra Nayak]

On Thursday 29 August 2013 10:50 PM, Kevin Hilman wrote:
> Rajendra Nayak <rnayak@ti.com> writes:
> 
>> In order to handle errata I688, a page of sram was reserved by doing a
>> static iotable map. Now that we use gen_pool to manage sram, we can
>> completely remove all of these static mappings and use gen_pool_alloc()
>> to get the one page of sram space needed to implement errata I688.
>>
>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> 
> [...]
> 
>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>  }
>>  EXPORT_SYMBOL(omap_bus_sync);
>>  
>> +static int __init omap4_sram_init(void)
>> +{
>> +	struct device_node *np;
>> +	struct gen_pool *sram_pool;
>> +
>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>> +	if (!np)
>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>> +			 __func__);
>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
> 
> I haven't actually tested this, but if there is no 'sram' property defined...
>   
>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
> 
> ... does this still behave properly?

I guess not :(
of_get_named_gen_pool() ends up returning NULL, but passing NULL to gen_pool_alloc()
crashes. Will fix with the additional check for non-NULL sram_pool, thanks.

regards,
Rajendra
> 
>> +	return 0;
>> +}
> 
> Kevin
> 

Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Kevin Hilman]

Rajendra Nayak <rnayak@ti.com> writes:

> On Thursday 29 August 2013 10:50 PM, Kevin Hilman wrote:
>> Rajendra Nayak <rnayak@ti.com> writes:
>> 
>>> In order to handle errata I688, a page of sram was reserved by doing a
>>> static iotable map. Now that we use gen_pool to manage sram, we can
>>> completely remove all of these static mappings and use gen_pool_alloc()
>>> to get the one page of sram space needed to implement errata I688.
>>>
>>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>> 
>> [...]
>> 
>>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>>  }
>>>  EXPORT_SYMBOL(omap_bus_sync);
>>>  
>>> +static int __init omap4_sram_init(void)
>>> +{
>>> +	struct device_node *np;
>>> +	struct gen_pool *sram_pool;
>>> +
>>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>>> +	if (!np)
>>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>>> +			 __func__);
>>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
>> 
>> I haven't actually tested this, but if there is no 'sram' property defined...
>>   
>>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
>> 
>> ... does this still behave properly?
>
> I guess not :(
> of_get_named_gen_pool() ends up returning NULL, but passing NULL to gen_pool_alloc()
> crashes. Will fix with the additional check for non-NULL sram_pool, thanks.

OK, that's what I suspected.  Thanks for checking/testing.

Kevin

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Kevin Hilman]

Rajendra Nayak <rnayak@ti.com> writes:

> On Thursday 29 August 2013 10:50 PM, Kevin Hilman wrote:
>> Rajendra Nayak <rnayak@ti.com> writes:
>> 
>>> In order to handle errata I688, a page of sram was reserved by doing a
>>> static iotable map. Now that we use gen_pool to manage sram, we can
>>> completely remove all of these static mappings and use gen_pool_alloc()
>>> to get the one page of sram space needed to implement errata I688.
>>>
>>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>> 
>> [...]
>> 
>>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>>  }
>>>  EXPORT_SYMBOL(omap_bus_sync);
>>>  
>>> +static int __init omap4_sram_init(void)
>>> +{
>>> +	struct device_node *np;
>>> +	struct gen_pool *sram_pool;
>>> +
>>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>>> +	if (!np)
>>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>>> +			 __func__);
>>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
>> 
>> I haven't actually tested this, but if there is no 'sram' property defined...
>>   
>>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
>> 
>> ... does this still behave properly?
>
> I guess not :(
> of_get_named_gen_pool() ends up returning NULL, but passing NULL to gen_pool_alloc()
> crashes. Will fix with the additional check for non-NULL sram_pool, thanks.

OK, that's what I suspected.  Thanks for checking/testing.

Kevin

Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Santosh Shilimkar]

On Friday 30 August 2013 10:39 AM, Kevin Hilman wrote:
> Rajendra Nayak <rnayak@ti.com> writes:
> 
>> On Thursday 29 August 2013 10:50 PM, Kevin Hilman wrote:
>>> Rajendra Nayak <rnayak@ti.com> writes:
>>>
>>>> In order to handle errata I688, a page of sram was reserved by doing a
>>>> static iotable map. Now that we use gen_pool to manage sram, we can
>>>> completely remove all of these static mappings and use gen_pool_alloc()
>>>> to get the one page of sram space needed to implement errata I688.
>>>>
>>>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>>>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>>>
>>> [...]
>>>
>>>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>>>  }
>>>>  EXPORT_SYMBOL(omap_bus_sync);
>>>>  
>>>> +static int __init omap4_sram_init(void)
>>>> +{
>>>> +	struct device_node *np;
>>>> +	struct gen_pool *sram_pool;
>>>> +
>>>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>>>> +	if (!np)
>>>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>>>> +			 __func__);
>>>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
>>>
>>> I haven't actually tested this, but if there is no 'sram' property defined...
>>>   
>>>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
>>>
>>> ... does this still behave properly?
>>
>> I guess not :(
>> of_get_named_gen_pool() ends up returning NULL, but passing NULL to gen_pool_alloc()
>> crashes. Will fix with the additional check for non-NULL sram_pool, thanks.
> 
> OK, that's what I suspected.  Thanks for checking/testing.
> 
I miss-understood your comment initially. Now re-reading it, its clear now.

Regards,
Santosh

[PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM

[Santosh Shilimkar]

On Friday 30 August 2013 10:39 AM, Kevin Hilman wrote:
> Rajendra Nayak <rnayak@ti.com> writes:
> 
>> On Thursday 29 August 2013 10:50 PM, Kevin Hilman wrote:
>>> Rajendra Nayak <rnayak@ti.com> writes:
>>>
>>>> In order to handle errata I688, a page of sram was reserved by doing a
>>>> static iotable map. Now that we use gen_pool to manage sram, we can
>>>> completely remove all of these static mappings and use gen_pool_alloc()
>>>> to get the one page of sram space needed to implement errata I688.
>>>>
>>>> Suggested-by: Sekhar Nori <nsekhar@ti.com>
>>>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>>>
>>> [...]
>>>
>>>> @@ -71,6 +72,21 @@ void omap_bus_sync(void)
>>>>  }
>>>>  EXPORT_SYMBOL(omap_bus_sync);
>>>>  
>>>> +static int __init omap4_sram_init(void)
>>>> +{
>>>> +	struct device_node *np;
>>>> +	struct gen_pool *sram_pool;
>>>> +
>>>> +	np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
>>>> +	if (!np)
>>>> +		pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
>>>> +			 __func__);
>>>> +	sram_pool = of_get_named_gen_pool(np, "sram", 0);
>>>
>>> I haven't actually tested this, but if there is no 'sram' property defined...
>>>   
>>>> +	sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
>>>
>>> ... does this still behave properly?
>>
>> I guess not :(
>> of_get_named_gen_pool() ends up returning NULL, but passing NULL to gen_pool_alloc()
>> crashes. Will fix with the additional check for non-NULL sram_pool, thanks.
> 
> OK, that's what I suspected.  Thanks for checking/testing.
> 
I miss-understood your comment initially. Now re-reading it, its clear now.

Regards,
Santosh

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 8/29/2013 7:21 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 09:50 AM, Rajendra Nayak wrote:
>> On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
>>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>>> index 22d9f2b..1ba6a77 100644
>>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>>> @@ -126,6 +126,11 @@
>>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>>  		};
>>>>>  
>>>>> +		ocmcram: ocmcram@40304000 {
>>>>
>>>> This can now be changed to 0x40300000 now that you have moved to
>>>> gen_pool_alloc()?
>>>>
>>> NO.
>>> It won't work on secure devices since first 16 KB is occupied for
>>> default configuration. Its not worth trouble also to handle
>>> secure/non-secure considering the use of SRAM which is actually just
>>> limited to errata. 40304000 will work for both devices.
>>
>> Right. Sekhar, you might have confused because of the existing buggy code
>> in sram.c and sram.h which did this (and is removed in this series)
>>
>> from sram.c
>> -----------
>>  #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
>>  #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
>> -#else
>> -#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
>> -#endif
>> -#define OMAP5_SRAM_PA		0x40300000
>>  
>> from sram.h
>> -----------
>>  #define OMAP2_SRAM_PA		0x40200000
>>  #define OMAP3_SRAM_PA           0x40200000
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -#define OMAP4_SRAM_PA		0x40304000
>> -#define OMAP4_SRAM_VA		0xfe404000
>> -#else
>> -#define OMAP4_SRAM_PA		0x40300000
>> -#endif
>>
>> I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
>> came in from, but these are done, like Santosh said, to handle
>> secure and non-secure sram across GP and HS devices and in
>> no way related to handling errata I688.
>>
> The check was to ensure that with errata enabled, we don't care
> about first 16 KB ;-)

Hi Rajendra, thanks for the explanation. Other devices like AM437x which
have HS variants might need such adjustment too. It will be nice to
check that.

Thanks,
Sekhar

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 8/29/2013 7:21 PM, Santosh Shilimkar wrote:
> On Thursday 29 August 2013 09:50 AM, Rajendra Nayak wrote:
>> On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
>>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>>> index 22d9f2b..1ba6a77 100644
>>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>>> @@ -126,6 +126,11 @@
>>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>>  		};
>>>>>  
>>>>> +		ocmcram: ocmcram at 40304000 {
>>>>
>>>> This can now be changed to 0x40300000 now that you have moved to
>>>> gen_pool_alloc()?
>>>>
>>> NO.
>>> It won't work on secure devices since first 16 KB is occupied for
>>> default configuration. Its not worth trouble also to handle
>>> secure/non-secure considering the use of SRAM which is actually just
>>> limited to errata. 40304000 will work for both devices.
>>
>> Right. Sekhar, you might have confused because of the existing buggy code
>> in sram.c and sram.h which did this (and is removed in this series)
>>
>> from sram.c
>> -----------
>>  #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
>>  #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
>> -#else
>> -#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
>> -#endif
>> -#define OMAP5_SRAM_PA		0x40300000
>>  
>> from sram.h
>> -----------
>>  #define OMAP2_SRAM_PA		0x40200000
>>  #define OMAP3_SRAM_PA           0x40200000
>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>> -#define OMAP4_SRAM_PA		0x40304000
>> -#define OMAP4_SRAM_VA		0xfe404000
>> -#else
>> -#define OMAP4_SRAM_PA		0x40300000
>> -#endif
>>
>> I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
>> came in from, but these are done, like Santosh said, to handle
>> secure and non-secure sram across GP and HS devices and in
>> no way related to handling errata I688.
>>
> The check was to ensure that with errata enabled, we don't care
> about first 16 KB ;-)

Hi Rajendra, thanks for the explanation. Other devices like AM437x which
have HS variants might need such adjustment too. It will be nice to
check that.

Thanks,
Sekhar

Re: [PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 9/2/2013 10:33 PM, Sekhar Nori wrote:
> On 8/29/2013 7:21 PM, Santosh Shilimkar wrote:
>> On Thursday 29 August 2013 09:50 AM, Rajendra Nayak wrote:
>>> On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
>>>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>>>> index 22d9f2b..1ba6a77 100644
>>>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>>>> @@ -126,6 +126,11 @@
>>>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>>>  		};
>>>>>>  
>>>>>> +		ocmcram: ocmcram@40304000 {
>>>>>
>>>>> This can now be changed to 0x40300000 now that you have moved to
>>>>> gen_pool_alloc()?
>>>>>
>>>> NO.
>>>> It won't work on secure devices since first 16 KB is occupied for
>>>> default configuration. Its not worth trouble also to handle
>>>> secure/non-secure considering the use of SRAM which is actually just
>>>> limited to errata. 40304000 will work for both devices.
>>>
>>> Right. Sekhar, you might have confused because of the existing buggy code
>>> in sram.c and sram.h which did this (and is removed in this series)
>>>
>>> from sram.c
>>> -----------
>>>  #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
>>>  #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
>>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>>> -#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
>>> -#else
>>> -#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
>>> -#endif
>>> -#define OMAP5_SRAM_PA		0x40300000
>>>  
>>> from sram.h
>>> -----------
>>>  #define OMAP2_SRAM_PA		0x40200000
>>>  #define OMAP3_SRAM_PA           0x40200000
>>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>>> -#define OMAP4_SRAM_PA		0x40304000
>>> -#define OMAP4_SRAM_VA		0xfe404000
>>> -#else
>>> -#define OMAP4_SRAM_PA		0x40300000
>>> -#endif
>>>
>>> I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
>>> came in from, but these are done, like Santosh said, to handle
>>> secure and non-secure sram across GP and HS devices and in
>>> no way related to handling errata I688.
>>>
>> The check was to ensure that with errata enabled, we don't care
>> about first 16 KB ;-)
> 
> Hi Rajendra, thanks for the explanation. Other devices like AM437x which
> have HS variants might need such adjustment too. It will be nice to
> check that.

So I checked with folks working on the HS variant and what you have for
AM437x is just fine. The secure runtime uses a different SRAM bank and
even if there is a need to use the GP SRAM, the space will first be
carved using gen_pool APIs on Linux. Only requirement from secure
runtime software is physically contiguous area - which I think
gen_pool_alloc() guarantees.

Thanks,
Sekhar

[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT

[Sekhar Nori]

On 9/2/2013 10:33 PM, Sekhar Nori wrote:
> On 8/29/2013 7:21 PM, Santosh Shilimkar wrote:
>> On Thursday 29 August 2013 09:50 AM, Rajendra Nayak wrote:
>>> On Thursday 29 August 2013 07:01 PM, Santosh Shilimkar wrote:
>>>> On Thursday 29 August 2013 09:26 AM, Sekhar Nori wrote:
>>>>> On 8/29/2013 4:53 PM, Rajendra Nayak wrote:
>>>>>> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
>>>>>> index 22d9f2b..1ba6a77 100644
>>>>>> --- a/arch/arm/boot/dts/omap4.dtsi
>>>>>> +++ b/arch/arm/boot/dts/omap4.dtsi
>>>>>> @@ -126,6 +126,11 @@
>>>>>>  			pinctrl-single,function-mask = <0x7fff>;
>>>>>>  		};
>>>>>>  
>>>>>> +		ocmcram: ocmcram at 40304000 {
>>>>>
>>>>> This can now be changed to 0x40300000 now that you have moved to
>>>>> gen_pool_alloc()?
>>>>>
>>>> NO.
>>>> It won't work on secure devices since first 16 KB is occupied for
>>>> default configuration. Its not worth trouble also to handle
>>>> secure/non-secure considering the use of SRAM which is actually just
>>>> limited to errata. 40304000 will work for both devices.
>>>
>>> Right. Sekhar, you might have confused because of the existing buggy code
>>> in sram.c and sram.h which did this (and is removed in this series)
>>>
>>> from sram.c
>>> -----------
>>>  #define OMAP2_SRAM_PUB_PA	(OMAP2_SRAM_PA + 0xf800)
>>>  #define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
>>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>>> -#define OMAP4_SRAM_PUB_PA	OMAP4_SRAM_PA
>>> -#else
>>> -#define OMAP4_SRAM_PUB_PA	(OMAP4_SRAM_PA + 0x4000)
>>> -#endif
>>> -#define OMAP5_SRAM_PA		0x40300000
>>>  
>>> from sram.h
>>> -----------
>>>  #define OMAP2_SRAM_PA		0x40200000
>>>  #define OMAP3_SRAM_PA           0x40200000
>>> -#ifdef CONFIG_OMAP4_ERRATA_I688
>>> -#define OMAP4_SRAM_PA		0x40304000
>>> -#define OMAP4_SRAM_VA		0xfe404000
>>> -#else
>>> -#define OMAP4_SRAM_PA		0x40300000
>>> -#endif
>>>
>>> I am not sure where the checks for CONFIG_OMAP4_ERRATA_I688
>>> came in from, but these are done, like Santosh said, to handle
>>> secure and non-secure sram across GP and HS devices and in
>>> no way related to handling errata I688.
>>>
>> The check was to ensure that with errata enabled, we don't care
>> about first 16 KB ;-)
> 
> Hi Rajendra, thanks for the explanation. Other devices like AM437x which
> have HS variants might need such adjustment too. It will be nice to
> check that.

So I checked with folks working on the HS variant and what you have for
AM437x is just fine. The secure runtime uses a different SRAM bank and
even if there is a need to use the GP SRAM, the space will first be
carved using gen_pool APIs on Linux. Only requirement from secure
runtime software is physically contiguous area - which I think
gen_pool_alloc() guarantees.

Thanks,
Sekhar