From: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> To: swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, will.deacon-5wv7dgnIgG8@public.gmane.org, grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org, swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org Cc: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Subject: [PATCHv4 2/7] driver/core: Populate IOMMU'able devices in order Date: Mon, 11 Nov 2013 10:31:53 +0200 [thread overview] Message-ID: <1384158718-4756-3-git-send-email-hdoyu@nvidia.com> (raw) In-Reply-To: <1384158718-4756-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> An "IOMMU device" on the bus is poplulated first, "IOMMU'able devices" are done later. With CONFIG_OF_IOMMU, "#stream-id-cells" DT binding would be used to identify whether a device is IOMMU'able or not. If a device is IOMMU'able, we'll defer to populate that device till an iommu device is populated. Once an iommu device is populated, "dev->bus->iommu_ops" is set in the bus. Then, those defered IOMMU'able devices are populated and configured as IOMMU'abled with help of the already populated iommu device via iommu_ops->add_device(). Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- Update: This is newly added, and the successor of the following RFC: [RFC][PATCHv3+ 1/2] driver/core: Add of_iommu_attach() http://lists.linuxfoundation.org/pipermail/iommu/2013-November/006914.html --- drivers/base/dd.c | 5 +++++ drivers/iommu/of_iommu.c | 33 +++++++++++++++++++++++++++++++++ include/linux/of_iommu.h | 7 +++++++ 3 files changed, 45 insertions(+) diff --git a/drivers/base/dd.c b/drivers/base/dd.c index 35fa368..6e892d4 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c @@ -25,6 +25,7 @@ #include <linux/async.h> #include <linux/pm_runtime.h> #include <linux/pinctrl/devinfo.h> +#include <linux/of_iommu.h> #include "base.h" #include "power/power.h" @@ -273,6 +274,10 @@ static int really_probe(struct device *dev, struct device_driver *drv) dev->driver = drv; + ret = of_iommu_attach(dev); + if (ret) + goto probe_failed; + /* If using pinctrl, bind pins now before probing */ ret = pinctrl_bind_pins(dev); if (ret) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index ee249bc..335bf6a 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -20,6 +20,8 @@ #include <linux/export.h> #include <linux/limits.h> #include <linux/of.h> +#include <linux/device.h> +#include <linux/iommu.h> /** * of_get_dma_window - Parse *dma-window property and returns 0 if found. @@ -88,3 +90,34 @@ int of_get_dma_window(struct device_node *dn, const char *prefix, int index, return 0; } EXPORT_SYMBOL_GPL(of_get_dma_window); + +static bool of_is_iommuable(struct device *dev) +{ + size_t bytes; + const __be32 *prop; + const char *propname = "#stream-id-cells"; + + prop = of_get_property(dev->of_node, propname, &bytes); + if (!prop || !bytes) + return false; + + pr_debug("%s=%d %s\n", propname, bytes, dev_name(dev)); + return true; +} + +int of_iommu_attach(struct device *dev) +{ + struct iommu_ops *ops; + + if (!of_is_iommuable(dev)) + return 0; + + ops = dev->bus->iommu_ops; + if (!ops) + return -EPROBE_DEFER; + + if (ops->add_device) + return ops->add_device(dev); + + return 0; +} diff --git a/include/linux/of_iommu.h b/include/linux/of_iommu.h index 51a560f..3457489 100644 --- a/include/linux/of_iommu.h +++ b/include/linux/of_iommu.h @@ -7,6 +7,8 @@ extern int of_get_dma_window(struct device_node *dn, const char *prefix, int index, unsigned long *busno, dma_addr_t *addr, size_t *size); +extern int of_iommu_attach(struct device *dev); + #else static inline int of_get_dma_window(struct device_node *dn, const char *prefix, @@ -16,6 +18,11 @@ static inline int of_get_dma_window(struct device_node *dn, const char *prefix, return -EINVAL; } +static inline int of_iommu_attach(struct device *dev) +{ + return 0; +} + #endif /* CONFIG_OF_IOMMU */ #endif /* __OF_IOMMU_H */ -- 1.8.1.5
WARNING: multiple messages have this Message-ID (diff)
From: hdoyu@nvidia.com (Hiroshi Doyu) To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv4 2/7] driver/core: Populate IOMMU'able devices in order Date: Mon, 11 Nov 2013 10:31:53 +0200 [thread overview] Message-ID: <1384158718-4756-3-git-send-email-hdoyu@nvidia.com> (raw) In-Reply-To: <1384158718-4756-1-git-send-email-hdoyu@nvidia.com> An "IOMMU device" on the bus is poplulated first, "IOMMU'able devices" are done later. With CONFIG_OF_IOMMU, "#stream-id-cells" DT binding would be used to identify whether a device is IOMMU'able or not. If a device is IOMMU'able, we'll defer to populate that device till an iommu device is populated. Once an iommu device is populated, "dev->bus->iommu_ops" is set in the bus. Then, those defered IOMMU'able devices are populated and configured as IOMMU'abled with help of the already populated iommu device via iommu_ops->add_device(). Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> --- Update: This is newly added, and the successor of the following RFC: [RFC][PATCHv3+ 1/2] driver/core: Add of_iommu_attach() http://lists.linuxfoundation.org/pipermail/iommu/2013-November/006914.html --- drivers/base/dd.c | 5 +++++ drivers/iommu/of_iommu.c | 33 +++++++++++++++++++++++++++++++++ include/linux/of_iommu.h | 7 +++++++ 3 files changed, 45 insertions(+) diff --git a/drivers/base/dd.c b/drivers/base/dd.c index 35fa368..6e892d4 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c @@ -25,6 +25,7 @@ #include <linux/async.h> #include <linux/pm_runtime.h> #include <linux/pinctrl/devinfo.h> +#include <linux/of_iommu.h> #include "base.h" #include "power/power.h" @@ -273,6 +274,10 @@ static int really_probe(struct device *dev, struct device_driver *drv) dev->driver = drv; + ret = of_iommu_attach(dev); + if (ret) + goto probe_failed; + /* If using pinctrl, bind pins now before probing */ ret = pinctrl_bind_pins(dev); if (ret) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index ee249bc..335bf6a 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -20,6 +20,8 @@ #include <linux/export.h> #include <linux/limits.h> #include <linux/of.h> +#include <linux/device.h> +#include <linux/iommu.h> /** * of_get_dma_window - Parse *dma-window property and returns 0 if found. @@ -88,3 +90,34 @@ int of_get_dma_window(struct device_node *dn, const char *prefix, int index, return 0; } EXPORT_SYMBOL_GPL(of_get_dma_window); + +static bool of_is_iommuable(struct device *dev) +{ + size_t bytes; + const __be32 *prop; + const char *propname = "#stream-id-cells"; + + prop = of_get_property(dev->of_node, propname, &bytes); + if (!prop || !bytes) + return false; + + pr_debug("%s=%d %s\n", propname, bytes, dev_name(dev)); + return true; +} + +int of_iommu_attach(struct device *dev) +{ + struct iommu_ops *ops; + + if (!of_is_iommuable(dev)) + return 0; + + ops = dev->bus->iommu_ops; + if (!ops) + return -EPROBE_DEFER; + + if (ops->add_device) + return ops->add_device(dev); + + return 0; +} diff --git a/include/linux/of_iommu.h b/include/linux/of_iommu.h index 51a560f..3457489 100644 --- a/include/linux/of_iommu.h +++ b/include/linux/of_iommu.h @@ -7,6 +7,8 @@ extern int of_get_dma_window(struct device_node *dn, const char *prefix, int index, unsigned long *busno, dma_addr_t *addr, size_t *size); +extern int of_iommu_attach(struct device *dev); + #else static inline int of_get_dma_window(struct device_node *dn, const char *prefix, @@ -16,6 +18,11 @@ static inline int of_get_dma_window(struct device_node *dn, const char *prefix, return -EINVAL; } +static inline int of_iommu_attach(struct device *dev) +{ + return 0; +} + #endif /* CONFIG_OF_IOMMU */ #endif /* __OF_IOMMU_H */ -- 1.8.1.5
next prev parent reply other threads:[~2013-11-11 8:31 UTC|newest] Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-11-11 8:31 [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Hiroshi Doyu 2013-11-11 8:31 ` Hiroshi Doyu [not found] ` <1384158718-4756-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-11 8:31 ` [PATCHv4 1/7] ARM: tegra: Create a DT header defining SWGROUP ID Hiroshi Doyu 2013-11-11 8:31 ` Hiroshi Doyu [not found] ` <1384158718-4756-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-12 22:48 ` Stephen Warren 2013-11-12 22:48 ` Stephen Warren [not found] ` <5282B036.9090604-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-15 10:29 ` Hiroshi Doyu 2013-11-15 10:29 ` Hiroshi Doyu [not found] ` <20131115122926.9166a6693bb9378a7f2c1526-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-15 16:44 ` Stephen Warren 2013-11-15 16:44 ` Stephen Warren 2013-11-11 8:31 ` Hiroshi Doyu [this message] 2013-11-11 8:31 ` [PATCHv4 2/7] driver/core: Populate IOMMU'able devices in order Hiroshi Doyu [not found] ` <1384158718-4756-3-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-11 11:39 ` Will Deacon 2013-11-11 11:39 ` Will Deacon [not found] ` <20131111113936.GH28302-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-11-12 23:30 ` Stephen Warren 2013-11-12 23:30 ` Stephen Warren 2013-11-12 23:34 ` Stephen Warren 2013-11-12 23:34 ` Stephen Warren [not found] ` <5282BAFC.8070405-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-13 7:23 ` Hiroshi Doyu 2013-11-13 7:23 ` Hiroshi Doyu [not found] ` <20131113092354.5b65f29bacc4f37083f81e2e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-13 17:49 ` Stephen Warren 2013-11-13 17:49 ` Stephen Warren 2013-11-13 14:38 ` Will Deacon 2013-11-13 14:38 ` Will Deacon [not found] ` <20131113143804.GA11928-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-11-13 16:06 ` Hiroshi Doyu 2013-11-13 16:06 ` Hiroshi Doyu [not found] ` <20131113.180610.823304139654159769.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-13 17:31 ` Will Deacon 2013-11-13 17:31 ` Will Deacon [not found] ` <20131113173142.GF11928-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-11-13 17:53 ` Stephen Warren 2013-11-13 17:53 ` Stephen Warren [not found] ` <5283BCA0.40300-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-14 16:16 ` Will Deacon 2013-11-14 16:16 ` Will Deacon 2013-11-13 17:45 ` Stephen Warren 2013-11-13 17:45 ` Stephen Warren 2013-11-11 8:31 ` [PATCHv4 3/7] iommu/tegra: smmu: Register IOMMU'able devices dynamically Hiroshi Doyu 2013-11-11 8:31 ` Hiroshi Doyu [not found] ` <1384158718-4756-4-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-12 23:53 ` Stephen Warren 2013-11-12 23:53 ` Stephen Warren 2013-11-12 23:58 ` Stephen Warren 2013-11-12 23:58 ` Stephen Warren 2013-11-11 8:31 ` [PATCHv4 4/7] iommu/tegra: smmu: Calculate ASID register offset by ID Hiroshi Doyu 2013-11-11 8:31 ` Hiroshi Doyu [not found] ` <1384158718-4756-5-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-13 0:02 ` Stephen Warren 2013-11-13 0:02 ` Stephen Warren 2013-11-11 8:31 ` [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding Hiroshi Doyu 2013-11-11 8:31 ` Hiroshi Doyu [not found] ` <1384158718-4756-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-11 11:35 ` Will Deacon 2013-11-11 11:35 ` Will Deacon [not found] ` <20131111113510.GG28302-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-11-11 12:03 ` Hiroshi Doyu 2013-11-11 12:03 ` Hiroshi Doyu 2013-11-13 0:17 ` Stephen Warren 2013-11-13 0:17 ` Stephen Warren [not found] ` <5282C512.5090900-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-13 7:45 ` Hiroshi Doyu 2013-11-13 7:45 ` Hiroshi Doyu [not found] ` <20131113094517.4608edf4302b61e3c4402a25-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-13 17:58 ` Stephen Warren 2013-11-13 17:58 ` Stephen Warren [not found] ` <5283BDBF.9020509-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-14 6:41 ` Hiroshi Doyu 2013-11-14 6:41 ` Hiroshi Doyu [not found] ` <20131114.084145.998129499909471378.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-14 16:59 ` Stephen Warren 2013-11-14 16:59 ` Stephen Warren 2013-11-13 11:15 ` Kumar Gala 2013-11-13 11:15 ` Kumar Gala 2013-11-11 8:31 ` [PATCHv4 6/7] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu 2013-11-11 8:31 ` Hiroshi Doyu 2013-11-11 8:31 ` [PATCHv4 7/7] iommu/tegra: smmu: Allow duplicate ASID wirte Hiroshi Doyu 2013-11-11 8:31 ` Hiroshi Doyu [not found] ` <1384158718-4756-8-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-11-13 0:27 ` Stephen Warren 2013-11-13 0:27 ` Stephen Warren 2013-11-12 22:40 ` [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Stephen Warren 2013-11-12 22:40 ` Stephen Warren [not found] ` <5282AE55.1040701-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-13 6:04 ` Hiroshi Doyu 2013-11-13 6:04 ` Hiroshi Doyu
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