[PATCH] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[PATCH] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Leela Krishna Amudala]

Exynos5420 SoC has per core thermal management unit, this patch adds
tmu device nodes to the DT device list.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
---

Note: This patch has been tested on kgene's for-next branch 
after applying Naveen's patchset

[1/3,v6] thermal: samsung: add intclr_fall_shift bit in exynos_tmu_register
https://patchwork.kernel.org/patch/3058501/
[2/3,v6] thermal: samsung: change base_common to more meaningful base_second
https://patchwork.kernel.org/patch/3058541/
[3/3,v6] thermal: samsung: Add TMU support for Exynos5420 SoCs
https://patchwork.kernel.org/patch/3058571/

 arch/arm/boot/dts/exynos5420.dtsi |   45 +++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..c6270cd 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -190,6 +190,51 @@
 		status = "okay";
 	};
 
+	/* tmu for CPU0 */
+	tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU1 */
+	tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU2 */
+	tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10068000 0x100>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU3 */
+	tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x1006c000 0x100>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for GPU */
+	tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x100a0000 0x100>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
 	serial@12C00000 {
 		clocks = <&clock 257>, <&clock 128>;
 		clock-names = "uart", "clk_uart_baud0";
-- 
1.7.10.4

[PATCH v2] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Chatradhi]

Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.

This patch adds the device tree nodes to the DT device list.

Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---
Changes since v1:
1. Nodes carry the misplaced second base address and the second
   clock to access the misplaced base address.
2. Correct the clock number for the TMU4

 arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..d736b40 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,52 @@
 		clock-names = "gscl";
 		samsung,power-domain = <&gsc_pd>;
 	};
+
+	/* tmu for CPU0 */
+	tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU1 */
+	tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU2 */
+	tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU3 */
+	tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>, <&clock 319>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
+
+	/* tmu for GPU */
+	tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 319>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
 };
-- 
1.7.10.4

Re: [PATCH v2] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Tomasz Figa]

Hi Naveen,

On Thursday 07 of November 2013 18:37:49 Naveen Krishna Chatradhi wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
> 
> This patch adds the device tree nodes to the DT device list.
> 
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
> 
> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> ---
> Changes since v1:
> 1. Nodes carry the misplaced second base address and the second
>    clock to access the misplaced base address.
> 2. Correct the clock number for the TMU4

First of all, this patch should be a part of the whole series adding
support for thermal on Exynos 5420.

In addition, see my comment below.

>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 6ffefd1..d736b40 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -369,4 +369,52 @@
>  		clock-names = "gscl";
>  		samsung,power-domain = <&gsc_pd>;
>  	};
> +
> +	/* tmu for CPU0 */
> +	tmu@10060000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10060000 0x100>;
> +		interrupts = <0 65 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU1 */
> +	tmu@10064000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10064000 0x100>;
> +		interrupts = <0 183 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU2 */
> +	tmu@10068000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		/* 2nd reg is for the misplaced TRIMINFO register */

Instead of this comment, such broken TMU variant should use a separate
compatible value, like "samsung,exynos5420-tmu-broken-triminfo", like
I mentioned in my comments to your other patch.

For this compatible value, both second reg entry and second clock would
be required.

> +		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> +		interrupts = <0 184 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU3 */
> +	tmu@1006c000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		/* 2nd reg is for the misplaced TRIMINFO register */
> +		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> +		interrupts = <0 185 0>;
> +		clocks = <&clock 318>, <&clock 319>;
> +		clock-names = "tmu_apbif", "tmu_apbif_triminfo";

The "tmu_apbif_triminfo" clock is not specified in exynos-thermal binding
documentation. In addition, the patch of yours adding support for second
clock uses another name - "tmu_apbif_sec".

As for the name itself, I would prefer "tmu_apbif_triminfo" as it's more
meaningful.

Best regards,
Tomasz

Re: [PATCH v2] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Ch]

Hello Tomasz,

On 7 November 2013 19:53, Tomasz Figa <t.figa@samsung.com> wrote:
> Hi Naveen,
>
> On Thursday 07 of November 2013 18:37:49 Naveen Krishna Chatradhi wrote:
>> Exynos5420 SoC has per core thermal management unit.
>> 5 TMU channels 4 for CPUs and 5th for GPU.
>>
>> This patch adds the device tree nodes to the DT device list.
>>
>> Nodes carry the misplaced second base address and the second
>> clock to access the misplaced base address.
>>
>> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
>> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
>> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
>> ---
>> Changes since v1:
>> 1. Nodes carry the misplaced second base address and the second
>>    clock to access the misplaced base address.
>> 2. Correct the clock number for the TMU4
>
> First of all, this patch should be a part of the whole series adding
> support for thermal on Exynos 5420.
Right, Reason why i posted this patch myself fixing the nits (As Leela
and i work closely)
Should have been along with the set.
>
> In addition, see my comment below.
>
>>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>>  1 file changed, 48 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
>> index 6ffefd1..d736b40 100644
>> --- a/arch/arm/boot/dts/exynos5420.dtsi
>> +++ b/arch/arm/boot/dts/exynos5420.dtsi
>> @@ -369,4 +369,52 @@
>>               clock-names = "gscl";
>>               samsung,power-domain = <&gsc_pd>;
>>       };
>> +
>> +     /* tmu for CPU0 */
>> +     tmu@10060000 {
>> +             compatible = "samsung,exynos5420-tmu";
>> +             reg = <0x10060000 0x100>;
>> +             interrupts = <0 65 0>;
>> +             clocks = <&clock 318>;
>> +             clock-names = "tmu_apbif";
>> +     };
>> +
>> +     /* tmu for CPU1 */
>> +     tmu@10064000 {
>> +             compatible = "samsung,exynos5420-tmu";
>> +             reg = <0x10064000 0x100>;
>> +             interrupts = <0 183 0>;
>> +             clocks = <&clock 318>;
>> +             clock-names = "tmu_apbif";
>> +     };
>> +
>> +     /* tmu for CPU2 */
>> +     tmu@10068000 {
>> +             compatible = "samsung,exynos5420-tmu";
>> +             /* 2nd reg is for the misplaced TRIMINFO register */
>
> Instead of this comment, such broken TMU variant should use a separate
> compatible value, like "samsung,exynos5420-tmu-broken-triminfo", like
> I mentioned in my comments to your other patch.
Will make a note of it.
>
> For this compatible value, both second reg entry and second clock would
> be required.
>
>> +             reg = <0x10068000 0x100>, <0x1006c000 0x4>;
>> +             interrupts = <0 184 0>;
>> +             clocks = <&clock 318>;
>> +             clock-names = "tmu_apbif";
>> +     };
>> +
>> +     /* tmu for CPU3 */
>> +     tmu@1006c000 {
>> +             compatible = "samsung,exynos5420-tmu";
>> +             /* 2nd reg is for the misplaced TRIMINFO register */
>> +             reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>> +             interrupts = <0 185 0>;
>> +             clocks = <&clock 318>, <&clock 319>;
>> +             clock-names = "tmu_apbif", "tmu_apbif_triminfo";
>
> The "tmu_apbif_triminfo" clock is not specified in exynos-thermal binding
> documentation. In addition, the patch of yours adding support for second
> clock uses another name - "tmu_apbif_sec".
>
> As for the name itself, I would prefer "tmu_apbif_triminfo" as it's more
> meaningful.
TMU hardware on Exynos5440 and Exynos5420 has two different abnormalities
On Exynos5440 Some registers are interleaved between the channels
On Exynos5420, TRIMINFO is misplaced between, channels 2, 3 and 4.

having second_base was for the fix by Amit to address Exynos5440 problem,
Which was already merged.
After several reviews i tried to solve it by reusing the second_base
for Exynos5420 aswell.
Hence, I tried to use the "clk_sec" or "clk_second" which will rhyme
along with the
"second_base" in the driver.

I'm still not sure this having second clock is needed for Exynos5440 aswell.
Will figure it out tomorrow.
>
> Best regards,
> Tomasz
>



-- 
Shine bright,
(: Nav :)

Re: [PATCH v2] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Tomasz Figa]

Hi Naveen,

On Thursday 07 of November 2013 22:02:10 Naveen Krishna Ch wrote:
> Hello Tomasz,
> 
> On 7 November 2013 19:53, Tomasz Figa <t.figa@samsung.com> wrote:
> > Hi Naveen,
> >
> > On Thursday 07 of November 2013 18:37:49 Naveen Krishna Chatradhi wrote:
> >> Exynos5420 SoC has per core thermal management unit.
> >> 5 TMU channels 4 for CPUs and 5th for GPU.
> >>
> >> This patch adds the device tree nodes to the DT device list.
> >>
> >> Nodes carry the misplaced second base address and the second
> >> clock to access the misplaced base address.
> >>
> >> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> >> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> >> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> >> ---
> >> Changes since v1:
> >> 1. Nodes carry the misplaced second base address and the second
> >>    clock to access the misplaced base address.
> >> 2. Correct the clock number for the TMU4
> >
> > First of all, this patch should be a part of the whole series adding
> > support for thermal on Exynos 5420.
> Right, Reason why i posted this patch myself fixing the nits (As Leela
> and i work closely)
> Should have been along with the set.

OK.

> >
> > In addition, see my comment below.
> >
> >>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
> >>  1 file changed, 48 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> >> index 6ffefd1..d736b40 100644
> >> --- a/arch/arm/boot/dts/exynos5420.dtsi
> >> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> >> @@ -369,4 +369,52 @@
> >>               clock-names = "gscl";
> >>               samsung,power-domain = <&gsc_pd>;
> >>       };
> >> +
> >> +     /* tmu for CPU0 */
> >> +     tmu@10060000 {
> >> +             compatible = "samsung,exynos5420-tmu";
> >> +             reg = <0x10060000 0x100>;
> >> +             interrupts = <0 65 0>;
> >> +             clocks = <&clock 318>;
> >> +             clock-names = "tmu_apbif";
> >> +     };
> >> +
> >> +     /* tmu for CPU1 */
> >> +     tmu@10064000 {
> >> +             compatible = "samsung,exynos5420-tmu";
> >> +             reg = <0x10064000 0x100>;
> >> +             interrupts = <0 183 0>;
> >> +             clocks = <&clock 318>;
> >> +             clock-names = "tmu_apbif";
> >> +     };
> >> +
> >> +     /* tmu for CPU2 */
> >> +     tmu@10068000 {
> >> +             compatible = "samsung,exynos5420-tmu";
> >> +             /* 2nd reg is for the misplaced TRIMINFO register */
> >
> > Instead of this comment, such broken TMU variant should use a separate
> > compatible value, like "samsung,exynos5420-tmu-broken-triminfo", like
> > I mentioned in my comments to your other patch.
> Will make a note of it.

OK.

> >
> > For this compatible value, both second reg entry and second clock would
> > be required.
> >
> >> +             reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> >> +             interrupts = <0 184 0>;
> >> +             clocks = <&clock 318>;
> >> +             clock-names = "tmu_apbif";
> >> +     };
> >> +
> >> +     /* tmu for CPU3 */
> >> +     tmu@1006c000 {
> >> +             compatible = "samsung,exynos5420-tmu";
> >> +             /* 2nd reg is for the misplaced TRIMINFO register */
> >> +             reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> >> +             interrupts = <0 185 0>;
> >> +             clocks = <&clock 318>, <&clock 319>;
> >> +             clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> >
> > The "tmu_apbif_triminfo" clock is not specified in exynos-thermal binding
> > documentation. In addition, the patch of yours adding support for second
> > clock uses another name - "tmu_apbif_sec".
> >
> > As for the name itself, I would prefer "tmu_apbif_triminfo" as it's more
> > meaningful.
> TMU hardware on Exynos5440 and Exynos5420 has two different abnormalities
> On Exynos5440 Some registers are interleaved between the channels
> On Exynos5420, TRIMINFO is misplaced between, channels 2, 3 and 4.

I know that those cases are different, but my point was not about it.

In your patch adding support for this second clock, you add following call
to devm_clk_get():

	data->clk_sec = devm_clk_get(&pdev->dev, "tmu_apbif_sec");

However in device tree nodes added by this patch, you have

	clock-names = "tmu_apbif", "tmu_apbif_triminfo";

and this where my confusion comes from.

> having second_base was for the fix by Amit to address Exynos5440 problem,
> Which was already merged.
> After several reviews i tried to solve it by reusing the second_base
> for Exynos5420 aswell.
> Hence, I tried to use the "clk_sec" or "clk_second" which will rhyme
> along with the
> "second_base" in the driver.
> 
> I'm still not sure this having second clock is needed for Exynos5440 aswell.
> Will figure it out tomorrow.

Even if Exynos 5440 does not need the second clock, it uses a different
compatible value, so you can easily distinguish the cases when the second
clock is required or not.

Best regards,
Tomasz

Re: [PATCH v2] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Ch]

Hello Tomasz,

On 7 November 2013 22:15, Tomasz Figa <t.figa@samsung.com> wrote:
> Hi Naveen,
>
> On Thursday 07 of November 2013 22:02:10 Naveen Krishna Ch wrote:
>> Hello Tomasz,
>>
>> On 7 November 2013 19:53, Tomasz Figa <t.figa@samsung.com> wrote:
>> > Hi Naveen,
>> >
>> > On Thursday 07 of November 2013 18:37:49 Naveen Krishna Chatradhi wrote:
>> >> Exynos5420 SoC has per core thermal management unit.
>> >> 5 TMU channels 4 for CPUs and 5th for GPU.
>> >>
>> >> This patch adds the device tree nodes to the DT device list.
>> >>
>> >> Nodes carry the misplaced second base address and the second
>> >> clock to access the misplaced base address.
>> >>
>> >> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
>> >> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
>> >> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
>> >> ---
>> >> Changes since v1:
>> >> 1. Nodes carry the misplaced second base address and the second
>> >>    clock to access the misplaced base address.
>> >> 2. Correct the clock number for the TMU4
>> >
>> > First of all, this patch should be a part of the whole series adding
>> > support for thermal on Exynos 5420.
>> Right, Reason why i posted this patch myself fixing the nits (As Leela
>> and i work closely)
>> Should have been along with the set.
>
> OK.
>
>> >
>> > In addition, see my comment below.
>> >
>> >>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>> >>  1 file changed, 48 insertions(+)
>> >>
>> >> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
>> >> index 6ffefd1..d736b40 100644
>> >> --- a/arch/arm/boot/dts/exynos5420.dtsi
>> >> +++ b/arch/arm/boot/dts/exynos5420.dtsi
>> >> @@ -369,4 +369,52 @@
>> >>               clock-names = "gscl";
>> >>               samsung,power-domain = <&gsc_pd>;
>> >>       };
>> >> +
>> >> +     /* tmu for CPU0 */
>> >> +     tmu@10060000 {
>> >> +             compatible = "samsung,exynos5420-tmu";
>> >> +             reg = <0x10060000 0x100>;
>> >> +             interrupts = <0 65 0>;
>> >> +             clocks = <&clock 318>;
>> >> +             clock-names = "tmu_apbif";
>> >> +     };
>> >> +
>> >> +     /* tmu for CPU1 */
>> >> +     tmu@10064000 {
>> >> +             compatible = "samsung,exynos5420-tmu";
>> >> +             reg = <0x10064000 0x100>;
>> >> +             interrupts = <0 183 0>;
>> >> +             clocks = <&clock 318>;
>> >> +             clock-names = "tmu_apbif";
>> >> +     };
>> >> +
>> >> +     /* tmu for CPU2 */
>> >> +     tmu@10068000 {
>> >> +             compatible = "samsung,exynos5420-tmu";
>> >> +             /* 2nd reg is for the misplaced TRIMINFO register */
>> >
>> > Instead of this comment, such broken TMU variant should use a separate
>> > compatible value, like "samsung,exynos5420-tmu-broken-triminfo", like
>> > I mentioned in my comments to your other patch.
>> Will make a note of it.
>
> OK.
>
>> >
>> > For this compatible value, both second reg entry and second clock would
>> > be required.
>> >
>> >> +             reg = <0x10068000 0x100>, <0x1006c000 0x4>;
>> >> +             interrupts = <0 184 0>;
>> >> +             clocks = <&clock 318>;
>> >> +             clock-names = "tmu_apbif";
>> >> +     };
>> >> +
>> >> +     /* tmu for CPU3 */
>> >> +     tmu@1006c000 {
>> >> +             compatible = "samsung,exynos5420-tmu";
>> >> +             /* 2nd reg is for the misplaced TRIMINFO register */
>> >> +             reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>> >> +             interrupts = <0 185 0>;
>> >> +             clocks = <&clock 318>, <&clock 319>;
>> >> +             clock-names = "tmu_apbif", "tmu_apbif_triminfo";
>> >
>> > The "tmu_apbif_triminfo" clock is not specified in exynos-thermal binding
>> > documentation. In addition, the patch of yours adding support for second
>> > clock uses another name - "tmu_apbif_sec".
>> >
>> > As for the name itself, I would prefer "tmu_apbif_triminfo" as it's more
>> > meaningful.
>> TMU hardware on Exynos5440 and Exynos5420 has two different abnormalities
>> On Exynos5440 Some registers are interleaved between the channels
>> On Exynos5420, TRIMINFO is misplaced between, channels 2, 3 and 4.
>
> I know that those cases are different, but my point was not about it.
>
> In your patch adding support for this second clock, you add following call
> to devm_clk_get():
>
>         data->clk_sec = devm_clk_get(&pdev->dev, "tmu_apbif_sec");
>
> However in device tree nodes added by this patch, you have
>
>         clock-names = "tmu_apbif", "tmu_apbif_triminfo";
>
> and this where my confusion comes from.
Sure will use one name in DTS, Documentation and the driver.
tmu_apbif_triminfo makes correct sense for Exyns5420, But, for Exynos5440
I prefer something that rhymes with the second_XXX.
Will confirm with the Exynos5440 spec first.

>
>> having second_base was for the fix by Amit to address Exynos5440 problem,
>> Which was already merged.
>> After several reviews i tried to solve it by reusing the second_base
>> for Exynos5420 aswell.
>> Hence, I tried to use the "clk_sec" or "clk_second" which will rhyme
>> along with the
>> "second_base" in the driver.
>>
>> I'm still not sure this having second clock is needed for Exynos5440 aswell.
>> Will figure it out tomorrow.
>
> Even if Exynos 5440 does not need the second clock, it uses a different
> compatible value, so you can easily distinguish the cases when the second
> clock is required or not.

Distinction became tough for the TMU-(channel 2) on Exynos5420 has a
misplaced address
But, Both the base addresses can be accessed with the same clock. Unlike the
TMU channel 3 and 4.

For Ex:
+       /* tmu for CPU2 */
+       tmu@10068000 {
+               compatible = "samsung,exynos5420-tmu";
+               /* 2nd reg is for the misplaced TRIMINFO register */
+               reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+               interrupts = <0 184 0>;
+               clocks = <&clock 318>;
+               clock-names = "tmu_apbif";
+       };
+
+       /* tmu for CPU3 */
+       tmu@1006c000 {
+               compatible = "samsung,exynos5420-tmu";
+               /* 2nd reg is for the misplaced TRIMINFO register */
+               reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+               interrupts = <0 185 0>;
+               clocks = <&clock 318>, <&clock 319>;
+               clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+       };

Providing the same clock name again for TMU-2 might handle this case
without any races right.
Kindly, suggest me a better way out here.
>
> Best regards,
> Tomasz
>



-- 
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(: Nav :)

[PATCH 4/4 v3] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Chatradhi]

Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.

This patch adds the device tree nodes to the DT device list.

Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---
Changes since v2:
3. uses the new compatible strings introduced along with adding
   support for Exynso5420.

Changes since v1:
1. Nodes carry the misplaced second base address and the second
   clock to access the misplaced base address.
2. Correct the clock number for the TMU4

 arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..d736b40 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,52 @@
 		clock-names = "gscl";
 		samsung,power-domain = <&gsc_pd>;
 	};
+
+	/* tmu for CPU0 */
+	tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU1 */
+	tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU2 */
+	tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu-triminfo";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU3 */
+	tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu-triminfo-clk";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>, <&clock 319>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
+
+	/* tmu for GPU */
+	tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu-triminfo-clk";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 319>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
 };
-- 
1.7.10.4

Re: [PATCH 4/4 v3] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Ch]

Hello All,

On 12 November 2013 12:07, Naveen Krishna Chatradhi
<ch.naveen@samsung.com> wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
>
> This patch adds the device tree nodes to the DT device list.
>
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
>
> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> ---
> Changes since v2:
> 3. uses the new compatible strings introduced along with adding
>    support for Exynso5420.
>
> Changes since v1:
> 1. Nodes carry the misplaced second base address and the second
>    clock to access the misplaced base address.
> 2. Correct the clock number for the TMU4
>
>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 6ffefd1..d736b40 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -369,4 +369,52 @@
>                 clock-names = "gscl";
>                 samsung,power-domain = <&gsc_pd>;
>         };
> +
> +       /* tmu for CPU0 */
> +       tmu@10060000 {
> +               compatible = "samsung,exynos5420-tmu";
> +               reg = <0x10060000 0x100>;
> +               interrupts = <0 65 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU1 */
> +       tmu@10064000 {
> +               compatible = "samsung,exynos5420-tmu";
> +               reg = <0x10064000 0x100>;
> +               interrupts = <0 183 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU2 */
> +       tmu@10068000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> +               interrupts = <0 184 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU3 */
> +       tmu@1006c000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> +               interrupts = <0 185 0>;
> +               clocks = <&clock 318>, <&clock 319>;
> +               clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +       };
> +
> +       /* tmu for GPU */
> +       tmu@100a0000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x100a0000 0x100>, <0x10068000 0x4>;
> +               interrupts = <0 215 0>;
> +               clocks = <&clock 319>, <&clock 318>;
> +               clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +       };
>  };
> --
> 1.7.10.4
Any comments on this patch
>



-- 
Shine bright,
(: Nav :)

Re: [PATCH 4/4 v3] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Ch]

Hello All,

On 12 November 2013 12:07, Naveen Krishna Chatradhi
<ch.naveen@samsung.com> wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
>
> This patch adds the device tree nodes to the DT device list.
>
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
>
> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> ---
> Changes since v2:
> 3. uses the new compatible strings introduced along with adding
>    support for Exynso5420.
>
> Changes since v1:
> 1. Nodes carry the misplaced second base address and the second
>    clock to access the misplaced base address.
> 2. Correct the clock number for the TMU4
>
>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 6ffefd1..d736b40 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -369,4 +369,52 @@
>                 clock-names = "gscl";
>                 samsung,power-domain = <&gsc_pd>;
>         };
> +
> +       /* tmu for CPU0 */
> +       tmu@10060000 {
> +               compatible = "samsung,exynos5420-tmu";
> +               reg = <0x10060000 0x100>;
> +               interrupts = <0 65 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU1 */
> +       tmu@10064000 {
> +               compatible = "samsung,exynos5420-tmu";
> +               reg = <0x10064000 0x100>;
> +               interrupts = <0 183 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU2 */
> +       tmu@10068000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> +               interrupts = <0 184 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU3 */
> +       tmu@1006c000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> +               interrupts = <0 185 0>;
> +               clocks = <&clock 318>, <&clock 319>;
> +               clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +       };
> +
> +       /* tmu for GPU */
> +       tmu@100a0000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x100a0000 0x100>, <0x10068000 0x4>;
> +               interrupts = <0 215 0>;
> +               clocks = <&clock 319>, <&clock 318>;
> +               clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +       };
>  };
> --
> 1.7.10.4
Any comments on this patch
>



-- 
Shine bright,
(: Nav :)

[PATCH 4/4 v4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Chatradhi]

Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.

This patch adds the device tree nodes to the DT device list.

Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---
Changes since v3:
None, Just respinning

Changes since v2:
3. uses the new compatible strings introduced along with adding
   support for Exynso5420.

Changes since v1:
1. Nodes carry the misplaced second base address and the second
   clock to access the misplaced base address.
2. Correct the clock number for the TMU4

 arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..d736b40 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,52 @@
 		clock-names = "gscl";
 		samsung,power-domain = <&gsc_pd>;
 	};
+
+	/* tmu for CPU0 */
+	tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU1 */
+	tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU2 */
+	tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu-triminfo";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU3 */
+	tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu-triminfo-clk";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>, <&clock 319>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
+
+	/* tmu for GPU */
+	tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu-triminfo-clk";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 319>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
 };
-- 
1.7.10.4

Re: [PATCH 4/4 v3] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Tomasz Figa]

Hi Naveen,

On Tuesday 12 of November 2013 12:07:48 Naveen Krishna Chatradhi wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
> 
> This patch adds the device tree nodes to the DT device list.
> 
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
> 
> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> ---
> Changes since v2:
> 3. uses the new compatible strings introduced along with adding
>    support for Exynso5420.
> 
> Changes since v1:
> 1. Nodes carry the misplaced second base address and the second
>    clock to access the misplaced base address.
> 2. Correct the clock number for the TMU4
> 
>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)

In addition to updating to reflect my comments to patch 3/4, please also
see my comments inline.

> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 6ffefd1..d736b40 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -369,4 +369,52 @@
>  		clock-names = "gscl";
>  		samsung,power-domain = <&gsc_pd>;
>  	};
> +
> +	/* tmu for CPU0 */
> +	tmu@10060000 {

Instead of the comment, it might be better to add a label to the node,
such as

tmu_cpu0: tmu@10060000 {

for TMU of CPU0 and so on.

> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10060000 0x100>;
> +		interrupts = <0 65 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU1 */
> +	tmu@10064000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10064000 0x100>;
> +		interrupts = <0 183 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU2 */
> +	tmu@10068000 {
> +		compatible = "samsung,exynos5420-tmu-triminfo";
> +		/* 2nd reg is for the misplaced TRIMINFO register */

Hmm, I'm not convinced about usefulness of this comment. Used compatible
value directly implies the meaning of all reg entries.

Best regards,
Tomasz

Re: [PATCH 4/4 v4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Kukjin Kim]

On 11/19/13 22:05, Naveen Krishna Chatradhi wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
>
> This patch adds the device tree nodes to the DT device list.
>
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
>
> Signed-off-by: Leela Krishna Amudala<l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi<ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker<abrestic@chromium.org>
> ---
> Changes since v3:
> None, Just respinning
>
> Changes since v2:
> 3. uses the new compatible strings introduced along with adding
>     support for Exynso5420.
>
> Changes since v1:
> 1. Nodes carry the misplaced second base address and the second
>     clock to access the misplaced base address.
> 2. Correct the clock number for the TMU4
>
>   arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>   1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 6ffefd1..d736b40 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -369,4 +369,52 @@
>   		clock-names = "gscl";
>   		samsung,power-domain =<&gsc_pd>;
>   	};
> +
> +	/* tmu for CPU0 */
> +	tmu@10060000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg =<0x10060000 0x100>;
> +		interrupts =<0 65 0>;
> +		clocks =<&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU1 */
> +	tmu@10064000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg =<0x10064000 0x100>;
> +		interrupts =<0 183 0>;
> +		clocks =<&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU2 */
> +	tmu@10068000 {
> +		compatible = "samsung,exynos5420-tmu-triminfo";
> +		/* 2nd reg is for the misplaced TRIMINFO register */
> +		reg =<0x10068000 0x100>,<0x1006c000 0x4>;
> +		interrupts =<0 184 0>;
> +		clocks =<&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU3 */
> +	tmu@1006c000 {
> +		compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +		/* 2nd reg is for the misplaced TRIMINFO register */
> +		reg =<0x1006c000 0x100>,<0x100a0000 0x4>;
> +		interrupts =<0 185 0>;
> +		clocks =<&clock 318>,<&clock 319>;
> +		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +	};
> +
> +	/* tmu for GPU */
> +	tmu@100a0000 {
> +		compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +		/* 2nd reg is for the misplaced TRIMINFO register */
> +		reg =<0x100a0000 0x100>,<0x10068000 0x4>;
> +		interrupts =<0 215 0>;
> +		clocks =<&clock 319>,<&clock 318>;
> +		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +	};
>   };

BTW, there is just only this patch to support TMU on exynos5420?

- Kukjin

Re: [PATCH 4/4 v4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Tomasz Figa]

Hi Kukjin,

On Tuesday 10 of December 2013 06:15:08 Kukjin Kim wrote:
> On 11/19/13 22:05, Naveen Krishna Chatradhi wrote:
> > Exynos5420 SoC has per core thermal management unit.
> > 5 TMU channels 4 for CPUs and 5th for GPU.
> >
> > This patch adds the device tree nodes to the DT device list.
> >
> > Nodes carry the misplaced second base address and the second
> > clock to access the misplaced base address.
> >
> > Signed-off-by: Leela Krishna Amudala<l.krishna@samsung.com>
> > Signed-off-by: Naveen Krishna Chatradhi<ch.naveen@samsung.com>
> > Signed-off-by: Andrew Bresticker<abrestic@chromium.org>
> > ---
> > Changes since v3:
> > None, Just respinning
> >
> > Changes since v2:
> > 3. uses the new compatible strings introduced along with adding
> >     support for Exynso5420.
> >
> > Changes since v1:
> > 1. Nodes carry the misplaced second base address and the second
> >     clock to access the misplaced base address.
> > 2. Correct the clock number for the TMU4
> >
> >   arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
> >   1 file changed, 48 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> > index 6ffefd1..d736b40 100644
> > --- a/arch/arm/boot/dts/exynos5420.dtsi
> > +++ b/arch/arm/boot/dts/exynos5420.dtsi
> > @@ -369,4 +369,52 @@
> >   		clock-names = "gscl";
> >   		samsung,power-domain =<&gsc_pd>;
> >   	};
> > +
> > +	/* tmu for CPU0 */
> > +	tmu@10060000 {
> > +		compatible = "samsung,exynos5420-tmu";
> > +		reg =<0x10060000 0x100>;
> > +		interrupts =<0 65 0>;
> > +		clocks =<&clock 318>;
> > +		clock-names = "tmu_apbif";
> > +	};
> > +
> > +	/* tmu for CPU1 */
> > +	tmu@10064000 {
> > +		compatible = "samsung,exynos5420-tmu";
> > +		reg =<0x10064000 0x100>;
> > +		interrupts =<0 183 0>;
> > +		clocks =<&clock 318>;
> > +		clock-names = "tmu_apbif";
> > +	};
> > +
> > +	/* tmu for CPU2 */
> > +	tmu@10068000 {
> > +		compatible = "samsung,exynos5420-tmu-triminfo";
> > +		/* 2nd reg is for the misplaced TRIMINFO register */
> > +		reg =<0x10068000 0x100>,<0x1006c000 0x4>;
> > +		interrupts =<0 184 0>;
> > +		clocks =<&clock 318>;
> > +		clock-names = "tmu_apbif";
> > +	};
> > +
> > +	/* tmu for CPU3 */
> > +	tmu@1006c000 {
> > +		compatible = "samsung,exynos5420-tmu-triminfo-clk";
> > +		/* 2nd reg is for the misplaced TRIMINFO register */
> > +		reg =<0x1006c000 0x100>,<0x100a0000 0x4>;
> > +		interrupts =<0 185 0>;
> > +		clocks =<&clock 318>,<&clock 319>;
> > +		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> > +	};
> > +
> > +	/* tmu for GPU */
> > +	tmu@100a0000 {
> > +		compatible = "samsung,exynos5420-tmu-triminfo-clk";
> > +		/* 2nd reg is for the misplaced TRIMINFO register */
> > +		reg =<0x100a0000 0x100>,<0x10068000 0x4>;
> > +		interrupts =<0 215 0>;
> > +		clocks =<&clock 319>,<&clock 318>;
> > +		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> > +	};
> >   };
> 
> BTW, there is just only this patch to support TMU on exynos5420?

This patch is a part of a 4-patch series, but unfortunately it was not
sent with correct threading, so it's hard to find remaing patches,
which are:

[PATCH 1/4 v9] thermal: samsung: replace inten_ bit fields with intclr_
[PATCH 2/4 v10] thermal: samsung: change base_common to more meaningful base_second
[PATCH 3/4 v10] thermal: samsung: Add TMU support for Exynos5420 SoCs

There are comments to be addressed to those patches, so I guest at least
one more iteration is needed.

Naveen, it would be nice if you could send next version with proper
threading and consistent versioning. Thanks in advance.

Best regards,
Tomasz

[PATCH v11 4/4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Chatradhi]

Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.

This patch adds the device tree nodes to the DT device list.

Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---
Changes since previous version:
1. used lables instead of comment lines
2. pass the same clock as trimfo_apbif clock for TMU channel 2

 arch/arm/boot/dts/exynos5420.dtsi |   40 +++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b1fa334..c62cde6 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -402,4 +402,44 @@
 		clock-names = "gscl";
 		samsung,power-domain = <&gsc_pd>;
 	};
+
+	tmu_cpu0:tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	tmu_cpu1:tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	tmu_cpu2:tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
+
+	tmu_cpu3:tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>, <&clock 319>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
+
+	tmu_gpu:tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 319>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
 };
-- 
1.7.10.4

[PATCH v12 4/4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Chatradhi]

Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.

This patch adds the device tree nodes to the DT device list.

Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---
Changes since v11:
  changed the secondary clock name to "tmu_triminfo_apbif"
from "tmu_apbif_triminfo"

Changes since previous version:
1. used lables instead of comment lines
2. pass the same clock as trimfo_apbif clock for TMU channel 2

 arch/arm/boot/dts/exynos5420.dtsi |   40 +++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b1fa334..c62cde6 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -402,4 +402,44 @@
 		clock-names = "gscl";
 		samsung,power-domain = <&gsc_pd>;
 	};
+
+	tmu_cpu0:tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	tmu_cpu1:tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	tmu_cpu2:tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+	};
+
+	tmu_cpu3:tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>, <&clock 319>;
+		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+	};
+
+	tmu_gpu:tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 319>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+	};
 };
-- 
1.7.10.4

Re: [PATCH v12 4/4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Tomasz Figa]

Hi Naveen,

On Thursday 19 of December 2013 11:37:02 Naveen Krishna Chatradhi wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
> 
> This patch adds the device tree nodes to the DT device list.
> 
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
[snip]
>  		samsung,power-domain = <&gsc_pd>;
>  	};
> +
> +	tmu_cpu0:tmu@10060000 {

CodingStyle: Missing space after colon.
+ all the nodes below.

Since it's just a minor fixup, I think you could just reply to this
thread with corrected version of this single patch instead of
respinning the whole series.

Best regards,
Tomasz

> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10060000 0x100>;
> +		interrupts = <0 65 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	tmu_cpu1:tmu@10064000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10064000 0x100>;
> +		interrupts = <0 183 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	tmu_cpu2:tmu@10068000 {
> +		compatible = "samsung,exynos5420-tmu-ext-triminfo";
> +		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> +		interrupts = <0 184 0>;
> +		clocks = <&clock 318>, <&clock 318>;
> +		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> +	};
> +
> +	tmu_cpu3:tmu@1006c000 {
> +		compatible = "samsung,exynos5420-tmu-ext-triminfo";
> +		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> +		interrupts = <0 185 0>;
> +		clocks = <&clock 318>, <&clock 319>;
> +		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> +	};
> +
> +	tmu_gpu:tmu@100a0000 {
> +		compatible = "samsung,exynos5420-tmu-ext-triminfo";
> +		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
> +		interrupts = <0 215 0>;
> +		clocks = <&clock 319>, <&clock 318>;
> +		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> +	};
>  };
> 

[PATCH v12 4/4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Naveen Krishna Chatradhi]

Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.

This patch adds the device tree nodes to the DT device list.

Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---
Changes since v11:
  changed the secondary clock name to "tmu_triminfo_apbif"
from "tmu_apbif_triminfo"

Changes since previous version:
1. used lables instead of comment lines
2. pass the same clock as trimfo_apbif clock for TMU channel 2
3. Fixed a coding style problem pointed by Tomasz

 arch/arm/boot/dts/exynos5420.dtsi |   40 +++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b1fa334..c62cde6 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -402,4 +402,44 @@
 		clock-names = "gscl";
 		samsung,power-domain = <&gsc_pd>;
 	};
+
+	tmu_cpu0: tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	tmu_cpu1: tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	tmu_cpu2: tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+	};
+
+	tmu_cpu3: tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>, <&clock 319>;
+		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+	};
+
+	tmu_gpu: tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu-ext-triminfo";
+		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 319>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+	};
 };
-- 
1.7.10.4

Re: [PATCH v12 4/4] ARM: dts: Exynos5420: Add device nodes for TMU blocks

[Kukjin Kim]

On 12/20/13 14:11, Naveen Krishna Chatradhi wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
>
> This patch adds the device tree nodes to the DT device list.
>
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
>
> Signed-off-by: Leela Krishna Amudala<l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi<ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker<abrestic@chromium.org>
> ---
> Changes since v11:
>    changed the secondary clock name to "tmu_triminfo_apbif"
> from "tmu_apbif_triminfo"
>
> Changes since previous version:
> 1. used lables instead of comment lines
> 2. pass the same clock as trimfo_apbif clock for TMU channel 2
> 3. Fixed a coding style problem pointed by Tomasz
>
>   arch/arm/boot/dts/exynos5420.dtsi |   40 +++++++++++++++++++++++++++++++++++++
>   1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index b1fa334..c62cde6 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -402,4 +402,44 @@
>   		clock-names = "gscl";
>   		samsung,power-domain =<&gsc_pd>;
>   	};
> +
> +	tmu_cpu0: tmu@10060000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg =<0x10060000 0x100>;
> +		interrupts =<0 65 0>;
> +		clocks =<&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	tmu_cpu1: tmu@10064000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg =<0x10064000 0x100>;
> +		interrupts =<0 183 0>;
> +		clocks =<&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	tmu_cpu2: tmu@10068000 {
> +		compatible = "samsung,exynos5420-tmu-ext-triminfo";
> +		reg =<0x10068000 0x100>,<0x1006c000 0x4>;
> +		interrupts =<0 184 0>;
> +		clocks =<&clock 318>,<&clock 318>;
> +		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> +	};
> +
> +	tmu_cpu3: tmu@1006c000 {
> +		compatible = "samsung,exynos5420-tmu-ext-triminfo";
> +		reg =<0x1006c000 0x100>,<0x100a0000 0x4>;
> +		interrupts =<0 185 0>;
> +		clocks =<&clock 318>,<&clock 319>;
> +		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> +	};
> +
> +	tmu_gpu: tmu@100a0000 {
> +		compatible = "samsung,exynos5420-tmu-ext-triminfo";
> +		reg =<0x100a0000 0x100>,<0x10068000 0x4>;
> +		interrupts =<0 215 0>;
> +		clocks =<&clock 319>,<&clock 318>;
> +		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> +	};
>   };

Looks good to me, applied.
Merry Christmas :-)

- Kukjin