[Qemu-devel] [PATCH 0/6] CRIS queue

[Qemu-devel] [PATCH 0/6] CRIS queue

[edgar.iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

These fixes and cleanups are sitting on my CRIS queue.

Restores CRISv32 as default linux-user CPU.
Fix CRIS linux-user signal handling.
Removes CRIS PIC glue.

Cheers,
Edgar

Edgar E. Iglesias (5):
  cris: Add a CRISv32 default "any" CPU for user mode emulation
  cris: Abort when a v10 takes interrupts while in a delayslot
  cris: Add interrupt signals to the CPU device
  axis-dev88: Connect the PIC upstream IRQs directly to the CPU
  cris: Remove the CRIS PIC glue

Stefan Weil (1):
  linux-user: Fix trampoline code for CRIS

 hw/cris/Makefile.objs     |  1 -
 hw/cris/axis_dev88.c      |  7 +++----
 hw/cris/pic_cpu.c         | 47 -----------------------------------------------
 include/hw/cris/etraxfs.h |  2 --
 linux-user/signal.c       |  8 ++++----
 target-cris/cpu.c         | 27 +++++++++++++++++++++++++++
 target-cris/cpu.h         |  4 ++++
 target-cris/helper.c      |  5 +++++
 8 files changed, 43 insertions(+), 58 deletions(-)
 delete mode 100644 hw/cris/pic_cpu.c

-- 
1.8.3.2

[Qemu-devel] [PATCH 1/6] cris: Add a CRISv32 default "any" CPU for user mode emulation

[edgar.iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-cris/cpu.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/target-cris/cpu.c b/target-cris/cpu.c
index 44301a4..21f1860 100644
--- a/target-cris/cpu.c
+++ b/target-cris/cpu.c
@@ -239,7 +239,14 @@ static const TypeInfo cris_cpu_model_type_infos[] = {
         .name = TYPE("crisv32"),
         .parent = TYPE_CRIS_CPU,
         .class_init = crisv32_cpu_class_init,
+    },
+#if defined(CONFIG_USER_ONLY)
+    {
+        .name = TYPE("any"),
+        .parent = TYPE_CRIS_CPU,
+        .class_init = crisv32_cpu_class_init,
     }
+#endif
 };
 
 #undef TYPE
-- 
1.8.3.2

[Qemu-devel] [PATCH 2/6] cris: Abort when a v10 takes interrupts while in a delayslot

[edgar.iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

This is an internal error as the CRISv10 should mask interrupts
while executing delay slots. Bail out sooner rather than later.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-cris/helper.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target-cris/helper.c b/target-cris/helper.c
index d274b38..c940582 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -126,6 +126,11 @@ void crisv10_cpu_do_interrupt(CPUState *cs)
           env->exception_index,
           cs->interrupt_request);
 
+    if (env->dslot) {
+        /* CRISv10 never takes interrupts while in a delay-slot.  */
+        cpu_abort(env, "CRIS: Interrupt on delay-slot\n");
+    }
+
     assert(!(env->pregs[PR_CCS] & PFIX_FLAG));
     switch (env->exception_index) {
     case EXCP_BREAK:
-- 
1.8.3.2

[Qemu-devel] [PATCH 3/6] cris: Add interrupt signals to the CPU device

[edgar.iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-cris/cpu.c | 20 ++++++++++++++++++++
 target-cris/cpu.h |  4 ++++
 2 files changed, 24 insertions(+)

diff --git a/target-cris/cpu.c b/target-cris/cpu.c
index 21f1860..7dea0f0 100644
--- a/target-cris/cpu.c
+++ b/target-cris/cpu.c
@@ -146,6 +146,21 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
     ccc->parent_realize(dev, errp);
 }
 
+#ifndef CONFIG_USER_ONLY
+static void cris_cpu_set_irq(void *opaque, int irq, int level)
+{
+    CRISCPU *cpu = opaque;
+    CPUState *cs = CPU(cpu);
+    int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
+
+    if (level) {
+        cpu_interrupt(cs, type);
+    } else {
+        cpu_reset_interrupt(cs, type);
+    }
+}
+#endif
+
 static void cris_cpu_initfn(Object *obj)
 {
     CPUState *cs = CPU(obj);
@@ -159,6 +174,11 @@ static void cris_cpu_initfn(Object *obj)
 
     env->pregs[PR_VR] = ccc->vr;
 
+#ifndef CONFIG_USER_ONLY
+    /* IRQ and NMI lines.  */
+    qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
+#endif
+
     if (tcg_enabled() && !tcg_initialized) {
         tcg_initialized = true;
         if (env->pregs[PR_VR] < 32) {
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 4b9fc4c..1d7d80d 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -42,6 +42,10 @@
 /* CRIS-specific interrupt pending bits.  */
 #define CPU_INTERRUPT_NMI       CPU_INTERRUPT_TGT_EXT_3
 
+/* CRUS CPU device objects interrupt lines.  */
+#define CRIS_CPU_IRQ 0
+#define CRIS_CPU_NMI 1
+
 /* Register aliases. R0 - R15 */
 #define R_FP  8
 #define R_SP  14
-- 
1.8.3.2

[Qemu-devel] [PATCH 4/6] axis-dev88: Connect the PIC upstream IRQs directly to the CPU

[edgar.iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/cris/axis_dev88.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index 5524088..645e45c 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -254,7 +254,7 @@ void axisdev88_init(QEMUMachineInitArgs *args)
     DeviceState *dev;
     SysBusDevice *s;
     DriveInfo *nand;
-    qemu_irq irq[30], nmi[2], *cpu_irq;
+    qemu_irq irq[30], nmi[2];
     void *etraxfs_dmac;
     struct etraxfs_dma_client *dma_eth;
     int i;
@@ -296,15 +296,14 @@ void axisdev88_init(QEMUMachineInitArgs *args)
                                 &gpio_state.iomem);
 
 
-    cpu_irq = cris_pic_init_cpu(env);
     dev = qdev_create(NULL, "etraxfs,pic");
     /* FIXME: Is there a proper way to signal vectors to the CPU core?  */
     qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
     qdev_init_nofail(dev);
     s = SYS_BUS_DEVICE(dev);
     sysbus_mmio_map(s, 0, 0x3001c000);
-    sysbus_connect_irq(s, 0, cpu_irq[0]);
-    sysbus_connect_irq(s, 1, cpu_irq[1]);
+    sysbus_connect_irq(s, 0, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_IRQ));
+    sysbus_connect_irq(s, 1, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_NMI));
     for (i = 0; i < 30; i++) {
         irq[i] = qdev_get_gpio_in(dev, i);
     }
-- 
1.8.3.2

[Qemu-devel] [PATCH 5/6] cris: Remove the CRIS PIC glue

[edgar.iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/cris/Makefile.objs     |  1 -
 hw/cris/pic_cpu.c         | 47 -----------------------------------------------
 include/hw/cris/etraxfs.h |  2 --
 3 files changed, 50 deletions(-)
 delete mode 100644 hw/cris/pic_cpu.c

diff --git a/hw/cris/Makefile.objs b/hw/cris/Makefile.objs
index 776db7c..7624173 100644
--- a/hw/cris/Makefile.objs
+++ b/hw/cris/Makefile.objs
@@ -1,3 +1,2 @@
-obj-y += pic_cpu.o
 obj-y += boot.o
 obj-y += axis_dev88.o
diff --git a/hw/cris/pic_cpu.c b/hw/cris/pic_cpu.c
deleted file mode 100644
index bd47bf1..0000000
--- a/hw/cris/pic_cpu.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * QEMU CRIS CPU interrupt wrapper logic.
- *
- * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "hw/sysbus.h"
-#include "hw/hw.h"
-#include "hw/cris/etraxfs.h"
-
-#define D(x)
-
-static void cris_pic_cpu_handler(void *opaque, int irq, int level)
-{
-    CRISCPU *cpu = opaque;
-    CPUState *cs = CPU(cpu);
-    int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
-
-    if (level) {
-        cpu_interrupt(cs, type);
-    } else {
-        cpu_reset_interrupt(cs, type);
-    }
-}
-
-qemu_irq *cris_pic_init_cpu(CPUCRISState *env)
-{
-    return qemu_allocate_irqs(cris_pic_cpu_handler, cris_env_get_cpu(env), 2);
-}
diff --git a/include/hw/cris/etraxfs.h b/include/hw/cris/etraxfs.h
index ab30559..73a6134 100644
--- a/include/hw/cris/etraxfs.h
+++ b/include/hw/cris/etraxfs.h
@@ -28,8 +28,6 @@
 #include "net/net.h"
 #include "hw/cris/etraxfs_dma.h"
 
-qemu_irq *cris_pic_init_cpu(CPUCRISState *env);
-
 /* Instantiate an ETRAXFS Ethernet MAC.  */
 static inline DeviceState *
 etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr,
-- 
1.8.3.2

[Qemu-devel] [PATCH 6/6] linux-user: Fix trampoline code for CRIS

[edgar.iglesias]

From: Stefan Weil <sw@weilnetz.de>

__put_user can write bytes, words (2 bytes) or longwords (4 bytes).
Here obviously words should have been written, but bytes were written,
so values like 0x9c5f were truncated to 0x5f.

Fix this by changing retcode from uint8_t to to uint16_t in
target_signal_frame and also in the unused rt_signal_frame.

This problem was reported by static code analysis (smatch).

Cc: qemu-stable@nongnu.org
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 linux-user/signal.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/linux-user/signal.c b/linux-user/signal.c
index 01d7c39..82e8592 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -3659,7 +3659,7 @@ struct target_sigcontext {
 struct target_signal_frame {
         struct target_sigcontext sc;
         uint32_t extramask[TARGET_NSIG_WORDS - 1];
-        uint8_t retcode[8];       /* Trampoline code. */
+        uint16_t retcode[4];      /* Trampoline code. */
 };
 
 struct rt_signal_frame {
@@ -3667,7 +3667,7 @@ struct rt_signal_frame {
         void *puc;
         siginfo_t info;
         struct ucontext uc;
-        uint8_t retcode[8];       /* Trampoline code. */
+        uint16_t retcode[4];      /* Trampoline code. */
 };
 
 static void setup_sigcontext(struct target_sigcontext *sc, CPUCRISState *env)
@@ -3745,8 +3745,8 @@ static void setup_frame(int sig, struct target_sigaction *ka,
 	 */
 	err |= __put_user(0x9c5f, frame->retcode+0);
 	err |= __put_user(TARGET_NR_sigreturn, 
-			  frame->retcode+2);
-	err |= __put_user(0xe93d, frame->retcode+4);
+			  frame->retcode + 1);
+	err |= __put_user(0xe93d, frame->retcode + 2);
 
 	/* Save the mask.  */
 	err |= __put_user(set->sig[0], &frame->sc.oldmask);
-- 
1.8.3.2

Re: [Qemu-devel] [PATCH 3/6] cris: Add interrupt signals to the CPU device

[Peter Crosthwaite]

On Sun, Feb 2, 2014 at 1:04 PM,  <edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

> ---
>  target-cris/cpu.c | 20 ++++++++++++++++++++
>  target-cris/cpu.h |  4 ++++
>  2 files changed, 24 insertions(+)
>
> diff --git a/target-cris/cpu.c b/target-cris/cpu.c
> index 21f1860..7dea0f0 100644
> --- a/target-cris/cpu.c
> +++ b/target-cris/cpu.c
> @@ -146,6 +146,21 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
>      ccc->parent_realize(dev, errp);
>  }
>
> +#ifndef CONFIG_USER_ONLY
> +static void cris_cpu_set_irq(void *opaque, int irq, int level)
> +{
> +    CRISCPU *cpu = opaque;
> +    CPUState *cs = CPU(cpu);
> +    int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
> +
> +    if (level) {
> +        cpu_interrupt(cs, type);
> +    } else {
> +        cpu_reset_interrupt(cs, type);
> +    }
> +}
> +#endif
> +
>  static void cris_cpu_initfn(Object *obj)
>  {
>      CPUState *cs = CPU(obj);
> @@ -159,6 +174,11 @@ static void cris_cpu_initfn(Object *obj)
>
>      env->pregs[PR_VR] = ccc->vr;
>
> +#ifndef CONFIG_USER_ONLY
> +    /* IRQ and NMI lines.  */
> +    qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
> +#endif
> +
>      if (tcg_enabled() && !tcg_initialized) {
>          tcg_initialized = true;
>          if (env->pregs[PR_VR] < 32) {
> diff --git a/target-cris/cpu.h b/target-cris/cpu.h
> index 4b9fc4c..1d7d80d 100644
> --- a/target-cris/cpu.h
> +++ b/target-cris/cpu.h
> @@ -42,6 +42,10 @@
>  /* CRIS-specific interrupt pending bits.  */
>  #define CPU_INTERRUPT_NMI       CPU_INTERRUPT_TGT_EXT_3
>
> +/* CRUS CPU device objects interrupt lines.  */
> +#define CRIS_CPU_IRQ 0
> +#define CRIS_CPU_NMI 1
> +
>  /* Register aliases. R0 - R15 */
>  #define R_FP  8
>  #define R_SP  14
> --
> 1.8.3.2
>
>

Re: [Qemu-devel] [PATCH 4/6] axis-dev88: Connect the PIC upstream IRQs directly to the CPU

[Peter Crosthwaite]

On Sun, Feb 2, 2014 at 1:04 PM,  <edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

> ---
>  hw/cris/axis_dev88.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
> index 5524088..645e45c 100644
> --- a/hw/cris/axis_dev88.c
> +++ b/hw/cris/axis_dev88.c
> @@ -254,7 +254,7 @@ void axisdev88_init(QEMUMachineInitArgs *args)
>      DeviceState *dev;
>      SysBusDevice *s;
>      DriveInfo *nand;
> -    qemu_irq irq[30], nmi[2], *cpu_irq;
> +    qemu_irq irq[30], nmi[2];
>      void *etraxfs_dmac;
>      struct etraxfs_dma_client *dma_eth;
>      int i;
> @@ -296,15 +296,14 @@ void axisdev88_init(QEMUMachineInitArgs *args)
>                                  &gpio_state.iomem);
>
>
> -    cpu_irq = cris_pic_init_cpu(env);
>      dev = qdev_create(NULL, "etraxfs,pic");
>      /* FIXME: Is there a proper way to signal vectors to the CPU core?  */
>      qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
>      qdev_init_nofail(dev);
>      s = SYS_BUS_DEVICE(dev);
>      sysbus_mmio_map(s, 0, 0x3001c000);
> -    sysbus_connect_irq(s, 0, cpu_irq[0]);
> -    sysbus_connect_irq(s, 1, cpu_irq[1]);
> +    sysbus_connect_irq(s, 0, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_IRQ));
> +    sysbus_connect_irq(s, 1, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_NMI));
>      for (i = 0; i < 30; i++) {
>          irq[i] = qdev_get_gpio_in(dev, i);
>      }
> --
> 1.8.3.2
>
>

Re: [Qemu-devel] [PATCH 5/6] cris: Remove the CRIS PIC glue

[Peter Crosthwaite]

On Sun, Feb 2, 2014 at 1:04 PM,  <edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

> ---
>  hw/cris/Makefile.objs     |  1 -
>  hw/cris/pic_cpu.c         | 47 -----------------------------------------------
>  include/hw/cris/etraxfs.h |  2 --
>  3 files changed, 50 deletions(-)
>  delete mode 100644 hw/cris/pic_cpu.c
>
> diff --git a/hw/cris/Makefile.objs b/hw/cris/Makefile.objs
> index 776db7c..7624173 100644
> --- a/hw/cris/Makefile.objs
> +++ b/hw/cris/Makefile.objs
> @@ -1,3 +1,2 @@
> -obj-y += pic_cpu.o
>  obj-y += boot.o
>  obj-y += axis_dev88.o
> diff --git a/hw/cris/pic_cpu.c b/hw/cris/pic_cpu.c
> deleted file mode 100644
> index bd47bf1..0000000
> --- a/hw/cris/pic_cpu.c
> +++ /dev/null
> @@ -1,47 +0,0 @@
> -/*
> - * QEMU CRIS CPU interrupt wrapper logic.
> - *
> - * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a copy
> - * of this software and associated documentation files (the "Software"), to deal
> - * in the Software without restriction, including without limitation the rights
> - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> - * copies of the Software, and to permit persons to whom the Software is
> - * furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> - * THE SOFTWARE.
> - */
> -
> -#include "hw/sysbus.h"
> -#include "hw/hw.h"
> -#include "hw/cris/etraxfs.h"
> -
> -#define D(x)
> -
> -static void cris_pic_cpu_handler(void *opaque, int irq, int level)
> -{
> -    CRISCPU *cpu = opaque;
> -    CPUState *cs = CPU(cpu);
> -    int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
> -
> -    if (level) {
> -        cpu_interrupt(cs, type);
> -    } else {
> -        cpu_reset_interrupt(cs, type);
> -    }
> -}
> -
> -qemu_irq *cris_pic_init_cpu(CPUCRISState *env)
> -{
> -    return qemu_allocate_irqs(cris_pic_cpu_handler, cris_env_get_cpu(env), 2);
> -}
> diff --git a/include/hw/cris/etraxfs.h b/include/hw/cris/etraxfs.h
> index ab30559..73a6134 100644
> --- a/include/hw/cris/etraxfs.h
> +++ b/include/hw/cris/etraxfs.h
> @@ -28,8 +28,6 @@
>  #include "net/net.h"
>  #include "hw/cris/etraxfs_dma.h"
>
> -qemu_irq *cris_pic_init_cpu(CPUCRISState *env);
> -
>  /* Instantiate an ETRAXFS Ethernet MAC.  */
>  static inline DeviceState *
>  etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr,
> --
> 1.8.3.2
>
>

Re: [Qemu-devel] [PATCH 6/6] linux-user: Fix trampoline code for CRIS

[Riku Voipio]

On Sun, Feb 02, 2014 at 03:04:52AM +0000, edgar.iglesias@gmail.com wrote:
> From: Stefan Weil <sw@weilnetz.de>
> 
> __put_user can write bytes, words (2 bytes) or longwords (4 bytes).
> Here obviously words should have been written, but bytes were written,
> so values like 0x9c5f were truncated to 0x5f.
> 
> Fix this by changing retcode from uint8_t to to uint16_t in
> target_signal_frame and also in the unused rt_signal_frame.
> 
> This problem was reported by static code analysis (smatch).

Acked-by: Riku Voipio <riku.voipio@linaro.org>

> Cc: qemu-stable@nongnu.org
> Signed-off-by: Stefan Weil <sw@weilnetz.de>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  linux-user/signal.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/linux-user/signal.c b/linux-user/signal.c
> index 01d7c39..82e8592 100644
> --- a/linux-user/signal.c
> +++ b/linux-user/signal.c
> @@ -3659,7 +3659,7 @@ struct target_sigcontext {
>  struct target_signal_frame {
>          struct target_sigcontext sc;
>          uint32_t extramask[TARGET_NSIG_WORDS - 1];
> -        uint8_t retcode[8];       /* Trampoline code. */
> +        uint16_t retcode[4];      /* Trampoline code. */
>  };
>  
>  struct rt_signal_frame {
> @@ -3667,7 +3667,7 @@ struct rt_signal_frame {
>          void *puc;
>          siginfo_t info;
>          struct ucontext uc;
> -        uint8_t retcode[8];       /* Trampoline code. */
> +        uint16_t retcode[4];      /* Trampoline code. */
>  };
>  
>  static void setup_sigcontext(struct target_sigcontext *sc, CPUCRISState *env)
> @@ -3745,8 +3745,8 @@ static void setup_frame(int sig, struct target_sigaction *ka,
>  	 */
>  	err |= __put_user(0x9c5f, frame->retcode+0);
>  	err |= __put_user(TARGET_NR_sigreturn, 
> -			  frame->retcode+2);
> -	err |= __put_user(0xe93d, frame->retcode+4);
> +			  frame->retcode + 1);
> +	err |= __put_user(0xe93d, frame->retcode + 2);
>  
>  	/* Save the mask.  */
>  	err |= __put_user(set->sig[0], &frame->sc.oldmask);
> -- 
> 1.8.3.2
> 

Re: [Qemu-devel] [PATCH 1/6] cris: Add a CRISv32 default "any" CPU for user mode emulation

[Riku Voipio]

On Sun, Feb 02, 2014 at 03:04:47AM +0000, edgar.iglesias@gmail.com wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

This is not a regression, but my static busybox sample I have fails to
run with -cpu crisv32. -cpu crisv11 works a little better, but most
syscalls will blow up. Now it is entirely possible my cris busybox binary is
broken, as I have no hw to test it...

./cris-linux-user/qemu-cris -cpu crisv32 /home/voipio/linaro/qemu-smoke/cris/busybox echo hi

PC=80138 CCS=e8 btaken=1 btarget=80138
cc_op=8 cc_src=4 cc_dest=-150999004 cc_result=f6fff020 cc_mask=f
$r0=001dca60 $r1=00000000 $r2=00000000 $r3=00000000 
$r4=00000000 $r5=00000000 $r6=00000000 $r7=00000000 
$r8=00000000 $r9=0012dc50 $r10=000806a6 $r11=00000003 
$r12=f6fff02c $r13=00001966 $sp=f6fff020 $acr=f6fff01c 

special regs:
$bz=00000000 $vr=00000020 $pid=00000000 $srs=00000000 
$wz=00000000 $exs=00000000 $eda=001dca60 $mof=00000000 
$dz=00000000 $ebp=00000000 $erp=00000000 $srp=00000000 
$nrp=00000000 $ccs=000000e8 $usp=00000000 $spc=00000000 

support function regs bank 0:
s00=00000000 s01=00000000 s02=00000000 s03=00000000 
s04=00000000 s05=00000000 s06=00000000 s07=00000000 
s08=00000000 s09=00000000 s10=00000000 s11=00000000 
s12=00000000 s13=00000000 s14=00000000 s15=00000000 


> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target-cris/cpu.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/target-cris/cpu.c b/target-cris/cpu.c
> index 44301a4..21f1860 100644
> --- a/target-cris/cpu.c
> +++ b/target-cris/cpu.c
> @@ -239,7 +239,14 @@ static const TypeInfo cris_cpu_model_type_infos[] = {
>          .name = TYPE("crisv32"),
>          .parent = TYPE_CRIS_CPU,
>          .class_init = crisv32_cpu_class_init,
> +    },
> +#if defined(CONFIG_USER_ONLY)
> +    {
> +        .name = TYPE("any"),
> +        .parent = TYPE_CRIS_CPU,
> +        .class_init = crisv32_cpu_class_init,
>      }
> +#endif
>  };
>  
>  #undef TYPE
> -- 
> 1.8.3.2
> 

Re: [Qemu-devel] [PATCH 1/6] cris: Add a CRISv32 default "any" CPU for user mode emulation

[Andreas Färber]

Hi,

Am 02.02.2014 04:04, schrieb edgar.iglesias@gmail.com:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target-cris/cpu.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/target-cris/cpu.c b/target-cris/cpu.c
> index 44301a4..21f1860 100644
> --- a/target-cris/cpu.c
> +++ b/target-cris/cpu.c
> @@ -239,7 +239,14 @@ static const TypeInfo cris_cpu_model_type_infos[] = {
>          .name = TYPE("crisv32"),
>          .parent = TYPE_CRIS_CPU,
>          .class_init = crisv32_cpu_class_init,
> +    },
> +#if defined(CONFIG_USER_ONLY)
> +    {
> +        .name = TYPE("any"),
> +        .parent = TYPE_CRIS_CPU,
> +        .class_init = crisv32_cpu_class_init,
>      }

If this model is supposed to be exactly the same as crisv32, I would
recommend to make this an alias handled in CRISCPU::class_by_name()
rather than a distinct QOM type.

Regards,
Andreas

> +#endif
>  };
>  
>  #undef TYPE

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH 1/6] cris: Add a CRISv32 default "any" CPU for user mode emulation

[Edgar E. Iglesias]

On Mon, Feb 03, 2014 at 01:02:34PM +0200, Riku Voipio wrote:
> On Sun, Feb 02, 2014 at 03:04:47AM +0000, edgar.iglesias@gmail.com wrote:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> This is not a regression, but my static busybox sample I have fails to
> run with -cpu crisv32. -cpu crisv11 works a little better, but most
> syscalls will blow up. Now it is entirely possible my cris busybox binary is
> broken, as I have no hw to test it...

Hi Riku,

The CRISv10 class of CPUs (8, 9, 10, 11) are very different from the
CRISv32. There is some binary compatibility and more ASM compat but
they should really be seen as different archs.

Not sure what kind of binary you have but if you want I can provide
busybox for both v10 and v32. 

Cheers,
Edgar


> 
> ./cris-linux-user/qemu-cris -cpu crisv32 /home/voipio/linaro/qemu-smoke/cris/busybox echo hi
> 
> PC=80138 CCS=e8 btaken=1 btarget=80138
> cc_op=8 cc_src=4 cc_dest=-150999004 cc_result=f6fff020 cc_mask=f
> $r0=001dca60 $r1=00000000 $r2=00000000 $r3=00000000 
> $r4=00000000 $r5=00000000 $r6=00000000 $r7=00000000 
> $r8=00000000 $r9=0012dc50 $r10=000806a6 $r11=00000003 
> $r12=f6fff02c $r13=00001966 $sp=f6fff020 $acr=f6fff01c 
> 
> special regs:
> $bz=00000000 $vr=00000020 $pid=00000000 $srs=00000000 
> $wz=00000000 $exs=00000000 $eda=001dca60 $mof=00000000 
> $dz=00000000 $ebp=00000000 $erp=00000000 $srp=00000000 
> $nrp=00000000 $ccs=000000e8 $usp=00000000 $spc=00000000 
> 
> support function regs bank 0:
> s00=00000000 s01=00000000 s02=00000000 s03=00000000 
> s04=00000000 s05=00000000 s06=00000000 s07=00000000 
> s08=00000000 s09=00000000 s10=00000000 s11=00000000 
> s12=00000000 s13=00000000 s14=00000000 s15=00000000 
> 
> 
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> >  target-cris/cpu.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/target-cris/cpu.c b/target-cris/cpu.c
> > index 44301a4..21f1860 100644
> > --- a/target-cris/cpu.c
> > +++ b/target-cris/cpu.c
> > @@ -239,7 +239,14 @@ static const TypeInfo cris_cpu_model_type_infos[] = {
> >          .name = TYPE("crisv32"),
> >          .parent = TYPE_CRIS_CPU,
> >          .class_init = crisv32_cpu_class_init,
> > +    },
> > +#if defined(CONFIG_USER_ONLY)
> > +    {
> > +        .name = TYPE("any"),
> > +        .parent = TYPE_CRIS_CPU,
> > +        .class_init = crisv32_cpu_class_init,
> >      }
> > +#endif
> >  };
> >  
> >  #undef TYPE
> > -- 
> > 1.8.3.2
> > 

Re: [Qemu-devel] [PATCH 1/6] cris: Add a CRISv32 default "any" CPU for user mode emulation

[Edgar E. Iglesias]

On Mon, Feb 03, 2014 at 12:44:03PM +0100, Andreas Färber wrote:
> Hi,
> 
> Am 02.02.2014 04:04, schrieb edgar.iglesias@gmail.com:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> > 
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> >  target-cris/cpu.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/target-cris/cpu.c b/target-cris/cpu.c
> > index 44301a4..21f1860 100644
> > --- a/target-cris/cpu.c
> > +++ b/target-cris/cpu.c
> > @@ -239,7 +239,14 @@ static const TypeInfo cris_cpu_model_type_infos[] = {
> >          .name = TYPE("crisv32"),
> >          .parent = TYPE_CRIS_CPU,
> >          .class_init = crisv32_cpu_class_init,
> > +    },
> > +#if defined(CONFIG_USER_ONLY)
> > +    {
> > +        .name = TYPE("any"),
> > +        .parent = TYPE_CRIS_CPU,
> > +        .class_init = crisv32_cpu_class_init,
> >      }
> 
> If this model is supposed to be exactly the same as crisv32, I would
> recommend to make this an alias handled in CRISCPU::class_by_name()
> rather than a distinct QOM type.
> 

Sounds good, I'll send a v2 of this one.

Cheers,
Edgar