* [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x
@ 2014-02-17 14:23 Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 01/13] ARM: mvebu: rename armada-370-xp.c to board-v7.c Thomas Petazzoni
` (13 more replies)
0 siblings, 14 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
Jason, Andrew, Sebastian, Gregory,
Here comes the v4 of the Armada 375/38x core support.
Changes since v3
================
* Renamed the armada-mvebu.c file to board-v7.c file, as it is aimed
at containing the DT_MACHINE_START structure and related operations
for all the mvebu v7 platforms, Marvell Dove
included. Consequently, renamed the MACH_ARMADA_MVEBU hidden
Kconfig symbol to MACH_MVEBU_V7, and functions named
armada_mvebu_<something>() to just mvebu_<something>().
* Added NAND support for Armada 375, both at the SoC level (.dtsi)
and the board level (.dts). Thanks to Ezequiel Garcia for providing
the patches!
Changes since v2
================
* Integrated the support of Armada 375 and Armada 38x in the same
"board file" as Armada 370/XP, as suggested by Arnd Bergmann. In
order to achieve this, I've renamed armada-370-xp.c to
armada-mvebu.c, and done corresponding minor cleanups before
introducing Armada 375/38x support.
* Made the data abort workaround check for a specific FSR value, as
suggested by Arnd Bergmann. Checking for the address is not
possible, because it changes from one boot to the other.
* Removed unnecessary duplicated aliases for i2c and spi nodes
(between .dtsi and .dts). Requested by Arnd Bergmann.
* Added aliases for network interfaces, like we already have for
Armada 370 and XP.
Changes since v1
================
* Merged armada-375.c and armada-38x.c into one file, as suggested by
Andrew Lunn.
* Do not require the introduction of new compatible strings in the
drivers for the timer, mbus and the 38x system controller (the 375
system controller being different, adding a different compatible
string is needed). The .dtsi files have been updated to use several
compatible strings: one designating the new SoC, and another one
designating the older SoC with which they are compatible as far as
we know today. Suggested by Jason Cooper and confirmed by Grant
Likely.
* Rename the Kconfig symbol from MACH_ARMADA_380 to MACH_ARMADA_38X,
as suggested by Andrew Lunn.
* Use <dt-bindings/gpio/gpio.h> defines instead of hardcoded values
in armada-375-db.dts. Suggested by Andrew Lunn.
Original cover letter
=====================
Here is a set of 11 patches that add minimal support for the new
Marvell Armada 375 and 38x SoCs. The Armada 375 has already been
announced a few months ago by Marvell, and a product brief is
available at
http://www.marvell.com/embedded-processors/armada-375/. As far as I
know, the Armada 380 and 385 have not yet been announced, but we
already have working kernel support for them.
Essentially, the Armada 375 is a dual-core Cortex-A9, which re-uses
most of the IP blocks of the Armada XP, except for the network unit
and core parts of the SoC, such as the interrupt controller or cache
controller (GIC and PL310 are used). They also added an XHCI USB 3.0
controller.
The Armada 380 and 385 also use Cortex-A9 CPU cores (single core for
the 380 and dual-core for the 385), but move a little further away
than 375 in terms of peripherals: an AHCI-compatible SATA interface, a
different MMC/SDIO interface, etc.
This set of patches only add minimal support for these SOCs, as well
as support for the peripherals for which no driver changes are
needed. We therefore have support for:
* Device Bus
* Clocks
* Interrupt controllers: GIC and MPIC
* GPIO controllers
* I2C buses
* SPI buses
* L2 cache
* MBus controller
* SDIO (for Armada 375 only)
* Pinctrl
* SATA (for Armada 375 only)
* Serial
* System controller
* XOR engines
* PCIe controllers
* Network (for Armada 38x only)
Some of these features require patches to other subsystems, and the
patches are being sent to the respective maintainers currently: clock
driver patches, pinctrl driver patches, irqchip driver patches, mbus
driver patches, etc. There is however no build dependency between the
arch/arm/mach-mvebu/ code and those other patches.
We aim at getting this minimal support merged for 3.15.
We have already working code for many more features, such as SMP,
coherency support, NAND, SATA and SDIO for Armada 380, etc. We will be
sending those additional features once the basic support has been
merged.
It is worth noting that contrary to the Marvell 370 and XP support,
which has been pushed mainline fairly late in the development cycle of
the SOCs, the support for Armada 375 and 38x is now being pushed quite
early in the development cycle of the SOCs. We are having mainline
support pretty much at the same time as the SOCs are being made
available to customers, which is really great!
Best regards,
Thomas
Gregory CLEMENT (2):
ARM: mvebu: add initial support for the Armada 375 SOCs
ARM: mvebu: add Device Tree description of the Armada 375 SoC
Thomas Petazzoni (11):
ARM: mvebu: rename armada-370-xp.c to board-v7.c
ARM: mvebu: rename DT machine structure for Armada 370/XP
ARM: mvebu: make CPU_PJ4B selection a per-SoC choice
ARM: mvebu: add Armada 375 support to the system-controller driver
ARM: mvebu: add workaround for data abort issue on Armada 375
ARM: mvebu: add Device Tree for the Armada 375 DB board
ARM: mvebu: add initial support for the Armada 380/385 SOCs
ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs
ARM: mvebu: add Device Tree for the Armada 385 DB board
ARM: mvebu: update defconfigs for Armada 375 and 38x
Documentation: arm: update Marvell documentation about Armada 375/38x
Documentation/arm/Marvell/README | 12 +-
.../devicetree/bindings/arm/armada-375.txt | 9 +
.../devicetree/bindings/arm/armada-38x.txt | 10 +
.../bindings/arm/mvebu-system-controller.txt | 3 +-
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/armada-375-db.dts | 130 ++++++
arch/arm/boot/dts/armada-375.dtsi | 458 +++++++++++++++++++++
arch/arm/boot/dts/armada-380.dtsi | 117 ++++++
arch/arm/boot/dts/armada-385-db.dts | 101 +++++
arch/arm/boot/dts/armada-385.dtsi | 149 +++++++
arch/arm/boot/dts/armada-38x.dtsi | 345 ++++++++++++++++
arch/arm/configs/multi_v7_defconfig | 2 +
arch/arm/configs/mvebu_defconfig | 2 +
arch/arm/mach-mvebu/Kconfig | 37 +-
arch/arm/mach-mvebu/Makefile | 2 +-
.../arm/mach-mvebu/{armada-370-xp.c => board-v7.c} | 62 ++-
arch/arm/mach-mvebu/system-controller.c | 14 +-
17 files changed, 1439 insertions(+), 16 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/armada-375.txt
create mode 100644 Documentation/devicetree/bindings/arm/armada-38x.txt
create mode 100644 arch/arm/boot/dts/armada-375-db.dts
create mode 100644 arch/arm/boot/dts/armada-375.dtsi
create mode 100644 arch/arm/boot/dts/armada-380.dtsi
create mode 100644 arch/arm/boot/dts/armada-385-db.dts
create mode 100644 arch/arm/boot/dts/armada-385.dtsi
create mode 100644 arch/arm/boot/dts/armada-38x.dtsi
rename arch/arm/mach-mvebu/{armada-370-xp.c => board-v7.c} (58%)
--
1.8.3.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v4 01/13] ARM: mvebu: rename armada-370-xp.c to board-v7.c
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 02/13] ARM: mvebu: rename DT machine structure for Armada 370/XP Thomas Petazzoni
` (12 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
In preparation to the introduction of the support of Armada 375 and
Armada 38x, this commit renames arch/arm/mach-mvebu/armada-370-xp.c to
arch/arm/mach-mvebu/board-v7.c. The board-v7.c name as we expect this
file to ultimately contain the DT_MACHINE_START definitions for all
ARMv7 Marvell EBU platforms (370, 375, 38x, XP and Dove as of today).
In relation to this file rename, this commit also:
* Renames the hidden Kconfig symbol MACH_ARMADA_370_XP to
MACH_MVEBU_V7. This hidden symbol is selected by the various
per-SoC visible Kconfig options to trigger the build of board-v7.c.
* Renames a certain number of functions in board-v7.c so that their
armada_370_xp prefix is replaced by a mvebu prefix. The .dt_compat
array keeps its armada_370_xp prefix because the new SOCs will be
introduced with separate .dt_compat arrays, due to the need for
different SMP operations.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Jason, this commit will create a trivial conflict with the patch that
removed armada_370_xp_map_io(), which I submitted a few days. The
conflict should be easy to resolve (simply remove the ->map_io
function).
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/mach-mvebu/Kconfig | 6 +++---
arch/arm/mach-mvebu/Makefile | 2 +-
arch/arm/mach-mvebu/{armada-370-xp.c => board-v7.c} | 12 ++++++------
3 files changed, 10 insertions(+), 10 deletions(-)
rename arch/arm/mach-mvebu/{armada-370-xp.c => board-v7.c} (89%)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 5e269d7..eac4605 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -21,7 +21,7 @@ if ARCH_MVEBU
menu "Marvell SOC with device tree"
-config MACH_ARMADA_370_XP
+config MACH_MVEBU_V7
bool
select ARMADA_370_XP_TIMER
select HAVE_SMP
@@ -31,7 +31,7 @@ config MACH_ARMADA_370_XP
config MACH_ARMADA_370
bool "Marvell Armada 370 boards"
select ARMADA_370_CLK
- select MACH_ARMADA_370_XP
+ select MACH_MVEBU_V7
select PINCTRL_ARMADA_370
help
Say 'Y' here if you want your kernel to support boards based
@@ -40,7 +40,7 @@ config MACH_ARMADA_370
config MACH_ARMADA_XP
bool "Marvell Armada XP boards"
select ARMADA_XP_CLK
- select MACH_ARMADA_370_XP
+ select MACH_MVEBU_V7
select PINCTRL_ARMADA_XP
help
Say 'Y' here if you want your kernel to support boards based
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 878aebe..2c1db29 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -4,7 +4,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
obj-y += system-controller.o mvebu-soc-id.o
-obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o
+obj-$(CONFIG_MACH_MVEBU_V7) += board-v7.o
obj-$(CONFIG_ARCH_MVEBU) += coherency.o coherency_ll.o pmsu.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/board-v7.c
similarity index 89%
rename from arch/arm/mach-mvebu/armada-370-xp.c
rename to arch/arm/mach-mvebu/board-v7.c
index f6c9d1d..fc2fb6e 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -31,12 +31,12 @@
#include "coherency.h"
#include "mvebu-soc-id.h"
-static void __init armada_370_xp_map_io(void)
+static void __init mvebu_map_io(void)
{
debug_ll_io_init();
}
-static void __init armada_370_xp_timer_and_clk_init(void)
+static void __init mvebu_timer_and_clk_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
@@ -75,7 +75,7 @@ static void __init i2c_quirk(void)
return;
}
-static void __init armada_370_xp_dt_init(void)
+static void __init mvebu_dt_init(void)
{
if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
i2c_quirk();
@@ -89,9 +89,9 @@ static const char * const armada_370_xp_dt_compat[] = {
DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)")
.smp = smp_ops(armada_xp_smp_ops),
- .init_machine = armada_370_xp_dt_init,
- .map_io = armada_370_xp_map_io,
- .init_time = armada_370_xp_timer_and_clk_init,
+ .init_machine = mvebu_dt_init,
+ .map_io = mvebu_map_io,
+ .init_time = mvebu_timer_and_clk_init,
.restart = mvebu_restart,
.dt_compat = armada_370_xp_dt_compat,
MACHINE_END
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 02/13] ARM: mvebu: rename DT machine structure for Armada 370/XP
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 01/13] ARM: mvebu: rename armada-370-xp.c to board-v7.c Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 03/13] ARM: mvebu: make CPU_PJ4B selection a per-SoC choice Thomas Petazzoni
` (11 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
Due to a mistake made when merging Armada 370 and Armada XP DT machine
structures, the name of the structure was incorrectly chosen as being
ARMADA_XP_DT, while the structure also covers Armada 370. Therefore,
we rename the structure to ARMADA_370_XP_DT.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/mach-mvebu/board-v7.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index fc2fb6e..84817fd 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -87,7 +87,7 @@ static const char * const armada_370_xp_dt_compat[] = {
NULL,
};
-DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)")
+DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
.smp = smp_ops(armada_xp_smp_ops),
.init_machine = mvebu_dt_init,
.map_io = mvebu_map_io,
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 03/13] ARM: mvebu: make CPU_PJ4B selection a per-SoC choice
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 01/13] ARM: mvebu: rename armada-370-xp.c to board-v7.c Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 02/13] ARM: mvebu: rename DT machine structure for Armada 370/XP Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 04/13] ARM: mvebu: add Armada 375 support to the system-controller driver Thomas Petazzoni
` (10 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
Until now, the CPU_PJ4B Kconfig option was selected by
MACH_ARMADA_MVEBU, i.e for all Armada MVEBU SOCs. In preparation to
the introduction of Cortex-A9 based Armada MVEBU SOCs, this selection
is moved down to the Armada 370 and Armada XP specific options.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/mach-mvebu/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index eac4605..d9d32aa 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -26,11 +26,11 @@ config MACH_MVEBU_V7
select ARMADA_370_XP_TIMER
select HAVE_SMP
select CACHE_L2X0
- select CPU_PJ4B
config MACH_ARMADA_370
bool "Marvell Armada 370 boards"
select ARMADA_370_CLK
+ select CPU_PJ4B
select MACH_MVEBU_V7
select PINCTRL_ARMADA_370
help
@@ -40,6 +40,7 @@ config MACH_ARMADA_370
config MACH_ARMADA_XP
bool "Marvell Armada XP boards"
select ARMADA_XP_CLK
+ select CPU_PJ4B
select MACH_MVEBU_V7
select PINCTRL_ARMADA_XP
help
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 04/13] ARM: mvebu: add Armada 375 support to the system-controller driver
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (2 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 03/13] ARM: mvebu: make CPU_PJ4B selection a per-SoC choice Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 05/13] ARM: mvebu: add initial support for the Armada 375 SOCs Thomas Petazzoni
` (9 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
The system controller block in the Armada 375 has different register
offsets for the system reset and other related functions. Therefore,
this commit introduces the new "armada-375-system-controller"
compatible string to identify the Armada 375 variant of the system
controller.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
.../devicetree/bindings/arm/mvebu-system-controller.txt | 3 ++-
arch/arm/mach-mvebu/system-controller.c | 14 ++++++++++++--
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/mvebu-system-controller.txt b/Documentation/devicetree/bindings/arm/mvebu-system-controller.txt
index 081c6a7..d24ab2e 100644
--- a/Documentation/devicetree/bindings/arm/mvebu-system-controller.txt
+++ b/Documentation/devicetree/bindings/arm/mvebu-system-controller.txt
@@ -1,12 +1,13 @@
MVEBU System Controller
-----------------------
-MVEBU (Marvell SOCs: Armada 370/XP, Dove, mv78xx0, Kirkwood, Orion5x)
+MVEBU (Marvell SOCs: Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x)
Required properties:
- compatible: one of:
- "marvell,orion-system-controller"
- "marvell,armada-370-xp-system-controller"
+ - "marvell,armada-375-system-controller"
- reg: Should contain system controller registers location and length.
Example:
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index a7fb89a..1806187 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -1,5 +1,5 @@
/*
- * System controller support for Armada 370 and XP platforms.
+ * System controller support for Armada 370, 375 and XP platforms.
*
* Copyright (C) 2012 Marvell
*
@@ -11,7 +11,7 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
- * The Armada 370 and Armada XP SoCs both have a range of
+ * The Armada 370, 375 and Armada XP SoCs have a range of
* miscellaneous registers, that do not belong to a particular device,
* but rather provide system-level features. This basic
* system-controller driver provides a device tree binding for those
@@ -47,6 +47,13 @@ static const struct mvebu_system_controller armada_370_xp_system_controller = {
.system_soft_reset = 0x1,
};
+static const struct mvebu_system_controller armada_375_system_controller = {
+ .rstoutn_mask_offset = 0x54,
+ .system_soft_reset_offset = 0x58,
+ .rstoutn_mask_reset_out_en = 0x1,
+ .system_soft_reset = 0x1,
+};
+
static const struct mvebu_system_controller orion_system_controller = {
.rstoutn_mask_offset = 0x108,
.system_soft_reset_offset = 0x10c,
@@ -61,6 +68,9 @@ static struct of_device_id of_system_controller_table[] = {
}, {
.compatible = "marvell,armada-370-xp-system-controller",
.data = (void *) &armada_370_xp_system_controller,
+ }, {
+ .compatible = "marvell,armada-375-system-controller",
+ .data = (void *) &armada_375_system_controller,
},
{ /* end of list */ },
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 05/13] ARM: mvebu: add initial support for the Armada 375 SOCs
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (3 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 04/13] ARM: mvebu: add Armada 375 support to the system-controller driver Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 06/13] ARM: mvebu: add workaround for data abort issue on Armada 375 Thomas Petazzoni
` (8 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
From: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit adds the basic support for the Armada 375 SOCs. These SoCs
share most of their IP with the Armada 370/XP SoCs. The main
difference is the use of a Cortex A9 CPU instead of the PJ4B CPU. The
interrupt controller and the L2 cache controller are also different
they are respectively the GIC and the PL310.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 375 will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Documentation/devicetree/bindings/arm/armada-375.txt | 9 +++++++++
arch/arm/mach-mvebu/Kconfig | 14 ++++++++++++++
arch/arm/mach-mvebu/board-v7.c | 11 +++++++++++
3 files changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/armada-375.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-375.txt b/Documentation/devicetree/bindings/arm/armada-375.txt
new file mode 100644
index 0000000..867d0b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/armada-375.txt
@@ -0,0 +1,9 @@
+Marvell Armada 375 Platforms Device Tree Bindings
+-------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 375 family shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armada375"
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index d9d32aa..3b74a84 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -37,6 +37,20 @@ config MACH_ARMADA_370
Say 'Y' here if you want your kernel to support boards based
on the Marvell Armada 370 SoC with device tree.
+config MACH_ARMADA_375
+ bool "Marvell Armada 375 boards"
+ select ARM_ERRATA_720789
+ select ARM_ERRATA_753970
+ select ARM_GIC
+ select ARMADA_375_CLK
+ select CPU_V7
+ select MACH_MVEBU_V7
+ select NEON
+ select PINCTRL_ARMADA_375
+ help
+ Say 'Y' here if you want your kernel to support boards based
+ on the Marvell Armada 375 SoC with device tree.
+
config MACH_ARMADA_XP
bool "Marvell Armada XP boards"
select ARMADA_XP_CLK
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 84817fd..f60ed1b 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -95,3 +95,14 @@ DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
.restart = mvebu_restart,
.dt_compat = armada_370_xp_dt_compat,
MACHINE_END
+
+static const char * const armada_375_dt_compat[] = {
+ "marvell,armada375",
+ NULL,
+};
+
+DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
+ .init_time = mvebu_timer_and_clk_init,
+ .restart = mvebu_restart,
+ .dt_compat = armada_375_dt_compat,
+MACHINE_END
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 06/13] ARM: mvebu: add workaround for data abort issue on Armada 375
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (4 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 05/13] ARM: mvebu: add initial support for the Armada 375 SOCs Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 07/13] ARM: mvebu: add Device Tree description of the Armada 375 SoC Thomas Petazzoni
` (7 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
Early versions of Armada 375 SoC have a bug where the BootROM leaves
an external data abort pending. The kernel is hit by this data abort
as soon as it enters userspace, because it unmasks the data aborts at
this moment. We register a custom abort handler below to ignore the
first data abort to work around this problem.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/mach-mvebu/board-v7.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index f60ed1b..3d4feae 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -36,6 +36,27 @@ static void __init mvebu_map_io(void)
debug_ll_io_init();
}
+/*
+ * Early versions of Armada 375 SoC have a bug where the BootROM
+ * leaves an external data abort pending. The kernel is hit by this
+ * data abort as soon as it enters userspace, because it unmasks the
+ * data aborts at this moment. We register a custom abort handler
+ * below to ignore the first data abort to work around this
+ * problem.
+ */
+static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
+ struct pt_regs *regs)
+{
+ static int ignore_first;
+
+ if (!ignore_first && fsr == 0x1406) {
+ ignore_first = 1;
+ return 0;
+ }
+
+ return 1;
+}
+
static void __init mvebu_timer_and_clk_init(void)
{
of_clk_init(NULL);
@@ -45,6 +66,10 @@ static void __init mvebu_timer_and_clk_init(void)
#ifdef CONFIG_CACHE_L2X0
l2x0_of_init(0, ~0UL);
#endif
+
+ if (of_machine_is_compatible("marvell,armada375"))
+ hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
+ "imprecise external abort");
}
static void __init i2c_quirk(void)
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 07/13] ARM: mvebu: add Device Tree description of the Armada 375 SoC
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (5 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 06/13] ARM: mvebu: add workaround for data abort issue on Armada 375 Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 08/13] ARM: mvebu: add Device Tree for the Armada 375 DB board Thomas Petazzoni
` (6 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
From: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 375 SoC is a new SoC from Marvell, based on a dual core
Cortex-A9 and a number of hardware blocks that are common with earlier
SoCs from the mvebu family.
The provided Device Tree describes the following parts of the SoC:
* CPUs
* Device Bus
* Clocks
* Interrupt controllers: GIC and MPIC
* GPIO controllers
* I2C buses
* L2 cache
* MBus controller
* SDIO
* Pinctrl
* SATA
* Serial
* SPI buses
* System controller (for reboot)
* Timer
* XOR engines
* PCIe controllers
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/armada-375.dtsi | 458 ++++++++++++++++++++++++++++++++++++++
1 file changed, 458 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-375.dtsi
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
new file mode 100644
index 0000000..9f5cb51
--- /dev/null
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -0,0 +1,458 @@
+/*
+ * Device Tree Include file for Marvell Armada 375 family SoC
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
+
+/ {
+ model = "Marvell Armada 375 family SoC";
+ compatible = "marvell,armada375";
+
+ aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ };
+
+ clocks {
+ /* 2 GHz fixed main PLL */
+ mainpll: mainpll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2000000000>;
+ };
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ };
+ };
+
+ soc {
+ compatible = "marvell,armada375-mbus", "marvell,armada370-mbus", "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ controller = <&mbusc>;
+ interrupt-parent = <&gic>;
+ pcie-mem-aperture = <0xe0000000 0x8000000>;
+ pcie-io-aperture = <0xe8000000 0x100000>;
+
+ bootrom {
+ compatible = "marvell,bootrom";
+ reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
+ };
+
+ devbus-bootcs {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs0 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs1 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs2 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs3 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ internal-regs {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+
+ L2: cache-controller at 8000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x8000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
+ timer at c600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0xc600 0x20>;
+ interrupts = <1 13 0x301>;
+ clocks = <&coreclk 2>;
+ };
+
+ gic: interrupt-controller at d000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #size-cells = <0>;
+ interrupt-controller;
+ reg = <0xd000 0x1000>,
+ <0xc100 0x100>;
+ };
+
+ spi0: spi at 10600 {
+ compatible = "marvell,orion-spi";
+ reg = <0x10600 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ interrupts = <0 1 0x4>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ spi1: spi at 10680 {
+ compatible = "marvell,orion-spi";
+ reg = <0x10680 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ interrupts = <0 63 0x4>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 11000 {
+ compatible = "marvell,mv64xxx-i2c";
+ reg = <0x11000 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0 2 0x4>;
+ timeout-ms = <1000>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c at 11100 {
+ compatible = "marvell,mv64xxx-i2c";
+ reg = <0x11100 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0 3 0x4>;
+ timeout-ms = <1000>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ serial at 12000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x12000 0x100>;
+ reg-shift = <2>;
+ interrupts = <0 12 4>;
+ reg-io-width = <1>;
+ status = "disabled";
+ };
+
+ serial at 12100 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x12100 0x100>;
+ reg-shift = <2>;
+ interrupts = <0 13 4>;
+ reg-io-width = <1>;
+ status = "disabled";
+ };
+
+ pinctrl {
+ compatible = "marvell,mv88f6720-pinctrl";
+ reg = <0x18000 0x24>;
+
+ i2c0_pins: i2c0-pins {
+ marvell,pins = "mpp14", "mpp15";
+ marvell,function = "i2c0";
+ };
+
+ i2c1_pins: i2c1-pins {
+ marvell,pins = "mpp61", "mpp62";
+ marvell,function = "i2c1";
+ };
+
+ nand_pins: nand-pins {
+ marvell,pins = "mpp0", "mpp1", "mpp2",
+ "mpp3", "mpp4", "mpp5",
+ "mpp6", "mpp7", "mpp8",
+ "mpp9", "mpp10", "mpp11",
+ "mpp12", "mpp13";
+ marvell,function = "nand";
+ };
+
+ sdio_pins: sdio-pins {
+ marvell,pins = "mpp24", "mpp25", "mpp26",
+ "mpp27", "mpp28", "mpp29";
+ marvell,function = "sd";
+ };
+
+ spi0_pins: spi0-pins {
+ marvell,pins = "mpp0", "mpp1", "mpp4",
+ "mpp5", "mpp8", "mpp9";
+ marvell,function = "spi0";
+ };
+ };
+
+ gpio0: gpio at 18100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18100 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <0 53 0x4>, <0 54 0x4>,
+ <0 55 0x4>, <0 56 0x4>;
+ };
+
+ gpio1: gpio at 18140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18140 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <0 58 0x4>, <0 59 0x4>,
+ <0 60 0x4>, <0 61 0x4>;
+ };
+
+ gpio2: gpio at 18180 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18180 0x40>;
+ ngpios = <3>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <0 62 0x4>;
+ };
+
+ system-controller at 18200 {
+ compatible = "marvell,armada-375-system-controller";
+ reg = <0x18200 0x100>;
+ };
+
+ gateclk: clock-gating-control at 18220 {
+ compatible = "marvell,armada-375-gating-clock";
+ reg = <0x18220 0x4>;
+ clocks = <&coreclk 0>;
+ #clock-cells = <1>;
+ };
+
+ mbusc: mbus-controller at 20000 {
+ compatible = "marvell,mbus-controller";
+ reg = <0x20000 0x100>, <0x20180 0x20>;
+ };
+
+ mpic: interrupt-controller at 20000 {
+ compatible = "marvell,mpic";
+ reg = <0x20a00 0x2d0>, <0x21070 0x58>;
+ #interrupt-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ msi-controller;
+ interrupts = <1 15 0x4>;
+ };
+
+ timer at 20300 {
+ compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
+ reg = <0x20300 0x30>, <0x21040 0x30>;
+ interrupts-extended = <&gic 0 8 4>,
+ <&gic 0 9 4>,
+ <&gic 0 10 4>,
+ <&gic 0 11 4>,
+ <&mpic 5>,
+ <&mpic 6>;
+ clocks = <&coreclk 0>;
+ };
+
+ xor at 60800 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60800 0x100
+ 0x60A00 0x100>;
+ clocks = <&gateclk 22>;
+ status = "okay";
+
+ xor00 {
+ interrupts = <0 22 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <0 23 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
+ xor at 60900 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
+ clocks = <&gateclk 23>;
+ status = "okay";
+
+ xor10 {
+ interrupts = <0 65 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor11 {
+ interrupts = <0 66 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
+ sata at a0000 {
+ compatible = "marvell,orion-sata";
+ reg = <0xa0000 0x5000>;
+ interrupts = <0 26 0x4>;
+ clocks = <&gateclk 14>, <&gateclk 20>;
+ clock-names = "0", "1";
+ status = "disabled";
+ };
+
+ nand at d0000 {
+ compatible = "marvell,armada370-nand";
+ reg = <0xd0000 0x54>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupts = <0 84 0x4>;
+ clocks = <&gateclk 11>;
+ status = "disabled";
+ };
+
+ mvsdio at d4000 {
+ compatible = "marvell,orion-sdio";
+ reg = <0xd4000 0x200>;
+ interrupts = <0 25 0x4>;
+ clocks = <&gateclk 17>;
+ bus-width = <4>;
+ cap-sdio-irq;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ status = "disabled";
+ };
+
+ coreclk: mvebu-sar at e8204 {
+ compatible = "marvell,armada-375-core-clock";
+ reg = <0xe8204 0x04>;
+ #clock-cells = <1>;
+ };
+
+ coredivclk: corediv-clock at e8250 {
+ compatible = "marvell,armada-375-corediv-clock";
+ reg = <0xe8250 0xc>;
+ #clock-cells = <1>;
+ clocks = <&mainpll>;
+ clock-output-names = "nand";
+ };
+ };
+
+ pcie-controller {
+ compatible = "marvell,armada-370-pcie";
+ status = "disabled";
+ device_type = "pci";
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ msi-parent = <&mpic>;
+ bus-range = <0x00 0xff>;
+
+ ranges =
+ <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
+ 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
+ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0 MEM */
+ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0 IO */
+ 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1 MEM */
+ 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1 IO */>;
+
+ pcie at 1,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
+ reg = <0x0800 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
+ 0x81000000 0 0 0x81000000 0x1 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 29 0x4>;
+ marvell,pcie-port = <0>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 5>;
+ status = "disabled";
+ };
+
+ pcie at 2,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
+ 0x81000000 0 0 0x81000000 0x2 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 33 0x4>;
+ marvell,pcie-port = <0>;
+ marvell,pcie-lane = <1>;
+ clocks = <&gateclk 6>;
+ status = "disabled";
+ };
+
+ };
+ };
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 08/13] ARM: mvebu: add Device Tree for the Armada 375 DB board
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (6 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 07/13] ARM: mvebu: add Device Tree description of the Armada 375 SoC Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 09/13] ARM: mvebu: add initial support for the Armada 380/385 SOCs Thomas Petazzoni
` (5 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
The Armada 375 DB board is the development board from Marvell for the
Armada 375 SoC. This commit adds a Device Tree description for this
board, which enables the following features:
* I2C buses
* SDIO
* Serial port
* SPI bus, with a SPI flash. Note that the SPI bus is disabled by
default, because it conflicts with the NAND, and can only work if
the board boots out of SPI. Since most boards are shipped to boot
out of NAND, we're default to having the SPI bus disabled.
* PCIe interfaces
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-375-db.dts | 130 ++++++++++++++++++++++++++++++++++++
2 files changed, 131 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-375-db.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b..f1eafbd 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -126,6 +126,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \
armada-370-rd.dtb \
+ armada-375-db.dtb \
armada-xp-axpwifiap.dtb \
armada-xp-db.dtb \
armada-xp-gp.dtb \
diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts
new file mode 100644
index 0000000..9378d31
--- /dev/null
+++ b/arch/arm/boot/dts/armada-375-db.dts
@@ -0,0 +1,130 @@
+/*
+ * Device Tree file for Marvell Armada 375 evaluation board
+ * (DB-88F6720)
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-375.dtsi"
+
+/ {
+ model = "Marvell Armada 375 Development Board";
+ compatible = "marvell,a375-db", "marvell,armada375";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x40000000>; /* 1 GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ spi at 10600 {
+ pinctrl-0 = <&spi0_pins>;
+ pinctrl-names = "default";
+ /*
+ * SPI conflicts with NAND, so we disable it
+ * here, and select NAND as the enabled device
+ * by default.
+ */
+ status = "disabled";
+
+ spi-flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q128a13";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ };
+ };
+
+ i2c at 11000 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ };
+
+ i2c at 11100 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+ };
+
+ serial at 12000 {
+ clock-frequency = <200000000>;
+ status = "okay";
+ };
+
+ pinctrl {
+ sdio_st_pins: sdio-st-pins {
+ marvell,pins = "mpp44", "mpp45";
+ marvell,function = "gpio";
+ };
+ };
+
+ nand: nand at d0000 {
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ num-cs = <1>;
+ marvell,nand-keep-config;
+ marvell,nand-enable-arbiter;
+ nand-on-flash-bbt;
+
+ partition at 0 {
+ label = "U-Boot";
+ reg = <0 0x800000>;
+ };
+ partition at 800000 {
+ label = "Linux";
+ reg = <0x800000 0x800000>;
+ };
+ partition at 1000000 {
+ label = "Filesystem";
+ reg = <0x1000000 0x3f000000>;
+ };
+ };
+
+ mvsdio at d4000 {
+ pinctrl-0 = <&sdio_pins &sdio_st_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+ /*
+ * The two PCIe units are accessible through
+ * standard PCIe slots on the board.
+ */
+ pcie at 1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ pcie at 2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ };
+ };
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 09/13] ARM: mvebu: add initial support for the Armada 380/385 SOCs
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (7 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 08/13] ARM: mvebu: add Device Tree for the Armada 375 DB board Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 10/13] ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs Thomas Petazzoni
` (4 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
This commit adds the basic support for the Armada 380 and Armada 385
SOCs. These SoCs share most of their IP with the Armada 370/XP
SoCs. The main difference is the use of a Cortex A9 CPU instead of the
PJ4B CPU. The Armada 380 is a single core Cortex-A9, while the Armada
385 is a dual-core Cortex-A9.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 38x will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Documentation/devicetree/bindings/arm/armada-38x.txt | 10 ++++++++++
arch/arm/mach-mvebu/Kconfig | 14 ++++++++++++++
arch/arm/mach-mvebu/board-v7.c | 12 ++++++++++++
3 files changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/armada-38x.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-38x.txt b/Documentation/devicetree/bindings/arm/armada-38x.txt
new file mode 100644
index 0000000..11f2330
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/armada-38x.txt
@@ -0,0 +1,10 @@
+Marvell Armada 38x Platforms Device Tree Bindings
+-------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 38x family shall have the
+following property:
+
+Required root node property:
+
+ - compatible: must contain either "marvell,armada380" or
+ "marvell,armada385" depending on the variant of the SoC being used.
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 3b74a84..884b275a 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -51,6 +51,20 @@ config MACH_ARMADA_375
Say 'Y' here if you want your kernel to support boards based
on the Marvell Armada 375 SoC with device tree.
+config MACH_ARMADA_38X
+ bool "Marvell Armada 380/385 boards"
+ select ARM_ERRATA_720789
+ select ARM_ERRATA_753970
+ select ARM_GIC
+ select ARMADA_38X_CLK
+ select CPU_V7
+ select MACH_MVEBU_V7
+ select NEON
+ select PINCTRL_ARMADA_38X
+ help
+ Say 'Y' here if you want your kernel to support boards based
+ on the Marvell Armada 380/385 SoC with device tree.
+
config MACH_ARMADA_XP
bool "Marvell Armada XP boards"
select ARMADA_XP_CLK
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 3d4feae..95ca216 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -131,3 +131,15 @@ DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
.restart = mvebu_restart,
.dt_compat = armada_375_dt_compat,
MACHINE_END
+
+static const char * const armada_38x_dt_compat[] = {
+ "marvell,armada380",
+ "marvell,armada385",
+ NULL,
+};
+
+DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
+ .init_time = mvebu_timer_and_clk_init,
+ .restart = mvebu_restart,
+ .dt_compat = armada_38x_dt_compat,
+MACHINE_END
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 10/13] ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (8 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 09/13] ARM: mvebu: add initial support for the Armada 380/385 SOCs Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 11/13] ARM: mvebu: add Device Tree for the Armada 385 DB board Thomas Petazzoni
` (3 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
The Armada 380 and 385 SoCs are new SoCs from Marvell, based on a
Cortex-A9 cores (single core for 380, dual core for 385) and a number
of hardware blocks that are common with earlier SoCs from the mvebu
family.
The provided Device Tree describes the following parts of the SoC:
* CPU
* Device Bus
* Clocks
* Interrupt controllers: GIC and MPIC
* GPIO controllers
* I2C buses
* L2 cache
* MBus controller
* Pinctrl
* Serial
* SPI buses
* System controller (for reboot)
* Timer
* XOR engines
* PCIe controllers
* Network interfaces
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/armada-380.dtsi | 117 +++++++++++++
arch/arm/boot/dts/armada-385.dtsi | 149 ++++++++++++++++
arch/arm/boot/dts/armada-38x.dtsi | 345 ++++++++++++++++++++++++++++++++++++++
3 files changed, 611 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-380.dtsi
create mode 100644 arch/arm/boot/dts/armada-385.dtsi
create mode 100644 arch/arm/boot/dts/armada-38x.dtsi
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
new file mode 100644
index 0000000..5a46ec7
--- /dev/null
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -0,0 +1,117 @@
+/*
+ * Device Tree Include file for Marvell Armada 380 SoC.
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Lior Amsalem <alior@marvell.com>
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/include/ "armada-38x.dtsi"
+
+/ {
+ model = "Marvell Armada 380 family SoC";
+ compatible = "marvell,armada380", "marvell,armada38x";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+ };
+
+ soc {
+ internal-regs {
+ pinctrl {
+ compatible = "marvell,mv88f6810-pinctrl";
+ reg = <0x18000 0x20>;
+ };
+ };
+
+ pcie-controller {
+ compatible = "marvell,armada-370-pcie";
+ status = "disabled";
+ device_type = "pci";
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ msi-parent = <&mpic>;
+ bus-range = <0x00 0xff>;
+
+ ranges =
+ <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
+ 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
+ 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
+ 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
+ 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
+ 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
+ 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
+ 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
+ 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
+ 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */>;
+
+ /* x1 port */
+ pcie at 1,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
+ reg = <0x0800 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
+ 0x81000000 0 0 0x81000000 0x1 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 29 0x4>;
+ marvell,pcie-port = <0>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 8>;
+ status = "disabled";
+ };
+
+ /* x1 port */
+ pcie at 2,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
+ 0x81000000 0 0 0x81000000 0x2 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 33 0x4>;
+ marvell,pcie-port = <1>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 5>;
+ status = "disabled";
+ };
+
+ /* x1 port */
+ pcie at 3,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
+ 0x81000000 0 0 0x81000000 0x3 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 70 0x4>;
+ marvell,pcie-port = <2>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 6>;
+ status = "disabled";
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
new file mode 100644
index 0000000..b22f5f1
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -0,0 +1,149 @@
+/*
+ * Device Tree Include file for Marvell Armada 385 SoC.
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Lior Amsalem <alior@marvell.com>
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "armada-38x.dtsi"
+
+/ {
+ model = "Marvell Armada 385 family SoC";
+ compatible = "marvell,armada385", "marvell,armada38x";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ };
+ };
+
+ soc {
+ internal-regs {
+ pinctrl {
+ compatible = "marvell,mv88f6820-pinctrl";
+ reg = <0x18000 0x20>;
+ };
+ };
+
+ pcie-controller {
+ compatible = "marvell,armada-370-pcie";
+ status = "disabled";
+ device_type = "pci";
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ msi-parent = <&mpic>;
+ bus-range = <0x00 0xff>;
+
+ ranges =
+ <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
+ 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
+ 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
+ 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
+ 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
+ 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
+ 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
+ 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
+ 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
+ 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */
+ 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
+ 0x81000000 0x4 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 3 IO */>;
+
+ /*
+ * This port can be either x4 or x1. When
+ * configured in x4 by the bootloader, then
+ * pcie at 4,0 is not available.
+ */
+ pcie at 1,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
+ reg = <0x0800 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
+ 0x81000000 0 0 0x81000000 0x1 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 29 0x4>;
+ marvell,pcie-port = <0>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 8>;
+ status = "disabled";
+ };
+
+ /* x1 port */
+ pcie at 2,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
+ 0x81000000 0 0 0x81000000 0x2 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 33 0x4>;
+ marvell,pcie-port = <1>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 5>;
+ status = "disabled";
+ };
+
+ /* x1 port */
+ pcie at 3,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
+ 0x81000000 0 0 0x81000000 0x3 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 70 0x4>;
+ marvell,pcie-port = <2>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 6>;
+ status = "disabled";
+ };
+
+ /*
+ * x1 port only available when pcie at 1,0 is
+ * configured as a x1 port
+ */
+ pcie at 4,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
+ 0x81000000 0 0 0x81000000 0x4 0 1 0>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 71 0x4>;
+ marvell,pcie-port = <3>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gateclk 7>;
+ status = "disabled";
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
new file mode 100644
index 0000000..5a10248
--- /dev/null
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -0,0 +1,345 @@
+/*
+ * Device Tree Include file for Marvell Armada 38x family of SoCs.
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Lior Amsalem <alior@marvell.com>
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "skeleton.dtsi"
+
+#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
+
+/ {
+ model = "Marvell Armada 38x family SoC";
+ compatible = "marvell,armada38x";
+
+ aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ eth0 = ð0;
+ eth1 = ð1;
+ eth2 = ð2;
+ };
+
+ soc {
+ compatible = "marvell,armada380-mbus", "marvell,armada370-mbus",
+ "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ controller = <&mbusc>;
+ interrupt-parent = <&gic>;
+ pcie-mem-aperture = <0xe0000000 0x8000000>;
+ pcie-io-aperture = <0xe8000000 0x100000>;
+
+ bootrom {
+ compatible = "marvell,bootrom";
+ reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
+ };
+
+ devbus-bootcs {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs0 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs1 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs2 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ devbus-cs3 {
+ compatible = "marvell,mvebu-devbus";
+ reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
+ ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ internal-regs {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+
+ L2: cache-controller at 8000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x8000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
+ timer at c600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0xc600 0x20>;
+ interrupts = <1 13 0x301>;
+ clocks = <&coreclk 2>;
+ };
+
+ gic: interrupt-controller at d000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #size-cells = <0>;
+ interrupt-controller;
+ reg = <0xd000 0x1000>,
+ <0xc100 0x100>;
+ };
+
+ spi0: spi at 10600 {
+ compatible = "marvell,orion-spi";
+ reg = <0x10600 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ interrupts = <0 1 0x4>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ spi1: spi at 10680 {
+ compatible = "marvell,orion-spi";
+ reg = <0x10680 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ interrupts = <0 63 0x4>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 11000 {
+ compatible = "marvell,mv64xxx-i2c";
+ reg = <0x11000 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0 2 0x4>;
+ timeout-ms = <1000>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c at 11100 {
+ compatible = "marvell,mv64xxx-i2c";
+ reg = <0x11100 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0 3 0x4>;
+ timeout-ms = <1000>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ serial at 12000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x12000 0x100>;
+ reg-shift = <2>;
+ interrupts = <0 12 4>;
+ reg-io-width = <1>;
+ status = "disabled";
+ };
+
+ serial at 12100 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x12100 0x100>;
+ reg-shift = <2>;
+ interrupts = <0 13 4>;
+ reg-io-width = <1>;
+ status = "disabled";
+ };
+
+ pinctrl {
+ compatible = "marvell,mv88f6820-pinctrl";
+ reg = <0x18000 0x20>;
+ };
+
+ gpio0: gpio at 18100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18100 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <0 53 0x4>, <0 54 0x4>,
+ <0 55 0x4>, <0 56 0x4>;
+ };
+
+ gpio1: gpio at 18140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18140 0x40>;
+ ngpios = <28>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <0 58 0x4>, <0 59 0x4>,
+ <0 60 0x4>, <0 61 0x4>;
+ };
+
+ system-controller at 18200 {
+ compatible = "marvell,armada-380-system-controller",
+ "marvell,armada-370-xp-system-controller";
+ reg = <0x18200 0x100>;
+ };
+
+ gateclk: clock-gating-control at 18220 {
+ compatible = "marvell,armada-380-gating-clock";
+ reg = <0x18220 0x4>;
+ clocks = <&coreclk 0>;
+ #clock-cells = <1>;
+ };
+
+ coreclk: mvebu-sar at 18600 {
+ compatible = "marvell,armada-380-core-clock";
+ reg = <0x18600 0x04>;
+ #clock-cells = <1>;
+ };
+
+ mbusc: mbus-controller at 20000 {
+ compatible = "marvell,mbus-controller";
+ reg = <0x20000 0x100>, <0x20180 0x20>;
+ };
+
+ mpic: interrupt-controller at 20000 {
+ compatible = "marvell,mpic";
+ reg = <0x20a00 0x2d0>, <0x21070 0x58>;
+ #interrupt-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ msi-controller;
+ interrupts = <1 15 0x4>;
+ };
+
+ timer at 20300 {
+ compatible = "marvell,armada-380-timer",
+ "marvell,armada-xp-timer";
+ reg = <0x20300 0x30>, <0x21040 0x30>;
+ interrupts-extended = <&gic 0 8 4>,
+ <&gic 0 9 4>,
+ <&gic 0 10 4>,
+ <&gic 0 11 4>,
+ <&mpic 5>,
+ <&mpic 6>;
+ clocks = <&coreclk 2>, <&refclk>;
+ clock-names = "nbclk", "fixed";
+ };
+
+ eth1: ethernet at 30000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0x30000 0x4000>;
+ interrupts-extended = <&mpic 10>;
+ clocks = <&gateclk 3>;
+ status = "disabled";
+ };
+
+ eth2: ethernet at 34000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0x34000 0x4000>;
+ interrupts-extended = <&mpic 12>;
+ clocks = <&gateclk 2>;
+ status = "disabled";
+ };
+
+ xor at 60800 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60800 0x100
+ 0x60a00 0x100>;
+ clocks = <&gateclk 22>;
+ status = "okay";
+
+ xor00 {
+ interrupts = <0 22 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <0 23 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
+ xor at 60900 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
+ clocks = <&gateclk 28>;
+ status = "okay";
+
+ xor10 {
+ interrupts = <0 65 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor11 {
+ interrupts = <0 66 0x4>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
+ eth0: ethernet at 70000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0x70000 0x4000>;
+ interrupts-extended = <&mpic 8>;
+ clocks = <&gateclk 4>;
+ status = "disabled";
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,orion-mdio";
+ reg = <0x72004 0x4>;
+ };
+ };
+ };
+
+ clocks {
+ /* 25 MHz reference crystal */
+ refclk: oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+ };
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 11/13] ARM: mvebu: add Device Tree for the Armada 385 DB board
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (9 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 10/13] ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 12/13] ARM: mvebu: update defconfigs for Armada 375 and 38x Thomas Petazzoni
` (2 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
The Armada 385 DB board is the development board from Marvell for the
Armada 385 SoC. This commit adds a Device Tree description for this
board, which enables the following features:
* Network interfaces
* I2C buses
* SDIO
* Serial port
* SPI bus, with a SPI flash
* PCIe interfaces
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-385-db.dts | 101 ++++++++++++++++++++++++++++++++++++
2 files changed, 102 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-385-db.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f1eafbd..bd789fc 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -127,6 +127,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-370-netgear-rn104.dtb \
armada-370-rd.dtb \
armada-375-db.dtb \
+ armada-385-db.dtb \
armada-xp-axpwifiap.dtb \
armada-xp-db.dtb \
armada-xp-gp.dtb \
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
new file mode 100644
index 0000000..01b6cc7
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -0,0 +1,101 @@
+/*
+ * Device Tree file for Marvell Armada 385 evaluation board
+ * (DB-88F6820)
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "armada-385.dtsi"
+
+/ {
+ model = "Marvell Armada 385 Development Board";
+ compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>; /* 256 MB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ spi at 10600 {
+ status = "okay";
+
+ spi-flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "w25q32";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ };
+ };
+
+ i2c at 11000 {
+ status = "okay";
+ clock-frequency = <100000>;
+ };
+
+ i2c at 11100 {
+ status = "okay";
+ clock-frequency = <100000>;
+ };
+
+ serial at 12000 {
+ clock-frequency = <200000000>;
+ status = "okay";
+ };
+
+ ethernet at 30000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii";
+ };
+
+ ethernet at 70000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii";
+ };
+
+ mdio {
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+ /*
+ * The two PCIe units are accessible through
+ * standard PCIe slots on the board.
+ */
+ pcie at 1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ pcie at 2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ };
+ };
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 12/13] ARM: mvebu: update defconfigs for Armada 375 and 38x
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (10 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 11/13] ARM: mvebu: add Device Tree for the Armada 385 DB board Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 13/13] Documentation: arm: update Marvell documentation about Armada 375/38x Thomas Petazzoni
2014-02-17 23:20 ` [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Jason Cooper
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
This commit enables the Armada 375 and Armada 38x support in
mvebu_defconfig and multi_v7_defconfig.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/configs/multi_v7_defconfig | 2 ++
arch/arm/configs/mvebu_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 845bc74..3c32fc9 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -9,6 +9,8 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
+CONFIG_MACH_ARMADA_375=y
+CONFIG_MACH_ARMADA_38X=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_MOBILE=y
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index 0f4511d..5fc24ae 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -10,6 +10,8 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
+CONFIG_MACH_ARMADA_375=y
+CONFIG_MACH_ARMADA_38X=y
CONFIG_MACH_ARMADA_XP=y
# CONFIG_CACHE_L2X0 is not set
# CONFIG_SWP_EMULATE is not set
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 13/13] Documentation: arm: update Marvell documentation about Armada 375/38x
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (11 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 12/13] ARM: mvebu: update defconfigs for Armada 375 and 38x Thomas Petazzoni
@ 2014-02-17 14:23 ` Thomas Petazzoni
2014-02-17 23:20 ` [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Jason Cooper
13 siblings, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-17 14:23 UTC (permalink / raw)
To: linux-arm-kernel
This commit updates the documentation that describes the various
families of SOCs produced by Marvell, together with the corresponding
available technical documents. It adds Armada 375 and Armada 38x, and
adds a link to the product brief for the already supported Armada 370.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Documentation/arm/Marvell/README | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index 5a930c1..963ec44 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -83,14 +83,24 @@ EBU Armada family
88F6710
88F6707
88F6W11
+ Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/Marvell_ARMADA_370_SoC.pdf
+
+ Armada 375 Flavors:
+ 88F6720
+ Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA_375_SoC-01_product_brief.pdf
+
+ Armada 380/385 Flavors:
+ 88F6810
+ 88F6820
+ 88F6828
Armada XP Flavors:
MV78230
MV78260
MV78460
NOTE: not to be confused with the non-SMP 78xx0 SoCs
+ Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
- Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
No public datasheet available.
Core: Sheeva ARMv7 compatible
--
1.8.3.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
` (12 preceding siblings ...)
2014-02-17 14:23 ` [PATCH v4 13/13] Documentation: arm: update Marvell documentation about Armada 375/38x Thomas Petazzoni
@ 2014-02-17 23:20 ` Jason Cooper
2014-02-18 8:33 ` Thomas Petazzoni
2014-02-20 9:46 ` Thomas Petazzoni
13 siblings, 2 replies; 18+ messages in thread
From: Jason Cooper @ 2014-02-17 23:20 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Feb 17, 2014 at 03:23:18PM +0100, Thomas Petazzoni wrote:
> Jason, Andrew, Sebastian, Gregory,
>
> Here comes the v4 of the Armada 375/38x core support.
Whole series applied as follows:
Patches 1-6, 9, 13 -> mvebu/soc-3xx
Patches 7, 8, 10, 11 -> mvebu/dt-3xx
Patch 12 -> mvebu/defconfig
I probably don't need to put the DT changes into a separate branch, but
I'd hate to see a bunch of new board support dropped if there is
something wrong with the new SoC support. So caution wins the day.
thx,
Jason.
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x
2014-02-17 23:20 ` [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Jason Cooper
@ 2014-02-18 8:33 ` Thomas Petazzoni
2014-02-20 9:46 ` Thomas Petazzoni
1 sibling, 0 replies; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-18 8:33 UTC (permalink / raw)
To: linux-arm-kernel
Dear Jason Cooper,
On Mon, 17 Feb 2014 18:20:35 -0500, Jason Cooper wrote:
> On Mon, Feb 17, 2014 at 03:23:18PM +0100, Thomas Petazzoni wrote:
> > Jason, Andrew, Sebastian, Gregory,
> >
> > Here comes the v4 of the Armada 375/38x core support.
>
> Whole series applied as follows:
>
> Patches 1-6, 9, 13 -> mvebu/soc-3xx
>
> Patches 7, 8, 10, 11 -> mvebu/dt-3xx
>
> Patch 12 -> mvebu/defconfig
>
> I probably don't need to put the DT changes into a separate branch, but
> I'd hate to see a bunch of new board support dropped if there is
> something wrong with the new SoC support. So caution wins the day.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x
2014-02-17 23:20 ` [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Jason Cooper
2014-02-18 8:33 ` Thomas Petazzoni
@ 2014-02-20 9:46 ` Thomas Petazzoni
2014-02-20 23:41 ` Jason Cooper
1 sibling, 1 reply; 18+ messages in thread
From: Thomas Petazzoni @ 2014-02-20 9:46 UTC (permalink / raw)
To: linux-arm-kernel
Dear Jason Cooper,
On Mon, 17 Feb 2014 18:20:35 -0500, Jason Cooper wrote:
> Whole series applied as follows:
>
> Patches 1-6, 9, 13 -> mvebu/soc-3xx
>
> Patches 7, 8, 10, 11 -> mvebu/dt-3xx
I might be missing something, but while I see the soc-3xx branch, I
don't see the dt-3xx branch in the mvebu repo. Did you forget to push
this branch, maybe?
However, I do see that you have merged dt-3xx in mvebu/for-next, so it
looks like the branch exists somewhere.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x
2014-02-20 9:46 ` Thomas Petazzoni
@ 2014-02-20 23:41 ` Jason Cooper
0 siblings, 0 replies; 18+ messages in thread
From: Jason Cooper @ 2014-02-20 23:41 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 20, 2014 at 10:46:44AM +0100, Thomas Petazzoni wrote:
> Dear Jason Cooper,
>
> On Mon, 17 Feb 2014 18:20:35 -0500, Jason Cooper wrote:
>
> > Whole series applied as follows:
> >
> > Patches 1-6, 9, 13 -> mvebu/soc-3xx
> >
> > Patches 7, 8, 10, 11 -> mvebu/dt-3xx
>
> I might be missing something, but while I see the soc-3xx branch, I
> don't see the dt-3xx branch in the mvebu repo. Did you forget to push
> this branch, maybe?
Sure did. Now pushed.
thx,
Jason.
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2014-02-20 23:41 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-02-17 14:23 [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 01/13] ARM: mvebu: rename armada-370-xp.c to board-v7.c Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 02/13] ARM: mvebu: rename DT machine structure for Armada 370/XP Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 03/13] ARM: mvebu: make CPU_PJ4B selection a per-SoC choice Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 04/13] ARM: mvebu: add Armada 375 support to the system-controller driver Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 05/13] ARM: mvebu: add initial support for the Armada 375 SOCs Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 06/13] ARM: mvebu: add workaround for data abort issue on Armada 375 Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 07/13] ARM: mvebu: add Device Tree description of the Armada 375 SoC Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 08/13] ARM: mvebu: add Device Tree for the Armada 375 DB board Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 09/13] ARM: mvebu: add initial support for the Armada 380/385 SOCs Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 10/13] ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 11/13] ARM: mvebu: add Device Tree for the Armada 385 DB board Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 12/13] ARM: mvebu: update defconfigs for Armada 375 and 38x Thomas Petazzoni
2014-02-17 14:23 ` [PATCH v4 13/13] Documentation: arm: update Marvell documentation about Armada 375/38x Thomas Petazzoni
2014-02-17 23:20 ` [PATCH v4 00/13] Core support for Marvell Armada 375 and 38x Jason Cooper
2014-02-18 8:33 ` Thomas Petazzoni
2014-02-20 9:46 ` Thomas Petazzoni
2014-02-20 23:41 ` Jason Cooper
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.