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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Emilio Lopez <emilio@elopez.com.ar>,
	Dan Williams <dan.j.williams@intel.com>,
	Vinod Koul <vinod.koul@intel.com>,
	Mike Turquette <mturquette@linaro.org>,
	linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-sunxi@googlegroups.com
Subject: Re: [PATCH 4/5] DMA: sun6i: Add driver for the Allwinner A31 DMA controller
Date: Fri, 28 Feb 2014 15:33:11 +0200	[thread overview]
Message-ID: <1393594391.28803.79.camel@smile.fi.intel.com> (raw)
In-Reply-To: <20140228103614.GM607@lukather>

On Fri, 2014-02-28 at 11:36 +0100, Maxime Ripard wrote:
> Hi Andy,
> 
> On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
> > > +static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
> > > +{
> > > +	struct sun6i_dma_dev *sdev = (struct sun6i_dma_dev *)dev_id;
> > > +	struct sun6i_vchan *vchan;
> > > +	struct sun6i_pchan *pchan;
> > > +	int i, j, ret = 0;
> > > +	u32 status;
> > > +
> > > +	for (i = 0; i < 2; i++) {
> > > +		status = readl(sdev->base + DMA_IRQ_STAT(i));
> > > +		if (!status) {
> > > +			ret |= IRQ_NONE;
> > 
> > Maybe move this to definition block.
> > 
> > > +			continue;
> > > +		}
> > > +
> > > +		dev_dbg(sdev->slave.dev, "DMA irq status %s: 0x%x\n",
> > > +			i ? "high" : "low", status);
> > > +
> > > +		writel(status, sdev->base + DMA_IRQ_STAT(i));
> > > +
> > > +		for (j = 0; (j < 8) && status; j++) {
> > > +			if (status & DMA_IRQ_QUEUE) {
> > > +				pchan = sdev->pchans + j;
> > > +				vchan = pchan->vchan;
> > > +
> > > +				if (vchan) {
> > > +					unsigned long flags;
> > > +
> > > +					spin_lock_irqsave(&vchan->vc.lock,
> > > +							  flags);
> > > +					vchan_cookie_complete(&pchan->desc->vd);
> > > +					pchan->done = pchan->desc;
> > > +					spin_unlock_irqrestore(&vchan->vc.lock,
> > > +							       flags);
> > > +				}
> > > +			}
> > > +
> > > +			status = status >> 4;
> > > +		}
> > > +
> > > +		ret |= IRQ_HANDLED;
> > 
> > In case one is handled, another is not, what you have to do?
> 
> The interrupt status is split across two registers. In the case where
> one of the two register reports an interrupt, we still have to handle
> our interrupt, we actually did, so we have to return IRQ_HANDLED.

You removed the code below this assignment, but if I remember correctly
you check for exact value there.

In case of one is not handled and the other is handled you will have ret
= IRQ_HANDLED | IRQ_NONE. Thus, your following code will not be
executed. Is it by design?



-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy


WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
To: Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Emilio Lopez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
	Dan Williams
	<dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	Vinod Koul <vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	Mike Turquette
	<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 4/5] DMA: sun6i: Add driver for the Allwinner A31 DMA controller
Date: Fri, 28 Feb 2014 15:33:11 +0200	[thread overview]
Message-ID: <1393594391.28803.79.camel@smile.fi.intel.com> (raw)
In-Reply-To: <20140228103614.GM607@lukather>

On Fri, 2014-02-28 at 11:36 +0100, Maxime Ripard wrote:
> Hi Andy,
> 
> On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
> > > +static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
> > > +{
> > > +	struct sun6i_dma_dev *sdev = (struct sun6i_dma_dev *)dev_id;
> > > +	struct sun6i_vchan *vchan;
> > > +	struct sun6i_pchan *pchan;
> > > +	int i, j, ret = 0;
> > > +	u32 status;
> > > +
> > > +	for (i = 0; i < 2; i++) {
> > > +		status = readl(sdev->base + DMA_IRQ_STAT(i));
> > > +		if (!status) {
> > > +			ret |= IRQ_NONE;
> > 
> > Maybe move this to definition block.
> > 
> > > +			continue;
> > > +		}
> > > +
> > > +		dev_dbg(sdev->slave.dev, "DMA irq status %s: 0x%x\n",
> > > +			i ? "high" : "low", status);
> > > +
> > > +		writel(status, sdev->base + DMA_IRQ_STAT(i));
> > > +
> > > +		for (j = 0; (j < 8) && status; j++) {
> > > +			if (status & DMA_IRQ_QUEUE) {
> > > +				pchan = sdev->pchans + j;
> > > +				vchan = pchan->vchan;
> > > +
> > > +				if (vchan) {
> > > +					unsigned long flags;
> > > +
> > > +					spin_lock_irqsave(&vchan->vc.lock,
> > > +							  flags);
> > > +					vchan_cookie_complete(&pchan->desc->vd);
> > > +					pchan->done = pchan->desc;
> > > +					spin_unlock_irqrestore(&vchan->vc.lock,
> > > +							       flags);
> > > +				}
> > > +			}
> > > +
> > > +			status = status >> 4;
> > > +		}
> > > +
> > > +		ret |= IRQ_HANDLED;
> > 
> > In case one is handled, another is not, what you have to do?
> 
> The interrupt status is split across two registers. In the case where
> one of the two register reports an interrupt, we still have to handle
> our interrupt, we actually did, so we have to return IRQ_HANDLED.

You removed the code below this assignment, but if I remember correctly
you check for exact value there.

In case of one is not handled and the other is handled you will have ret
= IRQ_HANDLED | IRQ_NONE. Thus, your following code will not be
executed. Is it by design?



-- 
Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Intel Finland Oy

WARNING: multiple messages have this Message-ID (diff)
From: andriy.shevchenko@linux.intel.com (Andy Shevchenko)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/5] DMA: sun6i: Add driver for the Allwinner A31 DMA controller
Date: Fri, 28 Feb 2014 15:33:11 +0200	[thread overview]
Message-ID: <1393594391.28803.79.camel@smile.fi.intel.com> (raw)
In-Reply-To: <20140228103614.GM607@lukather>

On Fri, 2014-02-28 at 11:36 +0100, Maxime Ripard wrote:
> Hi Andy,
> 
> On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
> > > +static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
> > > +{
> > > +	struct sun6i_dma_dev *sdev = (struct sun6i_dma_dev *)dev_id;
> > > +	struct sun6i_vchan *vchan;
> > > +	struct sun6i_pchan *pchan;
> > > +	int i, j, ret = 0;
> > > +	u32 status;
> > > +
> > > +	for (i = 0; i < 2; i++) {
> > > +		status = readl(sdev->base + DMA_IRQ_STAT(i));
> > > +		if (!status) {
> > > +			ret |= IRQ_NONE;
> > 
> > Maybe move this to definition block.
> > 
> > > +			continue;
> > > +		}
> > > +
> > > +		dev_dbg(sdev->slave.dev, "DMA irq status %s: 0x%x\n",
> > > +			i ? "high" : "low", status);
> > > +
> > > +		writel(status, sdev->base + DMA_IRQ_STAT(i));
> > > +
> > > +		for (j = 0; (j < 8) && status; j++) {
> > > +			if (status & DMA_IRQ_QUEUE) {
> > > +				pchan = sdev->pchans + j;
> > > +				vchan = pchan->vchan;
> > > +
> > > +				if (vchan) {
> > > +					unsigned long flags;
> > > +
> > > +					spin_lock_irqsave(&vchan->vc.lock,
> > > +							  flags);
> > > +					vchan_cookie_complete(&pchan->desc->vd);
> > > +					pchan->done = pchan->desc;
> > > +					spin_unlock_irqrestore(&vchan->vc.lock,
> > > +							       flags);
> > > +				}
> > > +			}
> > > +
> > > +			status = status >> 4;
> > > +		}
> > > +
> > > +		ret |= IRQ_HANDLED;
> > 
> > In case one is handled, another is not, what you have to do?
> 
> The interrupt status is split across two registers. In the case where
> one of the two register reports an interrupt, we still have to handle
> our interrupt, we actually did, so we have to return IRQ_HANDLED.

You removed the code below this assignment, but if I remember correctly
you check for exact value there.

In case of one is not handled and the other is handled you will have ret
= IRQ_HANDLED | IRQ_NONE. Thus, your following code will not be
executed. Is it by design?



-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

  reply	other threads:[~2014-02-28 13:33 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-24 16:22 [PATCH 0/5] Add support for the Allwinner A31 DMA Controller Maxime Ripard
2014-02-24 16:22 ` Maxime Ripard
2014-02-24 16:22 ` Maxime Ripard
2014-02-24 16:22 ` [PATCH 1/5] clk: sun6i: Protect CPU clock Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:30   ` Russell King - ARM Linux
2014-02-24 16:30     ` Russell King - ARM Linux
2014-02-24 16:30     ` Russell King - ARM Linux
2014-02-24 23:38     ` Emilio López
2014-02-24 23:38       ` Emilio López
2014-02-24 23:38       ` Emilio López
2014-02-25  0:01       ` Russell King - ARM Linux
2014-02-25  0:01         ` Russell King - ARM Linux
2014-02-25  0:01         ` Russell King - ARM Linux
2014-02-25  0:30         ` Emilio López
2014-02-25  0:30           ` Emilio López
2014-02-25  0:30           ` Emilio López
2014-02-24 16:22 ` [PATCH 2/5] clk: sun6i: Reparent AHB clock on PLL6 Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:22 ` [PATCH 3/5] clk: sun6i: Protect SDRAM gating bit Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:22 ` [PATCH 4/5] DMA: sun6i: Add driver for the Allwinner A31 DMA controller Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-25 11:28   ` Andy Shevchenko
2014-02-25 11:28     ` Andy Shevchenko
2014-02-25 11:28     ` Andy Shevchenko
2014-02-28 10:36     ` Maxime Ripard
2014-02-28 10:36       ` Maxime Ripard
2014-02-28 10:36       ` Maxime Ripard
2014-02-28 13:33       ` Andy Shevchenko [this message]
2014-02-28 13:33         ` Andy Shevchenko
2014-02-28 13:33         ` Andy Shevchenko
2014-02-28 14:27         ` Maxime Ripard
2014-02-28 14:27           ` Maxime Ripard
2014-02-28 14:27           ` Maxime Ripard
2014-02-24 16:22 ` [PATCH 5/5] ARM: sun6i: dt: Add A31 DMA controller to DTSI Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard
2014-02-24 16:22   ` Maxime Ripard

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