[PATCH 1/4] ARM: clps711x: autcpu12: Fix incorrect NAND CLE GPIO

[PATCH 1/4] ARM: clps711x: autcpu12: Fix incorrect NAND CLE GPIO

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/mach-clps711x/board-autcpu12.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
index f8d71a8..5f83113 100644
--- a/arch/arm/mach-clps711x/board-autcpu12.c
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -73,7 +73,7 @@
 #define AUTCPU12_SMC_NCE	(AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */
 #define AUTCPU12_SMC_RDY	CLPS711X_GPIO(1, 2)
 #define AUTCPU12_SMC_ALE	CLPS711X_GPIO(1, 3)
-#define AUTCPU12_SMC_CLE	CLPS711X_GPIO(1, 3)
+#define AUTCPU12_SMC_CLE	CLPS711X_GPIO(1, 4)
 
 /* LCD contrast digital potentiometer */
 #define AUTCPU12_DPOT_CS	CLPS711X_GPIO(4, 0)
-- 
1.8.3.2

[PATCH 2/4] ARM: clps711x: Remove EP72XX_ROM_BOOT option

[Alexander Shiyan]

CLPS711X CPUs have 128 bytes of on-chip Boot ROM with an
instruction sequence that configure UART1 to receive up to
2 Kbytes of serial data which is then placed in the on-chip
SRAM. Once the download is complete, the program counter
jumps to SRAM to begin executed the downloaded data.
The purpose of this mode is to allow the downloaded code to
facilitate programming of FLASH or other ROM device. Selection
of the internal Boot ROM is accomplished at power-on-reset time.
No reason to keep this special (develop only) mode in the kernel.
This patch removes EP72XX_ROM_BOOT kernel symbol.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/mach-clps711x/Kconfig                 | 14 --------------
 arch/arm/mach-clps711x/include/mach/hardware.h | 17 -----------------
 2 files changed, 31 deletions(-)

diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index bea6295..f711498 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -33,20 +33,6 @@ config ARCH_P720T
 	  Say Y here if you intend to run this kernel on the ARM Prospector
 	  720T.
 
-config EP72XX_ROM_BOOT
-	bool "EP721x/EP731x ROM boot"
-	help
-	  If you say Y here, your CLPS711x-based kernel will use the bootstrap
-	  mode memory map instead of the normal memory map.
-
-	  Processors derived from the Cirrus CLPS711X core support two boot
-	  modes.  Normal mode boots from the external memory device at CS0.
-	  Bootstrap mode rearranges parts of the memory map, placing an
-	  internal 128 byte bootstrap ROM at CS0.  This option performs the
-	  address map changes required to support booting in this mode.
-
-	  You almost surely want to say N here.
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index c5a8ea6..5d6afda 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -38,13 +38,6 @@
 #define clps_writel(val,off)	writel(val, CLPS711X_VIRT_BASE + (off))
 #endif
 
-/*
- * The physical addresses that the external chip select signals map to is
- * dependent on the setting of the nMEDCHG signal on EP7211 and EP7212
- * processors.  CONFIG_EP72XX_BOOT_ROM is only available if these
- * processors are in use.
- */
-#ifndef CONFIG_EP72XX_ROM_BOOT
 #define CS0_PHYS_BASE		(0x00000000)
 #define CS1_PHYS_BASE		(0x10000000)
 #define CS2_PHYS_BASE		(0x20000000)
@@ -53,16 +46,6 @@
 #define CS5_PHYS_BASE		(0x50000000)
 #define CS6_PHYS_BASE		(0x60000000)
 #define CS7_PHYS_BASE		(0x70000000)
-#else
-#define CS0_PHYS_BASE		(0x70000000)
-#define CS1_PHYS_BASE		(0x60000000)
-#define CS2_PHYS_BASE		(0x50000000)
-#define CS3_PHYS_BASE		(0x40000000)
-#define CS4_PHYS_BASE		(0x30000000)
-#define CS5_PHYS_BASE		(0x20000000)
-#define CS6_PHYS_BASE		(0x10000000)
-#define CS7_PHYS_BASE		(0x00000000)
-#endif
 
 #define CLPS711X_SRAM_BASE	CS6_PHYS_BASE
 #define CLPS711X_SRAM_SIZE	(48 * 1024)
-- 
1.8.3.2

[PATCH 3/4] ARM: clps711x: Update defconfig

[Alexander Shiyan]

This updates the CLPS711X defconfig to the thing saved by savedefconfig.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/configs/clps711x_defconfig | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/configs/clps711x_defconfig b/arch/arm/configs/clps711x_defconfig
index 9e8c831..0facf9d 100644
--- a/arch/arm/configs/clps711x_defconfig
+++ b/arch/arm/configs/clps711x_defconfig
@@ -15,7 +15,6 @@ CONFIG_ARCH_CDB89712=y
 CONFIG_ARCH_CLEP7312=y
 CONFIG_ARCH_EDB7211=y
 CONFIG_ARCH_P720T=y
-CONFIG_ARCH_FORTUNET=y
 CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
@@ -27,7 +26,6 @@ CONFIG_INET=y
 # CONFIG_IPV6 is not set
 CONFIG_IRDA=y
 CONFIG_IRTTY_SIR=y
-CONFIG_EP7211_DONGLE=y
 # CONFIG_WIRELESS is not set
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
@@ -58,6 +56,7 @@ CONFIG_CS89x0_PLATFORM=y
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
+CONFIG_SERIAL_CLPS711X=y
 CONFIG_SERIAL_CLPS711X_CONSOLE=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
-- 
1.8.3.2

[PATCH 4/4] MAINTAINERS: ARM: clps711x: Use regex patterns to involve all CLPS711X drivers

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index b00770f..bfdbe94 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -816,7 +816,7 @@ ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE
 M:	Alexander Shiyan <shc_work@mail.ru>
 L:	linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
 S:	Odd Fixes
-F:	arch/arm/mach-clps711x/
+N:	clps711x
 
 ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE
 M:	Hartley Sweeten <hsweeten@visionengravers.com>
-- 
1.8.3.2

[PATCH 1/4] ARM: clps711x: autcpu12: Fix incorrect NAND CLE GPIO

[Arnd Bergmann]

On Saturday 15 February 2014, Alexander Shiyan wrote:
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>

The patches all look good to me. Please let us know whether we should apply
them directly of if you were just looking for a review. (it helps to put
that into the [PATCH 0/4] message).

	Arnd

[PATCH 1/4] ARM: clps711x: autcpu12: Fix incorrect NAND CLE GPIO

[Alexander Shiyan]

Hello.

On Tue, 18 Feb 2014 16:11:41 +0100
Arnd Bergmann <arnd@arndb.de> wrote:

> On Saturday 15 February 2014, Alexander Shiyan wrote:
> > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> 
> The patches all look good to me. Please let us know whether we should apply
> them directly of if you were just looking for a review. (it helps to put
> that into the [PATCH 0/4] message).

Before that, I tried to send an accompanying message to the arm at kernel.org,
but unfortunately my email is blocked for sending to this address.

While I expect to applying some other patches for this architecture, I do a
minor changes that do not have potential conflicts when applying one to
the other. Yes, please apply them, if it possible.

Thanks.

-- 
Alexander Shiyan <shc_work@mail.ru>

[PATCH 1/4] ARM: clps711x: autcpu12: Fix incorrect NAND CLE GPIO

[Arnd Bergmann]

On Tuesday 18 February 2014, Alexander Shiyan wrote:
> Before that, I tried to send an accompanying message to the arm at kernel.org,
> but unfortunately my email is blocked for sending to this address.
> 
> While I expect to applying some other patches for this architecture, I do a
> minor changes that do not have potential conflicts when applying one to
> the other. Yes, please apply them, if it possible.
> 

I've applied patches 2 and 3 in the next/cleanup branch now, and patches 1 and
4 as fixes-non-crictical.

I believe that is all you have sent at the moment, let me know if I have
missed other patches from you. Also make sure to always use the arm at kernel.org
alias when you actually want us to apply your patches, that way we can keep
track of it more easily.

	Arnd

Re: [PATCH 1/4] ARM: clps711x: autcpu12: Fix incorrect NAND CLE GPIO

[Alexander Shiyan]

???????, 28 ??????? 2014, 17:53 +01:00 ?? Arnd Bergmann <arnd@arndb.de>:
> On Tuesday 18 February 2014, Alexander Shiyan wrote:
> > Before that, I tried to send an accompanying message to the arm at kernel.org,
> > but unfortunately my email is blocked for sending to this address.
> > 
> > While I expect to applying some other patches for this architecture, I do a
> > minor changes that do not have potential conflicts when applying one to
> > the other. Yes, please apply them, if it possible.
> > 
> 
> I've applied patches 2 and 3 in the next/cleanup branch now, and patches 1 and
> 4 as fixes-non-crictical.
> 
> I believe that is all you have sent at the moment, let me know if I have
> missed other patches from you. Also make sure to always use the arm at kernel.org
> alias when you actually want us to apply your patches, that way we can keep
> track of it more easily.

No, it's all that was planned through arm-soc at this time.

Thanks.
---