* [PATCH net-next 0/6] r8152: support new chips
@ 2016-06-27 5:07 Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 1/6] r8152: add aldps_enable for rtl_ops Hayes Wang
` (7 more replies)
0 siblings, 8 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
In order to support new chips, adjust some codes. Then, add the settings
for the new chips.
Hayes Wang (6):
r8152: add aldps_enable for rtl_ops
r8152: add u1u2_enable for rtl_ops
r8152: add power_cut_en for rtl_ops
r8152: support the new chip 8050
r8152: support RTL8153B
r8152: add byte_enable for ocp_read_word function
drivers/net/usb/r8152.c | 621 ++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 576 insertions(+), 45 deletions(-)
--
2.4.11
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH net-next 1/6] r8152: add aldps_enable for rtl_ops
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
@ 2016-06-27 5:07 ` Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 2/6] r8152: add u1u2_enable " Hayes Wang
` (6 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add aldps_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 11178f9..b253003 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -619,6 +619,7 @@ struct r8152 {
int (*eee_get)(struct r8152 *, struct ethtool_eee *);
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
bool (*in_nway)(struct r8152 *);
+ void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
} rtl_ops;
@@ -2474,9 +2475,9 @@ static void r8152_aldps_en(struct r8152 *tp, bool enable)
static void rtl8152_disable(struct r8152 *tp)
{
- r8152_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
rtl_disable(tp);
- r8152_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static void r8152b_hw_phy_cfg(struct r8152 *tp)
@@ -2801,9 +2802,7 @@ static void r8153_aldps_en(struct r8152 *tp, bool enable)
static void rtl8153_disable(struct r8152 *tp)
{
- r8153_aldps_en(tp, false);
- rtl_disable(tp);
- r8153_aldps_en(tp, true);
+ rtl8152_disable(tp);
usb_enable_lpm(tp->udev);
}
@@ -2924,9 +2923,9 @@ static void rtl8153_up(struct r8152 *tp)
return;
r8153_u1u2en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
r8153_u2p3en(tp, true);
r8153_u1u2en(tp, true);
usb_enable_lpm(tp->udev);
@@ -2942,9 +2941,9 @@ static void rtl8153_down(struct r8152 *tp)
r8153_u1u2en(tp, false);
r8153_u2p3en(tp, false);
r8153_power_cut_en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static bool rtl8152_in_nway(struct r8152 *tp)
@@ -4142,6 +4141,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8152_get_eee;
ops->eee_set = r8152_set_eee;
ops->in_nway = rtl8152_in_nway;
+ ops->aldps_enable = r8152_aldps_en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
break;
@@ -4158,6 +4158,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8153_get_eee;
ops->eee_set = r8153_set_eee;
ops->in_nway = rtl8153_in_nway;
+ ops->aldps_enable = r8153_aldps_en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
break;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next 2/6] r8152: add u1u2_enable for rtl_ops
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 1/6] r8152: add aldps_enable for rtl_ops Hayes Wang
@ 2016-06-27 5:07 ` Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 3/6] r8152: add power_cut_en " Hayes Wang
` (5 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add u1u2_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index b253003..f51d799 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -620,6 +620,7 @@ struct r8152 {
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
bool (*in_nway)(struct r8152 *);
void (*aldps_enable)(struct r8152 *tp, bool enable);
+ void (*u1u2_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
} rtl_ops;
@@ -2408,7 +2409,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
if (enable) {
u32 ocp_data;
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
__rtl_set_wol(tp, WAKE_ANY);
@@ -2423,7 +2424,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
} else {
__rtl_set_wol(tp, tp->saved_wolopts);
r8153_u2p3en(tp, true);
- r8153_u1u2en(tp, true);
+ tp->rtl_ops.u1u2_enable(tp, true);
}
}
@@ -2922,12 +2923,12 @@ static void rtl8153_up(struct r8152 *tp)
if (test_bit(RTL8152_UNPLUG, &tp->flags))
return;
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
tp->rtl_ops.aldps_enable(tp, true);
r8153_u2p3en(tp, true);
- r8153_u1u2en(tp, true);
+ tp->rtl_ops.u1u2_enable(tp, true);
usb_enable_lpm(tp->udev);
}
@@ -2938,7 +2939,7 @@ static void rtl8153_down(struct r8152 *tp)
return;
}
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
r8153_power_cut_en(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
@@ -4142,6 +4143,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_set = r8152_set_eee;
ops->in_nway = rtl8152_in_nway;
ops->aldps_enable = r8152_aldps_en;
+ ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
break;
@@ -4159,6 +4161,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_set = r8153_set_eee;
ops->in_nway = rtl8153_in_nway;
ops->aldps_enable = r8153_aldps_en;
+ ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
break;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next 3/6] r8152: add power_cut_en for rtl_ops
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 1/6] r8152: add aldps_enable for rtl_ops Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 2/6] r8152: add u1u2_enable " Hayes Wang
@ 2016-06-27 5:07 ` Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 4/6] r8152: support the new chip 8050 Hayes Wang
` (4 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add power_cut_en() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index f51d799..a4f8a01 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -622,6 +622,7 @@ struct r8152 {
void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*u1u2_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
+ void (*power_cut_en)(struct r8152 *tp, bool enable);
} rtl_ops;
int intr_interval;
@@ -2391,6 +2392,13 @@ static void r8153_power_cut_en(struct r8152 *tp, bool enable)
else
ocp_data &= ~(PWR_EN | PHASE2_EN);
ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+}
+
+static void r8153A_power_cut_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ r8153_power_cut_en(tp, enable);
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
ocp_data &= ~PCUT_STATUS;
@@ -2941,7 +2949,7 @@ static void rtl8153_down(struct r8152 *tp)
tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
- r8153_power_cut_en(tp, false);
+ tp->rtl_ops.power_cut_en(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
tp->rtl_ops.aldps_enable(tp, true);
@@ -3397,7 +3405,7 @@ static void r8153_init(struct r8152 *tp)
ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
- r8153_power_cut_en(tp, false);
+ r8153A_power_cut_en(tp, false);
r8153_u1u2en(tp, true);
ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
@@ -4122,7 +4130,7 @@ static void rtl8153_unload(struct r8152 *tp)
if (test_bit(RTL8152_UNPLUG, &tp->flags))
return;
- r8153_power_cut_en(tp, false);
+ tp->rtl_ops.power_cut_en(tp, false);
}
static int rtl_ops_init(struct r8152 *tp)
@@ -4145,6 +4153,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->aldps_enable = r8152_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
+ ops->power_cut_en = r8152_power_cut_en;
break;
case RTL_VER_03:
@@ -4163,6 +4172,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->aldps_enable = r8153_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
+ ops->power_cut_en = r8153A_power_cut_en;
break;
default:
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next 4/6] r8152: support the new chip 8050
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
` (2 preceding siblings ...)
2016-06-27 5:07 ` [PATCH net-next 3/6] r8152: add power_cut_en " Hayes Wang
@ 2016-06-27 5:07 ` Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 5/6] r8152: support RTL8153B Hayes Wang
` (3 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Support a new chip which has the product ID 0x8050.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index a4f8a01..3ccbff0 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -646,6 +646,7 @@ enum rtl_version {
RTL_VER_04,
RTL_VER_05,
RTL_VER_06,
+ RTL_VER_07,
RTL_VER_MAX
};
@@ -3920,6 +3921,7 @@ static int rtl8152_get_coalesce(struct net_device *netdev,
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return -EOPNOTSUPP;
default:
break;
@@ -3939,6 +3941,7 @@ static int rtl8152_set_coalesce(struct net_device *netdev,
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return -EOPNOTSUPP;
default:
break;
@@ -4038,6 +4041,7 @@ static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return eth_change_mtu(dev, new_mtu);
default:
break;
@@ -4109,6 +4113,9 @@ static void r8152b_get_version(struct r8152 *tp)
tp->version = RTL_VER_06;
tp->mii.supports_gmii = 1;
break;
+ case 0x4800:
+ tp->version = RTL_VER_07;
+ break;
default:
netif_info(tp, probe, tp->netdev,
"Unknown version 0x%04x\n", version);
@@ -4141,6 +4148,7 @@ static int rtl_ops_init(struct r8152 *tp)
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
ops->init = r8152b_init;
ops->enable = rtl8152_enable;
ops->disable = rtl8152_disable;
@@ -4336,6 +4344,7 @@ static void rtl8152_disconnect(struct usb_interface *intf)
/* table of devices that work with this driver */
static struct usb_device_id rtl8152_table[] = {
+ {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8050)},
{REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
{REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
{REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next 5/6] r8152: support RTL8153B
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
` (3 preceding siblings ...)
2016-06-27 5:07 ` [PATCH net-next 4/6] r8152: support the new chip 8050 Hayes Wang
@ 2016-06-27 5:07 ` Hayes Wang
2016-06-27 5:07 ` Hayes Wang
` (2 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Support new chip RTL8153B.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 560 +++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 533 insertions(+), 27 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 3ccbff0..2fd4944 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -28,7 +28,7 @@
#include <linux/suspend.h>
/* Information for net-next */
-#define NETNEXT_VERSION "08"
+#define NETNEXT_VERSION "09"
/* Information for net */
#define NET_VERSION "3"
@@ -50,11 +50,14 @@
#define PLA_FMC 0xc0b4
#define PLA_CFG_WOL 0xc0b6
#define PLA_TEREDO_CFG 0xc0bc
+#define PLA_TEREDO_WAKE_BASE 0xc0c4
#define PLA_MAR 0xcd00
#define PLA_BACKUP 0xd000
#define PAL_BDC_CR 0xd1a0
#define PLA_TEREDO_TIMER 0xd2cc
#define PLA_REALWOW_TIMER 0xd2e8
+#define PLA_EFUSE_DATA 0xdd00
+#define PLA_EFUSE_CMD 0xdd02
#define PLA_LEDSEL 0xdd90
#define PLA_LED_FEATURE 0xdd92
#define PLA_PHYAR 0xde00
@@ -104,7 +107,9 @@
#define USB_CSR_DUMMY2 0xb466
#define USB_DEV_STAT 0xb808
#define USB_CONNECT_TIMER 0xcbf8
+#define USB_MSC_TIMER 0xcbfc
#define USB_BURST_SIZE 0xcfc0
+#define USB_LPM_CONFIG 0xcfd8
#define USB_USB_CTRL 0xd406
#define USB_PHY_CTRL 0xd408
#define USB_TX_AGG 0xd40a
@@ -112,14 +117,19 @@
#define USB_USB_TIMER 0xd428
#define USB_RX_EARLY_TIMEOUT 0xd42c
#define USB_RX_EARLY_SIZE 0xd42e
-#define USB_PM_CTRL_STATUS 0xd432
+#define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
+#define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
#define USB_TX_DMA 0xd434
+#define USB_UPT_RXDMA_OWN 0xd437
#define USB_TOLERANCE 0xd490
#define USB_LPM_CTRL 0xd41a
+#define USB_U1U2_TIMER 0xd4da
#define USB_UPS_CTRL 0xd800
#define USB_MISC_0 0xd81a
#define USB_POWER_CUT 0xd80a
#define USB_AFE_CTRL2 0xd824
+#define USB_UPS_CFG 0xd842
+#define USB_UPS_FLAGS 0xd848
#define USB_WDT11_CTRL 0xe43c
#define USB_BP_BA 0xfc26
#define USB_BP_0 0xfc28
@@ -141,6 +151,7 @@
#define OCP_EEE_AR 0xa41a
#define OCP_EEE_DATA 0xa41c
#define OCP_PHY_STATUS 0xa420
+#define OCP_NCTL_CFG 0xa42c
#define OCP_POWER_CFG 0xa430
#define OCP_EEE_CFG 0xa432
#define OCP_SRAM_ADDR 0xa436
@@ -150,9 +161,14 @@
#define OCP_EEE_ADV 0xa5d0
#define OCP_EEE_LPABLE 0xa5d2
#define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
+#define OCP_PHY_PATCH_STAT 0xb800
+#define OCP_PHY_PATCH_CMD 0xb820
+#define OCP_ADC_IOFFSET 0xbcfc
#define OCP_ADC_CFG 0xbc06
+#define OCP_SYSCLK_CFG 0xc416
/* SRAM Register */
+#define SRAM_GREEN_CFG 0x8011
#define SRAM_LPF_CFG 0x8012
#define SRAM_10M_AMP1 0x8080
#define SRAM_10M_AMP2 0x8082
@@ -250,6 +266,10 @@
/* PAL_BDC_CR */
#define ALDPS_PROXY_MODE 0x0001
+/* PLA_EFUSE_CMD */
+#define EFUSE_READ_CMD BIT(15)
+#define EFUSE_DATA_BIT16 BIT(7)
+
/* PLA_CONFIG34 */
#define LINK_ON_WAKE_EN 0x0010
#define LINK_OFF_WAKE_EN 0x0008
@@ -275,6 +295,7 @@
/* PLA_MAC_PWR_CTRL2 */
#define EEE_SPDWN_RATIO 0x8007
+#define MAC_CLK_SPDWN_EN BIT(15)
/* PLA_MAC_PWR_CTRL3 */
#define PKT_AVAIL_SPDWN_EN 0x0100
@@ -326,6 +347,9 @@
#define STAT_SPEED_HIGH 0x0000
#define STAT_SPEED_FULL 0x0002
+/* USB_LPM_CONFIG */
+#define LPM_U1U2_EN BIT(0)
+
/* USB_TX_AGG */
#define TX_AGG_MAX_THRESHOLD 0x03
@@ -333,11 +357,16 @@
#define RX_THR_SUPPER 0x0c350180
#define RX_THR_HIGH 0x7a120180
#define RX_THR_SLOW 0xffff0180
+#define RX_THR_B 0x00010001
/* USB_TX_DMA */
#define TEST_MODE_DISABLE 0x00000001
#define TX_SIZE_ADJUST1 0x00000100
+/* USB_UPT_RXDMA_OWN */
+#define OWN_UPDATE BIT(0)
+#define OWN_CLEAR BIT(1)
+
/* USB_UPS_CTRL */
#define POWER_CUT 0x0100
@@ -354,6 +383,8 @@
/* USB_POWER_CUT */
#define PWR_EN 0x0001
#define PHASE2_EN 0x0008
+#define UPS_EN BIT(4)
+#define USP_PREWAKE BIT(5)
/* USB_MISC_0 */
#define PCUT_STATUS 0x0001
@@ -380,6 +411,37 @@
#define SEN_VAL_NORMAL 0xa000
#define SEL_RXIDLE 0x0100
+/* USB_UPS_CFG */
+#define SAW_CNT_1MS_MASK 0x0fff
+
+/* USB_UPS_FLAGS */
+#define UPS_FLAGS_R_TUNE BIT(0)
+#define UPS_FLAGS_EN_10M_CKDIV BIT(1)
+#define UPS_FLAGS_250M_CKDIV BIT(2)
+#define UPS_FLAGS_EN_ALDPS BIT(3)
+#define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
+#define UPS_FLAGS_SPEED_MASK (0xf << 16)
+#define ups_flags_speed(x) ((x) << 16)
+#define UPS_FLAGS_EN_EEE BIT(20)
+#define UPS_FLAGS_EN_500M_EEE BIT(21)
+#define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
+#define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
+#define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
+#define UPS_FLAGS_EN_GREEN BIT(26)
+#define UPS_FLAGS_EN_FLOW_CTR BIT(27)
+
+enum spd_duplex {
+ NWAY_10M_HALF = 1,
+ NWAY_10M_FULL,
+ NWAY_100M_HALF,
+ NWAY_100M_FULL,
+ NWAY_1000M_FULL,
+ FORCE_10M_HALF,
+ FORCE_10M_FULL,
+ FORCE_100M_HALF,
+ FORCE_100M_FULL,
+};
+
/* OCP_ALDPS_CONFIG */
#define ENPWRSAVE 0x8000
#define ENPDNPS 0x0200
@@ -391,6 +453,9 @@
#define PHY_STAT_LAN_ON 3
#define PHY_STAT_PWRDN 5
+/* OCP_NCTL_CFG */
+#define PGA_RETURN_EN BIT(1)
+
/* OCP_POWER_CFG */
#define EEE_CLKDIV_EN 0x8000
#define EN_ALDPS 0x0004
@@ -432,17 +497,34 @@
#define EEE10_EN 0x0010
/* OCP_DOWN_SPEED */
+#define EN_EEE_CMODE BIT(14)
+#define EN_EEE_1000 BIT(13)
+#define EN_EEE_100 BIT(12)
+#define EN_10M_CLKDIV BIT(11)
#define EN_10M_BGOFF 0x0080
/* OCP_PHY_STATE */
#define TXDIS_STATE 0x01
#define ABD_STATE 0x02
+/* OCP_PHY_PATCH_STAT */
+#define PATCH_READY BIT(6)
+
+/* OCP_PHY_PATCH_CMD */
+#define PATCH_REQUEST BIT(4)
+
/* OCP_ADC_CFG */
#define CKADSEL_L 0x0100
#define ADC_EN 0x0080
#define EN_EMI_L 0x0040
+/* OCP_SYSCLK_CFG */
+#define CLK_DIV_EXPO(x) (min(x, 5) << 8)
+
+/* SRAM_GREEN_CFG */
+#define GREEN_ETH_EN BIT(15)
+#define R_TUNE_EN BIT(11)
+
/* SRAM_LPF_CFG */
#define LPF_AUTO_TUNE 0x8000
@@ -647,6 +729,8 @@ enum rtl_version {
RTL_VER_05,
RTL_VER_06,
RTL_VER_07,
+ RTL_VER_08,
+ RTL_VER_09,
RTL_VER_MAX
};
@@ -977,6 +1061,12 @@ static void sram_write(struct r8152 *tp, u16 addr, u16 data)
ocp_reg_write(tp, OCP_SRAM_DATA, data);
}
+static u16 sram_read(struct r8152 *tp, u16 addr)
+{
+ ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
+ return ocp_reg_read(tp, OCP_SRAM_DATA);
+}
+
static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
{
struct r8152 *tp = netdev_priv(netdev);
@@ -2167,11 +2257,40 @@ static int rtl8152_enable(struct r8152 *tp)
return rtl_enable(tp);
}
+static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp)
+{
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN,
+ OWN_UPDATE | OWN_CLEAR);
+}
+
static void r8153_set_rx_early_timeout(struct r8152 *tp)
{
u32 ocp_data = tp->coalesce / 8;
- ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
+ * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
+ */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ 128 / 8);
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
+ ocp_data);
+ r8153b_rx_agg_chg_indicate(tp);
+ break;
+
+ default:
+ break;
+ }
}
static void r8153_set_rx_early_size(struct r8152 *tp)
@@ -2180,6 +2299,15 @@ static void r8153_set_rx_early_size(struct r8152 *tp)
u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
+
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8153b_rx_agg_chg_indicate(tp);
+ break;
+ default:
+ break;
+ }
}
static int rtl8153_enable(struct r8152 *tp)
@@ -2371,6 +2499,19 @@ static void r8153_u1u2en(struct r8152 *tp, bool enable)
usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
}
+static void r8153b_u1u2en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
+ if (enable)
+ ocp_data |= LPM_U1U2_EN;
+ else
+ ocp_data &= ~LPM_U1U2_EN;
+
+ ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
+}
+
static void r8153_u2p3en(struct r8152 *tp, bool enable)
{
u32 ocp_data;
@@ -2383,15 +2524,52 @@ static void r8153_u2p3en(struct r8152 *tp, bool enable)
ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
}
+static void r8153b_ups_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ break;
+
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ default:
+ return;
+ }
+
+ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT);
+ if (enable) {
+ tp->rtl_ops.power_cut_en(tp, false);
+ ocp_data |= UPS_EN;
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+ } else {
+ ocp_data &= ~UPS_EN;
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
+ ocp_data &= ~PCUT_STATUS;
+ ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
+ }
+}
+
static void r8153_power_cut_en(struct r8152 *tp, bool enable)
{
u32 ocp_data;
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
- if (enable)
+ if (enable) {
+ r8153b_ups_en(tp, false);
ocp_data |= PWR_EN | PHASE2_EN;
- else
+ } else {
ocp_data &= ~(PWR_EN | PHASE2_EN);
+ }
ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
}
@@ -2430,7 +2608,10 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
+
+ r8153b_ups_en(tp, true);
} else {
+ r8153b_ups_en(tp, false);
__rtl_set_wol(tp, tp->saved_wolopts);
r8153_u2p3en(tp, true);
tp->rtl_ops.u1u2_enable(tp, true);
@@ -2462,9 +2643,31 @@ static void r8153_teredo_off(struct r8152 *tp)
{
u32 ocp_data;
- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
- ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
- ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
+ ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK |
+ OOB_TEREDO_EN);
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* The bit 0 ~ 7 are relative with teredo settings. They are
+ * W1C (write 1 to clear), so set all 1 to disable it.
+ */
+ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, 0xff);
+ break;
+
+ default:
+ break;
+ }
ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
@@ -2632,6 +2835,33 @@ static void r8152b_enter_oob(struct r8152 *tp)
ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
}
+static int r8153_patch_request(struct r8152 *tp, bool request)
+{
+ u16 data;
+ int i;
+
+ data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD);
+ if (request)
+ data |= PATCH_REQUEST;
+ else
+ data &= ~PATCH_REQUEST;
+ ocp_reg_write(tp, OCP_PHY_PATCH_CMD, data);
+
+ for (i = 0; request && i < 5000; i++) {
+ usleep_range(1000, 2000);
+ if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)
+ break;
+ }
+
+ if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {
+ netif_err(tp, drv, tp->netdev, "patch request fail\n");
+ r8153_patch_request(tp, false);
+ return -ETIME;
+ } else {
+ return 0;
+ }
+}
+
static void r8153_hw_phy_cfg(struct r8152 *tp)
{
u32 ocp_data;
@@ -2679,6 +2909,101 @@ static void r8153_hw_phy_cfg(struct r8152 *tp)
set_bit(PHY_RESET, &tp->flags);
}
+static void r8153b_ups_flags_w0w1(struct r8152 *tp, u32 set, u32 clear)
+{
+ u32 ocp_data;
+
+ ocp_data = ocp_read_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS);
+ ocp_data &= ~clear;
+ ocp_data |= set;
+ ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ocp_data);
+}
+
+static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
+{
+ u32 ocp_data;
+
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD, EFUSE_READ_CMD | addr);
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
+ ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
+ ocp_data |= ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
+
+ return ocp_data;
+}
+
+static void r8153b_hw_phy_cfg(struct r8152 *tp)
+{
+ u32 ocp_data, ups_flags = 0;
+ u16 data;
+
+ data = r8152_mdio_read(tp, MII_BMCR);
+ if (data & BMCR_PDOWN) {
+ data &= ~BMCR_PDOWN;
+ r8152_mdio_write(tp, MII_BMCR, data);
+ }
+
+ data = sram_read(tp, SRAM_GREEN_CFG);
+ data |= GREEN_ETH_EN | R_TUNE_EN;
+ sram_write(tp, SRAM_GREEN_CFG, data);
+ data = ocp_reg_read(tp, OCP_NCTL_CFG);
+ data |= PGA_RETURN_EN;
+ ocp_reg_write(tp, OCP_NCTL_CFG, data);
+ ups_flags |= UPS_FLAGS_EN_GREEN | UPS_FLAGS_R_TUNE;
+
+ /* ADC Bias Calibration:
+ * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
+ * bit (bit3) to rebuild the real 16-bit data. Write the data to the
+ * ADC ioffset.
+ */
+ ocp_data = r8152_efuse_read(tp, 0x7d);
+ data = (u16)(((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7));
+ if (data != 0xffff)
+ ocp_reg_write(tp, OCP_ADC_IOFFSET, data);
+
+ /* ups mode tx-link-pulse timing adjustment:
+ * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
+ * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
+ */
+ ocp_data = ocp_reg_read(tp, 0xc426);
+ ocp_data &= 0x3fff;
+ if (ocp_data) {
+ u32 swr_cnt_1ms_ini;
+
+ swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
+ ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
+ ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
+ }
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
+ ocp_data |= PFM_PWM_SWITCH;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
+
+ /* Advnace EEE */
+ if (!r8153_patch_request(tp, true)) {
+ data = ocp_reg_read(tp, OCP_POWER_CFG);
+ data |= EEE_CLKDIV_EN;
+ ocp_reg_write(tp, OCP_POWER_CFG, data);
+
+ data = ocp_reg_read(tp, OCP_DOWN_SPEED);
+ data |= EN_EEE_CMODE | EN_EEE_1000 | EN_EEE_100 | EN_10M_CLKDIV;
+ ocp_reg_write(tp, OCP_DOWN_SPEED, data);
+
+ ocp_reg_write(tp, OCP_SYSCLK_CFG, 0);
+ ocp_reg_write(tp, OCP_SYSCLK_CFG, CLK_DIV_EXPO(5));
+
+ ups_flags |= UPS_FLAGS_EN_10M_CKDIV | UPS_FLAGS_250M_CKDIV |
+ UPS_FLAGS_EN_EEE_CKDIV | UPS_FLAGS_EEE_CMOD_LV_EN |
+ UPS_FLAGS_EEE_PLLOFF_GIGA;
+
+ r8153_patch_request(tp, false);
+ }
+
+ r8153b_ups_flags_w0w1(tp, ups_flags, 0);
+
+ set_bit(PHY_RESET, &tp->flags);
+}
+
static void r8153_first_init(struct r8152 *tp)
{
u32 ocp_data;
@@ -2737,6 +3062,16 @@ static void r8153_first_init(struct r8152 *tp)
/* TX share fifo free credit full threshold */
ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_B);
+ break;
+
+ default:
+ break;
+ }
+
/* rx aggregation */
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
@@ -2774,9 +3109,28 @@ static void r8153_enter_oob(struct r8152 *tp)
ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
- ocp_data &= ~TEREDO_WAKE_MASK;
- ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
+ ocp_data &= ~TEREDO_WAKE_MASK;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* Clear teredo wake event. bit[15:8] is the teredo wakeup
+ * type. Set it to zero. bits[7:0] are the W1C bits about
+ * the events. Set them to all 1 to clear them.
+ */
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_WAKE_BASE, 0x00ff);
+ break;
+
+ default:
+ break;
+ }
rtl_rx_vlan_en(tp, true);
@@ -2810,6 +3164,16 @@ static void r8153_aldps_en(struct r8152 *tp, bool enable)
}
}
+static void r8153b_aldps_en(struct r8152 *tp, bool enable)
+{
+ r8153_aldps_en(tp, enable);
+
+ if (enable)
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_ALDPS, 0);
+ else
+ r8153b_ups_flags_w0w1(tp, 0, UPS_FLAGS_EN_ALDPS);
+}
+
static void rtl8153_disable(struct r8152 *tp)
{
rtl8152_disable(tp);
@@ -2819,6 +3183,7 @@ static void rtl8153_disable(struct r8152 *tp)
static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
{
u16 bmcr, anar, gbcr;
+ enum spd_duplex speed_duplex;
int ret = 0;
cancel_delayed_work_sync(&tp->schedule);
@@ -2836,32 +3201,43 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
if (speed == SPEED_10) {
bmcr = 0;
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ speed_duplex = FORCE_10M_HALF;
} else if (speed == SPEED_100) {
bmcr = BMCR_SPEED100;
anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ speed_duplex = FORCE_100M_HALF;
} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
bmcr = BMCR_SPEED1000;
gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+ speed_duplex = NWAY_1000M_FULL;
} else {
ret = -EINVAL;
goto out;
}
- if (duplex == DUPLEX_FULL)
+ if (duplex == DUPLEX_FULL) {
bmcr |= BMCR_FULLDPLX;
+ if (speed != SPEED_1000)
+ speed_duplex++;
+ }
} else {
if (speed == SPEED_10) {
- if (duplex == DUPLEX_FULL)
+ if (duplex == DUPLEX_FULL) {
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
- else
+ speed_duplex = NWAY_10M_FULL;
+ } else {
anar |= ADVERTISE_10HALF;
+ speed_duplex = NWAY_10M_HALF;
+ }
} else if (speed == SPEED_100) {
if (duplex == DUPLEX_FULL) {
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ speed_duplex = NWAY_100M_FULL;
} else {
anar |= ADVERTISE_10HALF;
anar |= ADVERTISE_100HALF;
+ speed_duplex = NWAY_100M_HALF;
}
} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
if (duplex == DUPLEX_FULL) {
@@ -2873,6 +3249,7 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
anar |= ADVERTISE_100HALF;
gbcr |= ADVERTISE_1000HALF;
}
+ speed_duplex = NWAY_1000M_FULL;
} else {
ret = -EINVAL;
goto out;
@@ -2890,6 +3267,23 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
r8152_mdio_write(tp, MII_ADVERTISE, anar);
r8152_mdio_write(tp, MII_BMCR, bmcr);
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8153b_ups_flags_w0w1(tp, ups_flags_speed(speed_duplex),
+ UPS_FLAGS_SPEED_MASK);
+ break;
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ default:
+ break;
+ }
+
if (bmcr & BMCR_RESET) {
int i;
@@ -3260,12 +3654,28 @@ static void r8153_eee_en(struct r8152 *tp, bool enable)
ocp_reg_write(tp, OCP_EEE_CFG, config);
}
+static void r8153b_eee_en(struct r8152 *tp, bool enable)
+{
+ r8153_eee_en(tp, enable);
+
+ if (enable)
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_EEE, 0);
+ else
+ r8153b_ups_flags_w0w1(tp, 0, UPS_FLAGS_EN_EEE);
+}
+
static void r8153_enable_eee(struct r8152 *tp)
{
r8153_eee_en(tp, true);
ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
}
+static void r8153b_enable_eee(struct r8152 *tp)
+{
+ r8153b_eee_en(tp, true);
+ ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
+}
+
static void r8152b_enable_fc(struct r8152 *tp)
{
u16 anar;
@@ -3275,6 +3685,12 @@ static void r8152b_enable_fc(struct r8152 *tp)
r8152_mdio_write(tp, MII_ADVERTISE, anar);
}
+static void r8153b_enable_fc(struct r8152 *tp)
+{
+ r8152b_enable_fc(tp);
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_FLOW_CTR, 0);
+}
+
static void rtl_tally_reset(struct r8152 *tp)
{
u32 ocp_data;
@@ -3424,6 +3840,70 @@ static void r8153_init(struct r8152 *tp)
r8152b_enable_fc(tp);
rtl_tally_reset(tp);
r8153_u2p3en(tp, true);
+
+ switch (tp->udev->speed) {
+ case USB_SPEED_SUPER:
+ case USB_SPEED_SUPER_PLUS:
+ tp->coalesce = COALESCE_SUPER;
+ break;
+ case USB_SPEED_HIGH:
+ tp->coalesce = COALESCE_HIGH;
+ break;
+ default:
+ tp->coalesce = COALESCE_SLOW;
+ break;
+ }
+}
+
+static void r8153b_init(struct r8152 *tp)
+{
+ u32 ocp_data;
+ int i;
+
+ if (test_bit(RTL8152_UNPLUG, &tp->flags))
+ return;
+
+ r8153b_aldps_en(tp, false);
+ r8153b_u1u2en(tp, false);
+
+ for (i = 0; i < 500; i++) {
+ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
+ AUTOLOAD_DONE)
+ break;
+ msleep(20);
+ }
+
+ for (i = 0; i < 500; i++) {
+ ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
+ if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
+ break;
+ msleep(20);
+ }
+
+ r8153_u2p3en(tp, false);
+
+ /* MSC timer = 0xfff * 8ms = 32760 ms */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
+
+ /* U1/U2/L1 idle timer. 500 us */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
+
+ r8153_power_cut_en(tp, false);
+ r8153b_ups_en(tp, false);
+ r8153b_u1u2en(tp, true);
+
+ /* MAC clock speed down */
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
+ ocp_data |= MAC_CLK_SPDWN_EN;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
+
+ r8153b_enable_eee(tp);
+ r8153b_aldps_en(tp, true);
+ r8153b_enable_fc(tp);
+ rtl_tally_reset(tp);
+ r8153_u2p3en(tp, true);
+
+ tp->coalesce = 15000; /* 15 us */
}
static int rtl8152_pre_reset(struct usb_interface *intf)
@@ -3846,6 +4326,20 @@ static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
return 0;
}
+static int r8153b_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
+{
+ u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
+
+ r8153b_eee_en(tp, eee->eee_enabled);
+
+ if (!eee->eee_enabled)
+ val = 0;
+
+ ocp_reg_write(tp, OCP_EEE_ADV, val);
+
+ return 0;
+}
+
static int
rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
{
@@ -4116,6 +4610,14 @@ static void r8152b_get_version(struct r8152 *tp)
case 0x4800:
tp->version = RTL_VER_07;
break;
+ case 0x6000:
+ tp->version = RTL_VER_08;
+ tp->mii.supports_gmii = 1;
+ break;
+ case 0x6010:
+ tp->version = RTL_VER_09;
+ tp->mii.supports_gmii = 1;
+ break;
default:
netif_info(tp, probe, tp->netdev,
"Unknown version 0x%04x\n", version);
@@ -4183,6 +4685,23 @@ static int rtl_ops_init(struct r8152 *tp)
ops->power_cut_en = r8153A_power_cut_en;
break;
+ case RTL_VER_08:
+ case RTL_VER_09:
+ ops->init = r8153b_init;
+ ops->enable = rtl8153_enable;
+ ops->disable = rtl8153_disable;
+ ops->up = rtl8153_up;
+ ops->down = rtl8153_down;
+ ops->unload = rtl8153_unload;
+ ops->eee_get = r8153_get_eee;
+ ops->eee_set = r8153b_set_eee;
+ ops->in_nway = rtl8153_in_nway;
+ ops->aldps_enable = r8153b_aldps_en;
+ ops->u1u2_enable = r8153b_u1u2en;
+ ops->hw_phy_cfg = r8153b_hw_phy_cfg;
+ ops->power_cut_en = r8153_power_cut_en;
+ break;
+
default:
ret = -ENODEV;
netif_err(tp, probe, tp->netdev, "Unknown Device\n");
@@ -4254,19 +4773,6 @@ static int rtl8152_probe(struct usb_interface *intf,
tp->mii.reg_num_mask = 0x1f;
tp->mii.phy_id = R8152_PHY_ID;
- switch (udev->speed) {
- case USB_SPEED_SUPER:
- case USB_SPEED_SUPER_PLUS:
- tp->coalesce = COALESCE_SUPER;
- break;
- case USB_SPEED_HIGH:
- tp->coalesce = COALESCE_HIGH;
- break;
- default:
- tp->coalesce = COALESCE_SLOW;
- break;
- }
-
tp->autoneg = AUTONEG_ENABLE;
tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
tp->duplex = DUPLEX_FULL;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next 6/6] r8152: add byte_enable for ocp_read_word function
@ 2016-06-27 5:07 ` Hayes Wang
0 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add byte_enable for ocp_read_word() to replace reading 4 bytes data
with reading the desired 2 bytes data.
This is used to avoid the issue which is described in commit:b4d99def.
The origin method always reads 4 bytes data, and it may have problem
when reading the PHY regiters.
The new method is supported since RTL8152B, but it doesn't influence
the previous chips. The bits of the byte_enable for the previous chips
are the reserved bits, and the hw would ignore them.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 2fd4944..0bb7c1b 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -945,11 +945,13 @@ static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
{
u32 data;
__le32 tmp;
+ u16 byen = BYTE_EN_WORD;
u8 shift = index & 2;
index &= ~3;
+ byen <<= shift;
- generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
+ generic_ocp_read(tp, index, sizeof(tmp), &tmp, type | byen);
data = __le32_to_cpu(tmp);
data >>= (shift * 8);
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next 6/6] r8152: add byte_enable for ocp_read_word function
@ 2016-06-27 5:07 ` Hayes Wang
0 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-27 5:07 UTC (permalink / raw)
To: netdev-u79uwXL29TY76Z2rM5mHXA
Cc: nic_swsd-Rasf1IRRPZFBDgjK7y7TUQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA, Hayes Wang
Add byte_enable for ocp_read_word() to replace reading 4 bytes data
with reading the desired 2 bytes data.
This is used to avoid the issue which is described in commit:b4d99def.
The origin method always reads 4 bytes data, and it may have problem
when reading the PHY regiters.
The new method is supported since RTL8152B, but it doesn't influence
the previous chips. The bits of the byte_enable for the previous chips
are the reserved bits, and the hw would ignore them.
Signed-off-by: Hayes Wang <hayeswang-Rasf1IRRPZFBDgjK7y7TUQ@public.gmane.org>
---
drivers/net/usb/r8152.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 2fd4944..0bb7c1b 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -945,11 +945,13 @@ static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
{
u32 data;
__le32 tmp;
+ u16 byen = BYTE_EN_WORD;
u8 shift = index & 2;
index &= ~3;
+ byen <<= shift;
- generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
+ generic_ocp_read(tp, index, sizeof(tmp), &tmp, type | byen);
data = __le32_to_cpu(tmp);
data >>= (shift * 8);
--
2.4.11
--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH net-next 6/6] r8152: add byte_enable for ocp_read_word function
2016-06-27 5:07 ` Hayes Wang
(?)
@ 2016-06-27 10:57 ` Sergei Shtylyov
-1 siblings, 0 replies; 26+ messages in thread
From: Sergei Shtylyov @ 2016-06-27 10:57 UTC (permalink / raw)
To: Hayes Wang, netdev; +Cc: nic_swsd, linux-kernel, linux-usb
Hello.
On 6/27/2016 8:07 AM, Hayes Wang wrote:
> Add byte_enable for ocp_read_word() to replace reading 4 bytes data
> with reading the desired 2 bytes data.
>
> This is used to avoid the issue which is described in commit:b4d99def.
scripts/checkpatch.pl now enforces certain commit citing style, yours
doesn't match.
> The origin method always reads 4 bytes data, and it may have problem
> when reading the PHY regiters.
Registers.
> The new method is supported since RTL8152B, but it doesn't influence
> the previous chips. The bits of the byte_enable for the previous chips
> are the reserved bits, and the hw would ignore them.
>
> Signed-off-by: Hayes Wang <hayeswang@realtek.com>
[...]
MBR, Sergei
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH net-next v2 0/6] r8152: support new chips
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
` (5 preceding siblings ...)
2016-06-27 5:07 ` Hayes Wang
@ 2016-06-28 2:45 ` Hayes Wang
2016-06-28 2:45 ` Hayes Wang
` (5 more replies)
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
7 siblings, 6 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
v2:
Fix the commit message for patch #6.
v1:
In order to support new chips, adjust some codes. Then, add the settings
for the new chips.
Hayes Wang (6):
r8152: add aldps_enable for rtl_ops
r8152: add u1u2_enable for rtl_ops
r8152: add power_cut_en for rtl_ops
r8152: support the new chip 8050
r8152: support RTL8153B
r8152: add byte_enable for ocp_read_word function
drivers/net/usb/r8152.c | 621 ++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 576 insertions(+), 45 deletions(-)
--
2.4.11
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH net-next v2 1/6] r8152: add aldps_enable for rtl_ops
@ 2016-06-28 2:45 ` Hayes Wang
0 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add aldps_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 11178f9..b253003 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -619,6 +619,7 @@ struct r8152 {
int (*eee_get)(struct r8152 *, struct ethtool_eee *);
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
bool (*in_nway)(struct r8152 *);
+ void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
} rtl_ops;
@@ -2474,9 +2475,9 @@ static void r8152_aldps_en(struct r8152 *tp, bool enable)
static void rtl8152_disable(struct r8152 *tp)
{
- r8152_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
rtl_disable(tp);
- r8152_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static void r8152b_hw_phy_cfg(struct r8152 *tp)
@@ -2801,9 +2802,7 @@ static void r8153_aldps_en(struct r8152 *tp, bool enable)
static void rtl8153_disable(struct r8152 *tp)
{
- r8153_aldps_en(tp, false);
- rtl_disable(tp);
- r8153_aldps_en(tp, true);
+ rtl8152_disable(tp);
usb_enable_lpm(tp->udev);
}
@@ -2924,9 +2923,9 @@ static void rtl8153_up(struct r8152 *tp)
return;
r8153_u1u2en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
r8153_u2p3en(tp, true);
r8153_u1u2en(tp, true);
usb_enable_lpm(tp->udev);
@@ -2942,9 +2941,9 @@ static void rtl8153_down(struct r8152 *tp)
r8153_u1u2en(tp, false);
r8153_u2p3en(tp, false);
r8153_power_cut_en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static bool rtl8152_in_nway(struct r8152 *tp)
@@ -4142,6 +4141,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8152_get_eee;
ops->eee_set = r8152_set_eee;
ops->in_nway = rtl8152_in_nway;
+ ops->aldps_enable = r8152_aldps_en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
break;
@@ -4158,6 +4158,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8153_get_eee;
ops->eee_set = r8153_set_eee;
ops->in_nway = rtl8153_in_nway;
+ ops->aldps_enable = r8153_aldps_en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
break;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v2 1/6] r8152: add aldps_enable for rtl_ops
@ 2016-06-28 2:45 ` Hayes Wang
0 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev-u79uwXL29TY76Z2rM5mHXA
Cc: nic_swsd-Rasf1IRRPZFBDgjK7y7TUQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA, Hayes Wang
Add aldps_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang-Rasf1IRRPZFBDgjK7y7TUQ@public.gmane.org>
---
drivers/net/usb/r8152.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 11178f9..b253003 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -619,6 +619,7 @@ struct r8152 {
int (*eee_get)(struct r8152 *, struct ethtool_eee *);
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
bool (*in_nway)(struct r8152 *);
+ void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
} rtl_ops;
@@ -2474,9 +2475,9 @@ static void r8152_aldps_en(struct r8152 *tp, bool enable)
static void rtl8152_disable(struct r8152 *tp)
{
- r8152_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
rtl_disable(tp);
- r8152_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static void r8152b_hw_phy_cfg(struct r8152 *tp)
@@ -2801,9 +2802,7 @@ static void r8153_aldps_en(struct r8152 *tp, bool enable)
static void rtl8153_disable(struct r8152 *tp)
{
- r8153_aldps_en(tp, false);
- rtl_disable(tp);
- r8153_aldps_en(tp, true);
+ rtl8152_disable(tp);
usb_enable_lpm(tp->udev);
}
@@ -2924,9 +2923,9 @@ static void rtl8153_up(struct r8152 *tp)
return;
r8153_u1u2en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
r8153_u2p3en(tp, true);
r8153_u1u2en(tp, true);
usb_enable_lpm(tp->udev);
@@ -2942,9 +2941,9 @@ static void rtl8153_down(struct r8152 *tp)
r8153_u1u2en(tp, false);
r8153_u2p3en(tp, false);
r8153_power_cut_en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static bool rtl8152_in_nway(struct r8152 *tp)
@@ -4142,6 +4141,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8152_get_eee;
ops->eee_set = r8152_set_eee;
ops->in_nway = rtl8152_in_nway;
+ ops->aldps_enable = r8152_aldps_en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
break;
@@ -4158,6 +4158,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8153_get_eee;
ops->eee_set = r8153_set_eee;
ops->in_nway = rtl8153_in_nway;
+ ops->aldps_enable = r8153_aldps_en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
break;
--
2.4.11
--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v2 2/6] r8152: add u1u2_enable for rtl_ops
2016-06-28 2:45 ` [PATCH net-next v2 0/6] r8152: support new chips Hayes Wang
2016-06-28 2:45 ` Hayes Wang
@ 2016-06-28 2:45 ` Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 3/6] r8152: add power_cut_en " Hayes Wang
` (3 subsequent siblings)
5 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add u1u2_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index b253003..f51d799 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -620,6 +620,7 @@ struct r8152 {
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
bool (*in_nway)(struct r8152 *);
void (*aldps_enable)(struct r8152 *tp, bool enable);
+ void (*u1u2_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
} rtl_ops;
@@ -2408,7 +2409,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
if (enable) {
u32 ocp_data;
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
__rtl_set_wol(tp, WAKE_ANY);
@@ -2423,7 +2424,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
} else {
__rtl_set_wol(tp, tp->saved_wolopts);
r8153_u2p3en(tp, true);
- r8153_u1u2en(tp, true);
+ tp->rtl_ops.u1u2_enable(tp, true);
}
}
@@ -2922,12 +2923,12 @@ static void rtl8153_up(struct r8152 *tp)
if (test_bit(RTL8152_UNPLUG, &tp->flags))
return;
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
tp->rtl_ops.aldps_enable(tp, true);
r8153_u2p3en(tp, true);
- r8153_u1u2en(tp, true);
+ tp->rtl_ops.u1u2_enable(tp, true);
usb_enable_lpm(tp->udev);
}
@@ -2938,7 +2939,7 @@ static void rtl8153_down(struct r8152 *tp)
return;
}
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
r8153_power_cut_en(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
@@ -4142,6 +4143,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_set = r8152_set_eee;
ops->in_nway = rtl8152_in_nway;
ops->aldps_enable = r8152_aldps_en;
+ ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
break;
@@ -4159,6 +4161,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_set = r8153_set_eee;
ops->in_nway = rtl8153_in_nway;
ops->aldps_enable = r8153_aldps_en;
+ ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
break;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v2 3/6] r8152: add power_cut_en for rtl_ops
2016-06-28 2:45 ` [PATCH net-next v2 0/6] r8152: support new chips Hayes Wang
2016-06-28 2:45 ` Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 2/6] r8152: add u1u2_enable " Hayes Wang
@ 2016-06-28 2:45 ` Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 4/6] r8152: support the new chip 8050 Hayes Wang
` (2 subsequent siblings)
5 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add power_cut_en() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index f51d799..a4f8a01 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -622,6 +622,7 @@ struct r8152 {
void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*u1u2_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
+ void (*power_cut_en)(struct r8152 *tp, bool enable);
} rtl_ops;
int intr_interval;
@@ -2391,6 +2392,13 @@ static void r8153_power_cut_en(struct r8152 *tp, bool enable)
else
ocp_data &= ~(PWR_EN | PHASE2_EN);
ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+}
+
+static void r8153A_power_cut_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ r8153_power_cut_en(tp, enable);
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
ocp_data &= ~PCUT_STATUS;
@@ -2941,7 +2949,7 @@ static void rtl8153_down(struct r8152 *tp)
tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
- r8153_power_cut_en(tp, false);
+ tp->rtl_ops.power_cut_en(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
tp->rtl_ops.aldps_enable(tp, true);
@@ -3397,7 +3405,7 @@ static void r8153_init(struct r8152 *tp)
ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
- r8153_power_cut_en(tp, false);
+ r8153A_power_cut_en(tp, false);
r8153_u1u2en(tp, true);
ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
@@ -4122,7 +4130,7 @@ static void rtl8153_unload(struct r8152 *tp)
if (test_bit(RTL8152_UNPLUG, &tp->flags))
return;
- r8153_power_cut_en(tp, false);
+ tp->rtl_ops.power_cut_en(tp, false);
}
static int rtl_ops_init(struct r8152 *tp)
@@ -4145,6 +4153,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->aldps_enable = r8152_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
+ ops->power_cut_en = r8152_power_cut_en;
break;
case RTL_VER_03:
@@ -4163,6 +4172,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->aldps_enable = r8153_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
+ ops->power_cut_en = r8153A_power_cut_en;
break;
default:
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v2 4/6] r8152: support the new chip 8050
2016-06-28 2:45 ` [PATCH net-next v2 0/6] r8152: support new chips Hayes Wang
` (2 preceding siblings ...)
2016-06-28 2:45 ` [PATCH net-next v2 3/6] r8152: add power_cut_en " Hayes Wang
@ 2016-06-28 2:45 ` Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 5/6] r8152: support RTL8153B Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 6/6] r8152: add byte_enable for ocp_read_word function Hayes Wang
5 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Support a new chip which has the product ID 0x8050.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index a4f8a01..3ccbff0 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -646,6 +646,7 @@ enum rtl_version {
RTL_VER_04,
RTL_VER_05,
RTL_VER_06,
+ RTL_VER_07,
RTL_VER_MAX
};
@@ -3920,6 +3921,7 @@ static int rtl8152_get_coalesce(struct net_device *netdev,
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return -EOPNOTSUPP;
default:
break;
@@ -3939,6 +3941,7 @@ static int rtl8152_set_coalesce(struct net_device *netdev,
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return -EOPNOTSUPP;
default:
break;
@@ -4038,6 +4041,7 @@ static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return eth_change_mtu(dev, new_mtu);
default:
break;
@@ -4109,6 +4113,9 @@ static void r8152b_get_version(struct r8152 *tp)
tp->version = RTL_VER_06;
tp->mii.supports_gmii = 1;
break;
+ case 0x4800:
+ tp->version = RTL_VER_07;
+ break;
default:
netif_info(tp, probe, tp->netdev,
"Unknown version 0x%04x\n", version);
@@ -4141,6 +4148,7 @@ static int rtl_ops_init(struct r8152 *tp)
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
ops->init = r8152b_init;
ops->enable = rtl8152_enable;
ops->disable = rtl8152_disable;
@@ -4336,6 +4344,7 @@ static void rtl8152_disconnect(struct usb_interface *intf)
/* table of devices that work with this driver */
static struct usb_device_id rtl8152_table[] = {
+ {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8050)},
{REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
{REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
{REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v2 5/6] r8152: support RTL8153B
2016-06-28 2:45 ` [PATCH net-next v2 0/6] r8152: support new chips Hayes Wang
` (3 preceding siblings ...)
2016-06-28 2:45 ` [PATCH net-next v2 4/6] r8152: support the new chip 8050 Hayes Wang
@ 2016-06-28 2:45 ` Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 6/6] r8152: add byte_enable for ocp_read_word function Hayes Wang
5 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Support new chip RTL8153B.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 560 +++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 533 insertions(+), 27 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 3ccbff0..2fd4944 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -28,7 +28,7 @@
#include <linux/suspend.h>
/* Information for net-next */
-#define NETNEXT_VERSION "08"
+#define NETNEXT_VERSION "09"
/* Information for net */
#define NET_VERSION "3"
@@ -50,11 +50,14 @@
#define PLA_FMC 0xc0b4
#define PLA_CFG_WOL 0xc0b6
#define PLA_TEREDO_CFG 0xc0bc
+#define PLA_TEREDO_WAKE_BASE 0xc0c4
#define PLA_MAR 0xcd00
#define PLA_BACKUP 0xd000
#define PAL_BDC_CR 0xd1a0
#define PLA_TEREDO_TIMER 0xd2cc
#define PLA_REALWOW_TIMER 0xd2e8
+#define PLA_EFUSE_DATA 0xdd00
+#define PLA_EFUSE_CMD 0xdd02
#define PLA_LEDSEL 0xdd90
#define PLA_LED_FEATURE 0xdd92
#define PLA_PHYAR 0xde00
@@ -104,7 +107,9 @@
#define USB_CSR_DUMMY2 0xb466
#define USB_DEV_STAT 0xb808
#define USB_CONNECT_TIMER 0xcbf8
+#define USB_MSC_TIMER 0xcbfc
#define USB_BURST_SIZE 0xcfc0
+#define USB_LPM_CONFIG 0xcfd8
#define USB_USB_CTRL 0xd406
#define USB_PHY_CTRL 0xd408
#define USB_TX_AGG 0xd40a
@@ -112,14 +117,19 @@
#define USB_USB_TIMER 0xd428
#define USB_RX_EARLY_TIMEOUT 0xd42c
#define USB_RX_EARLY_SIZE 0xd42e
-#define USB_PM_CTRL_STATUS 0xd432
+#define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
+#define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
#define USB_TX_DMA 0xd434
+#define USB_UPT_RXDMA_OWN 0xd437
#define USB_TOLERANCE 0xd490
#define USB_LPM_CTRL 0xd41a
+#define USB_U1U2_TIMER 0xd4da
#define USB_UPS_CTRL 0xd800
#define USB_MISC_0 0xd81a
#define USB_POWER_CUT 0xd80a
#define USB_AFE_CTRL2 0xd824
+#define USB_UPS_CFG 0xd842
+#define USB_UPS_FLAGS 0xd848
#define USB_WDT11_CTRL 0xe43c
#define USB_BP_BA 0xfc26
#define USB_BP_0 0xfc28
@@ -141,6 +151,7 @@
#define OCP_EEE_AR 0xa41a
#define OCP_EEE_DATA 0xa41c
#define OCP_PHY_STATUS 0xa420
+#define OCP_NCTL_CFG 0xa42c
#define OCP_POWER_CFG 0xa430
#define OCP_EEE_CFG 0xa432
#define OCP_SRAM_ADDR 0xa436
@@ -150,9 +161,14 @@
#define OCP_EEE_ADV 0xa5d0
#define OCP_EEE_LPABLE 0xa5d2
#define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
+#define OCP_PHY_PATCH_STAT 0xb800
+#define OCP_PHY_PATCH_CMD 0xb820
+#define OCP_ADC_IOFFSET 0xbcfc
#define OCP_ADC_CFG 0xbc06
+#define OCP_SYSCLK_CFG 0xc416
/* SRAM Register */
+#define SRAM_GREEN_CFG 0x8011
#define SRAM_LPF_CFG 0x8012
#define SRAM_10M_AMP1 0x8080
#define SRAM_10M_AMP2 0x8082
@@ -250,6 +266,10 @@
/* PAL_BDC_CR */
#define ALDPS_PROXY_MODE 0x0001
+/* PLA_EFUSE_CMD */
+#define EFUSE_READ_CMD BIT(15)
+#define EFUSE_DATA_BIT16 BIT(7)
+
/* PLA_CONFIG34 */
#define LINK_ON_WAKE_EN 0x0010
#define LINK_OFF_WAKE_EN 0x0008
@@ -275,6 +295,7 @@
/* PLA_MAC_PWR_CTRL2 */
#define EEE_SPDWN_RATIO 0x8007
+#define MAC_CLK_SPDWN_EN BIT(15)
/* PLA_MAC_PWR_CTRL3 */
#define PKT_AVAIL_SPDWN_EN 0x0100
@@ -326,6 +347,9 @@
#define STAT_SPEED_HIGH 0x0000
#define STAT_SPEED_FULL 0x0002
+/* USB_LPM_CONFIG */
+#define LPM_U1U2_EN BIT(0)
+
/* USB_TX_AGG */
#define TX_AGG_MAX_THRESHOLD 0x03
@@ -333,11 +357,16 @@
#define RX_THR_SUPPER 0x0c350180
#define RX_THR_HIGH 0x7a120180
#define RX_THR_SLOW 0xffff0180
+#define RX_THR_B 0x00010001
/* USB_TX_DMA */
#define TEST_MODE_DISABLE 0x00000001
#define TX_SIZE_ADJUST1 0x00000100
+/* USB_UPT_RXDMA_OWN */
+#define OWN_UPDATE BIT(0)
+#define OWN_CLEAR BIT(1)
+
/* USB_UPS_CTRL */
#define POWER_CUT 0x0100
@@ -354,6 +383,8 @@
/* USB_POWER_CUT */
#define PWR_EN 0x0001
#define PHASE2_EN 0x0008
+#define UPS_EN BIT(4)
+#define USP_PREWAKE BIT(5)
/* USB_MISC_0 */
#define PCUT_STATUS 0x0001
@@ -380,6 +411,37 @@
#define SEN_VAL_NORMAL 0xa000
#define SEL_RXIDLE 0x0100
+/* USB_UPS_CFG */
+#define SAW_CNT_1MS_MASK 0x0fff
+
+/* USB_UPS_FLAGS */
+#define UPS_FLAGS_R_TUNE BIT(0)
+#define UPS_FLAGS_EN_10M_CKDIV BIT(1)
+#define UPS_FLAGS_250M_CKDIV BIT(2)
+#define UPS_FLAGS_EN_ALDPS BIT(3)
+#define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
+#define UPS_FLAGS_SPEED_MASK (0xf << 16)
+#define ups_flags_speed(x) ((x) << 16)
+#define UPS_FLAGS_EN_EEE BIT(20)
+#define UPS_FLAGS_EN_500M_EEE BIT(21)
+#define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
+#define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
+#define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
+#define UPS_FLAGS_EN_GREEN BIT(26)
+#define UPS_FLAGS_EN_FLOW_CTR BIT(27)
+
+enum spd_duplex {
+ NWAY_10M_HALF = 1,
+ NWAY_10M_FULL,
+ NWAY_100M_HALF,
+ NWAY_100M_FULL,
+ NWAY_1000M_FULL,
+ FORCE_10M_HALF,
+ FORCE_10M_FULL,
+ FORCE_100M_HALF,
+ FORCE_100M_FULL,
+};
+
/* OCP_ALDPS_CONFIG */
#define ENPWRSAVE 0x8000
#define ENPDNPS 0x0200
@@ -391,6 +453,9 @@
#define PHY_STAT_LAN_ON 3
#define PHY_STAT_PWRDN 5
+/* OCP_NCTL_CFG */
+#define PGA_RETURN_EN BIT(1)
+
/* OCP_POWER_CFG */
#define EEE_CLKDIV_EN 0x8000
#define EN_ALDPS 0x0004
@@ -432,17 +497,34 @@
#define EEE10_EN 0x0010
/* OCP_DOWN_SPEED */
+#define EN_EEE_CMODE BIT(14)
+#define EN_EEE_1000 BIT(13)
+#define EN_EEE_100 BIT(12)
+#define EN_10M_CLKDIV BIT(11)
#define EN_10M_BGOFF 0x0080
/* OCP_PHY_STATE */
#define TXDIS_STATE 0x01
#define ABD_STATE 0x02
+/* OCP_PHY_PATCH_STAT */
+#define PATCH_READY BIT(6)
+
+/* OCP_PHY_PATCH_CMD */
+#define PATCH_REQUEST BIT(4)
+
/* OCP_ADC_CFG */
#define CKADSEL_L 0x0100
#define ADC_EN 0x0080
#define EN_EMI_L 0x0040
+/* OCP_SYSCLK_CFG */
+#define CLK_DIV_EXPO(x) (min(x, 5) << 8)
+
+/* SRAM_GREEN_CFG */
+#define GREEN_ETH_EN BIT(15)
+#define R_TUNE_EN BIT(11)
+
/* SRAM_LPF_CFG */
#define LPF_AUTO_TUNE 0x8000
@@ -647,6 +729,8 @@ enum rtl_version {
RTL_VER_05,
RTL_VER_06,
RTL_VER_07,
+ RTL_VER_08,
+ RTL_VER_09,
RTL_VER_MAX
};
@@ -977,6 +1061,12 @@ static void sram_write(struct r8152 *tp, u16 addr, u16 data)
ocp_reg_write(tp, OCP_SRAM_DATA, data);
}
+static u16 sram_read(struct r8152 *tp, u16 addr)
+{
+ ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
+ return ocp_reg_read(tp, OCP_SRAM_DATA);
+}
+
static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
{
struct r8152 *tp = netdev_priv(netdev);
@@ -2167,11 +2257,40 @@ static int rtl8152_enable(struct r8152 *tp)
return rtl_enable(tp);
}
+static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp)
+{
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN,
+ OWN_UPDATE | OWN_CLEAR);
+}
+
static void r8153_set_rx_early_timeout(struct r8152 *tp)
{
u32 ocp_data = tp->coalesce / 8;
- ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
+ * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
+ */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ 128 / 8);
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
+ ocp_data);
+ r8153b_rx_agg_chg_indicate(tp);
+ break;
+
+ default:
+ break;
+ }
}
static void r8153_set_rx_early_size(struct r8152 *tp)
@@ -2180,6 +2299,15 @@ static void r8153_set_rx_early_size(struct r8152 *tp)
u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
+
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8153b_rx_agg_chg_indicate(tp);
+ break;
+ default:
+ break;
+ }
}
static int rtl8153_enable(struct r8152 *tp)
@@ -2371,6 +2499,19 @@ static void r8153_u1u2en(struct r8152 *tp, bool enable)
usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
}
+static void r8153b_u1u2en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
+ if (enable)
+ ocp_data |= LPM_U1U2_EN;
+ else
+ ocp_data &= ~LPM_U1U2_EN;
+
+ ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
+}
+
static void r8153_u2p3en(struct r8152 *tp, bool enable)
{
u32 ocp_data;
@@ -2383,15 +2524,52 @@ static void r8153_u2p3en(struct r8152 *tp, bool enable)
ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
}
+static void r8153b_ups_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ break;
+
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ default:
+ return;
+ }
+
+ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT);
+ if (enable) {
+ tp->rtl_ops.power_cut_en(tp, false);
+ ocp_data |= UPS_EN;
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+ } else {
+ ocp_data &= ~UPS_EN;
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
+ ocp_data &= ~PCUT_STATUS;
+ ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
+ }
+}
+
static void r8153_power_cut_en(struct r8152 *tp, bool enable)
{
u32 ocp_data;
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
- if (enable)
+ if (enable) {
+ r8153b_ups_en(tp, false);
ocp_data |= PWR_EN | PHASE2_EN;
- else
+ } else {
ocp_data &= ~(PWR_EN | PHASE2_EN);
+ }
ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
}
@@ -2430,7 +2608,10 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
+
+ r8153b_ups_en(tp, true);
} else {
+ r8153b_ups_en(tp, false);
__rtl_set_wol(tp, tp->saved_wolopts);
r8153_u2p3en(tp, true);
tp->rtl_ops.u1u2_enable(tp, true);
@@ -2462,9 +2643,31 @@ static void r8153_teredo_off(struct r8152 *tp)
{
u32 ocp_data;
- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
- ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
- ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
+ ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK |
+ OOB_TEREDO_EN);
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* The bit 0 ~ 7 are relative with teredo settings. They are
+ * W1C (write 1 to clear), so set all 1 to disable it.
+ */
+ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, 0xff);
+ break;
+
+ default:
+ break;
+ }
ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
@@ -2632,6 +2835,33 @@ static void r8152b_enter_oob(struct r8152 *tp)
ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
}
+static int r8153_patch_request(struct r8152 *tp, bool request)
+{
+ u16 data;
+ int i;
+
+ data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD);
+ if (request)
+ data |= PATCH_REQUEST;
+ else
+ data &= ~PATCH_REQUEST;
+ ocp_reg_write(tp, OCP_PHY_PATCH_CMD, data);
+
+ for (i = 0; request && i < 5000; i++) {
+ usleep_range(1000, 2000);
+ if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)
+ break;
+ }
+
+ if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {
+ netif_err(tp, drv, tp->netdev, "patch request fail\n");
+ r8153_patch_request(tp, false);
+ return -ETIME;
+ } else {
+ return 0;
+ }
+}
+
static void r8153_hw_phy_cfg(struct r8152 *tp)
{
u32 ocp_data;
@@ -2679,6 +2909,101 @@ static void r8153_hw_phy_cfg(struct r8152 *tp)
set_bit(PHY_RESET, &tp->flags);
}
+static void r8153b_ups_flags_w0w1(struct r8152 *tp, u32 set, u32 clear)
+{
+ u32 ocp_data;
+
+ ocp_data = ocp_read_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS);
+ ocp_data &= ~clear;
+ ocp_data |= set;
+ ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ocp_data);
+}
+
+static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
+{
+ u32 ocp_data;
+
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD, EFUSE_READ_CMD | addr);
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
+ ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
+ ocp_data |= ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
+
+ return ocp_data;
+}
+
+static void r8153b_hw_phy_cfg(struct r8152 *tp)
+{
+ u32 ocp_data, ups_flags = 0;
+ u16 data;
+
+ data = r8152_mdio_read(tp, MII_BMCR);
+ if (data & BMCR_PDOWN) {
+ data &= ~BMCR_PDOWN;
+ r8152_mdio_write(tp, MII_BMCR, data);
+ }
+
+ data = sram_read(tp, SRAM_GREEN_CFG);
+ data |= GREEN_ETH_EN | R_TUNE_EN;
+ sram_write(tp, SRAM_GREEN_CFG, data);
+ data = ocp_reg_read(tp, OCP_NCTL_CFG);
+ data |= PGA_RETURN_EN;
+ ocp_reg_write(tp, OCP_NCTL_CFG, data);
+ ups_flags |= UPS_FLAGS_EN_GREEN | UPS_FLAGS_R_TUNE;
+
+ /* ADC Bias Calibration:
+ * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
+ * bit (bit3) to rebuild the real 16-bit data. Write the data to the
+ * ADC ioffset.
+ */
+ ocp_data = r8152_efuse_read(tp, 0x7d);
+ data = (u16)(((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7));
+ if (data != 0xffff)
+ ocp_reg_write(tp, OCP_ADC_IOFFSET, data);
+
+ /* ups mode tx-link-pulse timing adjustment:
+ * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
+ * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
+ */
+ ocp_data = ocp_reg_read(tp, 0xc426);
+ ocp_data &= 0x3fff;
+ if (ocp_data) {
+ u32 swr_cnt_1ms_ini;
+
+ swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
+ ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
+ ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
+ }
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
+ ocp_data |= PFM_PWM_SWITCH;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
+
+ /* Advnace EEE */
+ if (!r8153_patch_request(tp, true)) {
+ data = ocp_reg_read(tp, OCP_POWER_CFG);
+ data |= EEE_CLKDIV_EN;
+ ocp_reg_write(tp, OCP_POWER_CFG, data);
+
+ data = ocp_reg_read(tp, OCP_DOWN_SPEED);
+ data |= EN_EEE_CMODE | EN_EEE_1000 | EN_EEE_100 | EN_10M_CLKDIV;
+ ocp_reg_write(tp, OCP_DOWN_SPEED, data);
+
+ ocp_reg_write(tp, OCP_SYSCLK_CFG, 0);
+ ocp_reg_write(tp, OCP_SYSCLK_CFG, CLK_DIV_EXPO(5));
+
+ ups_flags |= UPS_FLAGS_EN_10M_CKDIV | UPS_FLAGS_250M_CKDIV |
+ UPS_FLAGS_EN_EEE_CKDIV | UPS_FLAGS_EEE_CMOD_LV_EN |
+ UPS_FLAGS_EEE_PLLOFF_GIGA;
+
+ r8153_patch_request(tp, false);
+ }
+
+ r8153b_ups_flags_w0w1(tp, ups_flags, 0);
+
+ set_bit(PHY_RESET, &tp->flags);
+}
+
static void r8153_first_init(struct r8152 *tp)
{
u32 ocp_data;
@@ -2737,6 +3062,16 @@ static void r8153_first_init(struct r8152 *tp)
/* TX share fifo free credit full threshold */
ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_B);
+ break;
+
+ default:
+ break;
+ }
+
/* rx aggregation */
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
@@ -2774,9 +3109,28 @@ static void r8153_enter_oob(struct r8152 *tp)
ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
- ocp_data &= ~TEREDO_WAKE_MASK;
- ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
+ ocp_data &= ~TEREDO_WAKE_MASK;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* Clear teredo wake event. bit[15:8] is the teredo wakeup
+ * type. Set it to zero. bits[7:0] are the W1C bits about
+ * the events. Set them to all 1 to clear them.
+ */
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_WAKE_BASE, 0x00ff);
+ break;
+
+ default:
+ break;
+ }
rtl_rx_vlan_en(tp, true);
@@ -2810,6 +3164,16 @@ static void r8153_aldps_en(struct r8152 *tp, bool enable)
}
}
+static void r8153b_aldps_en(struct r8152 *tp, bool enable)
+{
+ r8153_aldps_en(tp, enable);
+
+ if (enable)
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_ALDPS, 0);
+ else
+ r8153b_ups_flags_w0w1(tp, 0, UPS_FLAGS_EN_ALDPS);
+}
+
static void rtl8153_disable(struct r8152 *tp)
{
rtl8152_disable(tp);
@@ -2819,6 +3183,7 @@ static void rtl8153_disable(struct r8152 *tp)
static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
{
u16 bmcr, anar, gbcr;
+ enum spd_duplex speed_duplex;
int ret = 0;
cancel_delayed_work_sync(&tp->schedule);
@@ -2836,32 +3201,43 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
if (speed == SPEED_10) {
bmcr = 0;
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ speed_duplex = FORCE_10M_HALF;
} else if (speed == SPEED_100) {
bmcr = BMCR_SPEED100;
anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ speed_duplex = FORCE_100M_HALF;
} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
bmcr = BMCR_SPEED1000;
gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+ speed_duplex = NWAY_1000M_FULL;
} else {
ret = -EINVAL;
goto out;
}
- if (duplex == DUPLEX_FULL)
+ if (duplex == DUPLEX_FULL) {
bmcr |= BMCR_FULLDPLX;
+ if (speed != SPEED_1000)
+ speed_duplex++;
+ }
} else {
if (speed == SPEED_10) {
- if (duplex == DUPLEX_FULL)
+ if (duplex == DUPLEX_FULL) {
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
- else
+ speed_duplex = NWAY_10M_FULL;
+ } else {
anar |= ADVERTISE_10HALF;
+ speed_duplex = NWAY_10M_HALF;
+ }
} else if (speed == SPEED_100) {
if (duplex == DUPLEX_FULL) {
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ speed_duplex = NWAY_100M_FULL;
} else {
anar |= ADVERTISE_10HALF;
anar |= ADVERTISE_100HALF;
+ speed_duplex = NWAY_100M_HALF;
}
} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
if (duplex == DUPLEX_FULL) {
@@ -2873,6 +3249,7 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
anar |= ADVERTISE_100HALF;
gbcr |= ADVERTISE_1000HALF;
}
+ speed_duplex = NWAY_1000M_FULL;
} else {
ret = -EINVAL;
goto out;
@@ -2890,6 +3267,23 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
r8152_mdio_write(tp, MII_ADVERTISE, anar);
r8152_mdio_write(tp, MII_BMCR, bmcr);
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8153b_ups_flags_w0w1(tp, ups_flags_speed(speed_duplex),
+ UPS_FLAGS_SPEED_MASK);
+ break;
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ default:
+ break;
+ }
+
if (bmcr & BMCR_RESET) {
int i;
@@ -3260,12 +3654,28 @@ static void r8153_eee_en(struct r8152 *tp, bool enable)
ocp_reg_write(tp, OCP_EEE_CFG, config);
}
+static void r8153b_eee_en(struct r8152 *tp, bool enable)
+{
+ r8153_eee_en(tp, enable);
+
+ if (enable)
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_EEE, 0);
+ else
+ r8153b_ups_flags_w0w1(tp, 0, UPS_FLAGS_EN_EEE);
+}
+
static void r8153_enable_eee(struct r8152 *tp)
{
r8153_eee_en(tp, true);
ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
}
+static void r8153b_enable_eee(struct r8152 *tp)
+{
+ r8153b_eee_en(tp, true);
+ ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
+}
+
static void r8152b_enable_fc(struct r8152 *tp)
{
u16 anar;
@@ -3275,6 +3685,12 @@ static void r8152b_enable_fc(struct r8152 *tp)
r8152_mdio_write(tp, MII_ADVERTISE, anar);
}
+static void r8153b_enable_fc(struct r8152 *tp)
+{
+ r8152b_enable_fc(tp);
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_FLOW_CTR, 0);
+}
+
static void rtl_tally_reset(struct r8152 *tp)
{
u32 ocp_data;
@@ -3424,6 +3840,70 @@ static void r8153_init(struct r8152 *tp)
r8152b_enable_fc(tp);
rtl_tally_reset(tp);
r8153_u2p3en(tp, true);
+
+ switch (tp->udev->speed) {
+ case USB_SPEED_SUPER:
+ case USB_SPEED_SUPER_PLUS:
+ tp->coalesce = COALESCE_SUPER;
+ break;
+ case USB_SPEED_HIGH:
+ tp->coalesce = COALESCE_HIGH;
+ break;
+ default:
+ tp->coalesce = COALESCE_SLOW;
+ break;
+ }
+}
+
+static void r8153b_init(struct r8152 *tp)
+{
+ u32 ocp_data;
+ int i;
+
+ if (test_bit(RTL8152_UNPLUG, &tp->flags))
+ return;
+
+ r8153b_aldps_en(tp, false);
+ r8153b_u1u2en(tp, false);
+
+ for (i = 0; i < 500; i++) {
+ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
+ AUTOLOAD_DONE)
+ break;
+ msleep(20);
+ }
+
+ for (i = 0; i < 500; i++) {
+ ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
+ if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
+ break;
+ msleep(20);
+ }
+
+ r8153_u2p3en(tp, false);
+
+ /* MSC timer = 0xfff * 8ms = 32760 ms */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
+
+ /* U1/U2/L1 idle timer. 500 us */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
+
+ r8153_power_cut_en(tp, false);
+ r8153b_ups_en(tp, false);
+ r8153b_u1u2en(tp, true);
+
+ /* MAC clock speed down */
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
+ ocp_data |= MAC_CLK_SPDWN_EN;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
+
+ r8153b_enable_eee(tp);
+ r8153b_aldps_en(tp, true);
+ r8153b_enable_fc(tp);
+ rtl_tally_reset(tp);
+ r8153_u2p3en(tp, true);
+
+ tp->coalesce = 15000; /* 15 us */
}
static int rtl8152_pre_reset(struct usb_interface *intf)
@@ -3846,6 +4326,20 @@ static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
return 0;
}
+static int r8153b_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
+{
+ u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
+
+ r8153b_eee_en(tp, eee->eee_enabled);
+
+ if (!eee->eee_enabled)
+ val = 0;
+
+ ocp_reg_write(tp, OCP_EEE_ADV, val);
+
+ return 0;
+}
+
static int
rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
{
@@ -4116,6 +4610,14 @@ static void r8152b_get_version(struct r8152 *tp)
case 0x4800:
tp->version = RTL_VER_07;
break;
+ case 0x6000:
+ tp->version = RTL_VER_08;
+ tp->mii.supports_gmii = 1;
+ break;
+ case 0x6010:
+ tp->version = RTL_VER_09;
+ tp->mii.supports_gmii = 1;
+ break;
default:
netif_info(tp, probe, tp->netdev,
"Unknown version 0x%04x\n", version);
@@ -4183,6 +4685,23 @@ static int rtl_ops_init(struct r8152 *tp)
ops->power_cut_en = r8153A_power_cut_en;
break;
+ case RTL_VER_08:
+ case RTL_VER_09:
+ ops->init = r8153b_init;
+ ops->enable = rtl8153_enable;
+ ops->disable = rtl8153_disable;
+ ops->up = rtl8153_up;
+ ops->down = rtl8153_down;
+ ops->unload = rtl8153_unload;
+ ops->eee_get = r8153_get_eee;
+ ops->eee_set = r8153b_set_eee;
+ ops->in_nway = rtl8153_in_nway;
+ ops->aldps_enable = r8153b_aldps_en;
+ ops->u1u2_enable = r8153b_u1u2en;
+ ops->hw_phy_cfg = r8153b_hw_phy_cfg;
+ ops->power_cut_en = r8153_power_cut_en;
+ break;
+
default:
ret = -ENODEV;
netif_err(tp, probe, tp->netdev, "Unknown Device\n");
@@ -4254,19 +4773,6 @@ static int rtl8152_probe(struct usb_interface *intf,
tp->mii.reg_num_mask = 0x1f;
tp->mii.phy_id = R8152_PHY_ID;
- switch (udev->speed) {
- case USB_SPEED_SUPER:
- case USB_SPEED_SUPER_PLUS:
- tp->coalesce = COALESCE_SUPER;
- break;
- case USB_SPEED_HIGH:
- tp->coalesce = COALESCE_HIGH;
- break;
- default:
- tp->coalesce = COALESCE_SLOW;
- break;
- }
-
tp->autoneg = AUTONEG_ENABLE;
tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
tp->duplex = DUPLEX_FULL;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v2 6/6] r8152: add byte_enable for ocp_read_word function
2016-06-28 2:45 ` [PATCH net-next v2 0/6] r8152: support new chips Hayes Wang
` (4 preceding siblings ...)
2016-06-28 2:45 ` [PATCH net-next v2 5/6] r8152: support RTL8153B Hayes Wang
@ 2016-06-28 2:45 ` Hayes Wang
5 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 2:45 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add byte_enable for ocp_read_word() to replace reading 4
bytes data with reading the desired 2 bytes data.
This is used to avoid the issue which is described in
commit b4d99def0938 ("r8152: remove sram_read"). The
origin method always reads 4 bytes data, and it may
have problem when reading the PHY registers.
The new method is supported since RTL8152B, but it
doesn't influence the previous chips. The bits of the
byte_enable for the previous chips are the reserved
bits, and the hw would ignore them.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 2fd4944..0bb7c1b 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -945,11 +945,13 @@ static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
{
u32 data;
__le32 tmp;
+ u16 byen = BYTE_EN_WORD;
u8 shift = index & 2;
index &= ~3;
+ byen <<= shift;
- generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
+ generic_ocp_read(tp, index, sizeof(tmp), &tmp, type | byen);
data = __le32_to_cpu(tmp);
data >>= (shift * 8);
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v3 0/7] r8152: support new chips
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
` (6 preceding siblings ...)
2016-06-28 2:45 ` [PATCH net-next v2 0/6] r8152: support new chips Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 1/7] r8152: add aldps_enable for rtl_ops Hayes Wang
` (7 more replies)
7 siblings, 8 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
v3:
Insert a patch "r8152: add u2p3_enable for rtl_ops".
Change the patch "r8152: support RTL8153B". Disable U2P3.
v2:
Fix the commit message for patch #6.
v1:
In order to support new chips, adjust some codes. Then, add the settings
for the new chips.
Hayes Wang (7):
r8152: add aldps_enable for rtl_ops
r8152: add u1u2_enable for rtl_ops
r8152: add power_cut_en for rtl_ops
r8152: add u2p3_enable for rtl_ops
r8152: support the new chip 8050
r8152: support RTL8153B
r8152: add byte_enable for ocp_read_word function
drivers/net/usb/r8152.c | 641 ++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 592 insertions(+), 49 deletions(-)
--
2.4.11
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH net-next v3 1/7] r8152: add aldps_enable for rtl_ops
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 2/7] r8152: add u1u2_enable " Hayes Wang
` (6 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add aldps_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 11178f9..b253003 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -619,6 +619,7 @@ struct r8152 {
int (*eee_get)(struct r8152 *, struct ethtool_eee *);
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
bool (*in_nway)(struct r8152 *);
+ void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
} rtl_ops;
@@ -2474,9 +2475,9 @@ static void r8152_aldps_en(struct r8152 *tp, bool enable)
static void rtl8152_disable(struct r8152 *tp)
{
- r8152_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
rtl_disable(tp);
- r8152_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static void r8152b_hw_phy_cfg(struct r8152 *tp)
@@ -2801,9 +2802,7 @@ static void r8153_aldps_en(struct r8152 *tp, bool enable)
static void rtl8153_disable(struct r8152 *tp)
{
- r8153_aldps_en(tp, false);
- rtl_disable(tp);
- r8153_aldps_en(tp, true);
+ rtl8152_disable(tp);
usb_enable_lpm(tp->udev);
}
@@ -2924,9 +2923,9 @@ static void rtl8153_up(struct r8152 *tp)
return;
r8153_u1u2en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
r8153_u2p3en(tp, true);
r8153_u1u2en(tp, true);
usb_enable_lpm(tp->udev);
@@ -2942,9 +2941,9 @@ static void rtl8153_down(struct r8152 *tp)
r8153_u1u2en(tp, false);
r8153_u2p3en(tp, false);
r8153_power_cut_en(tp, false);
- r8153_aldps_en(tp, false);
+ tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
- r8153_aldps_en(tp, true);
+ tp->rtl_ops.aldps_enable(tp, true);
}
static bool rtl8152_in_nway(struct r8152 *tp)
@@ -4142,6 +4141,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8152_get_eee;
ops->eee_set = r8152_set_eee;
ops->in_nway = rtl8152_in_nway;
+ ops->aldps_enable = r8152_aldps_en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
break;
@@ -4158,6 +4158,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_get = r8153_get_eee;
ops->eee_set = r8153_set_eee;
ops->in_nway = rtl8153_in_nway;
+ ops->aldps_enable = r8153_aldps_en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
break;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v3 2/7] r8152: add u1u2_enable for rtl_ops
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 1/7] r8152: add aldps_enable for rtl_ops Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 3/7] r8152: add power_cut_en " Hayes Wang
` (5 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add u1u2_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index b253003..f51d799 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -620,6 +620,7 @@ struct r8152 {
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
bool (*in_nway)(struct r8152 *);
void (*aldps_enable)(struct r8152 *tp, bool enable);
+ void (*u1u2_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
} rtl_ops;
@@ -2408,7 +2409,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
if (enable) {
u32 ocp_data;
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
__rtl_set_wol(tp, WAKE_ANY);
@@ -2423,7 +2424,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
} else {
__rtl_set_wol(tp, tp->saved_wolopts);
r8153_u2p3en(tp, true);
- r8153_u1u2en(tp, true);
+ tp->rtl_ops.u1u2_enable(tp, true);
}
}
@@ -2922,12 +2923,12 @@ static void rtl8153_up(struct r8152 *tp)
if (test_bit(RTL8152_UNPLUG, &tp->flags))
return;
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
tp->rtl_ops.aldps_enable(tp, true);
r8153_u2p3en(tp, true);
- r8153_u1u2en(tp, true);
+ tp->rtl_ops.u1u2_enable(tp, true);
usb_enable_lpm(tp->udev);
}
@@ -2938,7 +2939,7 @@ static void rtl8153_down(struct r8152 *tp)
return;
}
- r8153_u1u2en(tp, false);
+ tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
r8153_power_cut_en(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
@@ -4142,6 +4143,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_set = r8152_set_eee;
ops->in_nway = rtl8152_in_nway;
ops->aldps_enable = r8152_aldps_en;
+ ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
break;
@@ -4159,6 +4161,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->eee_set = r8153_set_eee;
ops->in_nway = rtl8153_in_nway;
ops->aldps_enable = r8153_aldps_en;
+ ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
break;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v3 3/7] r8152: add power_cut_en for rtl_ops
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 1/7] r8152: add aldps_enable for rtl_ops Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 2/7] r8152: add u1u2_enable " Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 4/7] r8152: add u2p3_enable " Hayes Wang
` (4 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add power_cut_en() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index f51d799..a4f8a01 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -622,6 +622,7 @@ struct r8152 {
void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*u1u2_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
+ void (*power_cut_en)(struct r8152 *tp, bool enable);
} rtl_ops;
int intr_interval;
@@ -2391,6 +2392,13 @@ static void r8153_power_cut_en(struct r8152 *tp, bool enable)
else
ocp_data &= ~(PWR_EN | PHASE2_EN);
ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+}
+
+static void r8153A_power_cut_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ r8153_power_cut_en(tp, enable);
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
ocp_data &= ~PCUT_STATUS;
@@ -2941,7 +2949,7 @@ static void rtl8153_down(struct r8152 *tp)
tp->rtl_ops.u1u2_enable(tp, false);
r8153_u2p3en(tp, false);
- r8153_power_cut_en(tp, false);
+ tp->rtl_ops.power_cut_en(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
tp->rtl_ops.aldps_enable(tp, true);
@@ -3397,7 +3405,7 @@ static void r8153_init(struct r8152 *tp)
ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
- r8153_power_cut_en(tp, false);
+ r8153A_power_cut_en(tp, false);
r8153_u1u2en(tp, true);
ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
@@ -4122,7 +4130,7 @@ static void rtl8153_unload(struct r8152 *tp)
if (test_bit(RTL8152_UNPLUG, &tp->flags))
return;
- r8153_power_cut_en(tp, false);
+ tp->rtl_ops.power_cut_en(tp, false);
}
static int rtl_ops_init(struct r8152 *tp)
@@ -4145,6 +4153,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->aldps_enable = r8152_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
+ ops->power_cut_en = r8152_power_cut_en;
break;
case RTL_VER_03:
@@ -4163,6 +4172,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->aldps_enable = r8153_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
+ ops->power_cut_en = r8153A_power_cut_en;
break;
default:
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v3 4/7] r8152: add u2p3_enable for rtl_ops
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
` (2 preceding siblings ...)
2016-06-28 12:28 ` [PATCH net-next v3 3/7] r8152: add power_cut_en " Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 5/7] r8152: support the new chip 8050 Hayes Wang
` (3 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add u2p3_enable() for rtl_ops.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index a4f8a01..df370e5 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -621,6 +621,7 @@ struct r8152 {
bool (*in_nway)(struct r8152 *);
void (*aldps_enable)(struct r8152 *tp, bool enable);
void (*u1u2_enable)(struct r8152 *tp, bool enable);
+ void (*u2p3_enable)(struct r8152 *tp, bool enable);
void (*hw_phy_cfg)(struct r8152 *);
void (*power_cut_en)(struct r8152 *tp, bool enable);
} rtl_ops;
@@ -2418,7 +2419,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
u32 ocp_data;
tp->rtl_ops.u1u2_enable(tp, false);
- r8153_u2p3en(tp, false);
+ tp->rtl_ops.u2p3_enable(tp, false);
__rtl_set_wol(tp, WAKE_ANY);
@@ -2431,7 +2432,7 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
} else {
__rtl_set_wol(tp, tp->saved_wolopts);
- r8153_u2p3en(tp, true);
+ tp->rtl_ops.u2p3_enable(tp, true);
tp->rtl_ops.u1u2_enable(tp, true);
}
}
@@ -2935,7 +2936,7 @@ static void rtl8153_up(struct r8152 *tp)
tp->rtl_ops.aldps_enable(tp, false);
r8153_first_init(tp);
tp->rtl_ops.aldps_enable(tp, true);
- r8153_u2p3en(tp, true);
+ tp->rtl_ops.u2p3_enable(tp, true);
tp->rtl_ops.u1u2_enable(tp, true);
usb_enable_lpm(tp->udev);
}
@@ -2948,7 +2949,7 @@ static void rtl8153_down(struct r8152 *tp)
}
tp->rtl_ops.u1u2_enable(tp, false);
- r8153_u2p3en(tp, false);
+ tp->rtl_ops.u2p3_enable(tp, false);
tp->rtl_ops.power_cut_en(tp, false);
tp->rtl_ops.aldps_enable(tp, false);
r8153_enter_oob(tp);
@@ -4152,6 +4153,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->in_nway = rtl8152_in_nway;
ops->aldps_enable = r8152_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
+ ops->u2p3_enable = r8153_u2p3en;
ops->hw_phy_cfg = r8152b_hw_phy_cfg;
ops->power_cut_en = r8152_power_cut_en;
break;
@@ -4171,6 +4173,7 @@ static int rtl_ops_init(struct r8152 *tp)
ops->in_nway = rtl8153_in_nway;
ops->aldps_enable = r8153_aldps_en;
ops->u1u2_enable = r8153_u1u2en;
+ ops->u2p3_enable = r8153_u2p3en;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
ops->power_cut_en = r8153A_power_cut_en;
break;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v3 5/7] r8152: support the new chip 8050
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
` (3 preceding siblings ...)
2016-06-28 12:28 ` [PATCH net-next v3 4/7] r8152: add u2p3_enable " Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 6/7] r8152: support RTL8153B Hayes Wang
` (2 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Support a new chip which has the product ID 0x8050.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index df370e5..7227931 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -647,6 +647,7 @@ enum rtl_version {
RTL_VER_04,
RTL_VER_05,
RTL_VER_06,
+ RTL_VER_07,
RTL_VER_MAX
};
@@ -3921,6 +3922,7 @@ static int rtl8152_get_coalesce(struct net_device *netdev,
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return -EOPNOTSUPP;
default:
break;
@@ -3940,6 +3942,7 @@ static int rtl8152_set_coalesce(struct net_device *netdev,
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return -EOPNOTSUPP;
default:
break;
@@ -4039,6 +4042,7 @@ static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
return eth_change_mtu(dev, new_mtu);
default:
break;
@@ -4110,6 +4114,9 @@ static void r8152b_get_version(struct r8152 *tp)
tp->version = RTL_VER_06;
tp->mii.supports_gmii = 1;
break;
+ case 0x4800:
+ tp->version = RTL_VER_07;
+ break;
default:
netif_info(tp, probe, tp->netdev,
"Unknown version 0x%04x\n", version);
@@ -4142,6 +4149,7 @@ static int rtl_ops_init(struct r8152 *tp)
switch (tp->version) {
case RTL_VER_01:
case RTL_VER_02:
+ case RTL_VER_07:
ops->init = r8152b_init;
ops->enable = rtl8152_enable;
ops->disable = rtl8152_disable;
@@ -4339,6 +4347,7 @@ static void rtl8152_disconnect(struct usb_interface *intf)
/* table of devices that work with this driver */
static struct usb_device_id rtl8152_table[] = {
+ {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8050)},
{REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
{REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
{REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v3 6/7] r8152: support RTL8153B
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
` (4 preceding siblings ...)
2016-06-28 12:28 ` [PATCH net-next v3 5/7] r8152: support the new chip 8050 Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 7/7] r8152: add byte_enable for ocp_read_word function Hayes Wang
2016-06-29 3:34 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Support new chip RTL8153B.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 569 +++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 542 insertions(+), 27 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 7227931..bd74fab 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -28,7 +28,7 @@
#include <linux/suspend.h>
/* Information for net-next */
-#define NETNEXT_VERSION "08"
+#define NETNEXT_VERSION "09"
/* Information for net */
#define NET_VERSION "3"
@@ -50,11 +50,14 @@
#define PLA_FMC 0xc0b4
#define PLA_CFG_WOL 0xc0b6
#define PLA_TEREDO_CFG 0xc0bc
+#define PLA_TEREDO_WAKE_BASE 0xc0c4
#define PLA_MAR 0xcd00
#define PLA_BACKUP 0xd000
#define PAL_BDC_CR 0xd1a0
#define PLA_TEREDO_TIMER 0xd2cc
#define PLA_REALWOW_TIMER 0xd2e8
+#define PLA_EFUSE_DATA 0xdd00
+#define PLA_EFUSE_CMD 0xdd02
#define PLA_LEDSEL 0xdd90
#define PLA_LED_FEATURE 0xdd92
#define PLA_PHYAR 0xde00
@@ -104,7 +107,9 @@
#define USB_CSR_DUMMY2 0xb466
#define USB_DEV_STAT 0xb808
#define USB_CONNECT_TIMER 0xcbf8
+#define USB_MSC_TIMER 0xcbfc
#define USB_BURST_SIZE 0xcfc0
+#define USB_LPM_CONFIG 0xcfd8
#define USB_USB_CTRL 0xd406
#define USB_PHY_CTRL 0xd408
#define USB_TX_AGG 0xd40a
@@ -112,14 +117,19 @@
#define USB_USB_TIMER 0xd428
#define USB_RX_EARLY_TIMEOUT 0xd42c
#define USB_RX_EARLY_SIZE 0xd42e
-#define USB_PM_CTRL_STATUS 0xd432
+#define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
+#define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
#define USB_TX_DMA 0xd434
+#define USB_UPT_RXDMA_OWN 0xd437
#define USB_TOLERANCE 0xd490
#define USB_LPM_CTRL 0xd41a
+#define USB_U1U2_TIMER 0xd4da
#define USB_UPS_CTRL 0xd800
#define USB_MISC_0 0xd81a
#define USB_POWER_CUT 0xd80a
#define USB_AFE_CTRL2 0xd824
+#define USB_UPS_CFG 0xd842
+#define USB_UPS_FLAGS 0xd848
#define USB_WDT11_CTRL 0xe43c
#define USB_BP_BA 0xfc26
#define USB_BP_0 0xfc28
@@ -141,6 +151,7 @@
#define OCP_EEE_AR 0xa41a
#define OCP_EEE_DATA 0xa41c
#define OCP_PHY_STATUS 0xa420
+#define OCP_NCTL_CFG 0xa42c
#define OCP_POWER_CFG 0xa430
#define OCP_EEE_CFG 0xa432
#define OCP_SRAM_ADDR 0xa436
@@ -150,9 +161,14 @@
#define OCP_EEE_ADV 0xa5d0
#define OCP_EEE_LPABLE 0xa5d2
#define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
+#define OCP_PHY_PATCH_STAT 0xb800
+#define OCP_PHY_PATCH_CMD 0xb820
+#define OCP_ADC_IOFFSET 0xbcfc
#define OCP_ADC_CFG 0xbc06
+#define OCP_SYSCLK_CFG 0xc416
/* SRAM Register */
+#define SRAM_GREEN_CFG 0x8011
#define SRAM_LPF_CFG 0x8012
#define SRAM_10M_AMP1 0x8080
#define SRAM_10M_AMP2 0x8082
@@ -250,6 +266,10 @@
/* PAL_BDC_CR */
#define ALDPS_PROXY_MODE 0x0001
+/* PLA_EFUSE_CMD */
+#define EFUSE_READ_CMD BIT(15)
+#define EFUSE_DATA_BIT16 BIT(7)
+
/* PLA_CONFIG34 */
#define LINK_ON_WAKE_EN 0x0010
#define LINK_OFF_WAKE_EN 0x0008
@@ -275,6 +295,7 @@
/* PLA_MAC_PWR_CTRL2 */
#define EEE_SPDWN_RATIO 0x8007
+#define MAC_CLK_SPDWN_EN BIT(15)
/* PLA_MAC_PWR_CTRL3 */
#define PKT_AVAIL_SPDWN_EN 0x0100
@@ -326,6 +347,9 @@
#define STAT_SPEED_HIGH 0x0000
#define STAT_SPEED_FULL 0x0002
+/* USB_LPM_CONFIG */
+#define LPM_U1U2_EN BIT(0)
+
/* USB_TX_AGG */
#define TX_AGG_MAX_THRESHOLD 0x03
@@ -333,11 +357,16 @@
#define RX_THR_SUPPER 0x0c350180
#define RX_THR_HIGH 0x7a120180
#define RX_THR_SLOW 0xffff0180
+#define RX_THR_B 0x00010001
/* USB_TX_DMA */
#define TEST_MODE_DISABLE 0x00000001
#define TX_SIZE_ADJUST1 0x00000100
+/* USB_UPT_RXDMA_OWN */
+#define OWN_UPDATE BIT(0)
+#define OWN_CLEAR BIT(1)
+
/* USB_UPS_CTRL */
#define POWER_CUT 0x0100
@@ -354,6 +383,8 @@
/* USB_POWER_CUT */
#define PWR_EN 0x0001
#define PHASE2_EN 0x0008
+#define UPS_EN BIT(4)
+#define USP_PREWAKE BIT(5)
/* USB_MISC_0 */
#define PCUT_STATUS 0x0001
@@ -380,6 +411,37 @@
#define SEN_VAL_NORMAL 0xa000
#define SEL_RXIDLE 0x0100
+/* USB_UPS_CFG */
+#define SAW_CNT_1MS_MASK 0x0fff
+
+/* USB_UPS_FLAGS */
+#define UPS_FLAGS_R_TUNE BIT(0)
+#define UPS_FLAGS_EN_10M_CKDIV BIT(1)
+#define UPS_FLAGS_250M_CKDIV BIT(2)
+#define UPS_FLAGS_EN_ALDPS BIT(3)
+#define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
+#define UPS_FLAGS_SPEED_MASK (0xf << 16)
+#define ups_flags_speed(x) ((x) << 16)
+#define UPS_FLAGS_EN_EEE BIT(20)
+#define UPS_FLAGS_EN_500M_EEE BIT(21)
+#define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
+#define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
+#define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
+#define UPS_FLAGS_EN_GREEN BIT(26)
+#define UPS_FLAGS_EN_FLOW_CTR BIT(27)
+
+enum spd_duplex {
+ NWAY_10M_HALF = 1,
+ NWAY_10M_FULL,
+ NWAY_100M_HALF,
+ NWAY_100M_FULL,
+ NWAY_1000M_FULL,
+ FORCE_10M_HALF,
+ FORCE_10M_FULL,
+ FORCE_100M_HALF,
+ FORCE_100M_FULL,
+};
+
/* OCP_ALDPS_CONFIG */
#define ENPWRSAVE 0x8000
#define ENPDNPS 0x0200
@@ -391,6 +453,9 @@
#define PHY_STAT_LAN_ON 3
#define PHY_STAT_PWRDN 5
+/* OCP_NCTL_CFG */
+#define PGA_RETURN_EN BIT(1)
+
/* OCP_POWER_CFG */
#define EEE_CLKDIV_EN 0x8000
#define EN_ALDPS 0x0004
@@ -432,17 +497,34 @@
#define EEE10_EN 0x0010
/* OCP_DOWN_SPEED */
+#define EN_EEE_CMODE BIT(14)
+#define EN_EEE_1000 BIT(13)
+#define EN_EEE_100 BIT(12)
+#define EN_10M_CLKDIV BIT(11)
#define EN_10M_BGOFF 0x0080
/* OCP_PHY_STATE */
#define TXDIS_STATE 0x01
#define ABD_STATE 0x02
+/* OCP_PHY_PATCH_STAT */
+#define PATCH_READY BIT(6)
+
+/* OCP_PHY_PATCH_CMD */
+#define PATCH_REQUEST BIT(4)
+
/* OCP_ADC_CFG */
#define CKADSEL_L 0x0100
#define ADC_EN 0x0080
#define EN_EMI_L 0x0040
+/* OCP_SYSCLK_CFG */
+#define CLK_DIV_EXPO(x) (min(x, 5) << 8)
+
+/* SRAM_GREEN_CFG */
+#define GREEN_ETH_EN BIT(15)
+#define R_TUNE_EN BIT(11)
+
/* SRAM_LPF_CFG */
#define LPF_AUTO_TUNE 0x8000
@@ -648,6 +730,8 @@ enum rtl_version {
RTL_VER_05,
RTL_VER_06,
RTL_VER_07,
+ RTL_VER_08,
+ RTL_VER_09,
RTL_VER_MAX
};
@@ -978,6 +1062,12 @@ static void sram_write(struct r8152 *tp, u16 addr, u16 data)
ocp_reg_write(tp, OCP_SRAM_DATA, data);
}
+static u16 sram_read(struct r8152 *tp, u16 addr)
+{
+ ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
+ return ocp_reg_read(tp, OCP_SRAM_DATA);
+}
+
static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
{
struct r8152 *tp = netdev_priv(netdev);
@@ -2168,11 +2258,40 @@ static int rtl8152_enable(struct r8152 *tp)
return rtl_enable(tp);
}
+static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp)
+{
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN,
+ OWN_UPDATE | OWN_CLEAR);
+}
+
static void r8153_set_rx_early_timeout(struct r8152 *tp)
{
u32 ocp_data = tp->coalesce / 8;
- ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
+ * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
+ */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ 128 / 8);
+ ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
+ ocp_data);
+ r8153b_rx_agg_chg_indicate(tp);
+ break;
+
+ default:
+ break;
+ }
}
static void r8153_set_rx_early_size(struct r8152 *tp)
@@ -2181,6 +2300,15 @@ static void r8153_set_rx_early_size(struct r8152 *tp)
u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
+
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8153b_rx_agg_chg_indicate(tp);
+ break;
+ default:
+ break;
+ }
}
static int rtl8153_enable(struct r8152 *tp)
@@ -2372,6 +2500,19 @@ static void r8153_u1u2en(struct r8152 *tp, bool enable)
usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
}
+static void r8153b_u1u2en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
+ if (enable)
+ ocp_data |= LPM_U1U2_EN;
+ else
+ ocp_data &= ~LPM_U1U2_EN;
+
+ ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
+}
+
static void r8153_u2p3en(struct r8152 *tp, bool enable)
{
u32 ocp_data;
@@ -2384,15 +2525,61 @@ static void r8153_u2p3en(struct r8152 *tp, bool enable)
ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
}
+static void r8153b_u2p3en(struct r8152 *tp, bool enable)
+{
+ /* For RTL8153B, if U2P3 is enabled, the transfer may never finish when
+ * the transfer size is multiple of MaxPacketSize.
+ */
+ if (!enable)
+ r8153_u2p3en(tp, enable);
+}
+
+static void r8153b_ups_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ break;
+
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ default:
+ return;
+ }
+
+ ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT);
+ if (enable) {
+ tp->rtl_ops.power_cut_en(tp, false);
+ ocp_data |= UPS_EN;
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+ } else {
+ ocp_data &= ~UPS_EN;
+ ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
+ ocp_data &= ~PCUT_STATUS;
+ ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
+ }
+}
+
static void r8153_power_cut_en(struct r8152 *tp, bool enable)
{
u32 ocp_data;
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
- if (enable)
+ if (enable) {
+ r8153b_ups_en(tp, false);
ocp_data |= PWR_EN | PHASE2_EN;
- else
+ } else {
ocp_data &= ~(PWR_EN | PHASE2_EN);
+ }
ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
}
@@ -2431,7 +2618,10 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
+
+ r8153b_ups_en(tp, true);
} else {
+ r8153b_ups_en(tp, false);
__rtl_set_wol(tp, tp->saved_wolopts);
tp->rtl_ops.u2p3_enable(tp, true);
tp->rtl_ops.u1u2_enable(tp, true);
@@ -2463,9 +2653,31 @@ static void r8153_teredo_off(struct r8152 *tp)
{
u32 ocp_data;
- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
- ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
- ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
+ ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK |
+ OOB_TEREDO_EN);
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* The bit 0 ~ 7 are relative with teredo settings. They are
+ * W1C (write 1 to clear), so set all 1 to disable it.
+ */
+ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, 0xff);
+ break;
+
+ default:
+ break;
+ }
ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
@@ -2633,6 +2845,33 @@ static void r8152b_enter_oob(struct r8152 *tp)
ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
}
+static int r8153_patch_request(struct r8152 *tp, bool request)
+{
+ u16 data;
+ int i;
+
+ data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD);
+ if (request)
+ data |= PATCH_REQUEST;
+ else
+ data &= ~PATCH_REQUEST;
+ ocp_reg_write(tp, OCP_PHY_PATCH_CMD, data);
+
+ for (i = 0; request && i < 5000; i++) {
+ usleep_range(1000, 2000);
+ if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)
+ break;
+ }
+
+ if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {
+ netif_err(tp, drv, tp->netdev, "patch request fail\n");
+ r8153_patch_request(tp, false);
+ return -ETIME;
+ } else {
+ return 0;
+ }
+}
+
static void r8153_hw_phy_cfg(struct r8152 *tp)
{
u32 ocp_data;
@@ -2680,6 +2919,101 @@ static void r8153_hw_phy_cfg(struct r8152 *tp)
set_bit(PHY_RESET, &tp->flags);
}
+static void r8153b_ups_flags_w0w1(struct r8152 *tp, u32 set, u32 clear)
+{
+ u32 ocp_data;
+
+ ocp_data = ocp_read_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS);
+ ocp_data &= ~clear;
+ ocp_data |= set;
+ ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ocp_data);
+}
+
+static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
+{
+ u32 ocp_data;
+
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD, EFUSE_READ_CMD | addr);
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
+ ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
+ ocp_data |= ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
+
+ return ocp_data;
+}
+
+static void r8153b_hw_phy_cfg(struct r8152 *tp)
+{
+ u32 ocp_data, ups_flags = 0;
+ u16 data;
+
+ data = r8152_mdio_read(tp, MII_BMCR);
+ if (data & BMCR_PDOWN) {
+ data &= ~BMCR_PDOWN;
+ r8152_mdio_write(tp, MII_BMCR, data);
+ }
+
+ data = sram_read(tp, SRAM_GREEN_CFG);
+ data |= GREEN_ETH_EN | R_TUNE_EN;
+ sram_write(tp, SRAM_GREEN_CFG, data);
+ data = ocp_reg_read(tp, OCP_NCTL_CFG);
+ data |= PGA_RETURN_EN;
+ ocp_reg_write(tp, OCP_NCTL_CFG, data);
+ ups_flags |= UPS_FLAGS_EN_GREEN | UPS_FLAGS_R_TUNE;
+
+ /* ADC Bias Calibration:
+ * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
+ * bit (bit3) to rebuild the real 16-bit data. Write the data to the
+ * ADC ioffset.
+ */
+ ocp_data = r8152_efuse_read(tp, 0x7d);
+ data = (u16)(((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7));
+ if (data != 0xffff)
+ ocp_reg_write(tp, OCP_ADC_IOFFSET, data);
+
+ /* ups mode tx-link-pulse timing adjustment:
+ * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
+ * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
+ */
+ ocp_data = ocp_reg_read(tp, 0xc426);
+ ocp_data &= 0x3fff;
+ if (ocp_data) {
+ u32 swr_cnt_1ms_ini;
+
+ swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
+ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
+ ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
+ ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
+ }
+
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
+ ocp_data |= PFM_PWM_SWITCH;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
+
+ /* Advnace EEE */
+ if (!r8153_patch_request(tp, true)) {
+ data = ocp_reg_read(tp, OCP_POWER_CFG);
+ data |= EEE_CLKDIV_EN;
+ ocp_reg_write(tp, OCP_POWER_CFG, data);
+
+ data = ocp_reg_read(tp, OCP_DOWN_SPEED);
+ data |= EN_EEE_CMODE | EN_EEE_1000 | EN_EEE_100 | EN_10M_CLKDIV;
+ ocp_reg_write(tp, OCP_DOWN_SPEED, data);
+
+ ocp_reg_write(tp, OCP_SYSCLK_CFG, 0);
+ ocp_reg_write(tp, OCP_SYSCLK_CFG, CLK_DIV_EXPO(5));
+
+ ups_flags |= UPS_FLAGS_EN_10M_CKDIV | UPS_FLAGS_250M_CKDIV |
+ UPS_FLAGS_EN_EEE_CKDIV | UPS_FLAGS_EEE_CMOD_LV_EN |
+ UPS_FLAGS_EEE_PLLOFF_GIGA;
+
+ r8153_patch_request(tp, false);
+ }
+
+ r8153b_ups_flags_w0w1(tp, ups_flags, 0);
+
+ set_bit(PHY_RESET, &tp->flags);
+}
+
static void r8153_first_init(struct r8152 *tp)
{
u32 ocp_data;
@@ -2738,6 +3072,16 @@ static void r8153_first_init(struct r8152 *tp)
/* TX share fifo free credit full threshold */
ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_B);
+ break;
+
+ default:
+ break;
+ }
+
/* rx aggregation */
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
@@ -2775,9 +3119,28 @@ static void r8153_enter_oob(struct r8152 *tp)
ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
- ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
- ocp_data &= ~TEREDO_WAKE_MASK;
- ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
+ ocp_data &= ~TEREDO_WAKE_MASK;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* Clear teredo wake event. bit[15:8] is the teredo wakeup
+ * type. Set it to zero. bits[7:0] are the W1C bits about
+ * the events. Set them to all 1 to clear them.
+ */
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_WAKE_BASE, 0x00ff);
+ break;
+
+ default:
+ break;
+ }
rtl_rx_vlan_en(tp, true);
@@ -2811,6 +3174,16 @@ static void r8153_aldps_en(struct r8152 *tp, bool enable)
}
}
+static void r8153b_aldps_en(struct r8152 *tp, bool enable)
+{
+ r8153_aldps_en(tp, enable);
+
+ if (enable)
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_ALDPS, 0);
+ else
+ r8153b_ups_flags_w0w1(tp, 0, UPS_FLAGS_EN_ALDPS);
+}
+
static void rtl8153_disable(struct r8152 *tp)
{
rtl8152_disable(tp);
@@ -2820,6 +3193,7 @@ static void rtl8153_disable(struct r8152 *tp)
static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
{
u16 bmcr, anar, gbcr;
+ enum spd_duplex speed_duplex;
int ret = 0;
cancel_delayed_work_sync(&tp->schedule);
@@ -2837,32 +3211,43 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
if (speed == SPEED_10) {
bmcr = 0;
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ speed_duplex = FORCE_10M_HALF;
} else if (speed == SPEED_100) {
bmcr = BMCR_SPEED100;
anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ speed_duplex = FORCE_100M_HALF;
} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
bmcr = BMCR_SPEED1000;
gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+ speed_duplex = NWAY_1000M_FULL;
} else {
ret = -EINVAL;
goto out;
}
- if (duplex == DUPLEX_FULL)
+ if (duplex == DUPLEX_FULL) {
bmcr |= BMCR_FULLDPLX;
+ if (speed != SPEED_1000)
+ speed_duplex++;
+ }
} else {
if (speed == SPEED_10) {
- if (duplex == DUPLEX_FULL)
+ if (duplex == DUPLEX_FULL) {
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
- else
+ speed_duplex = NWAY_10M_FULL;
+ } else {
anar |= ADVERTISE_10HALF;
+ speed_duplex = NWAY_10M_HALF;
+ }
} else if (speed == SPEED_100) {
if (duplex == DUPLEX_FULL) {
anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ speed_duplex = NWAY_100M_FULL;
} else {
anar |= ADVERTISE_10HALF;
anar |= ADVERTISE_100HALF;
+ speed_duplex = NWAY_100M_HALF;
}
} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
if (duplex == DUPLEX_FULL) {
@@ -2874,6 +3259,7 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
anar |= ADVERTISE_100HALF;
gbcr |= ADVERTISE_1000HALF;
}
+ speed_duplex = NWAY_1000M_FULL;
} else {
ret = -EINVAL;
goto out;
@@ -2891,6 +3277,23 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
r8152_mdio_write(tp, MII_ADVERTISE, anar);
r8152_mdio_write(tp, MII_BMCR, bmcr);
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8153b_ups_flags_w0w1(tp, ups_flags_speed(speed_duplex),
+ UPS_FLAGS_SPEED_MASK);
+ break;
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ case RTL_VER_07:
+ default:
+ break;
+ }
+
if (bmcr & BMCR_RESET) {
int i;
@@ -3261,12 +3664,28 @@ static void r8153_eee_en(struct r8152 *tp, bool enable)
ocp_reg_write(tp, OCP_EEE_CFG, config);
}
+static void r8153b_eee_en(struct r8152 *tp, bool enable)
+{
+ r8153_eee_en(tp, enable);
+
+ if (enable)
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_EEE, 0);
+ else
+ r8153b_ups_flags_w0w1(tp, 0, UPS_FLAGS_EN_EEE);
+}
+
static void r8153_enable_eee(struct r8152 *tp)
{
r8153_eee_en(tp, true);
ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
}
+static void r8153b_enable_eee(struct r8152 *tp)
+{
+ r8153b_eee_en(tp, true);
+ ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
+}
+
static void r8152b_enable_fc(struct r8152 *tp)
{
u16 anar;
@@ -3276,6 +3695,12 @@ static void r8152b_enable_fc(struct r8152 *tp)
r8152_mdio_write(tp, MII_ADVERTISE, anar);
}
+static void r8153b_enable_fc(struct r8152 *tp)
+{
+ r8152b_enable_fc(tp);
+ r8153b_ups_flags_w0w1(tp, UPS_FLAGS_EN_FLOW_CTR, 0);
+}
+
static void rtl_tally_reset(struct r8152 *tp)
{
u32 ocp_data;
@@ -3425,6 +3850,69 @@ static void r8153_init(struct r8152 *tp)
r8152b_enable_fc(tp);
rtl_tally_reset(tp);
r8153_u2p3en(tp, true);
+
+ switch (tp->udev->speed) {
+ case USB_SPEED_SUPER:
+ case USB_SPEED_SUPER_PLUS:
+ tp->coalesce = COALESCE_SUPER;
+ break;
+ case USB_SPEED_HIGH:
+ tp->coalesce = COALESCE_HIGH;
+ break;
+ default:
+ tp->coalesce = COALESCE_SLOW;
+ break;
+ }
+}
+
+static void r8153b_init(struct r8152 *tp)
+{
+ u32 ocp_data;
+ int i;
+
+ if (test_bit(RTL8152_UNPLUG, &tp->flags))
+ return;
+
+ r8153b_aldps_en(tp, false);
+ r8153b_u1u2en(tp, false);
+
+ for (i = 0; i < 500; i++) {
+ if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
+ AUTOLOAD_DONE)
+ break;
+ msleep(20);
+ }
+
+ for (i = 0; i < 500; i++) {
+ ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
+ if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
+ break;
+ msleep(20);
+ }
+
+ r8153b_u2p3en(tp, false);
+
+ /* MSC timer = 0xfff * 8ms = 32760 ms */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
+
+ /* U1/U2/L1 idle timer. 500 us */
+ ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
+
+ r8153_power_cut_en(tp, false);
+ r8153b_ups_en(tp, false);
+ r8153b_u1u2en(tp, true);
+
+ /* MAC clock speed down */
+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
+ ocp_data |= MAC_CLK_SPDWN_EN;
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
+
+ r8153b_enable_eee(tp);
+ r8153b_aldps_en(tp, true);
+ r8153b_enable_fc(tp);
+ rtl_tally_reset(tp);
+
+ tp->coalesce = 15000; /* 15 us */
}
static int rtl8152_pre_reset(struct usb_interface *intf)
@@ -3847,6 +4335,20 @@ static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
return 0;
}
+static int r8153b_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
+{
+ u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
+
+ r8153b_eee_en(tp, eee->eee_enabled);
+
+ if (!eee->eee_enabled)
+ val = 0;
+
+ ocp_reg_write(tp, OCP_EEE_ADV, val);
+
+ return 0;
+}
+
static int
rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
{
@@ -4117,6 +4619,14 @@ static void r8152b_get_version(struct r8152 *tp)
case 0x4800:
tp->version = RTL_VER_07;
break;
+ case 0x6000:
+ tp->version = RTL_VER_08;
+ tp->mii.supports_gmii = 1;
+ break;
+ case 0x6010:
+ tp->version = RTL_VER_09;
+ tp->mii.supports_gmii = 1;
+ break;
default:
netif_info(tp, probe, tp->netdev,
"Unknown version 0x%04x\n", version);
@@ -4186,6 +4696,24 @@ static int rtl_ops_init(struct r8152 *tp)
ops->power_cut_en = r8153A_power_cut_en;
break;
+ case RTL_VER_08:
+ case RTL_VER_09:
+ ops->init = r8153b_init;
+ ops->enable = rtl8153_enable;
+ ops->disable = rtl8153_disable;
+ ops->up = rtl8153_up;
+ ops->down = rtl8153_down;
+ ops->unload = rtl8153_unload;
+ ops->eee_get = r8153_get_eee;
+ ops->eee_set = r8153b_set_eee;
+ ops->in_nway = rtl8153_in_nway;
+ ops->aldps_enable = r8153b_aldps_en;
+ ops->u1u2_enable = r8153b_u1u2en;
+ ops->u2p3_enable = r8153b_u2p3en;
+ ops->hw_phy_cfg = r8153b_hw_phy_cfg;
+ ops->power_cut_en = r8153_power_cut_en;
+ break;
+
default:
ret = -ENODEV;
netif_err(tp, probe, tp->netdev, "Unknown Device\n");
@@ -4257,19 +4785,6 @@ static int rtl8152_probe(struct usb_interface *intf,
tp->mii.reg_num_mask = 0x1f;
tp->mii.phy_id = R8152_PHY_ID;
- switch (udev->speed) {
- case USB_SPEED_SUPER:
- case USB_SPEED_SUPER_PLUS:
- tp->coalesce = COALESCE_SUPER;
- break;
- case USB_SPEED_HIGH:
- tp->coalesce = COALESCE_HIGH;
- break;
- default:
- tp->coalesce = COALESCE_SLOW;
- break;
- }
-
tp->autoneg = AUTONEG_ENABLE;
tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
tp->duplex = DUPLEX_FULL;
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH net-next v3 7/7] r8152: add byte_enable for ocp_read_word function
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
` (5 preceding siblings ...)
2016-06-28 12:28 ` [PATCH net-next v3 6/7] r8152: support RTL8153B Hayes Wang
@ 2016-06-28 12:28 ` Hayes Wang
2016-06-29 3:34 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-28 12:28 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb, Hayes Wang
Add byte_enable for ocp_read_word() to replace reading 4
bytes data with reading the desired 2 bytes data.
This is used to avoid the issue which is described in
commit b4d99def0938 ("r8152: remove sram_read"). The
original method always reads 4 bytes data, and it may
have problem when reading the PHY registers.
The new method is supported since RTL8152B, but it
doesn't influence the previous chips. The bits of the
byte_enable for the previous chips are the reserved
bits, and the hw would ignore them.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/usb/r8152.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index bd74fab..e5405e6 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -946,11 +946,13 @@ static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
{
u32 data;
__le32 tmp;
+ u16 byen = BYTE_EN_WORD;
u8 shift = index & 2;
index &= ~3;
+ byen <<= shift;
- generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
+ generic_ocp_read(tp, index, sizeof(tmp), &tmp, type | byen);
data = __le32_to_cpu(tmp);
data >>= (shift * 8);
--
2.4.11
^ permalink raw reply related [flat|nested] 26+ messages in thread
* RE: [PATCH net-next v3 0/7] r8152: support new chips
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
` (6 preceding siblings ...)
2016-06-28 12:28 ` [PATCH net-next v3 7/7] r8152: add byte_enable for ocp_read_word function Hayes Wang
@ 2016-06-29 3:34 ` Hayes Wang
7 siblings, 0 replies; 26+ messages in thread
From: Hayes Wang @ 2016-06-29 3:34 UTC (permalink / raw)
To: netdev; +Cc: nic_swsd, linux-kernel, linux-usb
> From: Hayes Wang
> Sent: Tuesday, June 28, 2016 8:29 PM
> To: netdev@vger.kernel.org
> Cc: nic_swsd; linux-kernel@vger.kernel.org; linux-usb@vger.kernel.org; Hayes
> Wang
> Subject: [PATCH net-next v3 0/7] r8152: support new chips
Excuse me. Please ignore these patches.
We want to do more tests for the chips. I would submit the patches after the
settings are stable.
Best Regards,
Hayes
^ permalink raw reply [flat|nested] 26+ messages in thread
end of thread, other threads:[~2016-06-29 3:34 UTC | newest]
Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-06-27 5:07 [PATCH net-next 0/6] r8152: support new chips Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 1/6] r8152: add aldps_enable for rtl_ops Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 2/6] r8152: add u1u2_enable " Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 3/6] r8152: add power_cut_en " Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 4/6] r8152: support the new chip 8050 Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 5/6] r8152: support RTL8153B Hayes Wang
2016-06-27 5:07 ` [PATCH net-next 6/6] r8152: add byte_enable for ocp_read_word function Hayes Wang
2016-06-27 5:07 ` Hayes Wang
2016-06-27 10:57 ` Sergei Shtylyov
2016-06-28 2:45 ` [PATCH net-next v2 0/6] r8152: support new chips Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 1/6] r8152: add aldps_enable for rtl_ops Hayes Wang
2016-06-28 2:45 ` Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 2/6] r8152: add u1u2_enable " Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 3/6] r8152: add power_cut_en " Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 4/6] r8152: support the new chip 8050 Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 5/6] r8152: support RTL8153B Hayes Wang
2016-06-28 2:45 ` [PATCH net-next v2 6/6] r8152: add byte_enable for ocp_read_word function Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 1/7] r8152: add aldps_enable for rtl_ops Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 2/7] r8152: add u1u2_enable " Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 3/7] r8152: add power_cut_en " Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 4/7] r8152: add u2p3_enable " Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 5/7] r8152: support the new chip 8050 Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 6/7] r8152: support RTL8153B Hayes Wang
2016-06-28 12:28 ` [PATCH net-next v3 7/7] r8152: add byte_enable for ocp_read_word function Hayes Wang
2016-06-29 3:34 ` [PATCH net-next v3 0/7] r8152: support new chips Hayes Wang
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