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From: Andrzej Hajda <a.hajda@samsung.com>
To: dri-devel@lists.freedesktop.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	Pawel Moll <pawel.moll@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Rob Herring <robh+dt@kernel.org>,
	Kumar Gala <galak@codeaurora.org>,
	Grant Likely <grant.likely@linaro.org>,
	Denis Carikli <denis@eukrea.com>,
	Marek Szyprowski <m.szyprowski@samsung.com>
Subject: [PATCH v2 9/9] drm/exynos/fimd: remove unused variable
Date: Mon, 17 Mar 2014 14:16:12 +0100	[thread overview]
Message-ID: <1395062172-19756-1-git-send-email-a.hajda@samsung.com> (raw)
In-Reply-To: <1395052045-23848-10-git-send-email-a.hajda@samsung.com>

The patch removes unused vidcon0 field from fimd_context structure.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
v2:
- corrected vidcon0 calculation
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c | 20 ++++++--------------
 1 file changed, 6 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index dbfad4e..158d53a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -114,7 +114,6 @@ struct fimd_context {
 	struct fimd_win_data		win_data[WINDOWS_NR];
 	unsigned int			default_win;
 	unsigned long			irq_flags;
-	u32				vidcon0;
 	bool				suspended;
 	int				pipe;
 	wait_queue_head_t		wait_vsync_queue;
@@ -269,26 +268,19 @@ static void fimd_commit(struct exynos_drm_manager *mgr)
 	       VIDTCON2_HOZVAL_E(mode->hdisplay - 1);
 	writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 
-	/* setup clock source, clock divider, enable dma. */
-	val = ctx->vidcon0;
-	val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
+	/*
+	 * fields of register with prefix '_F' would be updated
+	 * at vsync(same as dma start)
+	 */
+	val = VIDCON0_ENVID | VIDCON0_ENVID_F;
 
-	if (ctx->driver_data->has_clksel) {
-		val &= ~VIDCON0_CLKSEL_MASK;
+	if (ctx->driver_data->has_clksel)
 		val |= VIDCON0_CLKSEL_LCD;
-	}
 
 	clkdiv = fimd_calc_clkdiv(ctx, mode);
 	if (clkdiv > 1)
 		val |= VIDCON0_CLKVAL_F(clkdiv - 1) | VIDCON0_CLKDIR;
-	else
-		val &= ~VIDCON0_CLKDIR;	/* 1:1 clock */
 
-	/*
-	 * fields of register with prefix '_F' would be updated
-	 * at vsync(same as dma start)
-	 */
-	val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 	writel(val, ctx->regs + VIDCON0);
 }
 
-- 
1.8.3.2

  reply	other threads:[~2014-03-17 13:16 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-17 10:27 [PATCH 0/9] Restore parallel display support for Exynos based boards Andrzej Hajda
2014-03-17 10:27 ` [PATCH 1/9] drm/exynos: delay fbdev initialization until an output is connected Andrzej Hajda
2014-03-17 10:27 ` [PATCH 2/9] drm/exynos: init kms poll after creation of connectors Andrzej Hajda
2014-03-17 10:27 ` [PATCH 3/9] drm/exynos: correct timing porch conversion Andrzej Hajda
2014-03-17 10:27 ` [PATCH 4/9] exynos/fimd: add parallel output related bindings Andrzej Hajda
2014-03-17 10:27 ` [PATCH 5/9] drm/exynos: restore parallel output interface support Andrzej Hajda
2014-03-17 12:03   ` [PATCH v2 " Andrzej Hajda
2014-03-17 10:27 ` [PATCH 6/9] ARM: dts: exynos4210-universal: add exynos/fimd node Andrzej Hajda
2014-03-17 10:27 ` [PATCH 7/9] drm/modes: add polarization handling to mode conversion Andrzej Hajda
2014-03-17 10:27 ` [PATCH 8/9] drm/exynos/fimd: use polarization flags provided by drm_display_mode Andrzej Hajda
2014-03-20  6:03   ` Inki Dae
2014-03-20  7:01     ` Andrzej Hajda
2014-03-20 13:26     ` [PATCH] ARM: dts: exynos4210-universal: add fimd polarization settings Andrzej Hajda
2014-03-21  5:36       ` Inki Dae
     [not found] ` <1395052045-23848-1-git-send-email-a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-03-17 10:27   ` [PATCH 9/9] drm/exynos/fimd: remove unused variable Andrzej Hajda
2014-03-17 13:16     ` Andrzej Hajda [this message]
2014-03-18 13:05 ` [PATCH 0/9] Restore parallel display support for Exynos based boards Tomasz Figa

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