[PATCH 1/6] ARM: socfpga: dts: fix pdma interrupt

[PATCH 1/6] ARM: socfpga: dts: fix pdma interrupt

[Steffen Trumtrar]

The first interrupt is not at 180 but 104. Fix it.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 537f1a5..0c3344f 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -75,7 +75,7 @@
 			pdma: pdma at ffe01000 {
 				compatible = "arm,pl330", "arm,primecell";
 				reg = <0xffe01000 0x1000>;
-				interrupts = <0 180 4>;
+				interrupts = <0 104 4>;
 				#dma-cells = <1>;
 				#dma-channels = <8>;
 				#dma-requests = <32>;
-- 
1.9.1

[PATCH 2/6] ARM: socfpga: dts: add remaining interrupts for pdma

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 0c3344f..7867e7f 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -75,7 +75,14 @@
 			pdma: pdma at ffe01000 {
 				compatible = "arm,pl330", "arm,primecell";
 				reg = <0xffe01000 0x1000>;
-				interrupts = <0 104 4>;
+				interrupts = <0 104 4>,
+					     <0 105 4>,
+					     <0 106 4>,
+					     <0 107 4>,
+					     <0 108 4>,
+					     <0 109 4>,
+					     <0 110 4>,
+					     <0 111 4>;
 				#dma-cells = <1>;
 				#dma-channels = <8>;
 				#dma-requests = <32>;
-- 
1.9.1

[PATCH 3/6] ARM: socfpga: dts: add i2c busses

[Steffen Trumtrar]

Add all 4 i2c busses.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 7867e7f..d0594c3 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -470,6 +470,50 @@
 			status = "disabled";
 		};
 
+		i2c0: i2c at 0xffc04000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc04000 0x1000>;
+			clock-frequency = <400000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 158 0x4>;
+			status = "disabled";
+		};
+
+		i2c1: i2c at 0xffc05000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc05000 0x1000>;
+			clock-frequency = <100000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 159 0x4>;
+			status = "disabled";
+		};
+
+		i2c2: i2c at 0xffc06000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc06000 0x1000>;
+			clock-frequency = <100000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 160 0x4>;
+			status = "disabled";
+		};
+
+		i2c3: i2c at 0xffc07000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc07000 0x1000>;
+			clock-frequency = <100000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 161 0x4>;
+			status = "disabled";
+		};
+
 		L2: l2-cache at fffef000 {
 			compatible = "arm,pl310-cache";
 			reg = <0xfffef000 0x1000>;
-- 
1.9.1

[PATCH 4/6] ARM: socfpga: dts: add can0+1

[Steffen Trumtrar]

Add both can controllers to the dtsi.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index d0594c3..51148b8 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -470,6 +470,22 @@
 			status = "disabled";
 		};
 
+		can0: can at 0xffc00000 {
+			compatible = "bosch,d_can";
+			reg = <0xffc00000 0x1000>;
+			interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
+			clocks = <&can0_clk>;
+			status = "disabled";
+		};
+
+		can1: can at 0xffc01000 {
+			compatible = "bosch,d_can";
+			reg = <0xffc01000 0x1000>;
+			interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
+			clocks = <&can1_clk>;
+			status = "disabled";
+		};
+
 		i2c0: i2c at 0xffc04000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
1.9.1

[PATCH 5/6] ARM: socfpga: dts: add support for EBV SOCrates

[Steffen Trumtrar]

The SOCrates is a SOCFpga-Cyclone5 based board from EBV.
Add support for it.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/Makefile                      |  1 +
 arch/arm/boot/dts/socfpga_cyclone5_socrates.dts | 41 +++++++++++++++++++++++++
 2 files changed, 42 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_socrates.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0320303..4308695 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -267,6 +267,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
 dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_sockit.dtb \
+	socfpga_cyclone5_socrates.dtb \
 	socfpga_vt.dtb
 dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
 	spear1340-evb.dtb
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
new file mode 100644
index 0000000..1e31f32
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
@@ -0,0 +1,41 @@
+/*
+ *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/include/ "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "EBV SOCrates";
+	compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>; /* 1GB */
+	};
+};
+
+&gmac1 {
+	status = "okay";
+};
+
+&mmc {
+	status = "okay";
+};
-- 
1.9.1

[PATCH 6/6] ARM: socfpga: dts: add rtc on i2c0 to socrates

[Steffen Trumtrar]

The SOCrates has an M41T82M RTC on i2c0. Add it.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga_cyclone5_socrates.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
index 1e31f32..f8d17dc 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
@@ -36,6 +36,15 @@
 	status = "okay";
 };
 
+&i2c0 {
+	status = "okay";
+
+	rtc: rtc at 68 {
+		compatible = "stm,m41t82";
+		reg = <0x68>;
+	};
+};
+
 &mmc {
 	status = "okay";
 };
-- 
1.9.1

[PATCH 3/6] ARM: socfpga: dts: add i2c busses

[Dinh Nguyen]

On Mon, 2014-03-31 at 17:40 +0200, Steffen Trumtrar wrote:
> Add all 4 i2c busses.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
>  arch/arm/boot/dts/socfpga.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index 7867e7f..d0594c3 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -470,6 +470,50 @@
>  			status = "disabled";
>  		};
>  
> +		i2c0: i2c at 0xffc04000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc04000 0x1000>;
> +			clock-frequency = <400000000>;

"clock-frequency" is not needed as the driver can get the clock
frequency from the clock driver.

> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 158 0x4>;
> +			status = "disabled";
> +		};
> +
> +		i2c1: i2c at 0xffc05000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc05000 0x1000>;
> +			clock-frequency = <100000000>;

Same..

> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 159 0x4>;
> +			status = "disabled";
> +		};
> +
> +		i2c2: i2c at 0xffc06000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc06000 0x1000>;
> +			clock-frequency = <100000000>;

Same...

> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 160 0x4>;
> +			status = "disabled";
> +		};
> +
> +		i2c3: i2c at 0xffc07000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc07000 0x1000>;
> +			clock-frequency = <100000000>;

Same..

thanks,
Dinh
> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 161 0x4>;
> +			status = "disabled";
> +		};
> +
>  		L2: l2-cache at fffef000 {
>  			compatible = "arm,pl310-cache";
>  			reg = <0xfffef000 0x1000>;

[PATCH 4/6] ARM: socfpga: dts: add can0+1

[Dinh Nguyen]

On Mon, 2014-03-31 at 17:40 +0200, Steffen Trumtrar wrote:
> Add both can controllers to the dtsi.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
>  arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index d0594c3..51148b8 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -470,6 +470,22 @@
>  			status = "disabled";
>  		};
>  
> +		can0: can at 0xffc00000 {

I've seen a comment from Rob Herring to remove the 0x here.
> +			compatible = "bosch,d_can";
> +			reg = <0xffc00000 0x1000>;
> +			interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
> +			clocks = <&can0_clk>;
> +			status = "disabled";
> +		};
> +
> +		can1: can at 0xffc01000 {

Same...

> +			compatible = "bosch,d_can";
> +			reg = <0xffc01000 0x1000>;
> +			interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
> +			clocks = <&can1_clk>;
> +			status = "disabled";
> +		};
> +
>  		i2c0: i2c at 0xffc04000 {

Same comment here..but would apply to patch 3/6.

Thanks,

Dinh
>  			#address-cells = <1>;
>  			#size-cells = <0>;

[PATCH 4/6] ARM: socfpga: dts: add can0+1

[Steffen Trumtrar]

Hi Dinh!

On Tue, Apr 01, 2014 at 02:34:50PM -0500, Dinh Nguyen wrote:
> On Mon, 2014-03-31 at 17:40 +0200, Steffen Trumtrar wrote:
> > Add both can controllers to the dtsi.
> > 
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> >  arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++
> >  1 file changed, 16 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> > index d0594c3..51148b8 100644
> > --- a/arch/arm/boot/dts/socfpga.dtsi
> > +++ b/arch/arm/boot/dts/socfpga.dtsi
> > @@ -470,6 +470,22 @@
> >  			status = "disabled";
> >  		};
> >  
> > +		can0: can at 0xffc00000 {
> 
> I've seen a comment from Rob Herring to remove the 0x here.

Yep, you are right. I missed this as it looks weird to me without the 0x,
but common practice is without...

> > +			compatible = "bosch,d_can";
> > +			reg = <0xffc00000 0x1000>;
> > +			interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
> > +			clocks = <&can0_clk>;
> > +			status = "disabled";
> > +		};
> > +
> > +		can1: can at 0xffc01000 {
> 
> Same...
> 
> > +			compatible = "bosch,d_can";
> > +			reg = <0xffc01000 0x1000>;
> > +			interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
> > +			clocks = <&can1_clk>;
> > +			status = "disabled";
> > +		};
> > +
> >  		i2c0: i2c at 0xffc04000 {
> 
> Same comment here..but would apply to patch 3/6.
> 

I will fix all those.

Thanks,
Steffen

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 3/6] ARM: socfpga: dts: add i2c busses

[Steffen Trumtrar]

Hi!

On Tue, Apr 01, 2014 at 02:32:20PM -0500, Dinh Nguyen wrote:
> On Mon, 2014-03-31 at 17:40 +0200, Steffen Trumtrar wrote:
> > Add all 4 i2c busses.
> > 
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> >  arch/arm/boot/dts/socfpga.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 44 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> > index 7867e7f..d0594c3 100644
> > --- a/arch/arm/boot/dts/socfpga.dtsi
> > +++ b/arch/arm/boot/dts/socfpga.dtsi
> > @@ -470,6 +470,50 @@
> >  			status = "disabled";
> >  		};
> >  
> > +		i2c0: i2c at 0xffc04000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc04000 0x1000>;
> > +			clock-frequency = <400000000>;
> 
> "clock-frequency" is not needed as the driver can get the clock
> frequency from the clock driver.
> 

You are right of course. I will remove that.
Although, I think I remember seeing patches that add this functionality
to the driver. So you can change the speed setting. But even than you
are right, as something like that wouldn't belong here in the dtsi.


> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 158 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c1: i2c at 0xffc05000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc05000 0x1000>;
> > +			clock-frequency = <100000000>;
> 
> Same..
> 
> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 159 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c2: i2c at 0xffc06000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc06000 0x1000>;
> > +			clock-frequency = <100000000>;
> 
> Same...
> 
> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 160 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c3: i2c at 0xffc07000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc07000 0x1000>;
> > +			clock-frequency = <100000000>;
> 
> Same..
> 
> thanks,
> Dinh
> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 161 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> >  		L2: l2-cache at fffef000 {
> >  			compatible = "arm,pl310-cache";
> >  			reg = <0xfffef000 0x1000>;
> 
> 
> 

Thanks,
Steffen

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |