* [PATCH v2] platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check
@ 2014-04-15 2:54 Axel Lin
2014-04-15 5:08 ` Du, Alek
0 siblings, 1 reply; 2+ messages in thread
From: Axel Lin @ 2014-04-15 2:54 UTC (permalink / raw)
To: Matthew Garrett; +Cc: Alek Du, platform-driver-x86
Only pin 0-7 support input, so the valid offset range should be 0 ~ 7.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
---
This is v2 of "[PATCH] platform-drivers: x86: Fix off-by-one valid offset range checking"
drivers/platform/x86/intel_pmic_gpio.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c
index 2805988..40929e4 100644
--- a/drivers/platform/x86/intel_pmic_gpio.c
+++ b/drivers/platform/x86/intel_pmic_gpio.c
@@ -91,7 +91,7 @@ static void pmic_program_irqtype(int gpio, int type)
static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
- if (offset > 8) {
+ if (offset >= 8) {
pr_err("only pin 0-7 support input\n");
return -1;/* we only have 8 GPIO can use as input */
}
@@ -130,7 +130,7 @@ static int pmic_gpio_get(struct gpio_chip *chip, unsigned offset)
int ret;
/* we only have 8 GPIO pins we can use as input */
- if (offset > 8)
+ if (offset >= 8)
return -EOPNOTSUPP;
ret = intel_scu_ipc_ioread8(GPIO0 + offset, &r);
if (ret < 0)
--
1.8.3.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* RE: [PATCH v2] platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check
2014-04-15 2:54 [PATCH v2] platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check Axel Lin
@ 2014-04-15 5:08 ` Du, Alek
0 siblings, 0 replies; 2+ messages in thread
From: Du, Alek @ 2014-04-15 5:08 UTC (permalink / raw)
To: Axel Lin, Matthew Garrett; +Cc: platform-driver-x86
Thanks! Looks good for me.
-----Original Message-----
From: Axel Lin [mailto:axel.lin@ingics.com]
Sent: Tuesday, April 15, 2014 10:54 AM
To: Matthew Garrett
Cc: Du, Alek; platform-driver-x86@vger.kernel.org
Subject: [PATCH v2] platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check
Only pin 0-7 support input, so the valid offset range should be 0 ~ 7.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
---
This is v2 of "[PATCH] platform-drivers: x86: Fix off-by-one valid offset range checking"
drivers/platform/x86/intel_pmic_gpio.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c
index 2805988..40929e4 100644
--- a/drivers/platform/x86/intel_pmic_gpio.c
+++ b/drivers/platform/x86/intel_pmic_gpio.c
@@ -91,7 +91,7 @@ static void pmic_program_irqtype(int gpio, int type)
static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) {
- if (offset > 8) {
+ if (offset >= 8) {
pr_err("only pin 0-7 support input\n");
return -1;/* we only have 8 GPIO can use as input */
}
@@ -130,7 +130,7 @@ static int pmic_gpio_get(struct gpio_chip *chip, unsigned offset)
int ret;
/* we only have 8 GPIO pins we can use as input */
- if (offset > 8)
+ if (offset >= 8)
return -EOPNOTSUPP;
ret = intel_scu_ipc_ioread8(GPIO0 + offset, &r);
if (ret < 0)
--
1.8.3.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2014-04-15 2:54 [PATCH v2] platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check Axel Lin
2014-04-15 5:08 ` Du, Alek
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