[PATCH] iio: mma8452 driver

[PATCH] iio: mma8452 driver

[Peter Meerwald]

Hi,

I'm resending the Freescale Freescale MMA8452 accelerometer
driver, comments here:
http://permalink.gmane.org/gmane.linux.kernel.iio/10899

I only fixed the use of ARRAY_SIZE()

remaining items/comments are

(1) new reads cannot be explicitly triggered

in case a new measurement can or has to be triggered, there IS
some wait time (which can be rather long)

in case where we simply wait for the next measurement, there MAY BE
some wait time

so in both cases there can be wait time

I think the current approach it closer to the behaviour where
measurements are triggered explicitly

there is no concept of rate limit or measurement cache in IIO and
no guarantee how long a measurement will take (besides that it should
somehow be linked to sampling frequency)

(2) make sampling frequency an attribute of a dataready trigger?

the sampling frequency also affects read_raw() interaction, so I'd rather
keep it as it is


thanks, p.

Peter Meerwald (1):
  iio: Add Freescale MMA8452Q 3-axis accelerometer driver

 drivers/iio/accel/Kconfig   |  12 ++
 drivers/iio/accel/Makefile  |   1 +
 drivers/iio/accel/mma8452.c | 439 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 452 insertions(+)
 create mode 100644 drivers/iio/accel/mma8452.c

-- 
1.9.1

[PATCH] iio: Add Freescale MMA8452Q 3-axis accelerometer driver

[Peter Meerwald]

3-axis accelerometer sensor (2/4/8 g) with 12-bit resolution
and I2C interface

many extra features are unsupported (freefall detection, orientation
change, autosleep)

datasheet is here:
http://cache.freescale.com/files/sensors/doc/data_sheet/MMA8452Q.pdf

v2: (thanks to Jonathan Cameron)
* use ARRAY_SIZE()

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
---
 drivers/iio/accel/Kconfig   |  12 ++
 drivers/iio/accel/Makefile  |   1 +
 drivers/iio/accel/mma8452.c | 439 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 452 insertions(+)
 create mode 100644 drivers/iio/accel/mma8452.c

diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
index e23e5085..1e120fa 100644
--- a/drivers/iio/accel/Kconfig
+++ b/drivers/iio/accel/Kconfig
@@ -65,4 +65,16 @@ config KXSD9
 	  Say yes here to build support for the Kionix KXSD9 accelerometer.
 	  Currently this only supports the device via an SPI interface.
 
+config MMA8452
+	tristate "Freescale MMA8452Q Accelerometer Driver"
+	depends on I2C
+	select IIO_BUFFER
+	select IIO_TRIGGERED_BUFFER
+	help
+	  Say yes here to build support for the Freescale MMA8452Q 3-axis
+	  accelerometer.
+
+	  To compile this driver as a module, choose M here: the module
+	  will be called mma8452.
+
 endmenu
diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
index c48d15f..dc0e379 100644
--- a/drivers/iio/accel/Makefile
+++ b/drivers/iio/accel/Makefile
@@ -6,6 +6,7 @@
 obj-$(CONFIG_BMA180) += bma180.o
 obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
 obj-$(CONFIG_KXSD9)	+= kxsd9.o
+obj-$(CONFIG_MMA8452)	+= mma8452.o
 
 obj-$(CONFIG_IIO_ST_ACCEL_3AXIS) += st_accel.o
 st_accel-y := st_accel_core.o
diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
new file mode 100644
index 0000000..17aeea1
--- /dev/null
+++ b/drivers/iio/accel/mma8452.c
@@ -0,0 +1,439 @@
+/*
+ * mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
+ *
+ * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
+ *
+ * This file is subject to the terms and conditions of version 2 of
+ * the GNU General Public License.  See the file COPYING in the main
+ * directory of this archive for more details.
+ *
+ * 7-bit I2C slave address 0x1c/0x1d (pin selectable)
+ *
+ * TODO: interrupt, thresholding, orientation / freefall events, autosleep
+ */
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/iio/trigger_consumer.h>
+#include <linux/iio/buffer.h>
+#include <linux/iio/triggered_buffer.h>
+#include <linux/delay.h>
+
+#define MMA8452_STATUS 0x00
+#define MMA8452_OUT_X 0x01 /* MSB first, 12-bit  */
+#define MMA8452_OUT_Y 0x03
+#define MMA8452_OUT_Z 0x05
+#define MMA8452_WHO_AM_I 0x0d
+#define MMA8452_DATA_CFG 0x0e
+#define MMA8452_OFF_X 0x2f
+#define MMA8452_OFF_Y 0x30
+#define MMA8452_OFF_Z 0x31
+#define MMA8452_CTRL_REG1 0x2a
+#define MMA8452_CTRL_REG2 0x2b
+
+#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
+
+#define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
+#define MMA8452_CTRL_DR_SHIFT 3
+#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
+#define MMA8452_CTRL_ACTIVE BIT(0)
+
+#define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
+#define MMA8452_DATA_CFG_FS_2G 0
+#define MMA8452_DATA_CFG_FS_4G 1
+#define MMA8452_DATA_CFG_FS_8G 2
+
+#define MMA8452_DEVICE_ID 0x2a
+
+struct mma8452_data {
+	struct i2c_client *client;
+	struct mutex lock;
+	u8 ctrl_reg1;
+	u8 data_cfg;
+};
+
+static int mma8452_drdy(struct mma8452_data *data)
+{
+	int tries = 150;
+
+	while (tries-- > 0) {
+		int ret = i2c_smbus_read_byte_data(data->client,
+			MMA8452_STATUS);
+		if (ret < 0)
+			return ret;
+		if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
+			return 0;
+		msleep(20);
+	}
+
+	dev_err(&data->client->dev, "data not ready\n");
+	return -EIO;
+}
+
+static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
+{
+	int ret = mma8452_drdy(data);
+	if (ret < 0)
+		return ret;
+	return i2c_smbus_read_i2c_block_data(data->client,
+		MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
+}
+
+static ssize_t mma8452_show_int_plus_micros(char *buf,
+	const int (*vals)[2], int n)
+{
+	size_t len = 0;
+
+	while (n-- > 0)
+		len += scnprintf(buf + len, PAGE_SIZE - len,
+			"%d.%06d ", vals[n][0], vals[n][1]);
+
+	/* replace trailing space by newline */
+	buf[len - 1] = '\n';
+
+	return len;
+}
+
+static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
+					int val, int val2)
+{
+	while (n-- > 0)
+		if (val == vals[n][0] && val2 == vals[n][1])
+			return n;
+
+	return -EINVAL;
+}
+
+static const int mma8452_samp_freq[8][2] = {
+	{800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
+	{6, 250000}, {1, 560000}
+};
+
+static const int mma8452_scales[3][2] = {
+	{0, 977}, {0, 1953}, {0, 3906}
+};
+
+static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
+		ARRAY_SIZE(mma8452_samp_freq));
+}
+
+static ssize_t mma8452_show_scale_avail(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	return mma8452_show_int_plus_micros(buf, mma8452_scales,
+		ARRAY_SIZE(mma8452_scales));
+}
+
+static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
+static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
+	mma8452_show_scale_avail, NULL, 0);
+
+static int mma8452_get_samp_freq_index(struct mma8452_data *data,
+	int val, int val2)
+{
+	return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
+		ARRAY_SIZE(mma8452_samp_freq), val, val2);
+}
+
+static int mma8452_get_scale_index(struct mma8452_data *data,
+	int val, int val2)
+{
+	return mma8452_get_int_plus_micros_index(mma8452_scales,
+		ARRAY_SIZE(mma8452_scales), val, val2);
+}
+
+static int mma8452_read_raw(struct iio_dev *indio_dev,
+			    struct iio_chan_spec const *chan,
+			    int *val, int *val2, long mask)
+{
+	struct mma8452_data *data = iio_priv(indio_dev);
+	__be16 buffer[3];
+	int i, ret;
+
+	switch (mask) {
+	case IIO_CHAN_INFO_RAW:
+		if (iio_buffer_enabled(indio_dev))
+			return -EBUSY;
+
+		mutex_lock(&data->lock);
+		ret = mma8452_read(data, buffer);
+		mutex_unlock(&data->lock);
+		if (ret < 0)
+			return ret;
+		*val = sign_extend32(
+			be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
+		return IIO_VAL_INT;
+	case IIO_CHAN_INFO_SCALE:
+		i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
+		*val = mma8452_scales[i][0];
+		*val2 = mma8452_scales[i][1];
+		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_SAMP_FREQ:
+		i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
+			MMA8452_CTRL_DR_SHIFT;
+		*val = mma8452_samp_freq[i][0];
+		*val2 = mma8452_samp_freq[i][1];
+		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_CALIBBIAS:
+		ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
+			chan->scan_index);
+		if (ret < 0)
+			return ret;
+		*val = sign_extend32(ret, 7);
+		return IIO_VAL_INT;
+	}
+	return -EINVAL;
+}
+
+static int mma8452_standby(struct mma8452_data *data)
+{
+	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
+		data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
+}
+
+static int mma8452_active(struct mma8452_data *data)
+{
+	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
+		data->ctrl_reg1);
+}
+
+static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
+{
+	int ret;
+
+	mutex_lock(&data->lock);
+
+	/* config can only be changed when in standby */
+	ret = mma8452_standby(data);
+	if (ret < 0)
+		goto fail;
+
+	ret = i2c_smbus_write_byte_data(data->client, reg, val);
+	if (ret < 0)
+		goto fail;
+
+	ret = mma8452_active(data);
+	if (ret < 0)
+		goto fail;
+
+	ret = 0;
+fail:
+	mutex_unlock(&data->lock);
+	return ret;
+}
+
+static int mma8452_write_raw(struct iio_dev *indio_dev,
+			     struct iio_chan_spec const *chan,
+			     int val, int val2, long mask)
+{
+	struct mma8452_data *data = iio_priv(indio_dev);
+	int i;
+
+	if (iio_buffer_enabled(indio_dev))
+		return -EBUSY;
+
+	switch (mask) {
+	case IIO_CHAN_INFO_SAMP_FREQ:
+		i = mma8452_get_samp_freq_index(data, val, val2);
+		if (i < 0)
+			return -EINVAL;
+
+		data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
+		data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
+		return mma8452_change_config(data, MMA8452_CTRL_REG1,
+			data->ctrl_reg1);
+	case IIO_CHAN_INFO_SCALE:
+		i = mma8452_get_scale_index(data, val, val2);
+		if (i < 0)
+			return -EINVAL;
+		data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
+		data->data_cfg |= i;
+		return mma8452_change_config(data, MMA8452_DATA_CFG,
+			data->data_cfg);
+	case IIO_CHAN_INFO_CALIBBIAS:
+		if (val < -128 || val > 127)
+			return -EINVAL;
+		return mma8452_change_config(data, MMA8452_OFF_X +
+			chan->scan_index, val);
+	default:
+		return -EINVAL;
+	}
+}
+
+static irqreturn_t mma8452_trigger_handler(int irq, void *p)
+{
+	struct iio_poll_func *pf = p;
+	struct iio_dev *indio_dev = pf->indio_dev;
+	struct mma8452_data *data = iio_priv(indio_dev);
+	u8 buffer[16]; /* 3 16-bit channels + padding + ts */
+	int ret;
+
+	ret = mma8452_read(data, (__be16 *) buffer);
+	if (ret < 0)
+		goto done;
+
+	iio_push_to_buffers_with_timestamp(indio_dev, buffer,
+		iio_get_time_ns());
+
+done:
+	iio_trigger_notify_done(indio_dev->trig);
+	return IRQ_HANDLED;
+}
+
+#define MMA8452_CHANNEL(axis, idx) { \
+	.type = IIO_ACCEL, \
+	.modified = 1, \
+	.channel2 = IIO_MOD_##axis, \
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
+		BIT(IIO_CHAN_INFO_CALIBBIAS), \
+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
+		BIT(IIO_CHAN_INFO_SCALE), \
+	.scan_index = idx, \
+	.scan_type = { \
+		.sign = 's', \
+		.realbits = 12, \
+		.storagebits = 16, \
+		.shift = 4, \
+		.endianness = IIO_BE, \
+	}, \
+}
+
+static const struct iio_chan_spec mma8452_channels[] = {
+	MMA8452_CHANNEL(X, 0),
+	MMA8452_CHANNEL(Y, 1),
+	MMA8452_CHANNEL(Z, 2),
+	IIO_CHAN_SOFT_TIMESTAMP(3),
+};
+
+static struct attribute *mma8452_attributes[] = {
+	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
+	&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
+	NULL
+};
+
+static const struct attribute_group mma8452_group = {
+	.attrs = mma8452_attributes,
+};
+
+static const struct iio_info mma8452_info = {
+	.attrs = &mma8452_group,
+	.read_raw = &mma8452_read_raw,
+	.write_raw = &mma8452_write_raw,
+	.driver_module = THIS_MODULE,
+};
+
+static const unsigned long mma8452_scan_masks[] = {0x7, 0};
+
+static int mma8452_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct mma8452_data *data;
+	struct iio_dev *indio_dev;
+	int ret;
+
+	ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
+	if (ret < 0)
+		return ret;
+	if (ret != MMA8452_DEVICE_ID)
+		return -ENODEV;
+
+	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+	if (!indio_dev)
+		return -ENOMEM;
+
+	data = iio_priv(indio_dev);
+	data->client = client;
+	mutex_init(&data->lock);
+
+	i2c_set_clientdata(client, indio_dev);
+	indio_dev->info = &mma8452_info;
+	indio_dev->name = id->name;
+	indio_dev->dev.parent = &client->dev;
+	indio_dev->modes = INDIO_DIRECT_MODE;
+	indio_dev->channels = mma8452_channels;
+	indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
+	indio_dev->available_scan_masks = mma8452_scan_masks;
+
+	data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
+		(MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
+	ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
+		data->ctrl_reg1);
+	if (ret < 0)
+		return ret;
+
+	data->data_cfg = MMA8452_DATA_CFG_FS_2G;
+	ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
+		data->data_cfg);
+	if (ret < 0)
+		return ret;
+
+	ret = iio_triggered_buffer_setup(indio_dev, NULL,
+		mma8452_trigger_handler, NULL);
+	if (ret < 0)
+		return ret;
+
+	ret = iio_device_register(indio_dev);
+	if (ret < 0)
+		goto buffer_cleanup;
+	return 0;
+
+buffer_cleanup:
+	iio_triggered_buffer_cleanup(indio_dev);
+	return ret;
+}
+
+static int mma8452_remove(struct i2c_client *client)
+{
+	struct iio_dev *indio_dev = i2c_get_clientdata(client);
+
+	iio_device_unregister(indio_dev);
+	iio_triggered_buffer_cleanup(indio_dev);
+	mma8452_standby(iio_priv(indio_dev));
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int mma8452_suspend(struct device *dev)
+{
+	return mma8452_standby(iio_priv(i2c_get_clientdata(
+		to_i2c_client(dev))));
+}
+
+static int mma8452_resume(struct device *dev)
+{
+	return mma8452_active(iio_priv(i2c_get_clientdata(
+		to_i2c_client(dev))));
+}
+
+static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
+#define MMA8452_PM_OPS (&mma8452_pm_ops)
+#else
+#define MMA8452_PM_OPS NULL
+#endif
+
+static const struct i2c_device_id mma8452_id[] = {
+	{ "mma8452", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, mma8452_id);
+
+static struct i2c_driver mma8452_driver = {
+	.driver = {
+		.name	= "mma8452",
+		.pm	= MMA8452_PM_OPS,
+	},
+	.probe = mma8452_probe,
+	.remove = mma8452_remove,
+	.id_table = mma8452_id,
+};
+module_i2c_driver(mma8452_driver);
+
+MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
+MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
+MODULE_LICENSE("GPL");
-- 
1.9.1

Re: [PATCH] iio: Add Freescale MMA8452Q 3-axis accelerometer driver

[Jonathan Cameron]

On 02/05/14 09:51, Peter Meerwald wrote:
> 3-axis accelerometer sensor (2/4/8 g) with 12-bit resolution
> and I2C interface
>
> many extra features are unsupported (freefall detection, orientation
> change, autosleep)
>
> datasheet is here:
> http://cache.freescale.com/files/sensors/doc/data_sheet/MMA8452Q.pdf
>
> v2: (thanks to Jonathan Cameron)
> * use ARRAY_SIZE()
>
> Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Fair enough on your responses in the cover letter.
Applied to the togreg branch of iio.git

Thanks,

Jonathan
> ---
>   drivers/iio/accel/Kconfig   |  12 ++
>   drivers/iio/accel/Makefile  |   1 +
>   drivers/iio/accel/mma8452.c | 439 ++++++++++++++++++++++++++++++++++++++++++++
>   3 files changed, 452 insertions(+)
>   create mode 100644 drivers/iio/accel/mma8452.c
>
> diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
> index e23e5085..1e120fa 100644
> --- a/drivers/iio/accel/Kconfig
> +++ b/drivers/iio/accel/Kconfig
> @@ -65,4 +65,16 @@ config KXSD9
>   	  Say yes here to build support for the Kionix KXSD9 accelerometer.
>   	  Currently this only supports the device via an SPI interface.
>
> +config MMA8452
> +	tristate "Freescale MMA8452Q Accelerometer Driver"
> +	depends on I2C
> +	select IIO_BUFFER
> +	select IIO_TRIGGERED_BUFFER
> +	help
> +	  Say yes here to build support for the Freescale MMA8452Q 3-axis
> +	  accelerometer.
> +
> +	  To compile this driver as a module, choose M here: the module
> +	  will be called mma8452.
> +
>   endmenu
> diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
> index c48d15f..dc0e379 100644
> --- a/drivers/iio/accel/Makefile
> +++ b/drivers/iio/accel/Makefile
> @@ -6,6 +6,7 @@
>   obj-$(CONFIG_BMA180) += bma180.o
>   obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
>   obj-$(CONFIG_KXSD9)	+= kxsd9.o
> +obj-$(CONFIG_MMA8452)	+= mma8452.o
>
>   obj-$(CONFIG_IIO_ST_ACCEL_3AXIS) += st_accel.o
>   st_accel-y := st_accel_core.o
> diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
> new file mode 100644
> index 0000000..17aeea1
> --- /dev/null
> +++ b/drivers/iio/accel/mma8452.c
> @@ -0,0 +1,439 @@
> +/*
> + * mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
> + *
> + * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
> + *
> + * This file is subject to the terms and conditions of version 2 of
> + * the GNU General Public License.  See the file COPYING in the main
> + * directory of this archive for more details.
> + *
> + * 7-bit I2C slave address 0x1c/0x1d (pin selectable)
> + *
> + * TODO: interrupt, thresholding, orientation / freefall events, autosleep
> + */
> +
> +#include <linux/module.h>
> +#include <linux/i2c.h>
> +#include <linux/iio/iio.h>
> +#include <linux/iio/sysfs.h>
> +#include <linux/iio/trigger_consumer.h>
> +#include <linux/iio/buffer.h>
> +#include <linux/iio/triggered_buffer.h>
> +#include <linux/delay.h>
> +
> +#define MMA8452_STATUS 0x00
> +#define MMA8452_OUT_X 0x01 /* MSB first, 12-bit  */
> +#define MMA8452_OUT_Y 0x03
> +#define MMA8452_OUT_Z 0x05
> +#define MMA8452_WHO_AM_I 0x0d
> +#define MMA8452_DATA_CFG 0x0e
> +#define MMA8452_OFF_X 0x2f
> +#define MMA8452_OFF_Y 0x30
> +#define MMA8452_OFF_Z 0x31
> +#define MMA8452_CTRL_REG1 0x2a
> +#define MMA8452_CTRL_REG2 0x2b
> +
> +#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
> +
> +#define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
> +#define MMA8452_CTRL_DR_SHIFT 3
> +#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
> +#define MMA8452_CTRL_ACTIVE BIT(0)
> +
> +#define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
> +#define MMA8452_DATA_CFG_FS_2G 0
> +#define MMA8452_DATA_CFG_FS_4G 1
> +#define MMA8452_DATA_CFG_FS_8G 2
> +
> +#define MMA8452_DEVICE_ID 0x2a
> +
> +struct mma8452_data {
> +	struct i2c_client *client;
> +	struct mutex lock;
> +	u8 ctrl_reg1;
> +	u8 data_cfg;
> +};
> +
> +static int mma8452_drdy(struct mma8452_data *data)
> +{
> +	int tries = 150;
> +
> +	while (tries-- > 0) {
> +		int ret = i2c_smbus_read_byte_data(data->client,
> +			MMA8452_STATUS);
> +		if (ret < 0)
> +			return ret;
> +		if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
> +			return 0;
> +		msleep(20);
> +	}
> +
> +	dev_err(&data->client->dev, "data not ready\n");
> +	return -EIO;
> +}
> +
> +static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
> +{
> +	int ret = mma8452_drdy(data);
> +	if (ret < 0)
> +		return ret;
> +	return i2c_smbus_read_i2c_block_data(data->client,
> +		MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
> +}
> +
> +static ssize_t mma8452_show_int_plus_micros(char *buf,
> +	const int (*vals)[2], int n)
> +{
> +	size_t len = 0;
> +
> +	while (n-- > 0)
> +		len += scnprintf(buf + len, PAGE_SIZE - len,
> +			"%d.%06d ", vals[n][0], vals[n][1]);
> +
> +	/* replace trailing space by newline */
> +	buf[len - 1] = '\n';
> +
> +	return len;
> +}
> +
> +static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
> +					int val, int val2)
> +{
> +	while (n-- > 0)
> +		if (val == vals[n][0] && val2 == vals[n][1])
> +			return n;
> +
> +	return -EINVAL;
> +}
> +
> +static const int mma8452_samp_freq[8][2] = {
> +	{800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
> +	{6, 250000}, {1, 560000}
> +};
> +
> +static const int mma8452_scales[3][2] = {
> +	{0, 977}, {0, 1953}, {0, 3906}
> +};
> +
> +static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{
> +	return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
> +		ARRAY_SIZE(mma8452_samp_freq));
> +}
> +
> +static ssize_t mma8452_show_scale_avail(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{
> +	return mma8452_show_int_plus_micros(buf, mma8452_scales,
> +		ARRAY_SIZE(mma8452_scales));
> +}
> +
> +static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
> +static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
> +	mma8452_show_scale_avail, NULL, 0);
> +
> +static int mma8452_get_samp_freq_index(struct mma8452_data *data,
> +	int val, int val2)
> +{
> +	return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
> +		ARRAY_SIZE(mma8452_samp_freq), val, val2);
> +}
> +
> +static int mma8452_get_scale_index(struct mma8452_data *data,
> +	int val, int val2)
> +{
> +	return mma8452_get_int_plus_micros_index(mma8452_scales,
> +		ARRAY_SIZE(mma8452_scales), val, val2);
> +}
> +
> +static int mma8452_read_raw(struct iio_dev *indio_dev,
> +			    struct iio_chan_spec const *chan,
> +			    int *val, int *val2, long mask)
> +{
> +	struct mma8452_data *data = iio_priv(indio_dev);
> +	__be16 buffer[3];
> +	int i, ret;
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_RAW:
> +		if (iio_buffer_enabled(indio_dev))
> +			return -EBUSY;
> +
> +		mutex_lock(&data->lock);
> +		ret = mma8452_read(data, buffer);
> +		mutex_unlock(&data->lock);
> +		if (ret < 0)
> +			return ret;
> +		*val = sign_extend32(
> +			be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
> +		return IIO_VAL_INT;
> +	case IIO_CHAN_INFO_SCALE:
> +		i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
> +		*val = mma8452_scales[i][0];
> +		*val2 = mma8452_scales[i][1];
> +		return IIO_VAL_INT_PLUS_MICRO;
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
> +			MMA8452_CTRL_DR_SHIFT;
> +		*val = mma8452_samp_freq[i][0];
> +		*val2 = mma8452_samp_freq[i][1];
> +		return IIO_VAL_INT_PLUS_MICRO;
> +	case IIO_CHAN_INFO_CALIBBIAS:
> +		ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
> +			chan->scan_index);
> +		if (ret < 0)
> +			return ret;
> +		*val = sign_extend32(ret, 7);
> +		return IIO_VAL_INT;
> +	}
> +	return -EINVAL;
> +}
> +
> +static int mma8452_standby(struct mma8452_data *data)
> +{
> +	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
> +		data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
> +}
> +
> +static int mma8452_active(struct mma8452_data *data)
> +{
> +	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
> +		data->ctrl_reg1);
> +}
> +
> +static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
> +{
> +	int ret;
> +
> +	mutex_lock(&data->lock);
> +
> +	/* config can only be changed when in standby */
> +	ret = mma8452_standby(data);
> +	if (ret < 0)
> +		goto fail;
> +
> +	ret = i2c_smbus_write_byte_data(data->client, reg, val);
> +	if (ret < 0)
> +		goto fail;
> +
> +	ret = mma8452_active(data);
> +	if (ret < 0)
> +		goto fail;
> +
> +	ret = 0;
> +fail:
> +	mutex_unlock(&data->lock);
> +	return ret;
> +}
> +
> +static int mma8452_write_raw(struct iio_dev *indio_dev,
> +			     struct iio_chan_spec const *chan,
> +			     int val, int val2, long mask)
> +{
> +	struct mma8452_data *data = iio_priv(indio_dev);
> +	int i;
> +
> +	if (iio_buffer_enabled(indio_dev))
> +		return -EBUSY;
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		i = mma8452_get_samp_freq_index(data, val, val2);
> +		if (i < 0)
> +			return -EINVAL;
> +
> +		data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
> +		data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
> +		return mma8452_change_config(data, MMA8452_CTRL_REG1,
> +			data->ctrl_reg1);
> +	case IIO_CHAN_INFO_SCALE:
> +		i = mma8452_get_scale_index(data, val, val2);
> +		if (i < 0)
> +			return -EINVAL;
> +		data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
> +		data->data_cfg |= i;
> +		return mma8452_change_config(data, MMA8452_DATA_CFG,
> +			data->data_cfg);
> +	case IIO_CHAN_INFO_CALIBBIAS:
> +		if (val < -128 || val > 127)
> +			return -EINVAL;
> +		return mma8452_change_config(data, MMA8452_OFF_X +
> +			chan->scan_index, val);
> +	default:
> +		return -EINVAL;
> +	}
> +}
> +
> +static irqreturn_t mma8452_trigger_handler(int irq, void *p)
> +{
> +	struct iio_poll_func *pf = p;
> +	struct iio_dev *indio_dev = pf->indio_dev;
> +	struct mma8452_data *data = iio_priv(indio_dev);
> +	u8 buffer[16]; /* 3 16-bit channels + padding + ts */
> +	int ret;
> +
> +	ret = mma8452_read(data, (__be16 *) buffer);
> +	if (ret < 0)
> +		goto done;
> +
> +	iio_push_to_buffers_with_timestamp(indio_dev, buffer,
> +		iio_get_time_ns());
> +
> +done:
> +	iio_trigger_notify_done(indio_dev->trig);
> +	return IRQ_HANDLED;
> +}
> +
> +#define MMA8452_CHANNEL(axis, idx) { \
> +	.type = IIO_ACCEL, \
> +	.modified = 1, \
> +	.channel2 = IIO_MOD_##axis, \
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
> +		BIT(IIO_CHAN_INFO_CALIBBIAS), \
> +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
> +		BIT(IIO_CHAN_INFO_SCALE), \
> +	.scan_index = idx, \
> +	.scan_type = { \
> +		.sign = 's', \
> +		.realbits = 12, \
> +		.storagebits = 16, \
> +		.shift = 4, \
> +		.endianness = IIO_BE, \
> +	}, \
> +}
> +
> +static const struct iio_chan_spec mma8452_channels[] = {
> +	MMA8452_CHANNEL(X, 0),
> +	MMA8452_CHANNEL(Y, 1),
> +	MMA8452_CHANNEL(Z, 2),
> +	IIO_CHAN_SOFT_TIMESTAMP(3),
> +};
> +
> +static struct attribute *mma8452_attributes[] = {
> +	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
> +	&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
> +	NULL
> +};
> +
> +static const struct attribute_group mma8452_group = {
> +	.attrs = mma8452_attributes,
> +};
> +
> +static const struct iio_info mma8452_info = {
> +	.attrs = &mma8452_group,
> +	.read_raw = &mma8452_read_raw,
> +	.write_raw = &mma8452_write_raw,
> +	.driver_module = THIS_MODULE,
> +};
> +
> +static const unsigned long mma8452_scan_masks[] = {0x7, 0};
> +
> +static int mma8452_probe(struct i2c_client *client,
> +			 const struct i2c_device_id *id)
> +{
> +	struct mma8452_data *data;
> +	struct iio_dev *indio_dev;
> +	int ret;
> +
> +	ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
> +	if (ret < 0)
> +		return ret;
> +	if (ret != MMA8452_DEVICE_ID)
> +		return -ENODEV;
> +
> +	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	data = iio_priv(indio_dev);
> +	data->client = client;
> +	mutex_init(&data->lock);
> +
> +	i2c_set_clientdata(client, indio_dev);
> +	indio_dev->info = &mma8452_info;
> +	indio_dev->name = id->name;
> +	indio_dev->dev.parent = &client->dev;
> +	indio_dev->modes = INDIO_DIRECT_MODE;
> +	indio_dev->channels = mma8452_channels;
> +	indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
> +	indio_dev->available_scan_masks = mma8452_scan_masks;
> +
> +	data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
> +		(MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
> +	ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
> +		data->ctrl_reg1);
> +	if (ret < 0)
> +		return ret;
> +
> +	data->data_cfg = MMA8452_DATA_CFG_FS_2G;
> +	ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
> +		data->data_cfg);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = iio_triggered_buffer_setup(indio_dev, NULL,
> +		mma8452_trigger_handler, NULL);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = iio_device_register(indio_dev);
> +	if (ret < 0)
> +		goto buffer_cleanup;
> +	return 0;
> +
> +buffer_cleanup:
> +	iio_triggered_buffer_cleanup(indio_dev);
> +	return ret;
> +}
> +
> +static int mma8452_remove(struct i2c_client *client)
> +{
> +	struct iio_dev *indio_dev = i2c_get_clientdata(client);
> +
> +	iio_device_unregister(indio_dev);
> +	iio_triggered_buffer_cleanup(indio_dev);
> +	mma8452_standby(iio_priv(indio_dev));
> +
> +	return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int mma8452_suspend(struct device *dev)
> +{
> +	return mma8452_standby(iio_priv(i2c_get_clientdata(
> +		to_i2c_client(dev))));
> +}
> +
> +static int mma8452_resume(struct device *dev)
> +{
> +	return mma8452_active(iio_priv(i2c_get_clientdata(
> +		to_i2c_client(dev))));
> +}
> +
> +static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
> +#define MMA8452_PM_OPS (&mma8452_pm_ops)
> +#else
> +#define MMA8452_PM_OPS NULL
> +#endif
> +
> +static const struct i2c_device_id mma8452_id[] = {
> +	{ "mma8452", 0 },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(i2c, mma8452_id);
> +
> +static struct i2c_driver mma8452_driver = {
> +	.driver = {
> +		.name	= "mma8452",
> +		.pm	= MMA8452_PM_OPS,
> +	},
> +	.probe = mma8452_probe,
> +	.remove = mma8452_remove,
> +	.id_table = mma8452_id,
> +};
> +module_i2c_driver(mma8452_driver);
> +
> +MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
> +MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
> +MODULE_LICENSE("GPL");
>

Re: [PATCH] iio: Add Freescale MMA8452Q 3-axis accelerometer driver

[Peter Meerwald]

Hi,

> Nope. I guess Peter never had a chance to get back to it. I had forgotten about it entirely...

I think there were some minor comments; I'll try to clean them up and 
resubmit shortly

regards, p.

> >I just stumbled across this [1] and was wondering if this patch made it
> >
> >into some tree.
> >
> >Regards,
> >
> >Robert
> >
> >[1] http://thread.gmane.org/gmane.linux.kernel.iio/10876
> >--
> >To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> >the body of a message to majordomo@vger.kernel.org
> >More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 

-- 

Peter Meerwald
+43-664-2444418 (mobile)

Re: [PATCH] iio: Add Freescale MMA8452Q 3-axis accelerometer driver

[Jonathan Cameron]

Nope. I guess Peter never had a chance to get back to it. I had forgotten about it entirely...

On April 7, 2014 5:05:36 PM GMT+01:00, gmane@reliableembeddedsystems.com wrote:
>Hi,
>
>I just stumbled across this [1] and was wondering if this patch made it
>
>into some tree.
>
>Regards,
>
>Robert
>
>[1] http://thread.gmane.org/gmane.linux.kernel.iio/10876
>--
>To unsubscribe from this list: send the line "unsubscribe linux-iio" in
>the body of a message to majordomo@vger.kernel.org
>More majordomo info at  http://vger.kernel.org/majordomo-info.html

-- 
Sent from my Android phone with K-9 Mail. Please excuse my brevity.

Re: [PATCH] iio: Add Freescale MMA8452Q 3-axis accelerometer driver

[gmane]

Hi,

I just stumbled across this [1] and was wondering if this patch made it 
into some tree.

Regards,

Robert

[1] http://thread.gmane.org/gmane.linux.kernel.iio/10876

Re: [PATCH] iio: Add Freescale MMA8452Q 3-axis accelerometer driver

[Jonathan Cameron]

On 10/01/14 22:02, Peter Meerwald wrote:
> 3-axis accelerometer sensor (2/4/8 g) with 12-bit resolution
> and I2C interface
>
> many extra features are unsupported (freefall detection, orientation
> change, autosleep)
>
> datasheet is here:
> http://cache.freescale.com/files/sensors/doc/data_sheet/MMA8452Q.pdf
>
A few bits inline.

I'd normally expect a device like this to either have a simple driver
with no buffer based access, or to support both buffering and a dataready
trigger (seeing as it has a dataready interrupt).  Here, the device can end
up waiting a very long time for for new data if the trigger is faster than
it should be.   This strikes me as 'interesting'.

Other than this element, the driver looks very nice.

Jonathan
> Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
> ---
>   drivers/iio/accel/Kconfig   |  12 ++
>   drivers/iio/accel/Makefile  |   1 +
>   drivers/iio/accel/mma8452.c | 438 ++++++++++++++++++++++++++++++++++++++++++++
>   3 files changed, 451 insertions(+)
>   create mode 100644 drivers/iio/accel/mma8452.c
>
> diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
> index e23e508..1e120fa 100644
> --- a/drivers/iio/accel/Kconfig
> +++ b/drivers/iio/accel/Kconfig
> @@ -65,4 +65,16 @@ config KXSD9
>   	  Say yes here to build support for the Kionix KXSD9 accelerometer.
>   	  Currently this only supports the device via an SPI interface.
>
> +config MMA8452
> +	tristate "Freescale MMA8452Q Accelerometer Driver"
> +	depends on I2C
> +	select IIO_BUFFER
> +	select IIO_TRIGGERED_BUFFER
> +	help
> +	  Say yes here to build support for the Freescale MMA8452Q 3-axis
> +	  accelerometer.
> +
> +	  To compile this driver as a module, choose M here: the module
> +	  will be called mma8452.
> +
>   endmenu
> diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
> index c48d15f..dc0e379 100644
> --- a/drivers/iio/accel/Makefile
> +++ b/drivers/iio/accel/Makefile
> @@ -6,6 +6,7 @@
>   obj-$(CONFIG_BMA180) += bma180.o
>   obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
>   obj-$(CONFIG_KXSD9)	+= kxsd9.o
> +obj-$(CONFIG_MMA8452)	+= mma8452.o
>
>   obj-$(CONFIG_IIO_ST_ACCEL_3AXIS) += st_accel.o
>   st_accel-y := st_accel_core.o
> diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
> new file mode 100644
> index 0000000..a45628c
> --- /dev/null
> +++ b/drivers/iio/accel/mma8452.c
> @@ -0,0 +1,438 @@
> +/*
> + * mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
> + *
> + * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
> + *
> + * This file is subject to the terms and conditions of version 2 of
> + * the GNU General Public License.  See the file COPYING in the main
> + * directory of this archive for more details.
> + *
> + * 7-bit I2C slave address 0x1c/0x1d (pin selectable)
> + *
> + * TODO: interrupt, thresholding, orientation / freefall events, autosleep
> + */
> +
> +#include <linux/module.h>
> +#include <linux/i2c.h>
> +#include <linux/iio/iio.h>
> +#include <linux/iio/sysfs.h>
> +#include <linux/iio/trigger_consumer.h>
> +#include <linux/iio/buffer.h>
> +#include <linux/iio/triggered_buffer.h>
> +#include <linux/delay.h>
> +
> +#define MMA8452_STATUS 0x00
> +#define MMA8452_OUT_X 0x01 /* MSB first, 12-bit  */
> +#define MMA8452_OUT_Y 0x03
> +#define MMA8452_OUT_Z 0x05
> +#define MMA8452_WHO_AM_I 0x0d
> +#define MMA8452_DATA_CFG 0x0e
> +#define MMA8452_OFF_X 0x2f
> +#define MMA8452_OFF_Y 0x30
> +#define MMA8452_OFF_Z 0x31
> +#define MMA8452_CTRL_REG1 0x2a
> +#define MMA8452_CTRL_REG2 0x2b
> +
> +#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
> +
> +#define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
> +#define MMA8452_CTRL_DR_SHIFT 3
> +#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
> +#define MMA8452_CTRL_ACTIVE BIT(0)
> +
> +#define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
> +#define MMA8452_DATA_CFG_FS_2G 0
> +#define MMA8452_DATA_CFG_FS_4G 1
> +#define MMA8452_DATA_CFG_FS_8G 2
> +
> +#define MMA8452_DEVICE_ID 0x2a
> +
> +/* Each client has this additional data */
> +struct mma8452_data {
> +	struct i2c_client *client;
> +	struct mutex lock;
> +	u8 ctrl_reg1;
> +	u8 data_cfg;
> +};
> +
> +static int mma8452_drdy(struct mma8452_data *data)
> +{
> +	int tries = 150;
> +
> +	while (tries-- > 0) {
> +		int ret = i2c_smbus_read_byte_data(data->client,
> +			MMA8452_STATUS);
> +		if (ret < 0)
> +			return ret;
> +		if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
> +			return 0;
> +		msleep(20);
> +	}
> +
> +	dev_err(&data->client->dev, "data not ready\n");
> +	return -EIO;
> +}
> +
> +static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
> +{
> +	int ret = mma8452_drdy(data);
> +	if (ret < 0)
> +		return ret;
> +	return i2c_smbus_read_i2c_block_data(data->client,
> +		MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
> +}
> +
> +static ssize_t mma8452_show_int_plus_micros(char *buf,
> +	const int (*vals)[2], int n)
> +{
> +	size_t len = 0;
> +
> +	while (n-- > 0)
> +		len += scnprintf(buf + len, PAGE_SIZE - len,
> +			"%d.%06d ", vals[n][0], vals[n][1]);
> +
> +	/* replace trailing space by newline */
> +	buf[len - 1] = '\n';
> +
> +	return len;
> +}
> +
> +static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
> +					int val, int val2)
> +{
> +	while (n-- > 0)
> +		if (val == vals[n][0] && val2 == vals[n][1])
> +			return n;
> +
> +	return -EINVAL;
> +}
> +
> +static const int mma8452_samp_freq[8][2] = {
> +	{800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
> +	{6, 250000}, {1, 560000}
> +};
> +
> +static const int mma8452_scales[3][2] = {
> +	{0, 977}, {0, 1953}, {0, 3906}
> +};
> +
> +static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{

I'd prefer to see the 8 done as a ARRAY_SIZE rather than explicitly.
> +	return mma8452_show_int_plus_micros(buf, mma8452_samp_freq, 8);
> +}
> +
> +static ssize_t mma8452_show_scale_avail(struct device *dev,
> +				struct device_attribute *attr, char *buf)
> +{
> +	return mma8452_show_int_plus_micros(buf, mma8452_scales, 3);
> +}
> +
> +static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
> +static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
> +	mma8452_show_scale_avail, NULL, 0);
> +
> +static int mma8452_get_samp_freq_index(struct mma8452_data *data,
> +	int val, int val2)
> +{
> +	return mma8452_get_int_plus_micros_index(mma8452_samp_freq, 8, val,
> +		val2);
> +}
> +
> +static int mma8452_get_scale_index(struct mma8452_data *data,
> +	int val, int val2)
> +{
> +	return mma8452_get_int_plus_micros_index(mma8452_scales, 3, val,
> +		val2);
> +}
> +
> +static int mma8452_read_raw(struct iio_dev *indio_dev,
> +			    struct iio_chan_spec const *chan,
> +			    int *val, int *val2, long mask)
> +{
> +	struct mma8452_data *data = iio_priv(indio_dev);
> +	__be16 buffer[3];
> +	int i, ret;
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_RAW:
> +		if (iio_buffer_enabled(indio_dev))
> +			return -EBUSY;
> +
This is a little different to normal in that you force it to wait
for new data.  For most sysfs reads where we can't explicitly trigger
a new read, we just use the last valid one. In this case the wait can
be really rather long... Not sure this is a problem, just thought I'd
observe it wasn't what I was expecting.
> +		mutex_lock(&data->lock);
> +		ret = mma8452_read(data, buffer);
> +		mutex_unlock(&data->lock);
> +		if (ret < 0)
> +			return ret;
> +		*val = sign_extend32(
> +			be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
> +		return IIO_VAL_INT;
> +	case IIO_CHAN_INFO_SCALE:
> +		i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
> +		*val = mma8452_scales[i][0];
> +		*val2 = mma8452_scales[i][1];
> +		return IIO_VAL_INT_PLUS_MICRO;
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
> +			MMA8452_CTRL_DR_SHIFT;
> +		*val = mma8452_samp_freq[i][0];
> +		*val2 = mma8452_samp_freq[i][1];
> +		return IIO_VAL_INT_PLUS_MICRO;
> +	case IIO_CHAN_INFO_CALIBBIAS:
> +		ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
> +			chan->scan_index);
> +		if (ret < 0)
> +			return ret;
> +		*val = sign_extend32(ret, 7);
> +		return IIO_VAL_INT;
> +	}
> +	return -EINVAL;
> +}
> +
> +static int mma8452_standby(struct mma8452_data *data)
> +{
> +	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
> +		data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
> +}
> +
> +static int mma8452_active(struct mma8452_data *data)
> +{
> +	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
> +		data->ctrl_reg1);
> +}
> +
> +static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
> +{
> +	int ret;
> +
> +	mutex_lock(&data->lock);
> +
> +	/* config can only be changed when in standby */
> +	ret = mma8452_standby(data);
> +	if (ret < 0)
> +		goto fail;
> +
> +	ret = i2c_smbus_write_byte_data(data->client, reg, val);
> +	if (ret < 0)
> +		goto fail;
> +
> +	ret = mma8452_active(data);
> +	if (ret < 0)
> +		goto fail;
> +
> +	ret = 0;
> +fail:
> +	mutex_unlock(&data->lock);
> +	return ret;
> +}
> +
> +static int mma8452_write_raw(struct iio_dev *indio_dev,
> +			     struct iio_chan_spec const *chan,
> +			     int val, int val2, long mask)
> +{
> +	struct mma8452_data *data = iio_priv(indio_dev);
> +	int i;
> +
> +	if (iio_buffer_enabled(indio_dev))
> +		return -EBUSY;
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		i = mma8452_get_samp_freq_index(data, val, val2);
> +		if (i < 0)
> +			return -EINVAL;
> +
> +		data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
> +		data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
> +		return mma8452_change_config(data, MMA8452_CTRL_REG1,
> +			data->ctrl_reg1);
> +	case IIO_CHAN_INFO_SCALE:
> +		i = mma8452_get_scale_index(data, val, val2);
> +		if (i < 0)
> +			return -EINVAL;
> +		data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
> +		data->data_cfg |= i;
> +		return mma8452_change_config(data, MMA8452_DATA_CFG,
> +			data->data_cfg);
> +	case IIO_CHAN_INFO_CALIBBIAS:
> +		if (val < -128 || val > 127)
> +			return -EINVAL;
> +		return mma8452_change_config(data, MMA8452_OFF_X +
> +			chan->scan_index, val);
> +	default:
> +		return -EINVAL;
> +	}
> +}
> +
> +static irqreturn_t mma8452_trigger_handler(int irq, void *p)
> +{
> +	struct iio_poll_func *pf = p;
> +	struct iio_dev *indio_dev = pf->indio_dev;
> +	struct mma8452_data *data = iio_priv(indio_dev);
> +	u8 buffer[16]; /* 3 16-bit channels + padding + ts */
> +	int ret;
> +
> +	ret = mma8452_read(data, (__be16 *) buffer);
> +	if (ret < 0)
> +		goto done;
> +
> +	iio_push_to_buffers_with_timestamp(indio_dev, buffer,
> +		iio_get_time_ns());
> +
> +done:
> +	iio_trigger_notify_done(indio_dev->trig);
> +	return IRQ_HANDLED;
> +}
> +
> +#define MMA8452_CHANNEL(axis, idx) { \
> +	.type = IIO_ACCEL, \
> +	.modified = 1, \
> +	.channel2 = IIO_MOD_##axis, \
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
> +		BIT(IIO_CHAN_INFO_CALIBBIAS), \

Always an awkward interaction, but would the sampling frequency be
better as an attribute of a dataready based trigger rather than here?
I suppose we can have both with the two interacting though.

> +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
> +		BIT(IIO_CHAN_INFO_SCALE), \
> +	.scan_index = idx, \
> +	.scan_type = { \
> +		.sign = 's', \
> +		.realbits = 12, \
> +		.storagebits = 16, \
> +		.shift = 4, \
> +		.endianness = IIO_BE, \
> +	}, \
> +}
> +
> +static const struct iio_chan_spec mma8452_channels[] = {
> +	MMA8452_CHANNEL(X, 0),
> +	MMA8452_CHANNEL(Y, 1),
> +	MMA8452_CHANNEL(Z, 2),
> +	IIO_CHAN_SOFT_TIMESTAMP(3),
> +};
> +
> +static struct attribute *mma8452_attributes[] = {
> +	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
> +	&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
> +	NULL
> +};
> +
> +static const struct attribute_group mma8452_group = {
> +	.attrs = mma8452_attributes,
> +};
> +
> +static const struct iio_info mma8452_info = {
> +	.attrs = &mma8452_group,
> +	.read_raw = &mma8452_read_raw,
> +	.write_raw = &mma8452_write_raw,
> +	.driver_module = THIS_MODULE,
> +};
> +
> +static const unsigned long mma8452_scan_masks[] = {0x7, 0};
> +
> +static int mma8452_probe(struct i2c_client *client,
> +			 const struct i2c_device_id *id)
> +{
> +	struct mma8452_data *data;
> +	struct iio_dev *indio_dev;
> +	int ret;
> +
> +	ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
> +	if (ret < 0)
> +		return ret;
> +	if (ret != MMA8452_DEVICE_ID)
> +		return -ENODEV;
> +
> +	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	data = iio_priv(indio_dev);
> +	data->client = client;
> +	mutex_init(&data->lock);
> +
> +	i2c_set_clientdata(client, indio_dev);
> +	indio_dev->info = &mma8452_info;
> +	indio_dev->name = id->name;
> +	indio_dev->dev.parent = &client->dev;
> +	indio_dev->modes = INDIO_DIRECT_MODE;
> +	indio_dev->channels = mma8452_channels;
> +	indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
> +	indio_dev->available_scan_masks = mma8452_scan_masks;
> +
> +	data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
> +		(MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
> +	ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
> +		data->ctrl_reg1);
> +	if (ret < 0)
> +		return ret;
> +
> +	data->data_cfg = MMA8452_DATA_CFG_FS_2G;
> +	ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
> +		data->data_cfg);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = iio_triggered_buffer_setup(indio_dev, NULL,
> +		mma8452_trigger_handler, NULL);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = iio_device_register(indio_dev);
> +	if (ret < 0)
> +		goto buffer_cleanup;
> +	return 0;
> +
> +buffer_cleanup:
> +	iio_triggered_buffer_cleanup(indio_dev);
> +	return ret;
> +}
> +
> +static int mma8452_remove(struct i2c_client *client)
> +{
> +	struct iio_dev *indio_dev = i2c_get_clientdata(client);
> +
> +	iio_device_unregister(indio_dev);
> +	iio_triggered_buffer_cleanup(indio_dev);
> +	mma8452_standby(iio_priv(indio_dev));
> +
> +	return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int mma8452_suspend(struct device *dev)
> +{
> +	return mma8452_standby(iio_priv(i2c_get_clientdata(
> +		to_i2c_client(dev))));
> +}
> +
> +static int mma8452_resume(struct device *dev)
> +{
> +	return mma8452_active(iio_priv(i2c_get_clientdata(
> +		to_i2c_client(dev))));
> +}
> +
> +static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
> +#define MMA8452_PM_OPS (&mma8452_pm_ops)
> +#else
> +#define MMA8452_PM_OPS NULL
> +#endif
> +
> +static const struct i2c_device_id mma8452_id[] = {
> +	{ "mma8452", 0 },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(i2c, mma8452_id);
> +
> +static struct i2c_driver mma8452_driver = {
> +	.driver = {
> +		.name	= "mma8452",
> +		.pm	= MMA8452_PM_OPS,
> +	},
> +	.probe = mma8452_probe,
> +	.remove = mma8452_remove,
> +	.id_table = mma8452_id,
> +};
> +module_i2c_driver(mma8452_driver);
> +
> +MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
> +MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
> +MODULE_LICENSE("GPL");
>

[PATCH] iio: Add Freescale MMA8452Q 3-axis accelerometer driver

[Peter Meerwald]

3-axis accelerometer sensor (2/4/8 g) with 12-bit resolution
and I2C interface

many extra features are unsupported (freefall detection, orientation
change, autosleep)

datasheet is here:
http://cache.freescale.com/files/sensors/doc/data_sheet/MMA8452Q.pdf

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
---
 drivers/iio/accel/Kconfig   |  12 ++
 drivers/iio/accel/Makefile  |   1 +
 drivers/iio/accel/mma8452.c | 438 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 451 insertions(+)
 create mode 100644 drivers/iio/accel/mma8452.c

diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
index e23e508..1e120fa 100644
--- a/drivers/iio/accel/Kconfig
+++ b/drivers/iio/accel/Kconfig
@@ -65,4 +65,16 @@ config KXSD9
 	  Say yes here to build support for the Kionix KXSD9 accelerometer.
 	  Currently this only supports the device via an SPI interface.
 
+config MMA8452
+	tristate "Freescale MMA8452Q Accelerometer Driver"
+	depends on I2C
+	select IIO_BUFFER
+	select IIO_TRIGGERED_BUFFER
+	help
+	  Say yes here to build support for the Freescale MMA8452Q 3-axis
+	  accelerometer.
+
+	  To compile this driver as a module, choose M here: the module
+	  will be called mma8452.
+
 endmenu
diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
index c48d15f..dc0e379 100644
--- a/drivers/iio/accel/Makefile
+++ b/drivers/iio/accel/Makefile
@@ -6,6 +6,7 @@
 obj-$(CONFIG_BMA180) += bma180.o
 obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
 obj-$(CONFIG_KXSD9)	+= kxsd9.o
+obj-$(CONFIG_MMA8452)	+= mma8452.o
 
 obj-$(CONFIG_IIO_ST_ACCEL_3AXIS) += st_accel.o
 st_accel-y := st_accel_core.o
diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
new file mode 100644
index 0000000..a45628c
--- /dev/null
+++ b/drivers/iio/accel/mma8452.c
@@ -0,0 +1,438 @@
+/*
+ * mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
+ *
+ * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
+ *
+ * This file is subject to the terms and conditions of version 2 of
+ * the GNU General Public License.  See the file COPYING in the main
+ * directory of this archive for more details.
+ *
+ * 7-bit I2C slave address 0x1c/0x1d (pin selectable)
+ *
+ * TODO: interrupt, thresholding, orientation / freefall events, autosleep
+ */
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/iio/trigger_consumer.h>
+#include <linux/iio/buffer.h>
+#include <linux/iio/triggered_buffer.h>
+#include <linux/delay.h>
+
+#define MMA8452_STATUS 0x00
+#define MMA8452_OUT_X 0x01 /* MSB first, 12-bit  */
+#define MMA8452_OUT_Y 0x03
+#define MMA8452_OUT_Z 0x05
+#define MMA8452_WHO_AM_I 0x0d
+#define MMA8452_DATA_CFG 0x0e
+#define MMA8452_OFF_X 0x2f
+#define MMA8452_OFF_Y 0x30
+#define MMA8452_OFF_Z 0x31
+#define MMA8452_CTRL_REG1 0x2a
+#define MMA8452_CTRL_REG2 0x2b
+
+#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
+
+#define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
+#define MMA8452_CTRL_DR_SHIFT 3
+#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
+#define MMA8452_CTRL_ACTIVE BIT(0)
+
+#define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
+#define MMA8452_DATA_CFG_FS_2G 0
+#define MMA8452_DATA_CFG_FS_4G 1
+#define MMA8452_DATA_CFG_FS_8G 2
+
+#define MMA8452_DEVICE_ID 0x2a
+
+/* Each client has this additional data */
+struct mma8452_data {
+	struct i2c_client *client;
+	struct mutex lock;
+	u8 ctrl_reg1;
+	u8 data_cfg;
+};
+
+static int mma8452_drdy(struct mma8452_data *data)
+{
+	int tries = 150;
+
+	while (tries-- > 0) {
+		int ret = i2c_smbus_read_byte_data(data->client,
+			MMA8452_STATUS);
+		if (ret < 0)
+			return ret;
+		if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
+			return 0;
+		msleep(20);
+	}
+
+	dev_err(&data->client->dev, "data not ready\n");
+	return -EIO;
+}
+
+static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
+{
+	int ret = mma8452_drdy(data);
+	if (ret < 0)
+		return ret;
+	return i2c_smbus_read_i2c_block_data(data->client,
+		MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
+}
+
+static ssize_t mma8452_show_int_plus_micros(char *buf,
+	const int (*vals)[2], int n)
+{
+	size_t len = 0;
+
+	while (n-- > 0)
+		len += scnprintf(buf + len, PAGE_SIZE - len,
+			"%d.%06d ", vals[n][0], vals[n][1]);
+
+	/* replace trailing space by newline */
+	buf[len - 1] = '\n';
+
+	return len;
+}
+
+static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
+					int val, int val2)
+{
+	while (n-- > 0)
+		if (val == vals[n][0] && val2 == vals[n][1])
+			return n;
+
+	return -EINVAL;
+}
+
+static const int mma8452_samp_freq[8][2] = {
+	{800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
+	{6, 250000}, {1, 560000}
+};
+
+static const int mma8452_scales[3][2] = {
+	{0, 977}, {0, 1953}, {0, 3906}
+};
+
+static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	return mma8452_show_int_plus_micros(buf, mma8452_samp_freq, 8);
+}
+
+static ssize_t mma8452_show_scale_avail(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	return mma8452_show_int_plus_micros(buf, mma8452_scales, 3);
+}
+
+static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
+static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
+	mma8452_show_scale_avail, NULL, 0);
+
+static int mma8452_get_samp_freq_index(struct mma8452_data *data,
+	int val, int val2)
+{
+	return mma8452_get_int_plus_micros_index(mma8452_samp_freq, 8, val,
+		val2);
+}
+
+static int mma8452_get_scale_index(struct mma8452_data *data,
+	int val, int val2)
+{
+	return mma8452_get_int_plus_micros_index(mma8452_scales, 3, val,
+		val2);
+}
+
+static int mma8452_read_raw(struct iio_dev *indio_dev,
+			    struct iio_chan_spec const *chan,
+			    int *val, int *val2, long mask)
+{
+	struct mma8452_data *data = iio_priv(indio_dev);
+	__be16 buffer[3];
+	int i, ret;
+
+	switch (mask) {
+	case IIO_CHAN_INFO_RAW:
+		if (iio_buffer_enabled(indio_dev))
+			return -EBUSY;
+
+		mutex_lock(&data->lock);
+		ret = mma8452_read(data, buffer);
+		mutex_unlock(&data->lock);
+		if (ret < 0)
+			return ret;
+		*val = sign_extend32(
+			be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
+		return IIO_VAL_INT;
+	case IIO_CHAN_INFO_SCALE:
+		i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
+		*val = mma8452_scales[i][0];
+		*val2 = mma8452_scales[i][1];
+		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_SAMP_FREQ:
+		i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
+			MMA8452_CTRL_DR_SHIFT;
+		*val = mma8452_samp_freq[i][0];
+		*val2 = mma8452_samp_freq[i][1];
+		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_CALIBBIAS:
+		ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
+			chan->scan_index);
+		if (ret < 0)
+			return ret;
+		*val = sign_extend32(ret, 7);
+		return IIO_VAL_INT;
+	}
+	return -EINVAL;
+}
+
+static int mma8452_standby(struct mma8452_data *data)
+{
+	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
+		data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
+}
+
+static int mma8452_active(struct mma8452_data *data)
+{
+	return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
+		data->ctrl_reg1);
+}
+
+static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
+{
+	int ret;
+
+	mutex_lock(&data->lock);
+
+	/* config can only be changed when in standby */
+	ret = mma8452_standby(data);
+	if (ret < 0)
+		goto fail;
+
+	ret = i2c_smbus_write_byte_data(data->client, reg, val);
+	if (ret < 0)
+		goto fail;
+
+	ret = mma8452_active(data);
+	if (ret < 0)
+		goto fail;
+
+	ret = 0;
+fail:
+	mutex_unlock(&data->lock);
+	return ret;
+}
+
+static int mma8452_write_raw(struct iio_dev *indio_dev,
+			     struct iio_chan_spec const *chan,
+			     int val, int val2, long mask)
+{
+	struct mma8452_data *data = iio_priv(indio_dev);
+	int i;
+
+	if (iio_buffer_enabled(indio_dev))
+		return -EBUSY;
+
+	switch (mask) {
+	case IIO_CHAN_INFO_SAMP_FREQ:
+		i = mma8452_get_samp_freq_index(data, val, val2);
+		if (i < 0)
+			return -EINVAL;
+
+		data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
+		data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
+		return mma8452_change_config(data, MMA8452_CTRL_REG1,
+			data->ctrl_reg1);
+	case IIO_CHAN_INFO_SCALE:
+		i = mma8452_get_scale_index(data, val, val2);
+		if (i < 0)
+			return -EINVAL;
+		data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
+		data->data_cfg |= i;
+		return mma8452_change_config(data, MMA8452_DATA_CFG,
+			data->data_cfg);
+	case IIO_CHAN_INFO_CALIBBIAS:
+		if (val < -128 || val > 127)
+			return -EINVAL;
+		return mma8452_change_config(data, MMA8452_OFF_X +
+			chan->scan_index, val);
+	default:
+		return -EINVAL;
+	}
+}
+
+static irqreturn_t mma8452_trigger_handler(int irq, void *p)
+{
+	struct iio_poll_func *pf = p;
+	struct iio_dev *indio_dev = pf->indio_dev;
+	struct mma8452_data *data = iio_priv(indio_dev);
+	u8 buffer[16]; /* 3 16-bit channels + padding + ts */
+	int ret;
+
+	ret = mma8452_read(data, (__be16 *) buffer);
+	if (ret < 0)
+		goto done;
+
+	iio_push_to_buffers_with_timestamp(indio_dev, buffer,
+		iio_get_time_ns());
+
+done:
+	iio_trigger_notify_done(indio_dev->trig);
+	return IRQ_HANDLED;
+}
+
+#define MMA8452_CHANNEL(axis, idx) { \
+	.type = IIO_ACCEL, \
+	.modified = 1, \
+	.channel2 = IIO_MOD_##axis, \
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
+		BIT(IIO_CHAN_INFO_CALIBBIAS), \
+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
+		BIT(IIO_CHAN_INFO_SCALE), \
+	.scan_index = idx, \
+	.scan_type = { \
+		.sign = 's', \
+		.realbits = 12, \
+		.storagebits = 16, \
+		.shift = 4, \
+		.endianness = IIO_BE, \
+	}, \
+}
+
+static const struct iio_chan_spec mma8452_channels[] = {
+	MMA8452_CHANNEL(X, 0),
+	MMA8452_CHANNEL(Y, 1),
+	MMA8452_CHANNEL(Z, 2),
+	IIO_CHAN_SOFT_TIMESTAMP(3),
+};
+
+static struct attribute *mma8452_attributes[] = {
+	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
+	&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
+	NULL
+};
+
+static const struct attribute_group mma8452_group = {
+	.attrs = mma8452_attributes,
+};
+
+static const struct iio_info mma8452_info = {
+	.attrs = &mma8452_group,
+	.read_raw = &mma8452_read_raw,
+	.write_raw = &mma8452_write_raw,
+	.driver_module = THIS_MODULE,
+};
+
+static const unsigned long mma8452_scan_masks[] = {0x7, 0};
+
+static int mma8452_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct mma8452_data *data;
+	struct iio_dev *indio_dev;
+	int ret;
+
+	ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
+	if (ret < 0)
+		return ret;
+	if (ret != MMA8452_DEVICE_ID)
+		return -ENODEV;
+
+	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+	if (!indio_dev)
+		return -ENOMEM;
+
+	data = iio_priv(indio_dev);
+	data->client = client;
+	mutex_init(&data->lock);
+
+	i2c_set_clientdata(client, indio_dev);
+	indio_dev->info = &mma8452_info;
+	indio_dev->name = id->name;
+	indio_dev->dev.parent = &client->dev;
+	indio_dev->modes = INDIO_DIRECT_MODE;
+	indio_dev->channels = mma8452_channels;
+	indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
+	indio_dev->available_scan_masks = mma8452_scan_masks;
+
+	data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
+		(MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
+	ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
+		data->ctrl_reg1);
+	if (ret < 0)
+		return ret;
+
+	data->data_cfg = MMA8452_DATA_CFG_FS_2G;
+	ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
+		data->data_cfg);
+	if (ret < 0)
+		return ret;
+
+	ret = iio_triggered_buffer_setup(indio_dev, NULL,
+		mma8452_trigger_handler, NULL);
+	if (ret < 0)
+		return ret;
+
+	ret = iio_device_register(indio_dev);
+	if (ret < 0)
+		goto buffer_cleanup;
+	return 0;
+
+buffer_cleanup:
+	iio_triggered_buffer_cleanup(indio_dev);
+	return ret;
+}
+
+static int mma8452_remove(struct i2c_client *client)
+{
+	struct iio_dev *indio_dev = i2c_get_clientdata(client);
+
+	iio_device_unregister(indio_dev);
+	iio_triggered_buffer_cleanup(indio_dev);
+	mma8452_standby(iio_priv(indio_dev));
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int mma8452_suspend(struct device *dev)
+{
+	return mma8452_standby(iio_priv(i2c_get_clientdata(
+		to_i2c_client(dev))));
+}
+
+static int mma8452_resume(struct device *dev)
+{
+	return mma8452_active(iio_priv(i2c_get_clientdata(
+		to_i2c_client(dev))));
+}
+
+static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
+#define MMA8452_PM_OPS (&mma8452_pm_ops)
+#else
+#define MMA8452_PM_OPS NULL
+#endif
+
+static const struct i2c_device_id mma8452_id[] = {
+	{ "mma8452", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, mma8452_id);
+
+static struct i2c_driver mma8452_driver = {
+	.driver = {
+		.name	= "mma8452",
+		.pm	= MMA8452_PM_OPS,
+	},
+	.probe = mma8452_probe,
+	.remove = mma8452_remove,
+	.id_table = mma8452_id,
+};
+module_i2c_driver(mma8452_driver);
+
+MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
+MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
+MODULE_LICENSE("GPL");
-- 
1.8.3.2