From: Maxime Ripard <maxime.ripard@free-electrons.com> To: Emilio Lopez <emilio@elopez.com.ar>, Mike Turquette <mturquette@linaro.org>, stern@rowland.harvard.edu, kishon@ti.com, hdegoede@redhat.com Cc: Boris Brezillon <boris@free-electrons.com>, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org, kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, zhuzhenhua@allwinnertech.com, linux-sunxi@googlegroups.com, Maxime Ripard <maxime.ripard@free-electrons.com> Subject: [PATCH v2 1/7] clk: sunxi: Implement A31 USB clock Date: Sat, 10 May 2014 07:56:53 -0500 [thread overview] Message-ID: <1399726619-30150-2-git-send-email-maxime.ripard@free-electrons.com> (raw) In-Reply-To: <1399726619-30150-1-git-send-email-maxime.ripard@free-electrons.com> The A31 USB clock slightly differ from its older counterparts, mostly because it has a different gate for each PHY, while the older one had a single gate for all the phy. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> --- drivers/clk/sunxi/clk-sunxi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index bd7dc733c1ca..d9bab75f128b 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -972,6 +972,11 @@ static const struct gates_data sun5i_a13_usb_gates_data __initconst = { .reset_mask = 0x03, }; +static const struct gates_data sun6i_a31_usb_gates_data __initconst = { + .mask = { BIT(18) | BIT(17) | BIT(16) | BIT(10) | BIT(9) | BIT(8) }, + .reset_mask = BIT(2) | BIT(1) | BIT(0), +}; + static void __init sunxi_gates_clk_setup(struct device_node *node, struct gates_data *data) { @@ -1267,6 +1272,7 @@ static const struct of_device_id clk_gates_match[] __initconst = { {.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,}, {.compatible = "allwinner,sun4i-a10-usb-clk", .data = &sun4i_a10_usb_gates_data,}, {.compatible = "allwinner,sun5i-a13-usb-clk", .data = &sun5i_a13_usb_gates_data,}, + {.compatible = "allwinner,sun6i-a31-usb-clk", .data = &sun6i_a31_usb_gates_data,}, {} }; -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/7] clk: sunxi: Implement A31 USB clock Date: Sat, 10 May 2014 07:56:53 -0500 [thread overview] Message-ID: <1399726619-30150-2-git-send-email-maxime.ripard@free-electrons.com> (raw) In-Reply-To: <1399726619-30150-1-git-send-email-maxime.ripard@free-electrons.com> The A31 USB clock slightly differ from its older counterparts, mostly because it has a different gate for each PHY, while the older one had a single gate for all the phy. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> --- drivers/clk/sunxi/clk-sunxi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index bd7dc733c1ca..d9bab75f128b 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -972,6 +972,11 @@ static const struct gates_data sun5i_a13_usb_gates_data __initconst = { .reset_mask = 0x03, }; +static const struct gates_data sun6i_a31_usb_gates_data __initconst = { + .mask = { BIT(18) | BIT(17) | BIT(16) | BIT(10) | BIT(9) | BIT(8) }, + .reset_mask = BIT(2) | BIT(1) | BIT(0), +}; + static void __init sunxi_gates_clk_setup(struct device_node *node, struct gates_data *data) { @@ -1267,6 +1272,7 @@ static const struct of_device_id clk_gates_match[] __initconst = { {.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,}, {.compatible = "allwinner,sun4i-a10-usb-clk", .data = &sun4i_a10_usb_gates_data,}, {.compatible = "allwinner,sun5i-a13-usb-clk", .data = &sun5i_a13_usb_gates_data,}, + {.compatible = "allwinner,sun6i-a31-usb-clk", .data = &sun6i_a31_usb_gates_data,}, {} }; -- 1.9.1
next prev parent reply other threads:[~2014-05-10 13:00 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-05-10 12:56 [PATCH v2 0/7] Add Allwinner A31 USB support Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard [this message] 2014-05-10 12:56 ` [PATCH v2 1/7] clk: sunxi: Implement A31 USB clock Maxime Ripard 2014-05-10 12:56 ` [PATCH v2 2/7] ARM: sun6i: Add the USB clocks to the DTSI Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard 2014-05-10 12:56 ` [PATCH v2 3/7] phy: usb: sunxi: Introduce Allwinner A31 USB PHY support Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard 2014-05-12 9:14 ` [linux-sunxi] " Chen-Yu Tsai 2014-05-12 9:14 ` Chen-Yu Tsai 2014-05-12 11:59 ` Hans de Goede 2014-05-12 11:59 ` Hans de Goede 2014-05-12 12:24 ` Kishon Vijay Abraham I 2014-05-12 12:24 ` Kishon Vijay Abraham I 2014-05-12 12:27 ` Hans de Goede 2014-05-12 12:27 ` Hans de Goede 2014-05-12 15:04 ` Maxime Ripard 2014-05-12 15:04 ` Maxime Ripard 2014-05-10 12:56 ` [PATCH v2 4/7] usb: ehci-platform: add optional reset controller retrieval Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard 2014-05-10 14:35 ` Alan Stern 2014-05-10 14:35 ` Alan Stern 2014-05-12 14:30 ` Maxime Ripard 2014-05-12 14:30 ` Maxime Ripard 2014-05-10 12:56 ` [PATCH v2 5/7] usb: ohci-platform: Enable optional use of reset controller Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard 2014-05-10 12:56 ` [PATCH v2 6/7] ARM: sun6i: dt: Add support for the USB controllers Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard 2014-05-10 12:56 ` [PATCH v2 7/7] ARM: sunxi: dt: add APP4-EVB1 board support Maxime Ripard 2014-05-10 12:56 ` Maxime Ripard
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