[PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[Shawn Lin]

Per the errata of TRM, the RC can't support L1 substate, so we
need to remove the L1 substate cap.

Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

 drivers/pci/host/pcie-rockchip.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index e0b22da..8370a85 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -142,6 +142,8 @@
 #define   PCIE_RC_CONFIG_LCS_LBMS		BIT(30)
 #define   PCIE_RC_CONFIG_LCS_LAMS		BIT(31)
 #define PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 (PCIE_RC_CONFIG_BASE + 0x90c)
+#define PCIE_RC_CONFIG_THP_CAP		(PCIE_RC_CONFIG_BASE + 0x274)
+#define   PCIE_RC_CONFIG_THP_CAP_NEXT_MASK	GENMASK(31, 20)
 
 #define PCIE_CORE_AXI_CONF_BASE		0xc00000
 #define PCIE_CORE_OB_REGION_ADDR0	(PCIE_CORE_AXI_CONF_BASE + 0x0)
@@ -558,6 +560,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	rockchip_pcie_write(rockchip,
 			    PCI_CLASS_BRIDGE_PCI << PCIE_RC_CONFIG_SCC_SHIFT,
 			    PCIE_RC_CONFIG_RID_CCR);
+
+	/* Clear THP cap's next cap pointer to remove L1 substate cap */
+	status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_THP_CAP);
+	status &= ~PCIE_RC_CONFIG_THP_CAP_NEXT_MASK;
+	rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_THP_CAP);
+
 	rockchip_pcie_write(rockchip, 0x0, PCIE_RC_BAR_CONF);
 
 	rockchip_pcie_write(rockchip,
-- 
2.3.7

Re: [PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[Brian Norris]

Hi,

On Wed, Oct 19, 2016 at 05:10:34PM +0800, Shawn Lin wrote:
> Per the errata of TRM, the RC can't support L1 substate, so we
> need to remove the L1 substate cap.
> 
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
> 
>  drivers/pci/host/pcie-rockchip.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
> index e0b22da..8370a85 100644
> --- a/drivers/pci/host/pcie-rockchip.c
> +++ b/drivers/pci/host/pcie-rockchip.c
> @@ -142,6 +142,8 @@
>  #define   PCIE_RC_CONFIG_LCS_LBMS		BIT(30)
>  #define   PCIE_RC_CONFIG_LCS_LAMS		BIT(31)
>  #define PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 (PCIE_RC_CONFIG_BASE + 0x90c)
> +#define PCIE_RC_CONFIG_THP_CAP		(PCIE_RC_CONFIG_BASE + 0x274)
> +#define   PCIE_RC_CONFIG_THP_CAP_NEXT_MASK	GENMASK(31, 20)
>  
>  #define PCIE_CORE_AXI_CONF_BASE		0xc00000
>  #define PCIE_CORE_OB_REGION_ADDR0	(PCIE_CORE_AXI_CONF_BASE + 0x0)
> @@ -558,6 +560,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
>  	rockchip_pcie_write(rockchip,
>  			    PCI_CLASS_BRIDGE_PCI << PCIE_RC_CONFIG_SCC_SHIFT,
>  			    PCIE_RC_CONFIG_RID_CCR);
> +
> +	/* Clear THP cap's next cap pointer to remove L1 substate cap */
> +	status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_THP_CAP);
> +	status &= ~PCIE_RC_CONFIG_THP_CAP_NEXT_MASK;
> +	rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_THP_CAP);
> +

Tested-by: Brian Norris <briannorris@chromium.org>

>  	rockchip_pcie_write(rockchip, 0x0, PCIE_RC_BAR_CONF);
>  
>  	rockchip_pcie_write(rockchip,

You could also probably do away with the handling of L1 substates here,
since they're officially declared broken:

        /*
         * We need to read/write PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 before
         * enabling ASPM.  Otherwise L1PwrOnSc and L1PwrOnVal isn't
         * reliable and enabling ASPM doesn't work.  This is a controller
         * bug we need to work around.
         */
        status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2);
        rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2);

Re: [PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[Brian Norris]

On Wed, Oct 19, 2016 at 10:42:05AM -0700, Brian Norris wrote:
> Hi,
> 
> On Wed, Oct 19, 2016 at 05:10:34PM +0800, Shawn Lin wrote:
> > Per the errata of TRM, the RC can't support L1 substate, so we
> > need to remove the L1 substate cap.
> > 
> > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

[snip]

BTW, I couldn't actually find the original patch email in any mailing
list archive, nor in patchwork. Did the email get held up by the mailing
list or something?

Brian

Re: [PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[Shawn Lin]

在 2016/10/20 1:42, Brian Norris 写道:
> Hi,
>
> On Wed, Oct 19, 2016 at 05:10:34PM +0800, Shawn Lin wrote:
>> Per the errata of TRM, the RC can't support L1 substate, so we
>> need to remove the L1 substate cap.
>>
>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>> ---
>>
>>  drivers/pci/host/pcie-rockchip.c | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
>> index e0b22da..8370a85 100644
>> --- a/drivers/pci/host/pcie-rockchip.c
>> +++ b/drivers/pci/host/pcie-rockchip.c
>> @@ -142,6 +142,8 @@
>>  #define   PCIE_RC_CONFIG_LCS_LBMS		BIT(30)
>>  #define   PCIE_RC_CONFIG_LCS_LAMS		BIT(31)
>>  #define PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 (PCIE_RC_CONFIG_BASE + 0x90c)
>> +#define PCIE_RC_CONFIG_THP_CAP		(PCIE_RC_CONFIG_BASE + 0x274)
>> +#define   PCIE_RC_CONFIG_THP_CAP_NEXT_MASK	GENMASK(31, 20)
>>
>>  #define PCIE_CORE_AXI_CONF_BASE		0xc00000
>>  #define PCIE_CORE_OB_REGION_ADDR0	(PCIE_CORE_AXI_CONF_BASE + 0x0)
>> @@ -558,6 +560,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
>>  	rockchip_pcie_write(rockchip,
>>  			    PCI_CLASS_BRIDGE_PCI << PCIE_RC_CONFIG_SCC_SHIFT,
>>  			    PCIE_RC_CONFIG_RID_CCR);
>> +
>> +	/* Clear THP cap's next cap pointer to remove L1 substate cap */
>> +	status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_THP_CAP);
>> +	status &= ~PCIE_RC_CONFIG_THP_CAP_NEXT_MASK;
>> +	rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_THP_CAP);
>> +
>
> Tested-by: Brian Norris <briannorris@chromium.org>
>
>>  	rockchip_pcie_write(rockchip, 0x0, PCIE_RC_BAR_CONF);
>>
>>  	rockchip_pcie_write(rockchip,
>
> You could also probably do away with the handling of L1 substates here,
> since they're officially declared broken:

okay, I will respin v2 later to remove this.

>
>         /*
>          * We need to read/write PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 before
>          * enabling ASPM.  Otherwise L1PwrOnSc and L1PwrOnVal isn't
>          * reliable and enabling ASPM doesn't work.  This is a controller
>          * bug we need to work around.
>          */
>         status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2);
>         rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2);
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>


-- 
Best Regards
Shawn Lin

Re: [PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[Shawn Lin]

在 2016/10/20 1:42, Brian Norris 写道:
> Hi,
>
> On Wed, Oct 19, 2016 at 05:10:34PM +0800, Shawn Lin wrote:
>> Per the errata of TRM, the RC can't support L1 substate, so we
>> need to remove the L1 substate cap.
>>
>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>> ---
>>
>>  drivers/pci/host/pcie-rockchip.c | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
>> index e0b22da..8370a85 100644
>> --- a/drivers/pci/host/pcie-rockchip.c
>> +++ b/drivers/pci/host/pcie-rockchip.c
>> @@ -142,6 +142,8 @@
>>  #define   PCIE_RC_CONFIG_LCS_LBMS		BIT(30)
>>  #define   PCIE_RC_CONFIG_LCS_LAMS		BIT(31)
>>  #define PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 (PCIE_RC_CONFIG_BASE + 0x90c)
>> +#define PCIE_RC_CONFIG_THP_CAP		(PCIE_RC_CONFIG_BASE + 0x274)
>> +#define   PCIE_RC_CONFIG_THP_CAP_NEXT_MASK	GENMASK(31, 20)
>>
>>  #define PCIE_CORE_AXI_CONF_BASE		0xc00000
>>  #define PCIE_CORE_OB_REGION_ADDR0	(PCIE_CORE_AXI_CONF_BASE + 0x0)
>> @@ -558,6 +560,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
>>  	rockchip_pcie_write(rockchip,
>>  			    PCI_CLASS_BRIDGE_PCI << PCIE_RC_CONFIG_SCC_SHIFT,
>>  			    PCIE_RC_CONFIG_RID_CCR);
>> +
>> +	/* Clear THP cap's next cap pointer to remove L1 substate cap */
>> +	status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_THP_CAP);
>> +	status &= ~PCIE_RC_CONFIG_THP_CAP_NEXT_MASK;
>> +	rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_THP_CAP);
>> +
>
> Tested-by: Brian Norris <briannorris@chromium.org>
>
>>  	rockchip_pcie_write(rockchip, 0x0, PCIE_RC_BAR_CONF);
>>
>>  	rockchip_pcie_write(rockchip,
>
> You could also probably do away with the handling of L1 substates here,
> since they're officially declared broken:

okay, I will respin v2 later to remove this.

>
>         /*
>          * We need to read/write PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 before
>          * enabling ASPM.  Otherwise L1PwrOnSc and L1PwrOnVal isn't
>          * reliable and enabling ASPM doesn't work.  This is a controller
>          * bug we need to work around.
>          */
>         status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2);
>         rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2);
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>


-- 
Best Regards
Shawn Lin

Re: [PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[Shawn Lin]

在 2016/10/20 1:43, Brian Norris 写道:
> On Wed, Oct 19, 2016 at 10:42:05AM -0700, Brian Norris wrote:
>> Hi,
>>
>> On Wed, Oct 19, 2016 at 05:10:34PM +0800, Shawn Lin wrote:
>>> Per the errata of TRM, the RC can't support L1 substate, so we
>>> need to remove the L1 substate cap.
>>>
>>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>
> [snip]
>
> BTW, I couldn't actually find the original patch email in any mailing
> list archive, nor in patchwork. Did the email get held up by the mailing
> list or something?

I don't know if this patch was held by linux-pci, but I could find it
here:

https://patchwork.kernel.org/patch/9383721/



>
> Brian
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>


-- 
Best Regards
Shawn Lin

Re: [PATCH] PCI: rockchip: remove the pointer to L1 substate cap

[Shawn Lin]

在 2016/10/20 1:43, Brian Norris 写道:
> On Wed, Oct 19, 2016 at 10:42:05AM -0700, Brian Norris wrote:
>> Hi,
>>
>> On Wed, Oct 19, 2016 at 05:10:34PM +0800, Shawn Lin wrote:
>>> Per the errata of TRM, the RC can't support L1 substate, so we
>>> need to remove the L1 substate cap.
>>>
>>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>
> [snip]
>
> BTW, I couldn't actually find the original patch email in any mailing
> list archive, nor in patchwork. Did the email get held up by the mailing
> list or something?

I don't know if this patch was held by linux-pci, but I could find it
here:

https://patchwork.kernel.org/patch/9383721/



>
> Brian
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>


-- 
Best Regards
Shawn Lin