From: Doug Anderson <dianders@chromium.org>
To: Kukjin Kim <kgene.kim@samsung.com>, Tomasz Figa <t.figa@samsung.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
Vincent Guittot <vincent.guittot@linaro.org>,
Chirantan Ekbote <chirantan@chromium.org>,
David Riley <davidriley@chromium.org>,
olof@lixom.net, linux-samsung-soc@vger.kernel.org,
Mandeep Singh Baines <msb@chromium.org>,
Andrew Bresticker <abrestic@chromium.org>,
Doug Anderson <dianders@chromium.org>,
tglx@linutronix.de, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] clocksource: exynos_mct: cache mct upper count
Date: Wed, 4 Jun 2014 10:30:33 -0700 [thread overview]
Message-ID: <1401903034-20074-2-git-send-email-dianders@chromium.org> (raw)
In-Reply-To: <1401903034-20074-1-git-send-email-dianders@chromium.org>
From: Mandeep Singh Baines <msb@chromium.org>
Saves one register read. Note that the upper count only changes every
~178 seconds with a 24MHz source clock, so it's likely it hasn't
changed from call to call.
Before: 1323852 us for 1000000 gettimeofday in userspace
After: 1173084 us for 1000000 gettimeofday in userspace
Note that even with this change the CPU is in exynos_frc_read() more
than 2% of the time in real world profiles of ChromeOS. That
indicates that it's important to optimize.
Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
---
drivers/clocksource/exynos_mct.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index ba3a683..7cbe4aa 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -167,8 +167,8 @@ static void exynos4_mct_frc_start(u32 hi, u32 lo)
static inline cycle_t notrace _exynos4_frc_read(void)
{
- unsigned int lo, hi;
- u32 hi2 = __raw_readl(reg_base + EXYNOS4_MCT_G_CNT_U);
+ u32 lo, hi;
+ static u32 hi2;
do {
hi = hi2;
--
2.0.0.526.g5318336
WARNING: multiple messages have this Message-ID (diff)
From: Doug Anderson <dianders@chromium.org>
To: Kukjin Kim <kgene.kim@samsung.com>, Tomasz Figa <t.figa@samsung.com>
Cc: linux-samsung-soc@vger.kernel.org,
David Riley <davidriley@chromium.org>,
Chirantan Ekbote <chirantan@chromium.org>,
Mandeep Singh Baines <msb@chromium.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Doug Anderson <dianders@chromium.org>,
linux-kernel@vger.kernel.org,
Andrew Bresticker <abrestic@chromium.org>,
olof@lixom.net, Vincent Guittot <vincent.guittot@linaro.org>,
tglx@linutronix.de, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] clocksource: exynos_mct: cache mct upper count
Date: Wed, 4 Jun 2014 10:30:33 -0700 [thread overview]
Message-ID: <1401903034-20074-2-git-send-email-dianders@chromium.org> (raw)
In-Reply-To: <1401903034-20074-1-git-send-email-dianders@chromium.org>
From: Mandeep Singh Baines <msb@chromium.org>
Saves one register read. Note that the upper count only changes every
~178 seconds with a 24MHz source clock, so it's likely it hasn't
changed from call to call.
Before: 1323852 us for 1000000 gettimeofday in userspace
After: 1173084 us for 1000000 gettimeofday in userspace
Note that even with this change the CPU is in exynos_frc_read() more
than 2% of the time in real world profiles of ChromeOS. That
indicates that it's important to optimize.
Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
---
drivers/clocksource/exynos_mct.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index ba3a683..7cbe4aa 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -167,8 +167,8 @@ static void exynos4_mct_frc_start(u32 hi, u32 lo)
static inline cycle_t notrace _exynos4_frc_read(void)
{
- unsigned int lo, hi;
- u32 hi2 = __raw_readl(reg_base + EXYNOS4_MCT_G_CNT_U);
+ u32 lo, hi;
+ static u32 hi2;
do {
hi = hi2;
--
2.0.0.526.g5318336
WARNING: multiple messages have this Message-ID (diff)
From: dianders@chromium.org (Doug Anderson)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] clocksource: exynos_mct: cache mct upper count
Date: Wed, 4 Jun 2014 10:30:33 -0700 [thread overview]
Message-ID: <1401903034-20074-2-git-send-email-dianders@chromium.org> (raw)
In-Reply-To: <1401903034-20074-1-git-send-email-dianders@chromium.org>
From: Mandeep Singh Baines <msb@chromium.org>
Saves one register read. Note that the upper count only changes every
~178 seconds with a 24MHz source clock, so it's likely it hasn't
changed from call to call.
Before: 1323852 us for 1000000 gettimeofday in userspace
After: 1173084 us for 1000000 gettimeofday in userspace
Note that even with this change the CPU is in exynos_frc_read() more
than 2% of the time in real world profiles of ChromeOS. That
indicates that it's important to optimize.
Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
---
drivers/clocksource/exynos_mct.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index ba3a683..7cbe4aa 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -167,8 +167,8 @@ static void exynos4_mct_frc_start(u32 hi, u32 lo)
static inline cycle_t notrace _exynos4_frc_read(void)
{
- unsigned int lo, hi;
- u32 hi2 = __raw_readl(reg_base + EXYNOS4_MCT_G_CNT_U);
+ u32 lo, hi;
+ static u32 hi2;
do {
hi = hi2;
--
2.0.0.526.g5318336
next prev parent reply other threads:[~2014-06-04 17:31 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-04 17:30 [PATCH 1/3] clocksource: exynos_mct: Fix ftrace Doug Anderson
2014-06-04 17:30 ` Doug Anderson
2014-06-04 17:30 ` Doug Anderson
2014-06-04 17:30 ` Doug Anderson [this message]
2014-06-04 17:30 ` [PATCH 2/3] clocksource: exynos_mct: cache mct upper count Doug Anderson
2014-06-04 17:30 ` Doug Anderson
2014-06-05 7:55 ` Vincent Guittot
2014-06-05 7:55 ` Vincent Guittot
2014-06-05 17:14 ` Doug Anderson
2014-06-05 17:14 ` Doug Anderson
2014-06-04 17:30 ` [PATCH 3/3] clocksource: exynos_mct: Optimize register reads with ldmia Doug Anderson
2014-06-04 17:30 ` Doug Anderson
2014-06-04 17:30 ` Doug Anderson
2014-06-04 18:05 ` Thomas Gleixner
2014-06-04 18:05 ` Thomas Gleixner
2014-06-04 18:49 ` Doug Anderson
2014-06-04 18:49 ` Doug Anderson
2014-06-04 18:49 ` Doug Anderson
2014-06-05 11:18 ` Tomasz Figa
2014-06-05 11:18 ` Tomasz Figa
2014-06-05 11:18 ` Tomasz Figa
2014-06-05 18:21 ` Doug Anderson
2014-06-05 18:21 ` Doug Anderson
2014-06-05 18:21 ` Doug Anderson
2014-06-12 16:53 ` Doug Anderson
2014-06-12 16:53 ` Doug Anderson
2014-06-12 16:53 ` Doug Anderson
2014-06-15 21:18 ` [PATCH 1/3] clocksource: exynos_mct: Fix ftrace Daniel Lezcano
2014-06-15 21:18 ` Daniel Lezcano
2014-06-16 4:40 ` Doug Anderson
2014-06-16 4:40 ` Doug Anderson
2014-06-16 4:40 ` Doug Anderson
2014-06-16 8:52 ` Daniel Lezcano
2014-06-16 8:52 ` Daniel Lezcano
2014-06-16 8:52 ` Daniel Lezcano
2014-06-16 16:35 ` Doug Anderson
2014-06-16 16:35 ` Doug Anderson
2014-06-16 16:35 ` Doug Anderson
2014-06-17 12:13 ` Daniel Lezcano
2014-06-17 12:13 ` Daniel Lezcano
2014-06-19 17:07 ` Doug Anderson
2014-06-19 17:07 ` Doug Anderson
2014-06-19 17:07 ` Doug Anderson
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