[U-Boot] [PATCH v4 0/6] Introduction of new board Peach-Pit

[U-Boot] [PATCH v4 0/6] Introduction of new board Peach-Pit

[Akshay Saraswat]

This board is based on Exynos5420 and is similar to SMDK5420 board. 
Adding new and refactoring existing  DT and config files to support 
both SMDK5420 and Peach-Pit. 
This patch set also intends to place env at the end of flash, increase
SPL footprint, enable USB boot mode and split memory bank config.

Changes since v1: 
	- Added "Acked-by". 
Changes since v2: 
	- Changed order of the patches because 2/2 alone results in compiler 
	  errors and has dependency over patch 1/2. 
	- Removed CONFIG_CHROMEOS_PEACH.
Changes since v3:
	- Took four patches in this set from a different patch set.
	- Rebased all the patches to Top of Tree.

Akshay Saraswat (5):
  Exynos5420: Let macros be used for exynos5420
  Exynos5420: Introduce support for the Peach-Pit board
  Exynos5: Config: Place environment at the end of SPI flash
  Exynos5: Config: Increase SPL footprint for Exynos5420
  Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs

Michael Pratt (1):
  Exynos: Split 5250 and 5420 memory bank configuration

 arch/arm/cpu/armv7/exynos/exynos5_setup.h |   6 +-
 arch/arm/dts/Makefile                     |   3 +-
 arch/arm/dts/exynos5420-peach-pit.dts     | 127 +++++++++++++++++++++++++
 arch/arm/dts/exynos5420-smdk5420.dts      |  23 +----
 arch/arm/dts/exynos5420.dtsi              |  70 --------------
 arch/arm/dts/exynos54xx.dtsi              | 151 ++++++++++++++++++++++++++++++
 boards.cfg                                |   1 +
 include/configs/exynos5-dt.h              |  15 ++-
 include/configs/exynos5250-dt.h           |  13 +--
 include/configs/exynos5420.h              |  52 ++++++++++
 include/configs/peach-pit.h               |  25 +++++
 include/configs/smdk5420.h                |  49 ++--------
 12 files changed, 388 insertions(+), 147 deletions(-)
 create mode 100644 arch/arm/dts/exynos5420-peach-pit.dts
 delete mode 100644 arch/arm/dts/exynos5420.dtsi
 create mode 100644 arch/arm/dts/exynos54xx.dtsi
 create mode 100644 include/configs/exynos5420.h
 create mode 100644 include/configs/peach-pit.h

-- 
1.7.12.4

[U-Boot] [PATCH v4 1/6] Exynos5420: Let macros be used for exynos5420

[Akshay Saraswat]

Macros defined in exynos5_setup.h specific to SMDK5420
are required for Peach-Pit too. Hence, replacing
CONFIG_SMDK5420 with CONFIG_EXYNOS5420 to enable these
macros for all the boards based on Exynos5420.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
Changes since v1:
	- Added "Acked-by".

 arch/arm/cpu/armv7/exynos/exynos5_setup.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/exynos5_setup.h b/arch/arm/cpu/armv7/exynos/exynos5_setup.h
index d91e585..3242093 100644
--- a/arch/arm/cpu/armv7/exynos/exynos5_setup.h
+++ b/arch/arm/cpu/armv7/exynos/exynos5_setup.h
@@ -435,10 +435,10 @@
 
 /*
  * Definitions that differ with SoC's.
- * Below is the part defining macros for smdk5250.
- * Else part introduces macros for smdk5420.
+ * Below is the part defining macros for Exynos5250.
+ * Else part introduces macros for Exynos5420.
  */
-#ifndef CONFIG_SMDK5420
+#ifndef CONFIG_EXYNOS5420
 
 /* APLL_CON1 */
 #define APLL_CON1_VAL	(0x00203800)
-- 
1.7.12.4

[U-Boot] [PATCH v4 2/6] Exynos5420: Introduce support for the Peach-Pit board

[Akshay Saraswat]

While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit
line of devices, there could be other boards using the same chip, so a
common configuration file is being added (exynos5420.h) as well
as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi).

The peach board as declared in boards.cfg is a copy of smdk5420
declaration. The configuration files are similar, but define different
default device trees, console serial ports and prompts.

The device tree files for smdk5420 and peach-pit inherit from the same
common file.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---
Changes since v2:
	- Removed CONFIG_CHROMEOS_PEACH.
Changes since v1:
	- Added "Acked-by".

 arch/arm/dts/Makefile                 |   3 +-
 arch/arm/dts/exynos5420-peach-pit.dts | 127 ++++++++++++++++++++++++++++
 arch/arm/dts/exynos5420-smdk5420.dts  |  23 +-----
 arch/arm/dts/exynos5420.dtsi          |  70 ----------------
 arch/arm/dts/exynos54xx.dtsi          | 151 ++++++++++++++++++++++++++++++++++
 boards.cfg                            |   1 +
 include/configs/exynos5420.h          |  46 +++++++++++
 include/configs/peach-pit.h           |  25 ++++++
 include/configs/smdk5420.h            |  49 ++---------
 9 files changed, 362 insertions(+), 133 deletions(-)
 create mode 100644 arch/arm/dts/exynos5420-peach-pit.dts
 delete mode 100644 arch/arm/dts/exynos5420.dtsi
 create mode 100644 arch/arm/dts/exynos54xx.dtsi
 create mode 100644 include/configs/exynos5420.h
 create mode 100644 include/configs/peach-pit.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5554615..933a464 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -6,7 +6,8 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 	exynos5250-snow.dtb \
 	exynos5250-smdk5250.dtb \
-	exynos5420-smdk5420.dtb
+	exynos5420-smdk5420.dtb \
+	exynos5420-peach-pit.dtb
 dtb-$(CONFIG_MX6) += imx6q-sabreauto.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts
new file mode 100644
index 0000000..8d148af
--- /dev/null
+++ b/arch/arm/dts/exynos5420-peach-pit.dts
@@ -0,0 +1,127 @@
+/*
+ * SAMSUNG/GOOGLE Peach-Pit board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "exynos54xx.dtsi"
+
+/ {
+	model = "Samsung/Google Peach Pit board based on Exynos5420";
+
+	compatible = "google,pit-rev#", "google,pit",
+		"google,peach", "samsung,exynos5420", "samsung,exynos5";
+
+	config {
+		google,bad-wake-gpios = <&gpio 0x56 0>; /* gpx0-6 */
+		hwid = "PIT TEST A-A 7848";
+		lazy-init = <1>;
+	};
+
+	aliases {
+		serial0 = "/serial at 12C30000";
+		console = "/serial at 12C30000";
+		pmic = "/i2c at 12ca0000";
+	};
+
+	dmc {
+		mem-manuf = "samsung";
+		mem-type = "ddr3";
+		clock-frequency = <800000000>;
+		arm-frequency = <1700000000>;
+	};
+
+	tmu at 10060000 {
+		samsung,min-temp	= <25>;
+		samsung,max-temp	= <125>;
+		samsung,start-warning	= <95>;
+		samsung,start-tripping	= <105>;
+		samsung,hw-tripping	= <110>;
+		samsung,efuse-min-value	= <40>;
+		samsung,efuse-value	= <55>;
+		samsung,efuse-max-value	= <100>;
+		samsung,slope		= <274761730>;
+		samsung,dc-value	= <25>;
+	};
+
+	/* MAX77802 is on i2c bus 4 */
+	i2c at 12ca0000 {
+		clock-frequency = <400000>;
+		power-regulator at 9 {
+			compatible = "maxim,max77802-pmic";
+			reg = <0x9>;
+		};
+	};
+
+	i2c at 12cd0000 { /* i2c7 */
+		clock-frequency = <100000>;
+	       soundcodec at 20 {
+	              reg = <0x20>;
+	              compatible = "maxim,max98090-codec";
+	       };
+	};
+
+        sound at 3830000 {
+                samsung,codec-type = "max98090";
+        };
+
+	i2c at 12e10000 { /* i2c9 */
+		clock-frequency = <400000>;
+                tpm at 20 {
+                        compatible = "infineon,slb9645-tpm";
+                        reg = <0x20>;
+		};
+	};
+
+	spi at 12d30000 { /* spi1 */
+		spi-max-frequency = <50000000>;
+		firmware_storage_spi: flash at 0 {
+			reg = <0>;
+
+			/*
+			 * A region for the kernel to store a panic event
+			 * which the firmware will add to the log.
+			*/
+			elog-panic-event-offset = <0x01e00000 0x100000>;
+
+			elog-shrink-size = <0x400>;
+			elog-full-threshold = <0xc00>;
+		};
+	};
+
+	spi at 12d40000 { /* spi2 */
+		spi-max-frequency = <4000000>;
+		spi-deactivate-delay = <200>;
+		cros-ec at 0 {
+			reg = <0>;
+			compatible = "google,cros-ec";
+			spi-half-duplex;
+			spi-max-timeout-ms = <1100>;
+			spi-frame-header = <0xec>;
+			ec-interrupt = <&gpio 93 1>; /* GPX1_5 */
+
+			/*
+			 * This describes the flash memory within the EC. Note
+			 * that the STM32L flash erases to 0, not 0xff.
+			 */
+			#address-cells = <1>;
+			#size-cells = <1>;
+			flash at 8000000 {
+				reg = <0x08000000 0x20000>;
+				erase-value = <0>;
+			};
+		};
+	};
+
+	xhci at 12000000 {
+		samsung,vbus-gpio = <&gpio 0x40 0>; /* H00 */
+	};
+
+	xhci at 12400000 {
+		samsung,vbus-gpio = <&gpio 0x41 0>; /* H01 */
+	};
+};
diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts
index d739763..1bc6256 100644
--- a/arch/arm/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/dts/exynos5420-smdk5420.dts
@@ -8,7 +8,7 @@
  */
 
 /dts-v1/;
-/include/ "exynos5420.dtsi"
+/include/ "exynos54xx.dtsi"
 
 / {
 	model = "SAMSUNG SMDK5420 board based on EXYNOS5420";
@@ -19,27 +19,6 @@
 	};
 
 	aliases {
-		i2c0 = "/i2c at 12c60000";
-		i2c1 = "/i2c at 12c70000";
-		i2c2 = "/i2c at 12c80000";
-		i2c3 = "/i2c at 12c90000";
-		i2c4 = "/i2c at 12ca0000";
-		i2c5 = "/i2c at 12cb0000";
-		i2c6 = "/i2c at 12cc0000";
-		i2c7 = "/i2c at 12cd0000";
-		i2c8 = "/i2c at 12e00000";
-		i2c9 = "/i2c at 12e10000";
-		i2c10 = "/i2c at 12e20000";
-		spi0 = "/spi at 12d20000";
-		spi1 = "/spi at 12d30000";
-		spi2 = "/spi at 12d40000";
-		spi3 = "/spi at 131a0000";
-		spi4 = "/spi at 131b0000";
-		mmc0 = "/mmc at 12200000";
-		mmc1 = "/mmc at 12210000";
-		mmc2 = "/mmc at 12220000";
-		xhci0 = "/xhci at 12000000";
-		xhci1 = "/xhci at 12400000";
 		serial0 = "/serial at 12C30000";
 		console = "/serial at 12C30000";
 	};
diff --git a/arch/arm/dts/exynos5420.dtsi b/arch/arm/dts/exynos5420.dtsi
deleted file mode 100644
index 02ead61..0000000
--- a/arch/arm/dts/exynos5420.dtsi
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2013 SAMSUNG Electronics
- * SAMSUNG EXYNOS5420 SoC device tree source
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/include/ "exynos5.dtsi"
-
-/ {
-	config {
-		machine-arch-id = <4151>;
-	};
-
-	i2c at 12ca0000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "samsung,exynos5-hsi2c";
-		reg = <0x12CA0000 0x100>;
-		interrupts = <0 60 0>;
-	};
-
-	i2c at 12cb0000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "samsung,exynos5-hsi2c";
-		reg = <0x12CB0000 0x100>;
-		interrupts = <0 61 0>;
-	};
-
-	i2c at 12cc0000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "samsung,exynos5-hsi2c";
-		reg = <0x12CC0000 0x100>;
-		interrupts = <0 62 0>;
-	};
-
-	i2c at 12cd0000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "samsung,exynos5-hsi2c";
-		reg = <0x12CD0000 0x100>;
-		interrupts = <0 63 0>;
-	};
-
-	i2c at 12e00000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "samsung,exynos5-hsi2c";
-		reg = <0x12E00000 0x100>;
-		interrupts = <0 87 0>;
-	};
-
-	i2c at 12e10000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "samsung,exynos5-hsi2c";
-		reg = <0x12E10000 0x100>;
-		interrupts = <0 88 0>;
-	};
-
-	i2c at 12e20000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "samsung,exynos5-hsi2c";
-		reg = <0x12E20000 0x100>;
-		interrupts = <0 203 0>;
-	};
-};
diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi
new file mode 100644
index 0000000..b9f8e0b
--- /dev/null
+++ b/arch/arm/dts/exynos54xx.dtsi
@@ -0,0 +1,151 @@
+/*
+ * (C) Copyright 2013 SAMSUNG Electronics
+ * SAMSUNG EXYNOS5420 SoC device tree source
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/include/ "exynos5.dtsi"
+
+/ {
+	config {
+		machine-arch-id = <4151>;
+	};
+
+	aliases {
+		i2c0 = "/i2c at 12c60000";
+		i2c1 = "/i2c at 12c70000";
+		i2c2 = "/i2c at 12c80000";
+		i2c3 = "/i2c at 12c90000";
+		i2c4 = "/i2c at 12ca0000";
+		i2c5 = "/i2c at 12cb0000";
+		i2c6 = "/i2c at 12cc0000";
+		i2c7 = "/i2c at 12cd0000";
+		i2c8 = "/i2c at 12e00000";
+		i2c9 = "/i2c at 12e10000";
+		i2c10 = "/i2c at 12e20000";
+		spi0 = "/spi at 12d20000";
+		spi1 = "/spi at 12d30000";
+		spi2 = "/spi at 12d40000";
+		spi3 = "/spi at 131a0000";
+		spi4 = "/spi at 131b0000";
+		mmc0 = "/mmc at 12200000";
+		mmc1 = "/mmc at 12210000";
+		mmc2 = "/mmc at 12220000";
+		xhci0 = "/xhci at 12000000";
+		xhci1 = "/xhci at 12400000";
+	};
+
+	i2c at 12ca0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5-hsi2c";
+		reg = <0x12CA0000 0x100>;
+		interrupts = <0 60 0>;
+	};
+
+	i2c at 12cb0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5-hsi2c";
+		reg = <0x12CB0000 0x100>;
+		interrupts = <0 61 0>;
+	};
+
+	i2c at 12cc0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5-hsi2c";
+		reg = <0x12CC0000 0x100>;
+		interrupts = <0 62 0>;
+	};
+
+	i2c at 12cd0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5-hsi2c";
+		reg = <0x12CD0000 0x100>;
+		interrupts = <0 63 0>;
+	};
+
+	i2c at 12e00000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5-hsi2c";
+		reg = <0x12E00000 0x100>;
+		interrupts = <0 87 0>;
+	};
+
+	i2c at 12e10000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5-hsi2c";
+		reg = <0x12E10000 0x100>;
+		interrupts = <0 88 0>;
+	};
+
+	i2c at 12e20000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5-hsi2c";
+		reg = <0x12E20000 0x100>;
+		interrupts = <0 203 0>;
+	};
+
+	mmc at 12200000 {
+		samsung,bus-width = <8>;
+		samsung,timing = <1 3 3>;
+		samsung,removable = <0>;
+		samsung,pre-init;
+	};
+
+	mmc at 12210000 {
+		status = "disabled";
+	};
+
+	mmc at 12220000 {
+		samsung,bus-width = <4>;
+		samsung,timing = <1 2 3>;
+		samsung,removable = <1>;
+	};
+
+	mmc at 12230000 {
+		status = "disabled";
+	};
+
+	fimd at 14400000 {
+		/* sysmmu is not used in U-Boot */
+		samsung,disable-sysmmu;
+	};
+
+	dp at 145b0000 {
+		samsung,lt-status = <0>;
+
+		samsung,master-mode = <0>;
+		samsung,bist-mode = <0>;
+		samsung,bist-pattern = <0>;
+		samsung,h-sync-polarity = <0>;
+		samsung,v-sync-polarity = <0>;
+		samsung,interlaced = <0>;
+		samsung,color-space = <0>;
+		samsung,dynamic-range = <0>;
+		samsung,ycbcr-coeff = <0>;
+		samsung,color-depth = <1>;
+	};
+
+	dmc {
+		mem-type = "ddr3";
+	};
+
+	xhci1: xhci at 12400000 {
+		compatible = "samsung,exynos5250-xhci";
+		reg = <0x12400000 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		phy {
+			compatible = "samsung,exynos5250-usb3-phy";
+			reg = <0x12500000 0x100>;
+		};
+	};
+};
diff --git a/boards.cfg b/boards.cfg
index 5a85fad..1527ebe 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -293,6 +293,7 @@ Active  arm         armv7          exynos      samsung         origen
 Active  arm         armv7          exynos      samsung         smdk5250            smdk5250                              -                                                                                                                                 Chander Kashyap <k.chander@samsung.com>
 Active  arm         armv7          exynos      samsung         smdk5250            snow                                  -                                                                                                                                 Rajeshwari Shinde <rajeshwari.s@samsung.com>
 Active  arm         armv7          exynos      samsung         smdk5420            smdk5420                              -                                                                                                                                 Rajeshwari Shinde <rajeshwari.s@samsung.com>
+Active  arm         armv7          exynos      samsung         smdk5420            peach-pit                             -                                                                                                                                 Akshay Saraswat <akshay.s@samsung.com>
 Active  arm         armv7          exynos      samsung         smdkv310            smdkv310                              -                                                                                                                                 Chander Kashyap <k.chander@samsung.com>
 Active  arm         armv7          exynos      samsung         trats               trats                                 -                                                                                                                                 Lukasz Majewski <l.majewski@samsung.com>
 Active  arm         armv7          exynos      samsung         trats2              trats2                                -                                                                                                                                 Piotr Wilczek <p.wilczek@samsung.com>
diff --git a/include/configs/exynos5420.h b/include/configs/exynos5420.h
new file mode 100644
index 0000000..3a28bbc
--- /dev/null
+++ b/include/configs/exynos5420.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG EXYNOS5420 SoC
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_EXYNOS5420_H
+#define __CONFIG_EXYNOS5420_H
+
+#define CONFIG_EXYNOS5420		/* which is in a Exynos5 Family */
+
+#define MACH_TYPE_SMDK5420	8002
+#define CONFIG_MACH_TYPE	MACH_TYPE_SMDK5420
+
+#define CONFIG_VAR_SIZE_SPL
+
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_TEXT_BASE		0x23E00000
+#ifdef CONFIG_VAR_SIZE_SPL
+#define CONFIG_SPL_TEXT_BASE		0x02024410
+#else
+#define CONFIG_SPL_TEXT_BASE		0x02024400
+#endif
+#define CONFIG_IRAM_TOP			0x02074000
+
+#define CONFIG_DEVICE_TREE_LIST "exynos5420-peach-pit exynos5420-smdk5420"
+
+#define CONFIG_MAX_I2C_NUM	11
+
+/* Enable FIT support and comparison */
+#define CONFIG_FIT
+#define CONFIG_FIT_BEST_MATCH
+
+#define CONFIG_BOARD_REV_GPIO_COUNT	2
+
+#define CONFIG_BOOTCOMMAND	"mmc read 20007000 451 2000; bootm 20007000"
+
+/*
+ * Put the initial stack pointer 1KB below this to allow room for the
+ * SPL marker. This value is arbitrary, but gd_t is placed starting here.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_IRAM_TOP - 0x800)
+
+#endif	/* __CONFIG_EXYNOS5420_H */
diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h
new file mode 100644
index 0000000..76b8d7a
--- /dev/null
+++ b/include/configs/peach-pit.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_PEACH_PIT_H
+#define __CONFIG_PEACH_PIT_H
+
+#include <configs/exynos5-dt.h>
+
+#include <configs/exynos5420.h>
+
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE	exynos5420-peach-pit
+
+/* select serial console configuration */
+#define CONFIG_SERIAL3		/* use SERIAL 3 */
+
+#define CONFIG_SYS_PROMPT	"Peach # "
+#define CONFIG_IDENT_STRING	" for Peach"
+
+#endif	/* __CONFIG_PEACH_PIT_H */
diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h
index 58f706a..606739b 100644
--- a/include/configs/smdk5420.h
+++ b/include/configs/smdk5420.h
@@ -1,58 +1,27 @@
 /*
  * Copyright (C) 2013 Samsung Electronics
  *
- * Configuration settings for the SAMSUNG EXYNOS5420 board.
+ * Configuration settings for the SAMSUNG SMDK5420 board.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifndef __CONFIG_5420_H
-#define __CONFIG_5420_H
+#ifndef __CONFIG_SMDK5420_H
+#define __CONFIG_SMDK5420_H
 
 #include <configs/exynos5-dt.h>
 
-#define CONFIG_EXYNOS5420		/* which is in a Exynos5 Family */
+#include <configs/exynos5420.h>
+
 #define CONFIG_SMDK5420			/* which is in a SMDK5420 */
 
 #undef CONFIG_DEFAULT_DEVICE_TREE
 #define CONFIG_DEFAULT_DEVICE_TREE	exynos5420-smdk5420
 
-#define CONFIG_VAR_SIZE_SPL
-
-#define CONFIG_SYS_SDRAM_BASE		0x20000000
-#define CONFIG_SYS_TEXT_BASE		0x23E00000
-
-#define CONFIG_BOARD_REV_GPIO_COUNT	2
-
-/* MACH_TYPE_SMDK5420 macro will be removed once added to mach-types */
-#define MACH_TYPE_SMDK5420		8002 /* Temporary number */
-#define CONFIG_MACH_TYPE		MACH_TYPE_SMDK5420
-
 /* select serial console configuration */
-#define CONFIG_SERIAL3			/* use SERIAL 3 */
-
-#ifdef CONFIG_VAR_SIZE_SPL
-#define CONFIG_SPL_TEXT_BASE		0x02024410
-#else
-#define CONFIG_SPL_TEXT_BASE	0x02024400
-#endif
-
-#define CONFIG_BOOTCOMMAND	"mmc read 20007000 451 2000; bootm 20007000"
-
-#define CONFIG_SYS_PROMPT		"SMDK5420 # "
-#define CONFIG_IDENT_STRING		" for SMDK5420"
-
-#define CONFIG_IRAM_TOP		0x02074000
-/*
- * Put the initial stack pointer 1KB below this to allow room for the
- * SPL marker. This value is arbitrary, but gd_t is placed starting here.
- */
-#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_IRAM_TOP - 0x800)
-
-#define CONFIG_MAX_I2C_NUM	11
+#define CONFIG_SERIAL3		/* use SERIAL 3 */
 
-/* Enable FIT support and comparison */
-#define CONFIG_FIT
-#define CONFIG_FIT_BEST_MATCH
+#define CONFIG_SYS_PROMPT	"SMDK5420 # "
+#define CONFIG_IDENT_STRING	" for SMDK5420"
 
-#endif	/* __CONFIG_5420_H */
+#endif	/* __CONFIG_SMDK5420_H */
-- 
1.7.12.4

[U-Boot] [PATCH v4 3/6] Exynos5: Config: Place environment at the end of SPI flash

[Akshay Saraswat]

Currently environment resides at the location where BL2 ends.
This may hold good in case there is an empty space at this
position. But what if this place already has a binary or is
expected to have one. To avoid such scenarios it is better
to save environment at the end of the flash.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---
Changes since v3:
	- Introduced to this patch-set.
Changes since v2:
	- Added "Acked-by" & "Tested-by".
Changes since v1:
	- Added new config for SPI flash size.

 include/configs/exynos5-dt.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index b830495..d9f5625 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -207,7 +207,10 @@
 
 #define CONFIG_BL1_OFFSET	(CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
 #define CONFIG_BL2_OFFSET	(CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
-#define CONFIG_ENV_OFFSET	(CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
+
+/* Store environment at the end of a 4 MB SPI flash */
+#define FLASH_SIZE		(0x4 << 20)
+#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
 
 /* U-boot copy size from boot Media to DRAM.*/
 #define BL2_START_OFFSET	(CONFIG_BL2_OFFSET/512)
-- 
1.7.12.4

[U-Boot] [PATCH v4 4/6] Exynos5: Config: Increase SPL footprint for Exynos5420

[Akshay Saraswat]

Max footprint for SPL in both Exynos 5250 and 5420 is limited to 14 KB.
For Exynos5250 we need to keep it 14 KB because BL1 supports only fixed
size SPL downloading. But in case of Exynos5420 we need not restrict it
to 14 KB. And also, the SPL size for Exynos5420 is expected to increase
with the upcoming patches and the patches under review right now.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---
Changes since v3:
	- Introduced to this patch-set.
Changes since v2:
	- Added "Acked-by" & "Tested-by".
Changes since v1:
	- Changed 5420 SPL footprint from 32 to 30 KB.

 include/configs/exynos5-dt.h    | 2 --
 include/configs/exynos5250-dt.h | 2 ++
 include/configs/exynos5420.h    | 2 ++
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index d9f5625..1129f59 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -144,8 +144,6 @@
 
 /* specific .lds file */
 #define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"
-#define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
-
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 9d1d56a..4cfbf25 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -20,6 +20,8 @@
 #define MACH_TYPE_SMDK5250		3774
 #define CONFIG_MACH_TYPE		MACH_TYPE_SMDK5250
 
+#define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
+
 /* USB */
 #define CONFIG_CMD_USB
 #define CONFIG_USB_XHCI
diff --git a/include/configs/exynos5420.h b/include/configs/exynos5420.h
index 3a28bbc..2ffe5ee 100644
--- a/include/configs/exynos5420.h
+++ b/include/configs/exynos5420.h
@@ -25,6 +25,8 @@
 #endif
 #define CONFIG_IRAM_TOP			0x02074000
 
+#define CONFIG_SPL_MAX_FOOTPRINT	(30 * 1024)
+
 #define CONFIG_DEVICE_TREE_LIST "exynos5420-peach-pit exynos5420-smdk5420"
 
 #define CONFIG_MAX_I2C_NUM	11
-- 
1.7.12.4

[U-Boot] [PATCH v4 5/6] Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs

[Akshay Saraswat]

Right now USB booting is enabled for Exynos5250 only. Moving all the
configs for USB boot mode from exynos5250-dt.h to exynos5-dt.h in order
to enableUSB booting for all Exynos5 SoCs.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---
Changes since v3:
	- Introduced to this patch-set.
Changes since v2:
	- Added "Acked-by" & "Tested-by".
Changes since v1:
	- Added "Acked-by".

 include/configs/exynos5-dt.h    | 6 ++++++
 include/configs/exynos5250-dt.h | 6 ------
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index 1129f59..3c51650 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -292,4 +292,10 @@
 
 #define CONFIG_CMD_GPIO
 
+/* USB boot mode */
+#define CONFIG_USB_BOOTING
+#define EXYNOS_COPY_USB_FNPTR_ADDR	0x02020070
+#define EXYNOS_USB_SECONDARY_BOOT	0xfeed0002
+#define EXYNOS_IRAM_SECONDARY_BASE	0x02020018
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 4cfbf25..3982010 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -29,12 +29,6 @@
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE
 
-/* USB boot mode */
-#define CONFIG_USB_BOOTING
-#define EXYNOS_COPY_USB_FNPTR_ADDR	0x02020070
-#define EXYNOS_USB_SECONDARY_BOOT	0xfeed0002
-#define EXYNOS_IRAM_SECONDARY_BASE	0x02020018
-
 #define CONFIG_SPL_TEXT_BASE	0x02023400
 
 #define CONFIG_BOOTCOMMAND	"mmc read 40007000 451 2000; bootm 40007000"
-- 
1.7.12.4

[U-Boot] [PATCH v4 6/6] Exynos: Split 5250 and 5420 memory bank configuration

[Akshay Saraswat]

From: Michael Pratt <mpratt@chromium.org>

Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make the determination between 4
and 7 banks at runtime.

Include the bank size with the number of banks for context to make the
number of banks meaningful.

Signed-off-by: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---
Changes since v3:
	- Introduced to this patch-set.
Changes since v2:
	- Added "Acked-by" & "Tested-by".
Changes since v1:
	- New patch.

 include/configs/exynos5-dt.h    | 2 --
 include/configs/exynos5250-dt.h | 5 +++++
 include/configs/exynos5420.h    | 4 ++++
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index 3c51650..e36a031 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -161,8 +161,6 @@
 
 #define CONFIG_RD_LVL
 
-#define CONFIG_NR_DRAM_BANKS	8
-#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
 #define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
 #define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
 #define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 3982010..74e72a5 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -65,4 +65,9 @@
 #define LCD_YRES			1600
 #define LCD_BPP			LCD_COLOR16
 #endif
+
+/* DRAM Memory Banks */
+#define CONFIG_NR_DRAM_BANKS	8
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+
 #endif  /* __CONFIG_5250_H */
diff --git a/include/configs/exynos5420.h b/include/configs/exynos5420.h
index 2ffe5ee..d2a9556 100644
--- a/include/configs/exynos5420.h
+++ b/include/configs/exynos5420.h
@@ -45,4 +45,8 @@
  */
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_IRAM_TOP - 0x800)
 
+/* DRAM Memory Banks */
+#define CONFIG_NR_DRAM_BANKS	7
+#define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */
+
 #endif	/* __CONFIG_EXYNOS5420_H */
-- 
1.7.12.4

[U-Boot] [PATCH v4 0/6] Introduction of new board Peach-Pit

[Simon Glass]

Hi Akshay,

On 18 June 2014 06:23, Akshay Saraswat <akshay.s@samsung.com> wrote:
> This board is based on Exynos5420 and is similar to SMDK5420 board.
> Adding new and refactoring existing  DT and config files to support
> both SMDK5420 and Peach-Pit.
> This patch set also intends to place env at the end of flash, increase
> SPL footprint, enable USB boot mode and split memory bank config.
>
> Changes since v1:
>         - Added "Acked-by".
> Changes since v2:
>         - Changed order of the patches because 2/2 alone results in compiler
>           errors and has dependency over patch 1/2.
>         - Removed CONFIG_CHROMEOS_PEACH.
> Changes since v3:
>         - Took four patches in this set from a different patch set.
>         - Rebased all the patches to Top of Tree.
>
> Akshay Saraswat (5):
>   Exynos5420: Let macros be used for exynos5420
>   Exynos5420: Introduce support for the Peach-Pit board
>   Exynos5: Config: Place environment at the end of SPI flash
>   Exynos5: Config: Increase SPL footprint for Exynos5420
>   Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs
>
> Michael Pratt (1):
>   Exynos: Split 5250 and 5420 memory bank configuration

For me I needed to reduce the speed in SPL to 900MHz by adding this to
the device tree:

arm-frequency = <900000000>;

Otherwise it would not boot over USB A-A.

Regards,
Simon

[U-Boot] [PATCH v4 1/6] Exynos5420: Let macros be used for exynos5420

[Simon Glass]

On 18 June 2014 06:23, Akshay Saraswat <akshay.s@samsung.com> wrote:
> Macros defined in exynos5_setup.h specific to SMDK5420
> are required for Peach-Pit too. Hence, replacing
> CONFIG_SMDK5420 with CONFIG_EXYNOS5420 to enable these
> macros for all the boards based on Exynos5420.
>
> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
> Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v4 0/6] Introduction of new board Peach-Pit

[Minkyu Kang]

On 18/06/14 21:23, Akshay Saraswat wrote:
> This board is based on Exynos5420 and is similar to SMDK5420 board. 
> Adding new and refactoring existing  DT and config files to support 
> both SMDK5420 and Peach-Pit. 
> This patch set also intends to place env at the end of flash, increase
> SPL footprint, enable USB boot mode and split memory bank config.
> 
> Changes since v1: 
> 	- Added "Acked-by". 
> Changes since v2: 
> 	- Changed order of the patches because 2/2 alone results in compiler 
> 	  errors and has dependency over patch 1/2. 
> 	- Removed CONFIG_CHROMEOS_PEACH.
> Changes since v3:
> 	- Took four patches in this set from a different patch set.
> 	- Rebased all the patches to Top of Tree.
> 
> Akshay Saraswat (5):
>   Exynos5420: Let macros be used for exynos5420
>   Exynos5420: Introduce support for the Peach-Pit board
>   Exynos5: Config: Place environment at the end of SPI flash
>   Exynos5: Config: Increase SPL footprint for Exynos5420
>   Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs
> 
> Michael Pratt (1):
>   Exynos: Split 5250 and 5420 memory bank configuration
> 
>  arch/arm/cpu/armv7/exynos/exynos5_setup.h |   6 +-
>  arch/arm/dts/Makefile                     |   3 +-
>  arch/arm/dts/exynos5420-peach-pit.dts     | 127 +++++++++++++++++++++++++
>  arch/arm/dts/exynos5420-smdk5420.dts      |  23 +----
>  arch/arm/dts/exynos5420.dtsi              |  70 --------------
>  arch/arm/dts/exynos54xx.dtsi              | 151 ++++++++++++++++++++++++++++++
>  boards.cfg                                |   1 +
>  include/configs/exynos5-dt.h              |  15 ++-
>  include/configs/exynos5250-dt.h           |  13 +--
>  include/configs/exynos5420.h              |  52 ++++++++++
>  include/configs/peach-pit.h               |  25 +++++
>  include/configs/smdk5420.h                |  49 ++--------
>  12 files changed, 388 insertions(+), 147 deletions(-)
>  create mode 100644 arch/arm/dts/exynos5420-peach-pit.dts
>  delete mode 100644 arch/arm/dts/exynos5420.dtsi
>  create mode 100644 arch/arm/dts/exynos54xx.dtsi
>  create mode 100644 include/configs/exynos5420.h
>  create mode 100644 include/configs/peach-pit.h
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.