* [PATCH v2 0/3] Add Rockchip Soc PWM driver
@ 2014-06-21 14:22 ` Beniamino Galvani
0 siblings, 0 replies; 12+ messages in thread
From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw)
To: Thierry Reding
Cc: Heiko Stuebner, linux-pwm, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Randy Dunlap, linux-kernel,
linux-arm-kernel, devicetree, Beniamino Galvani
This series adds support for the PWM controller found on Rockchip
RK29, RK30 and RK31 SoCs. It is based on the documentation publicly
available [0] and kernel sources from Rockchip [1] and has been tested
on RK3188.
The last patch, which adds device tree nodes in the dts, depends on
the clocks introduced by Heiko in his recent submission of a new clk
driver for Rockchip RK3188.
[0] http://dl.radxa.com/rock/docs/hw/ds/Rockchip%20RK30xx%20TRM%20V2.0.pdf
[1] https://github.com/rkchrome/kernel
Changes in v2:
* address comments from Thierry Reding:
- remove dependency on OF
- use NSEC_PER_SEC from time.h
- fix MODULE_DEVICE_TABLE name
- make pwm_ops struct const
- indentation and cosmetics
Beniamino Galvani (3):
pwm: add Rockchip SoC PWM support
pwm: rockchip: document device tree bindings
ARM: dts: rk3xxx: add PWM nodes
.../devicetree/bindings/pwm/pwm-rockchip.txt | 17 ++
arch/arm/boot/dts/rk3188.dtsi | 40 +++++
arch/arm/boot/dts/rk3xxx.dtsi | 32 ++++
drivers/pwm/Kconfig | 7 +
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-rockchip.c | 177 ++++++++++++++++++++
6 files changed, 274 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
create mode 100644 drivers/pwm/pwm-rockchip.c
--
1.7.10.4
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v2 0/3] Add Rockchip Soc PWM driver @ 2014-06-21 14:22 ` Beniamino Galvani 0 siblings, 0 replies; 12+ messages in thread From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw) To: linux-arm-kernel This series adds support for the PWM controller found on Rockchip RK29, RK30 and RK31 SoCs. It is based on the documentation publicly available [0] and kernel sources from Rockchip [1] and has been tested on RK3188. The last patch, which adds device tree nodes in the dts, depends on the clocks introduced by Heiko in his recent submission of a new clk driver for Rockchip RK3188. [0] http://dl.radxa.com/rock/docs/hw/ds/Rockchip%20RK30xx%20TRM%20V2.0.pdf [1] https://github.com/rkchrome/kernel Changes in v2: * address comments from Thierry Reding: - remove dependency on OF - use NSEC_PER_SEC from time.h - fix MODULE_DEVICE_TABLE name - make pwm_ops struct const - indentation and cosmetics Beniamino Galvani (3): pwm: add Rockchip SoC PWM support pwm: rockchip: document device tree bindings ARM: dts: rk3xxx: add PWM nodes .../devicetree/bindings/pwm/pwm-rockchip.txt | 17 ++ arch/arm/boot/dts/rk3188.dtsi | 40 +++++ arch/arm/boot/dts/rk3xxx.dtsi | 32 ++++ drivers/pwm/Kconfig | 7 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-rockchip.c | 177 ++++++++++++++++++++ 6 files changed, 274 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt create mode 100644 drivers/pwm/pwm-rockchip.c -- 1.7.10.4 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/3] pwm: add Rockchip SoC PWM support 2014-06-21 14:22 ` Beniamino Galvani @ 2014-06-21 14:22 ` Beniamino Galvani -1 siblings, 0 replies; 12+ messages in thread From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw) To: Thierry Reding Cc: Heiko Stuebner, linux-pwm, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Randy Dunlap, linux-kernel, linux-arm-kernel, devicetree, Beniamino Galvani This commit adds a driver for the PWM controller found on Rockchip RK29, RK30 and RK31 SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> --- drivers/pwm/Kconfig | 7 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-rockchip.c | 177 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+) create mode 100644 drivers/pwm/pwm-rockchip.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 4ad7b89..a86879a 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -206,6 +206,13 @@ config PWM_RENESAS_TPU To compile this driver as a module, choose M here: the module will be called pwm-renesas-tpu. +config PWM_ROCKCHIP + tristate "Rockchip PWM support" + depends on ARCH_ROCKCHIP + help + Generic PWM framework driver for the PWM controller found on + Rockchip SoCs. + config PWM_SAMSUNG tristate "Samsung PWM support" depends on PLAT_SAMSUNG diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 5c86a19..e03e2ae 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_PWM_PCA9685) += pwm-pca9685.o obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o obj-$(CONFIG_PWM_PXA) += pwm-pxa.o obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o +obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c new file mode 100644 index 0000000..eec2145 --- /dev/null +++ b/drivers/pwm/pwm-rockchip.c @@ -0,0 +1,177 @@ +/* + * PWM driver for Rockchip SoCs + * + * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + */ + +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/pwm.h> +#include <linux/time.h> + +#define PWM_CNTR 0x00 /* Counter register */ +#define PWM_HRC 0x04 /* High reference register */ +#define PWM_LRC 0x08 /* Low reference register */ +#define PWM_CTRL 0x0c /* Control register */ +#define PWM_CTRL_TIMER_EN (1 << 0) +#define PWM_CTRL_OUTPUT_EN (1 << 3) + +#define PRESCALER 2 + +struct rockchip_pwm_chip { + struct pwm_chip chip; + struct clk *clk; + void __iomem *base; +}; + +static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c) +{ + return container_of(c, struct rockchip_pwm_chip, chip); +} + +static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, + int duty_ns, int period_ns) +{ + struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); + unsigned long period, duty; + u64 clk_rate, div; + int ret; + + clk_rate = clk_get_rate(pc->clk); + + /* + * Since period and duty cycle registers have a width of 32 + * bits, every possible input period can be obtained using the + * default prescaler value for all practical clock rate values. + */ + div = clk_rate * period_ns; + do_div(div, PRESCALER * NSEC_PER_SEC); + period = div; + + div = clk_rate * duty_ns; + do_div(div, PRESCALER * NSEC_PER_SEC); + duty = div; + + ret = clk_enable(pc->clk); + if (ret) + return ret; + + writel(period, pc->base + PWM_LRC); + writel(duty, pc->base + PWM_HRC); + writel(0, pc->base + PWM_CNTR); + + clk_disable(pc->clk); + + return 0; +} + +static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) +{ + struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); + int ret; + u32 val; + + ret = clk_enable(pc->clk); + if (ret) + return ret; + + val = readl_relaxed(pc->base + PWM_CTRL); + val |= PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN; + writel_relaxed(val, pc->base + PWM_CTRL); + + return 0; +} + +static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) +{ + struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); + u32 val; + + val = readl_relaxed(pc->base + PWM_CTRL); + val &= ~(PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN); + writel_relaxed(val, pc->base + PWM_CTRL); + + clk_disable(pc->clk); +} + +static const struct pwm_ops rockchip_pwm_ops = { + .config = rockchip_pwm_config, + .enable = rockchip_pwm_enable, + .disable = rockchip_pwm_disable, + .owner = THIS_MODULE, +}; + +static int rockchip_pwm_probe(struct platform_device *pdev) +{ + struct rockchip_pwm_chip *pc; + struct resource *r; + int ret; + + pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); + if (!pc) + return -ENOMEM; + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + pc->base = devm_ioremap_resource(&pdev->dev, r); + if (IS_ERR(pc->base)) + return PTR_ERR(pc->base); + + pc->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(pc->clk)) + return PTR_ERR(pc->clk); + + ret = clk_prepare(pc->clk); + if (ret) + return ret; + + platform_set_drvdata(pdev, pc); + + pc->chip.dev = &pdev->dev; + pc->chip.ops = &rockchip_pwm_ops; + pc->chip.base = -1; + pc->chip.npwm = 1; + + ret = pwmchip_add(&pc->chip); + if (ret < 0) { + clk_unprepare(pc->clk); + dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret); + } + + return ret; +} + +static int rockchip_pwm_remove(struct platform_device *pdev) +{ + struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev); + + clk_unprepare(pc->clk); + + return pwmchip_remove(&pc->chip); +} + +static const struct of_device_id rockchip_pwm_dt_ids[] = { + { .compatible = "rockchip,rk2928-pwm" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, rockchip_pwm_dt_ids); + +static struct platform_driver rockchip_pwm_driver = { + .driver = { + .name = "rockchip-pwm", + .of_match_table = rockchip_pwm_dt_ids, + }, + .probe = rockchip_pwm_probe, + .remove = rockchip_pwm_remove, +}; +module_platform_driver(rockchip_pwm_driver); + +MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>"); +MODULE_DESCRIPTION("Rockchip SoC PWM driver"); +MODULE_LICENSE("GPL v2"); -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 1/3] pwm: add Rockchip SoC PWM support @ 2014-06-21 14:22 ` Beniamino Galvani 0 siblings, 0 replies; 12+ messages in thread From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw) To: linux-arm-kernel This commit adds a driver for the PWM controller found on Rockchip RK29, RK30 and RK31 SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> --- drivers/pwm/Kconfig | 7 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-rockchip.c | 177 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+) create mode 100644 drivers/pwm/pwm-rockchip.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 4ad7b89..a86879a 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -206,6 +206,13 @@ config PWM_RENESAS_TPU To compile this driver as a module, choose M here: the module will be called pwm-renesas-tpu. +config PWM_ROCKCHIP + tristate "Rockchip PWM support" + depends on ARCH_ROCKCHIP + help + Generic PWM framework driver for the PWM controller found on + Rockchip SoCs. + config PWM_SAMSUNG tristate "Samsung PWM support" depends on PLAT_SAMSUNG diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 5c86a19..e03e2ae 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_PWM_PCA9685) += pwm-pca9685.o obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o obj-$(CONFIG_PWM_PXA) += pwm-pxa.o obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o +obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c new file mode 100644 index 0000000..eec2145 --- /dev/null +++ b/drivers/pwm/pwm-rockchip.c @@ -0,0 +1,177 @@ +/* + * PWM driver for Rockchip SoCs + * + * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + */ + +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/pwm.h> +#include <linux/time.h> + +#define PWM_CNTR 0x00 /* Counter register */ +#define PWM_HRC 0x04 /* High reference register */ +#define PWM_LRC 0x08 /* Low reference register */ +#define PWM_CTRL 0x0c /* Control register */ +#define PWM_CTRL_TIMER_EN (1 << 0) +#define PWM_CTRL_OUTPUT_EN (1 << 3) + +#define PRESCALER 2 + +struct rockchip_pwm_chip { + struct pwm_chip chip; + struct clk *clk; + void __iomem *base; +}; + +static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c) +{ + return container_of(c, struct rockchip_pwm_chip, chip); +} + +static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, + int duty_ns, int period_ns) +{ + struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); + unsigned long period, duty; + u64 clk_rate, div; + int ret; + + clk_rate = clk_get_rate(pc->clk); + + /* + * Since period and duty cycle registers have a width of 32 + * bits, every possible input period can be obtained using the + * default prescaler value for all practical clock rate values. + */ + div = clk_rate * period_ns; + do_div(div, PRESCALER * NSEC_PER_SEC); + period = div; + + div = clk_rate * duty_ns; + do_div(div, PRESCALER * NSEC_PER_SEC); + duty = div; + + ret = clk_enable(pc->clk); + if (ret) + return ret; + + writel(period, pc->base + PWM_LRC); + writel(duty, pc->base + PWM_HRC); + writel(0, pc->base + PWM_CNTR); + + clk_disable(pc->clk); + + return 0; +} + +static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) +{ + struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); + int ret; + u32 val; + + ret = clk_enable(pc->clk); + if (ret) + return ret; + + val = readl_relaxed(pc->base + PWM_CTRL); + val |= PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN; + writel_relaxed(val, pc->base + PWM_CTRL); + + return 0; +} + +static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) +{ + struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); + u32 val; + + val = readl_relaxed(pc->base + PWM_CTRL); + val &= ~(PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN); + writel_relaxed(val, pc->base + PWM_CTRL); + + clk_disable(pc->clk); +} + +static const struct pwm_ops rockchip_pwm_ops = { + .config = rockchip_pwm_config, + .enable = rockchip_pwm_enable, + .disable = rockchip_pwm_disable, + .owner = THIS_MODULE, +}; + +static int rockchip_pwm_probe(struct platform_device *pdev) +{ + struct rockchip_pwm_chip *pc; + struct resource *r; + int ret; + + pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); + if (!pc) + return -ENOMEM; + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + pc->base = devm_ioremap_resource(&pdev->dev, r); + if (IS_ERR(pc->base)) + return PTR_ERR(pc->base); + + pc->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(pc->clk)) + return PTR_ERR(pc->clk); + + ret = clk_prepare(pc->clk); + if (ret) + return ret; + + platform_set_drvdata(pdev, pc); + + pc->chip.dev = &pdev->dev; + pc->chip.ops = &rockchip_pwm_ops; + pc->chip.base = -1; + pc->chip.npwm = 1; + + ret = pwmchip_add(&pc->chip); + if (ret < 0) { + clk_unprepare(pc->clk); + dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret); + } + + return ret; +} + +static int rockchip_pwm_remove(struct platform_device *pdev) +{ + struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev); + + clk_unprepare(pc->clk); + + return pwmchip_remove(&pc->chip); +} + +static const struct of_device_id rockchip_pwm_dt_ids[] = { + { .compatible = "rockchip,rk2928-pwm" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, rockchip_pwm_dt_ids); + +static struct platform_driver rockchip_pwm_driver = { + .driver = { + .name = "rockchip-pwm", + .of_match_table = rockchip_pwm_dt_ids, + }, + .probe = rockchip_pwm_probe, + .remove = rockchip_pwm_remove, +}; +module_platform_driver(rockchip_pwm_driver); + +MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>"); +MODULE_DESCRIPTION("Rockchip SoC PWM driver"); +MODULE_LICENSE("GPL v2"); -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/3] pwm: add Rockchip SoC PWM support 2014-06-21 14:22 ` Beniamino Galvani @ 2014-07-11 15:02 ` Thierry Reding -1 siblings, 0 replies; 12+ messages in thread From: Thierry Reding @ 2014-07-11 15:02 UTC (permalink / raw) To: Beniamino Galvani Cc: Heiko Stuebner, linux-pwm, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Randy Dunlap, linux-kernel, linux-arm-kernel, devicetree [-- Attachment #1: Type: text/plain, Size: 520 bytes --] On Sat, Jun 21, 2014 at 04:22:06PM +0200, Beniamino Galvani wrote: > This commit adds a driver for the PWM controller found on Rockchip > RK29, RK30 and RK31 SoCs. > > Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> > --- > drivers/pwm/Kconfig | 7 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-rockchip.c | 177 ++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 185 insertions(+) > create mode 100644 drivers/pwm/pwm-rockchip.c Applied, thanks. Thierry [-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/3] pwm: add Rockchip SoC PWM support @ 2014-07-11 15:02 ` Thierry Reding 0 siblings, 0 replies; 12+ messages in thread From: Thierry Reding @ 2014-07-11 15:02 UTC (permalink / raw) To: linux-arm-kernel On Sat, Jun 21, 2014 at 04:22:06PM +0200, Beniamino Galvani wrote: > This commit adds a driver for the PWM controller found on Rockchip > RK29, RK30 and RK31 SoCs. > > Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> > --- > drivers/pwm/Kconfig | 7 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-rockchip.c | 177 ++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 185 insertions(+) > create mode 100644 drivers/pwm/pwm-rockchip.c Applied, thanks. Thierry -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140711/259f442e/attachment.sig> ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 2/3] pwm: rockchip: document device tree bindings 2014-06-21 14:22 ` Beniamino Galvani @ 2014-06-21 14:22 ` Beniamino Galvani -1 siblings, 0 replies; 12+ messages in thread From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw) To: Thierry Reding Cc: Heiko Stuebner, linux-pwm, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Randy Dunlap, linux-kernel, linux-arm-kernel, devicetree, Beniamino Galvani This adds binding documentation for Rockchip SoC PWM driver. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> --- .../devicetree/bindings/pwm/pwm-rockchip.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt new file mode 100644 index 0000000..3182126 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt @@ -0,0 +1,17 @@ +Rockchip PWM controller + +Required properties: + - compatible: should be "rockchip,rk2928-pwm" + - reg: physical base address and length of the controller's registers + - clocks: phandle and clock specifier of the PWM reference clock + - #pwm-cells: should be 2. See pwm.txt in this directory for a + description of the cell format. + +Example: + + pwm0: pwm@20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + clocks = <&cru PCLK_PWM01>; + #pwm-cells = <2>; + }; -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/3] pwm: rockchip: document device tree bindings @ 2014-06-21 14:22 ` Beniamino Galvani 0 siblings, 0 replies; 12+ messages in thread From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw) To: linux-arm-kernel This adds binding documentation for Rockchip SoC PWM driver. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> --- .../devicetree/bindings/pwm/pwm-rockchip.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt new file mode 100644 index 0000000..3182126 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt @@ -0,0 +1,17 @@ +Rockchip PWM controller + +Required properties: + - compatible: should be "rockchip,rk2928-pwm" + - reg: physical base address and length of the controller's registers + - clocks: phandle and clock specifier of the PWM reference clock + - #pwm-cells: should be 2. See pwm.txt in this directory for a + description of the cell format. + +Example: + + pwm0: pwm at 20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + clocks = <&cru PCLK_PWM01>; + #pwm-cells = <2>; + }; -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/3] pwm: rockchip: document device tree bindings 2014-06-21 14:22 ` Beniamino Galvani @ 2014-07-11 15:02 ` Thierry Reding -1 siblings, 0 replies; 12+ messages in thread From: Thierry Reding @ 2014-07-11 15:02 UTC (permalink / raw) To: Beniamino Galvani Cc: Heiko Stuebner, linux-pwm, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Randy Dunlap, linux-kernel, linux-arm-kernel, devicetree [-- Attachment #1: Type: text/plain, Size: 430 bytes --] On Sat, Jun 21, 2014 at 04:22:07PM +0200, Beniamino Galvani wrote: > This adds binding documentation for Rockchip SoC PWM driver. > > Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> > --- > .../devicetree/bindings/pwm/pwm-rockchip.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt Applied, thanks. Thierry [-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 2/3] pwm: rockchip: document device tree bindings @ 2014-07-11 15:02 ` Thierry Reding 0 siblings, 0 replies; 12+ messages in thread From: Thierry Reding @ 2014-07-11 15:02 UTC (permalink / raw) To: linux-arm-kernel On Sat, Jun 21, 2014 at 04:22:07PM +0200, Beniamino Galvani wrote: > This adds binding documentation for Rockchip SoC PWM driver. > > Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> > --- > .../devicetree/bindings/pwm/pwm-rockchip.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt Applied, thanks. Thierry -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140711/aea631a4/attachment.sig> ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 3/3] ARM: dts: rk3xxx: add PWM nodes 2014-06-21 14:22 ` Beniamino Galvani @ 2014-06-21 14:22 ` Beniamino Galvani -1 siblings, 0 replies; 12+ messages in thread From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw) To: Thierry Reding Cc: Heiko Stuebner, linux-pwm, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Randy Dunlap, linux-kernel, linux-arm-kernel, devicetree, Beniamino Galvani This adds PWM nodes to the Rockchip device trees. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> --- arch/arm/boot/dts/rk3188.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index a50a462..a91e205 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -114,6 +114,22 @@ clock-names = "biu", "ciu"; }; + pwm0: pwm@20030000 { + clocks = <&cru PCLK_PWM01>; + }; + + pwm1: pwm@20030010 { + clocks = <&cru PCLK_PWM01>; + }; + + pwm2: pwm@20050020 { + clocks = <&cru PCLK_PWM23>; + }; + + pwm3: pwm@20050030 { + clocks = <&cru PCLK_PWM23>; + }; + cru: cru@20000000 { compatible = "rockchip,rk3188-cru"; reg = <0x20000000 0x1000>; @@ -310,6 +326,30 @@ <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>; }; }; + + pwm0 { + pwm0_pins: pwm0-pins { + rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm1 { + pwm1_pins: pwm1-pins { + rockchip,pins = <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm2 { + pwm2_pins: pwm2-pins { + rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm3 { + pwm3_pins: pwm3-pins { + rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_none>; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 2adf1cc9e..80811bb 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -135,5 +135,37 @@ status = "disabled"; }; + + pwm0: pwm@20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 10>; + status = "disabled"; + }; + + pwm1: pwm@20030010 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030010 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 10>; + status = "disabled"; + }; + + pwm2: pwm@20050020 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20050020 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 11>; + status = "disabled"; + }; + + pwm3: pwm@20050030 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20050030 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 11>; + status = "disabled"; + }; }; }; -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/3] ARM: dts: rk3xxx: add PWM nodes @ 2014-06-21 14:22 ` Beniamino Galvani 0 siblings, 0 replies; 12+ messages in thread From: Beniamino Galvani @ 2014-06-21 14:22 UTC (permalink / raw) To: linux-arm-kernel This adds PWM nodes to the Rockchip device trees. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> --- arch/arm/boot/dts/rk3188.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index a50a462..a91e205 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -114,6 +114,22 @@ clock-names = "biu", "ciu"; }; + pwm0: pwm at 20030000 { + clocks = <&cru PCLK_PWM01>; + }; + + pwm1: pwm at 20030010 { + clocks = <&cru PCLK_PWM01>; + }; + + pwm2: pwm at 20050020 { + clocks = <&cru PCLK_PWM23>; + }; + + pwm3: pwm at 20050030 { + clocks = <&cru PCLK_PWM23>; + }; + cru: cru at 20000000 { compatible = "rockchip,rk3188-cru"; reg = <0x20000000 0x1000>; @@ -310,6 +326,30 @@ <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>; }; }; + + pwm0 { + pwm0_pins: pwm0-pins { + rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm1 { + pwm1_pins: pwm1-pins { + rockchip,pins = <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm2 { + pwm2_pins: pwm2-pins { + rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm3 { + pwm3_pins: pwm3-pins { + rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_none>; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 2adf1cc9e..80811bb 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -135,5 +135,37 @@ status = "disabled"; }; + + pwm0: pwm at 20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 10>; + status = "disabled"; + }; + + pwm1: pwm at 20030010 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030010 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 10>; + status = "disabled"; + }; + + pwm2: pwm at 20050020 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20050020 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 11>; + status = "disabled"; + }; + + pwm3: pwm at 20050030 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20050030 0x10>; + #pwm-cells = <2>; + clocks = <&clk_gates7 11>; + status = "disabled"; + }; }; }; -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2014-07-11 15:02 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2014-06-21 14:22 [PATCH v2 0/3] Add Rockchip Soc PWM driver Beniamino Galvani 2014-06-21 14:22 ` Beniamino Galvani 2014-06-21 14:22 ` [PATCH v2 1/3] pwm: add Rockchip SoC PWM support Beniamino Galvani 2014-06-21 14:22 ` Beniamino Galvani 2014-07-11 15:02 ` Thierry Reding 2014-07-11 15:02 ` Thierry Reding 2014-06-21 14:22 ` [PATCH v2 2/3] pwm: rockchip: document device tree bindings Beniamino Galvani 2014-06-21 14:22 ` Beniamino Galvani 2014-07-11 15:02 ` Thierry Reding 2014-07-11 15:02 ` Thierry Reding 2014-06-21 14:22 ` [PATCH v2 3/3] ARM: dts: rk3xxx: add PWM nodes Beniamino Galvani 2014-06-21 14:22 ` Beniamino Galvani
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