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From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com,
	leon.alrae@imgtec.com, aurelien@aurel32.net, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v3 15/21] softfloat: add functions corresponding to IEEE-2008 min/maxNumMag
Date: Fri, 27 Jun 2014 16:22:04 +0100	[thread overview]
Message-ID: <1403882530-47821-16-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1403882530-47821-1-git-send-email-leon.alrae@imgtec.com>

Add abs argument to the existing softfloat minmax() function and define
new float{32,64}_{min,max}nummag functions.

minnummag(x,y) returns x if |x| < |y|,
               returns y if |y| < |x|,
               otherwise minnum(x,y)

maxnummag(x,y) returns x if |x| > |y|,
               returns y if |y| > |x|,
               otherwise maxnum(x,y)

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
---
v3:
* rename abs argument to ismag
---
 fpu/softfloat.c         |   37 +++++++++++++++++++++++++++++++------
 include/fpu/softfloat.h |    4 ++++
 2 files changed, 35 insertions(+), 6 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 9274ebf..16b21eb 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -7240,13 +7240,17 @@ int float128_compare_quiet( float128 a, float128 b STATUS_PARAM )
  * minnum() and maxnum correspond to the IEEE 754-2008 minNum()
  * and maxNum() operations. min() and max() are the typical min/max
  * semantics provided by many CPUs which predate that specification.
+ *
+ * minnummag() and maxnummag() functions correspond to minNumMag()
+ * and minNumMag() from the IEEE-754 2008.
  */
 #define MINMAX(s)                                                       \
 static inline float ## s float ## s ## _minmax(float ## s a, float ## s b,     \
-                                        int ismin, int isieee STATUS_PARAM) \
+                                               int ismin, int isieee,   \
+                                               int ismag STATUS_PARAM)  \
 {                                                                       \
     flag aSign, bSign;                                                  \
-    uint ## s ## _t av, bv;                                             \
+    uint ## s ## _t av, bv, aav, abv;                                   \
     a = float ## s ## _squash_input_denormal(a STATUS_VAR);             \
     b = float ## s ## _squash_input_denormal(b STATUS_VAR);             \
     if (float ## s ## _is_any_nan(a) ||                                 \
@@ -7266,6 +7270,17 @@ static inline float ## s float ## s ## _minmax(float ## s a, float ## s b,     \
     bSign = extractFloat ## s ## Sign(b);                               \
     av = float ## s ## _val(a);                                         \
     bv = float ## s ## _val(b);                                         \
+    if (ismag) {                                                        \
+        aav = float ## s ## _abs(av);                                   \
+        abv = float ## s ## _abs(bv);                                   \
+        if (aav != abv) {                                               \
+            if (ismin) {                                                \
+                return (aav < abv) ? a : b;                             \
+            } else {                                                    \
+                return (aav < abv) ? b : a;                             \
+            }                                                           \
+        }                                                               \
+    }                                                                   \
     if (aSign != bSign) {                                               \
         if (ismin) {                                                    \
             return aSign ? a : b;                                       \
@@ -7283,22 +7298,32 @@ static inline float ## s float ## s ## _minmax(float ## s a, float ## s b,     \
                                                                         \
 float ## s float ## s ## _min(float ## s a, float ## s b STATUS_PARAM)  \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 1, 0 STATUS_VAR);                \
+    return float ## s ## _minmax(a, b, 1, 0, 0 STATUS_VAR);             \
 }                                                                       \
                                                                         \
 float ## s float ## s ## _max(float ## s a, float ## s b STATUS_PARAM)  \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 0, 0 STATUS_VAR);                \
+    return float ## s ## _minmax(a, b, 0, 0, 0 STATUS_VAR);             \
 }                                                                       \
                                                                         \
 float ## s float ## s ## _minnum(float ## s a, float ## s b STATUS_PARAM) \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 1, 1 STATUS_VAR);                \
+    return float ## s ## _minmax(a, b, 1, 1, 0 STATUS_VAR);             \
 }                                                                       \
                                                                         \
 float ## s float ## s ## _maxnum(float ## s a, float ## s b STATUS_PARAM) \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 0, 1 STATUS_VAR);                \
+    return float ## s ## _minmax(a, b, 0, 1, 0 STATUS_VAR);             \
+}                                                                       \
+                                                                        \
+float ## s float ## s ## _minnummag(float ## s a, float ## s b STATUS_PARAM) \
+{                                                                       \
+    return float ## s ## _minmax(a, b, 1, 1, 1 STATUS_VAR);             \
+}                                                                       \
+                                                                        \
+float ## s float ## s ## _maxnummag(float ## s a, float ## s b STATUS_PARAM) \
+{                                                                       \
+    return float ## s ## _minmax(a, b, 0, 1, 1 STATUS_VAR);             \
 }
 
 MINMAX(32)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 77177c5..e32e25d 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -374,6 +374,8 @@ float32 float32_min(float32, float32 STATUS_PARAM);
 float32 float32_max(float32, float32 STATUS_PARAM);
 float32 float32_minnum(float32, float32 STATUS_PARAM);
 float32 float32_maxnum(float32, float32 STATUS_PARAM);
+float32 float32_minnummag(float32, float32 STATUS_PARAM);
+float32 float32_maxnummag(float32, float32 STATUS_PARAM);
 int float32_is_quiet_nan( float32 );
 int float32_is_signaling_nan( float32 );
 float32 float32_maybe_silence_nan( float32 );
@@ -484,6 +486,8 @@ float64 float64_min(float64, float64 STATUS_PARAM);
 float64 float64_max(float64, float64 STATUS_PARAM);
 float64 float64_minnum(float64, float64 STATUS_PARAM);
 float64 float64_maxnum(float64, float64 STATUS_PARAM);
+float64 float64_minnummag(float64, float64 STATUS_PARAM);
+float64 float64_maxnummag(float64, float64 STATUS_PARAM);
 int float64_is_quiet_nan( float64 a );
 int float64_is_signaling_nan( float64 );
 float64 float64_maybe_silence_nan( float64 );
-- 
1.7.5.4

  parent reply	other threads:[~2014-06-27 15:23 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-27 15:21 [Qemu-devel] [PATCH v3 00/21] target-mips: add MIPS64R6 Instruction Set support Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 01/21] target-mips: define ISA_MIPS64R6 Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 02/21] target-mips: signal RI Exception on instructions removed in R6 Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 03/21] target-mips: add SELEQZ and SELNEZ instructions Leon Alrae
2014-09-26 12:03   ` James Hogan
2014-09-26 12:45     ` Leon Alrae
2014-09-26 12:54       ` James Hogan
2014-09-26 12:23   ` James Hogan
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 04/21] target-mips: move LL and SC instructions Leon Alrae
2014-09-26 12:44   ` James Hogan
2014-09-26 14:12     ` Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 05/21] target-mips: extract decode_opc_special* from decode_opc Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 06/21] target-mips: split decode_opc_special* into *_r6 and *_legacy Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 07/21] target-mips: signal RI Exception on DSP and Loongson instructions Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 08/21] target-mips: move PREF, CACHE, LLD and SCD instructions Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 09/21] target-mips: redefine Integer Multiply and Divide instructions Leon Alrae
2014-06-27 15:21 ` [Qemu-devel] [PATCH v3 10/21] target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6 Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 11/21] target-mips: Status.UX/SX/KX enable 32-bit address wrapping Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 12/21] target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 13/21] target-mips: add compact and CP1 branches Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 14/21] target-mips: add AUI, LSA and PCREL instruction families Leon Alrae
2014-06-27 15:22 ` Leon Alrae [this message]
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 16/21] target-mips: add new Floating Point instructions Leon Alrae
2014-10-02 16:10   ` Yongbok Kim
2014-10-03  8:59     ` Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 17/21] target-mips: add new Floating Point Comparison instructions Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 18/21] target-mips: do not allow Status.FR=0 mode in 64-bit FPU Leon Alrae
2014-10-02 10:21   ` Yongbok Kim
2014-10-02 10:28     ` Yongbok Kim
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 19/21] target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructions Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 20/21] mips_malta: update malta's pseudo-bootloader - replace JR with JALR Leon Alrae
2014-06-27 15:22 ` [Qemu-devel] [PATCH v3 21/21] target-mips: define a new generic CPU supporting MIPS64 Release 6 ISA Leon Alrae
2014-08-05  9:26 ` [Qemu-devel] [PATCH v3 00/21] target-mips: add MIPS64R6 Instruction Set support Leon Alrae
2014-08-12 11:36   ` Leon Alrae
2014-08-22 11:26     ` Leon Alrae
2014-09-24 11:01       ` Leon Alrae

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