* [PATCH v3 0/5] Patches to add support for Rockchip dwc2 controller
@ 2014-07-31 20:51 ` Kever Yang
0 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: Paul Zimmerman
Cc: dianders, heiko, olof, sonnyrao, addy.ke, cf, xjq, wulf, lyz, hj,
huangtao, Kever Yang, devicetree, Matt Porter, Paul Zimmerman,
linux-usb, Kumar Gala, Stephen Warren, linux-kernel,
Ian Campbell, Kishon Vijay Abraham I, Rob Herring, Pawel Moll,
Greg Kroah-Hartman, Mark Rutland, Russell King, linux-arm-kernel
These patches to add support for dwc2 controller found in
Rockchip processors rk3066, rk3188 and rk3288,
and enable dts for rk3288 evb.
Changes in v3:
- Moved out of pin control and sort by base address
- EHCI and HSIC move new for version 3.
- Rebase
Changes in v2:
- Split out dr_mode and rk3288 bindings.
- add compatible "snps,dwc2" bingding info
- set most parameters as driver auto-detect
- change the node name from 'dwc2' to 'usb'
- evb patch added in version 2
Doug Anderson (1):
ARM: dts: Fix the sort ordering of EHCI and HSIC in rk3288.dtsi
Kever Yang (4):
Documentation: dt-bindings: add dt binding info for Rockchip dwc2
usb: dwc2: add compatible data for rockchip soc
ARM: dts: add rk3288 dwc2 controller support
ARM: dts: Enable USB otg and host1(dwc) on rk3288-evb
Documentation/devicetree/bindings/usb/dwc2.txt | 3 ++
arch/arm/boot/dts/rk3288-evb.dtsi | 6 +++
arch/arm/boot/dts/rk3288.dtsi | 61 ++++++++++++++++--------
drivers/usb/dwc2/platform.c | 29 +++++++++++
4 files changed, 78 insertions(+), 21 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 0/5] Patches to add support for Rockchip dwc2 controller
@ 2014-07-31 20:51 ` Kever Yang
0 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: Paul Zimmerman
Cc: dianders-F7+t8E8rja9g9hUCZPvPmw, heiko-4mtYJXux2i+zQB+pC5nmwQ,
olof-nZhT3qVonbNeoWH0uzbU5w, sonnyrao-F7+t8E8rja9g9hUCZPvPmw,
addy.ke-TNX95d0MmH7DzftRWevZcw, cf-TNX95d0MmH7DzftRWevZcw,
xjq-TNX95d0MmH7DzftRWevZcw, wulf-TNX95d0MmH7DzftRWevZcw,
lyz-TNX95d0MmH7DzftRWevZcw, hj-TNX95d0MmH7DzftRWevZcw,
huangtao-TNX95d0MmH7DzftRWevZcw, Kever Yang,
devicetree-u79uwXL29TY76Z2rM5mHXA, Matt Porter, Paul Zimmerman,
linux-usb-u79uwXL29TY76Z2rM5mHXA, Kumar Gala, Stephen Warren,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Ian Campbell,
Kishon Vijay Abraham I, Rob Herring, Pawel Moll,
Greg Kroah-Hartman, Mark Rutland, Russell King,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
These patches to add support for dwc2 controller found in
Rockchip processors rk3066, rk3188 and rk3288,
and enable dts for rk3288 evb.
Changes in v3:
- Moved out of pin control and sort by base address
- EHCI and HSIC move new for version 3.
- Rebase
Changes in v2:
- Split out dr_mode and rk3288 bindings.
- add compatible "snps,dwc2" bingding info
- set most parameters as driver auto-detect
- change the node name from 'dwc2' to 'usb'
- evb patch added in version 2
Doug Anderson (1):
ARM: dts: Fix the sort ordering of EHCI and HSIC in rk3288.dtsi
Kever Yang (4):
Documentation: dt-bindings: add dt binding info for Rockchip dwc2
usb: dwc2: add compatible data for rockchip soc
ARM: dts: add rk3288 dwc2 controller support
ARM: dts: Enable USB otg and host1(dwc) on rk3288-evb
Documentation/devicetree/bindings/usb/dwc2.txt | 3 ++
arch/arm/boot/dts/rk3288-evb.dtsi | 6 +++
arch/arm/boot/dts/rk3288.dtsi | 61 ++++++++++++++++--------
drivers/usb/dwc2/platform.c | 29 +++++++++++
4 files changed, 78 insertions(+), 21 deletions(-)
--
1.7.9.5
--
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^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 0/5] Patches to add support for Rockchip dwc2 controller
@ 2014-07-31 20:51 ` Kever Yang
0 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: linux-arm-kernel
These patches to add support for dwc2 controller found in
Rockchip processors rk3066, rk3188 and rk3288,
and enable dts for rk3288 evb.
Changes in v3:
- Moved out of pin control and sort by base address
- EHCI and HSIC move new for version 3.
- Rebase
Changes in v2:
- Split out dr_mode and rk3288 bindings.
- add compatible "snps,dwc2" bingding info
- set most parameters as driver auto-detect
- change the node name from 'dwc2' to 'usb'
- evb patch added in version 2
Doug Anderson (1):
ARM: dts: Fix the sort ordering of EHCI and HSIC in rk3288.dtsi
Kever Yang (4):
Documentation: dt-bindings: add dt binding info for Rockchip dwc2
usb: dwc2: add compatible data for rockchip soc
ARM: dts: add rk3288 dwc2 controller support
ARM: dts: Enable USB otg and host1(dwc) on rk3288-evb
Documentation/devicetree/bindings/usb/dwc2.txt | 3 ++
arch/arm/boot/dts/rk3288-evb.dtsi | 6 +++
arch/arm/boot/dts/rk3288.dtsi | 61 ++++++++++++++++--------
drivers/usb/dwc2/platform.c | 29 +++++++++++
4 files changed, 78 insertions(+), 21 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 1/5] Documentation: dt-bindings: add dt binding info for Rockchip dwc2
2014-07-31 20:51 ` Kever Yang
(?)
(?)
@ 2014-07-31 20:51 ` Kever Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: Paul Zimmerman
Cc: dianders, heiko, olof, sonnyrao, addy.ke, cf, xjq, wulf, lyz, hj,
huangtao, Kever Yang, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Greg Kroah-Hartman, Matt Porter,
Stephen Warren, Paul Zimmerman, Kishon Vijay Abraham I,
devicetree, linux-kernel
This add necessary dwc2 binding documentation for Rockchip socs:
rk3066, rk3188 and rk3288
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
---
Changes in v3: None
Changes in v2:
- Split out dr_mode and rk3288 bindings.
- add compatible "snps,dwc2" bingding info
Documentation/devicetree/bindings/usb/dwc2.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
index 467ddd1..2899679 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -4,6 +4,9 @@ Platform DesignWare HS OTG USB 2.0 controller
Required properties:
- compatible : One of:
- brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
+ - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+ - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
+ - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
- snps,dwc2: A generic DWC2 USB controller with default parameters.
- reg : Should contain 1 register range (address and length)
- interrupts : Should contain 1 interrupt
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 2/5] usb: dwc2: add compatible data for rockchip soc
2014-07-31 20:51 ` Kever Yang
` (2 preceding siblings ...)
(?)
@ 2014-07-31 20:51 ` Kever Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: Paul Zimmerman
Cc: dianders, heiko, olof, sonnyrao, addy.ke, cf, xjq, wulf, lyz, hj,
huangtao, Kever Yang, Greg Kroah-Hartman, linux-usb,
linux-kernel
This patch add compatible data for dwc2 controller found on
rk3066, rk3188 and rk3288 processors from rockchip.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
---
Changes in v3: None
Changes in v2:
- set most parameters as driver auto-detect
drivers/usb/dwc2/platform.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index a10e7a3..b533a0d 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -75,6 +75,34 @@ static const struct dwc2_core_params params_bcm2835 = {
.uframe_sched = 0,
};
+static const struct dwc2_core_params params_rk3066 = {
+ .otg_cap = 2, /* non-HNP/non-SRP */
+ .otg_ver = -1,
+ .dma_enable = -1,
+ .dma_desc_enable = 0,
+ .speed = -1,
+ .enable_dynamic_fifo = 1,
+ .en_multiple_tx_fifo = -1,
+ .host_rx_fifo_size = 520, /* 520 DWORDs */
+ .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
+ .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
+ .max_transfer_size = -1,
+ .max_packet_count = -1,
+ .host_channels = -1,
+ .phy_type = -1,
+ .phy_utmi_width = -1,
+ .phy_ulpi_ddr = -1,
+ .phy_ulpi_ext_vbus = -1,
+ .i2c_enable = -1,
+ .ulpi_fs_ls = -1,
+ .host_support_fs_ls_low_power = -1,
+ .host_ls_low_power_phy_clk = -1,
+ .ts_dline = -1,
+ .reload_ctl = -1,
+ .ahbcfg = 0x7, /* INCR16 */
+ .uframe_sched = -1,
+};
+
/**
* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
* DWC_otg driver
@@ -97,6 +125,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
static const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 },
+ { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 },
{ .compatible = "snps,dwc2", .data = NULL },
{},
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 3/5] ARM: dts: add rk3288 dwc2 controller support
2014-07-31 20:51 ` Kever Yang
@ 2014-07-31 20:51 ` Kever Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: Paul Zimmerman
Cc: dianders, heiko, olof, sonnyrao, addy.ke, cf, xjq, wulf, lyz, hj,
huangtao, Kever Yang, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Russell King, devicetree,
linux-arm-kernel, linux-kernel
rk3288 has two kind of usb controller, this add the dwc2 controller
for otg and host1.
Controller can works with usb PHY default setting and Vbus on.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v3:
- Moved out of pin control and sort by base address
Changes in v2:
- change the node name from 'dwc2' to 'usb'
arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ab8a611..a5607a1 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -205,6 +205,26 @@
status = "disabled";
};
+ usb_host1: usb@ff540000 {
+ compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0xff540000 0x40000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USBHOST1>;
+ clock-names = "otg";
+ status = "disabled";
+ };
+
+ usb_otg: usb@ff580000 {
+ compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0xff580000 0x40000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_OTG0>;
+ clock-names = "otg";
+ status = "disabled";
+ };
+
uart2: serial@ff690000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff690000 0x100>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 3/5] ARM: dts: add rk3288 dwc2 controller support
@ 2014-07-31 20:51 ` Kever Yang
0 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: linux-arm-kernel
rk3288 has two kind of usb controller, this add the dwc2 controller
for otg and host1.
Controller can works with usb PHY default setting and Vbus on.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v3:
- Moved out of pin control and sort by base address
Changes in v2:
- change the node name from 'dwc2' to 'usb'
arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ab8a611..a5607a1 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -205,6 +205,26 @@
status = "disabled";
};
+ usb_host1: usb at ff540000 {
+ compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0xff540000 0x40000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USBHOST1>;
+ clock-names = "otg";
+ status = "disabled";
+ };
+
+ usb_otg: usb at ff580000 {
+ compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0xff580000 0x40000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_OTG0>;
+ clock-names = "otg";
+ status = "disabled";
+ };
+
uart2: serial at ff690000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff690000 0x100>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 4/5] ARM: dts: Fix the sort ordering of EHCI and HSIC in rk3288.dtsi
2014-07-31 20:51 ` Kever Yang
@ 2014-07-31 20:51 ` Kever Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: Paul Zimmerman
Cc: dianders, heiko, olof, sonnyrao, addy.ke, cf, xjq, wulf, lyz, hj,
huangtao, Kever Yang, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Russell King, devicetree,
linux-arm-kernel, linux-kernel
From: Doug Anderson <dianders@chromium.org>
The EHCI and HSIC device tree nodes were added in the wrong place.
Fix them.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v3:
- EHCI and HSIC move new for version 3.
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 41 ++++++++++++++++++++---------------------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index a5607a1..673dee3 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -205,6 +205,17 @@
status = "disabled";
};
+ usb_host0_ehci: ehci@ff500000 {
+ compatible = "generic-ehci";
+ reg = <0xff500000 0x100>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USBHOST0>;
+ clock-names = "usbhost";
+ status = "disabled";
+ };
+
+ /* NOTE: ohci@ff520000 doesn't actually work on hardware */
+
usb_host1: usb@ff540000 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
"snps,dwc2";
@@ -225,6 +236,15 @@
status = "disabled";
};
+ usb_hsic: ehci@ff5c0000 {
+ compatible = "generic-ehci";
+ reg = <0xff5c0000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HSIC>;
+ clock-names = "usbhost";
+ status = "disabled";
+ };
+
uart2: serial@ff690000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff690000 0x100>;
@@ -319,27 +339,6 @@
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
-
- usb_host0_ehci: ehci@ff500000 {
- compatible = "generic-ehci";
- reg = <0xff500000 0x100>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_USBHOST0>;
- clock-names = "usbhost";
- status = "disabled";
- };
-
- /* NOTE: ohci@ff520000 doesn't actually work on hardware */
-
- usb_hsic: ehci@ff5c0000 {
- compatible = "generic-ehci";
- reg = <0xff5c0000 0x100>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HSIC>;
- clock-names = "usbhost";
- status = "disabled";
- };
-
gic: interrupt-controller@ffc01000 {
compatible = "arm,gic-400";
interrupt-controller;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 4/5] ARM: dts: Fix the sort ordering of EHCI and HSIC in rk3288.dtsi
@ 2014-07-31 20:51 ` Kever Yang
0 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Doug Anderson <dianders@chromium.org>
The EHCI and HSIC device tree nodes were added in the wrong place.
Fix them.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v3:
- EHCI and HSIC move new for version 3.
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 41 ++++++++++++++++++++---------------------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index a5607a1..673dee3 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -205,6 +205,17 @@
status = "disabled";
};
+ usb_host0_ehci: ehci at ff500000 {
+ compatible = "generic-ehci";
+ reg = <0xff500000 0x100>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USBHOST0>;
+ clock-names = "usbhost";
+ status = "disabled";
+ };
+
+ /* NOTE: ohci at ff520000 doesn't actually work on hardware */
+
usb_host1: usb at ff540000 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
"snps,dwc2";
@@ -225,6 +236,15 @@
status = "disabled";
};
+ usb_hsic: ehci at ff5c0000 {
+ compatible = "generic-ehci";
+ reg = <0xff5c0000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HSIC>;
+ clock-names = "usbhost";
+ status = "disabled";
+ };
+
uart2: serial at ff690000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff690000 0x100>;
@@ -319,27 +339,6 @@
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
-
- usb_host0_ehci: ehci at ff500000 {
- compatible = "generic-ehci";
- reg = <0xff500000 0x100>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_USBHOST0>;
- clock-names = "usbhost";
- status = "disabled";
- };
-
- /* NOTE: ohci at ff520000 doesn't actually work on hardware */
-
- usb_hsic: ehci at ff5c0000 {
- compatible = "generic-ehci";
- reg = <0xff5c0000 0x100>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HSIC>;
- clock-names = "usbhost";
- status = "disabled";
- };
-
gic: interrupt-controller at ffc01000 {
compatible = "arm,gic-400";
interrupt-controller;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 5/5] ARM: dts: Enable USB otg and host1(dwc) on rk3288-evb
2014-07-31 20:51 ` Kever Yang
@ 2014-07-31 20:51 ` Kever Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: Paul Zimmerman
Cc: dianders, heiko, olof, sonnyrao, addy.ke, cf, xjq, wulf, lyz, hj,
huangtao, Kever Yang, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Russell King, devicetree,
linux-arm-kernel, linux-kernel
USB otg port is the usb3.0 b-port on the board.
USB host1 port is the host A port nearby the otg port.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v3:
- Rebase
Changes in v2:
- evb patch added in version 2
arch/arm/boot/dts/rk3288-evb.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index 66f76a6..35a0837 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -127,3 +127,9 @@
&usb_host0_ehci {
status = "okay";
};
+&usb_host1 {
+ status = "okay";
+};
+&usb_otg {
+ status = "okay";
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 5/5] ARM: dts: Enable USB otg and host1(dwc) on rk3288-evb
@ 2014-07-31 20:51 ` Kever Yang
0 siblings, 0 replies; 11+ messages in thread
From: Kever Yang @ 2014-07-31 20:51 UTC (permalink / raw)
To: linux-arm-kernel
USB otg port is the usb3.0 b-port on the board.
USB host1 port is the host A port nearby the otg port.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v3:
- Rebase
Changes in v2:
- evb patch added in version 2
arch/arm/boot/dts/rk3288-evb.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index 66f76a6..35a0837 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -127,3 +127,9 @@
&usb_host0_ehci {
status = "okay";
};
+&usb_host1 {
+ status = "okay";
+};
+&usb_otg {
+ status = "okay";
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2014-07-31 20:53 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-07-31 20:51 [PATCH v3 0/5] Patches to add support for Rockchip dwc2 controller Kever Yang
2014-07-31 20:51 ` Kever Yang
2014-07-31 20:51 ` Kever Yang
2014-07-31 20:51 ` [PATCH v3 1/5] Documentation: dt-bindings: add dt binding info for Rockchip dwc2 Kever Yang
2014-07-31 20:51 ` [PATCH v3 2/5] usb: dwc2: add compatible data for rockchip soc Kever Yang
2014-07-31 20:51 ` [PATCH v3 3/5] ARM: dts: add rk3288 dwc2 controller support Kever Yang
2014-07-31 20:51 ` Kever Yang
2014-07-31 20:51 ` [PATCH v3 4/5] ARM: dts: Fix the sort ordering of EHCI and HSIC in rk3288.dtsi Kever Yang
2014-07-31 20:51 ` Kever Yang
2014-07-31 20:51 ` [PATCH v3 5/5] ARM: dts: Enable USB otg and host1(dwc) on rk3288-evb Kever Yang
2014-07-31 20:51 ` Kever Yang
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