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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 14/15] drm/i915: capture_reg_state interrupt registers for Gen8
Date: Tue,  5 Aug 2014 07:51:25 -0700	[thread overview]
Message-ID: <1407250286-1801-15-git-send-email-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <1407250286-1801-1-git-send-email-rodrigo.vivi@intel.com>

From: Michel Thierry <michel.thierry@intel.com>

After unclaimed register detection was enabled for BDW, I started seeing
warnings while reading registers 0x4400c (DEIER) and 0x4401c (GTIER).

>From Gen8, DEIER has been split per display engine pipe, and GTIER has
been split in 4.

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  2 ++
 drivers/gpu/drm/i915/i915_gpu_error.c | 19 ++++++++++++++++++-
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 67e9da0..6622a53 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -314,6 +314,8 @@ struct drm_i915_error_state {
 	u32 eir;
 	u32 pgtbl_er;
 	u32 ier;
+	u32 pipe_ier[I915_MAX_PIPES]; /* gen8 */
+	u32 gt_ier[4]; /* gen8 */
 	u32 ccid;
 	u32 derrmr;
 	u32 forcewake;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 0b3f694..e7a4ae0 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -380,6 +380,16 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 	if (INTEL_INFO(dev)->gen == 7)
 		err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
 
+	if (INTEL_INFO(dev)->gen == 8) {
+		for (i = 0; i < ARRAY_SIZE(error->pipe_ier); i++)
+				err_printf(m, "PIPE_IER_%d: 0x%08x\n", i,
+					   error->pipe_ier[i]);
+
+		for (i = 0; i < ARRAY_SIZE(error->gt_ier); i++)
+				err_printf(m, "GT_IER_%d: 0x%08x\n", i,
+					   error->gt_ier[i]);
+	}
+
 	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 		err_printf(m, "%s command stream:\n", ring_str(i));
 		i915_ring_error_state(m, dev, &error->ring[i]);
@@ -1091,6 +1101,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
 				   struct drm_i915_error_state *error)
 {
 	struct drm_device *dev = dev_priv->dev;
+	int i, pipe;
 
 	/* General organization
 	 * 1. Registers specific to a single generation
@@ -1135,7 +1146,13 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
 	if (HAS_HW_CONTEXTS(dev))
 		error->ccid = I915_READ(CCID);
 
-	if (HAS_PCH_SPLIT(dev))
+	if (IS_GEN8(dev)) {
+		for_each_pipe(pipe)
+			error->pipe_ier[pipe] =
+					I915_READ(GEN8_DE_PIPE_IER(pipe));
+		for (i = 0; i < 4; i++)
+			error->gt_ier[i] = I915_READ(GEN8_GT_IER(i));
+	} else if (HAS_PCH_SPLIT(dev))
 		error->ier = I915_READ(DEIER) | I915_READ(GTIER);
 	else {
 		if (IS_GEN2(dev))
-- 
1.9.3

  parent reply	other threads:[~2014-08-05 21:50 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-05 14:51 [PATCH 00/15] drm-intel-collector - update Rodrigo Vivi
2014-08-05 14:51 ` [PATCH 01/15] drm/i915: Bring UP Power Wells before disabling RC6 Rodrigo Vivi
2014-08-05 14:51 ` [PATCH 02/15] drm/i915: Don't save/restore RS when not used Rodrigo Vivi
2014-08-05 14:51 ` [PATCH 03/15] drm/i915: Upgrade execbuffer fail after resume failure to EIO Rodrigo Vivi
2014-08-06  7:56   ` Daniel Vetter
2014-08-06  8:12     ` Chris Wilson
2014-08-06  8:39       ` Daniel Vetter
2014-08-08  9:17         ` Chris Wilson
2014-08-08  9:46           ` Daniel Vetter
2014-08-08  9:52             ` Chris Wilson
2014-08-05 14:51 ` [PATCH 04/15] drm/i915: honour forced connector modes Rodrigo Vivi
2014-08-06  8:15   ` Daniel Vetter
2014-08-06 15:00   ` Jesse Barnes
2014-08-05 14:51 ` [PATCH 05/15] drm/i915: Don't promote UC to WT automagically Rodrigo Vivi
2014-08-06  7:57   ` Daniel Vetter
2014-08-05 14:51 ` [PATCH 06/15] drm/i915: Refactor the physical and virtual page hws setup Rodrigo Vivi
2014-08-06  8:17   ` Daniel Vetter
2014-08-05 14:51 ` [PATCH 07/15] drm/i915: clean up PPGTT checking logic Rodrigo Vivi
2014-08-06  8:21   ` Daniel Vetter
2014-08-05 14:51 ` [PATCH 08/15] drm/i915: re-order ppgtt sanitize logic v2 Rodrigo Vivi
2014-08-06  8:22   ` Daniel Vetter
2014-08-05 14:51 ` [PATCH 09/15] drm/i915: Bring GPU Freq to min while suspending Rodrigo Vivi
2014-08-06  8:23   ` Daniel Vetter
2014-08-05 14:51 ` [PATCH 10/15] drm/i915/bdw: Map unused PDPs to a scratch page Rodrigo Vivi
2014-08-05 14:51 ` [PATCH 11/15] drm/i915: Set M2_N2 registers during mode set Rodrigo Vivi
2014-08-05 21:55   ` Jesse Barnes
2014-08-05 14:51 ` [PATCH 12/15] drm/i915: State readout and cross-checking for dp_m2_n2 Rodrigo Vivi
2014-08-06  8:25   ` Daniel Vetter
2014-08-05 14:51 ` [PATCH 13/15] drm/i915: HDMI detection based on HPD pin live status Rodrigo Vivi
2014-08-06  3:32   ` Sharma, Shashank
2014-08-06  6:44   ` Dave Airlie
2014-08-05 14:51 ` Rodrigo Vivi [this message]
2014-08-06  8:27   ` [PATCH 14/15] drm/i915: capture_reg_state interrupt registers for Gen8 Daniel Vetter
2014-08-06  8:56     ` Thierry, Michel
2014-08-05 14:51 ` [PATCH 15/15] drm/i915/chv: Use timeout mode for RC6 on chv Rodrigo Vivi
2014-08-06  0:51   ` O'Rourke, Tom

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