From: Hanjun Guo <hanjun.guo@linaro.org> To: Catalin Marinas <catalin.marinas@arm.com>, "Rafael J. Wysocki" <rjw@rjwysocki.net>, Mark Rutland <mark.rutland@arm.com>, Olof Johansson <olof@lixom.net>, Grant Likely <grant.likely@linaro.org> Cc: Graeme Gregory <graeme.gregory@linaro.org>, Arnd Bergmann <arnd@arndb.de>, Sudeep Holla <Sudeep.Holla@arm.com>, Will Deacon <will.deacon@arm.com>, Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <marc.zyngier@arm.com>, Bjorn Helgaas <bhelgaas@google.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>, Robert Richter <rric@kernel.org>, Lv Zheng <lv.zheng@intel.com>, Robert Moore <robert.moore@intel.com>, Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>, Liviu Dudau <Liviu.Dudau@arm.com>, Randy Dunlap <rdunlap@infradead.org>, Charles.Garcia-Tobin@arm.com, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, Tomasz Nowicki <tomasz.nowicki@linaro.org>, Hanjun Guo <hanjun.guo@linaro.org> Subject: [PATCH v3 13/17] ARM64 / ACPI: Add GICv2 specific ACPI boot support Date: Mon, 1 Sep 2014 22:57:51 +0800 [thread overview] Message-ID: <1409583475-6978-14-git-send-email-hanjun.guo@linaro.org> (raw) In-Reply-To: <1409583475-6978-1-git-send-email-hanjun.guo@linaro.org> From: Tomasz Nowicki <tomasz.nowicki@linaro.org> ACPI kernel uses MADT table for proper GIC initialization. It needs to parse GIC related subtables, collect CPU interface and distributor addresses and call driver initialization function (which is hardware abstraction agnostic). In a similar way, FDT initialize GICv1/2. NOTE: This commit allow to initialize GICv1/2 only. Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> --- arch/arm64/include/asm/acpi.h | 2 - arch/arm64/kernel/acpi.c | 23 +++++++ arch/arm64/kernel/irq.c | 5 ++ drivers/irqchip/irq-gic.c | 114 ++++++++++++++++++++++++++++++++++ include/linux/irqchip/arm-gic-acpi.h | 33 ++++++++++ 5 files changed, 175 insertions(+), 2 deletions(-) create mode 100644 include/linux/irqchip/arm-gic-acpi.h diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index a867467..5d2ab63 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -97,8 +97,6 @@ void __init acpi_smp_init_cpus(void); extern int (*acpi_suspend_lowlevel)(void); #define acpi_wakeup_address 0 -#define ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES 65535 - #else static inline bool acpi_psci_present(void) { return false; } diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index 354b912..b3b82b0 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -23,6 +23,7 @@ #include <linux/irqdomain.h> #include <linux/bootmem.h> #include <linux/smp.h> +#include <linux/irqchip/arm-gic-acpi.h> #include <asm/cputype.h> #include <asm/cpu_ops.h> @@ -313,6 +314,28 @@ void __init acpi_boot_table_init(void) pr_err("Can't find FADT or error happened during parsing FADT\n"); } +void __init acpi_gic_init(void) +{ + struct acpi_table_header *table; + acpi_status status; + acpi_size tbl_size; + int err; + + status = acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table, &tbl_size); + if (ACPI_FAILURE(status)) { + const char *msg = acpi_format_exception(status); + + pr_err("Failed to get MADT table, %s\n", msg); + return; + } + + err = gic_v2_acpi_init(table); + if (err) + pr_err("Failed to initialize GIC IRQ controller"); + + early_acpi_os_unmap_memory((char *)table, tbl_size); +} + /* * acpi_suspend_lowlevel() - save kernel state and suspend. * diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index 0f08dfd..c074d60 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -28,6 +28,7 @@ #include <linux/irqchip.h> #include <linux/seq_file.h> #include <linux/ratelimit.h> +#include <linux/irqchip/arm-gic-acpi.h> unsigned long irq_err_count; @@ -78,6 +79,10 @@ void __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) void __init init_IRQ(void) { irqchip_init(); + + if (!handle_arch_irq) + acpi_gic_init(); + if (!handle_arch_irq) panic("No interrupt controller found."); } diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4b959e6..85cbf43 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -33,12 +33,14 @@ #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> +#include <linux/acpi.h> #include <linux/irqdomain.h> #include <linux/interrupt.h> #include <linux/percpu.h> #include <linux/slab.h> #include <linux/irqchip/chained_irq.h> #include <linux/irqchip/arm-gic.h> +#include <linux/irqchip/arm-gic-acpi.h> #include <asm/cputype.h> #include <asm/irq.h> @@ -1029,3 +1031,115 @@ IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init); IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init); #endif + +#ifdef CONFIG_ACPI +static u64 dist_phy_base, cpu_phy_base = ULONG_MAX; + +static int __init +gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_interrupt *processor; + u64 gic_cpu_base; + + processor = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(processor, end)) + return -EINVAL; + + gic_cpu_base = processor->base_address; + if (!gic_cpu_base) + return -EFAULT; + + /* + * There is no support for non-banked GICv1/2 register in ACPI spec. + * All CPU interface addresses have to be the same. + */ + if (cpu_phy_base != ULONG_MAX && gic_cpu_base != cpu_phy_base) + return -EFAULT; + + cpu_phy_base = gic_cpu_base; + return 0; +} + +static int __init +gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_distributor *dist; + + dist = (struct acpi_madt_generic_distributor *)header; + + if (BAD_MADT_ENTRY(dist, end)) + return -EINVAL; + + dist_phy_base = dist->base_address; + if (!dist_phy_base) + return -EFAULT; + + return 0; +} + +int __init +gic_v2_acpi_init(struct acpi_table_header *table) +{ + void __iomem *cpu_base, *dist_base; + int count; + + /* Collect CPU base addresses */ + count = acpi_parse_entries(sizeof(struct acpi_table_madt), + gic_acpi_parse_madt_cpu, table, + ACPI_MADT_TYPE_GENERIC_INTERRUPT, + ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES); + if (count < 0) { + pr_err("Error during GICC entries parsing\n"); + return -EFAULT; + } else if (!count) { + /* No GICC entries provided, use address from MADT header */ + struct acpi_table_madt *madt = (struct acpi_table_madt *)table; + + if (!madt->address) + return -EFAULT; + + cpu_phy_base = (u64)madt->address; + } + + /* + * Find distributor base address. We expect one distributor entry since + * ACPI 5.1 spec neither support multi-GIC instances nor GIC cascade. + */ + count = acpi_parse_entries(sizeof(struct acpi_table_madt), + gic_acpi_parse_madt_distributor, table, + ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR, + ACPI_MAX_GIC_DISTRIBUTOR_ENTRIES); + if (count <= 0) { + pr_err("Error during GICD entries parsing\n"); + return -EFAULT; + } else if (count > 1) { + pr_err("More than one GICD entry detected\n"); + return -EINVAL; + } + + cpu_base = ioremap(cpu_phy_base, ACPI_GIC_CPU_IF_MEM_SIZE); + if (!cpu_base) { + pr_err("Unable to map GICC registers\n"); + return -ENOMEM; + } + + dist_base = ioremap(dist_phy_base, ACPI_GIC_DIST_MEM_SIZE); + if (!dist_base) { + pr_err("Unable to map GICD registers\n"); + iounmap(cpu_base); + return -ENOMEM; + } + + /* + * Initialize zero GIC instance (no multi-GIC support). Also, set GIC + * as default IRQ domain to allow for GSI registration and GSI to IRQ + * number translation (see acpi_register_gsi() and acpi_gsi_to_irq()). + */ + gic_init_bases(0, -1, dist_base, cpu_base, 0, NULL); + irq_set_default_host(gic_data[0].domain); + return 0; +} +#endif diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h new file mode 100644 index 0000000..ce2ae1a8 --- /dev/null +++ b/include/linux/irqchip/arm-gic-acpi.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2014, Linaro Ltd. + * Author: Tomasz Nowicki <tomasz.nowicki@linaro.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARM_GIC_ACPI_H_ +#define ARM_GIC_ACPI_H_ + +#include <linux/acpi.h> + +#ifdef CONFIG_ACPI +#define ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES 65535 +#define ACPI_MAX_GIC_DISTRIBUTOR_ENTRIES 1 + +/* + * Hard code here, we can not get memory size from MADT (but FDT does), + * Actually no need to do that, because this size can be inferred + * from GIC spec. + */ +#define ACPI_GIC_DIST_MEM_SIZE (SZ_64K) +#define ACPI_GIC_CPU_IF_MEM_SIZE (SZ_8K) + +void acpi_gic_init(void); +int gic_v2_acpi_init(struct acpi_table_header *table); +#else +static inline void acpi_gic_init(void) { } +#endif + +#endif /* ARM_GIC_ACPI_H_ */ -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: hanjun.guo@linaro.org (Hanjun Guo) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 13/17] ARM64 / ACPI: Add GICv2 specific ACPI boot support Date: Mon, 1 Sep 2014 22:57:51 +0800 [thread overview] Message-ID: <1409583475-6978-14-git-send-email-hanjun.guo@linaro.org> (raw) In-Reply-To: <1409583475-6978-1-git-send-email-hanjun.guo@linaro.org> From: Tomasz Nowicki <tomasz.nowicki@linaro.org> ACPI kernel uses MADT table for proper GIC initialization. It needs to parse GIC related subtables, collect CPU interface and distributor addresses and call driver initialization function (which is hardware abstraction agnostic). In a similar way, FDT initialize GICv1/2. NOTE: This commit allow to initialize GICv1/2 only. Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> --- arch/arm64/include/asm/acpi.h | 2 - arch/arm64/kernel/acpi.c | 23 +++++++ arch/arm64/kernel/irq.c | 5 ++ drivers/irqchip/irq-gic.c | 114 ++++++++++++++++++++++++++++++++++ include/linux/irqchip/arm-gic-acpi.h | 33 ++++++++++ 5 files changed, 175 insertions(+), 2 deletions(-) create mode 100644 include/linux/irqchip/arm-gic-acpi.h diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index a867467..5d2ab63 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -97,8 +97,6 @@ void __init acpi_smp_init_cpus(void); extern int (*acpi_suspend_lowlevel)(void); #define acpi_wakeup_address 0 -#define ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES 65535 - #else static inline bool acpi_psci_present(void) { return false; } diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index 354b912..b3b82b0 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -23,6 +23,7 @@ #include <linux/irqdomain.h> #include <linux/bootmem.h> #include <linux/smp.h> +#include <linux/irqchip/arm-gic-acpi.h> #include <asm/cputype.h> #include <asm/cpu_ops.h> @@ -313,6 +314,28 @@ void __init acpi_boot_table_init(void) pr_err("Can't find FADT or error happened during parsing FADT\n"); } +void __init acpi_gic_init(void) +{ + struct acpi_table_header *table; + acpi_status status; + acpi_size tbl_size; + int err; + + status = acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table, &tbl_size); + if (ACPI_FAILURE(status)) { + const char *msg = acpi_format_exception(status); + + pr_err("Failed to get MADT table, %s\n", msg); + return; + } + + err = gic_v2_acpi_init(table); + if (err) + pr_err("Failed to initialize GIC IRQ controller"); + + early_acpi_os_unmap_memory((char *)table, tbl_size); +} + /* * acpi_suspend_lowlevel() - save kernel state and suspend. * diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index 0f08dfd..c074d60 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -28,6 +28,7 @@ #include <linux/irqchip.h> #include <linux/seq_file.h> #include <linux/ratelimit.h> +#include <linux/irqchip/arm-gic-acpi.h> unsigned long irq_err_count; @@ -78,6 +79,10 @@ void __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) void __init init_IRQ(void) { irqchip_init(); + + if (!handle_arch_irq) + acpi_gic_init(); + if (!handle_arch_irq) panic("No interrupt controller found."); } diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4b959e6..85cbf43 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -33,12 +33,14 @@ #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> +#include <linux/acpi.h> #include <linux/irqdomain.h> #include <linux/interrupt.h> #include <linux/percpu.h> #include <linux/slab.h> #include <linux/irqchip/chained_irq.h> #include <linux/irqchip/arm-gic.h> +#include <linux/irqchip/arm-gic-acpi.h> #include <asm/cputype.h> #include <asm/irq.h> @@ -1029,3 +1031,115 @@ IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init); IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init); #endif + +#ifdef CONFIG_ACPI +static u64 dist_phy_base, cpu_phy_base = ULONG_MAX; + +static int __init +gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_interrupt *processor; + u64 gic_cpu_base; + + processor = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(processor, end)) + return -EINVAL; + + gic_cpu_base = processor->base_address; + if (!gic_cpu_base) + return -EFAULT; + + /* + * There is no support for non-banked GICv1/2 register in ACPI spec. + * All CPU interface addresses have to be the same. + */ + if (cpu_phy_base != ULONG_MAX && gic_cpu_base != cpu_phy_base) + return -EFAULT; + + cpu_phy_base = gic_cpu_base; + return 0; +} + +static int __init +gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_distributor *dist; + + dist = (struct acpi_madt_generic_distributor *)header; + + if (BAD_MADT_ENTRY(dist, end)) + return -EINVAL; + + dist_phy_base = dist->base_address; + if (!dist_phy_base) + return -EFAULT; + + return 0; +} + +int __init +gic_v2_acpi_init(struct acpi_table_header *table) +{ + void __iomem *cpu_base, *dist_base; + int count; + + /* Collect CPU base addresses */ + count = acpi_parse_entries(sizeof(struct acpi_table_madt), + gic_acpi_parse_madt_cpu, table, + ACPI_MADT_TYPE_GENERIC_INTERRUPT, + ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES); + if (count < 0) { + pr_err("Error during GICC entries parsing\n"); + return -EFAULT; + } else if (!count) { + /* No GICC entries provided, use address from MADT header */ + struct acpi_table_madt *madt = (struct acpi_table_madt *)table; + + if (!madt->address) + return -EFAULT; + + cpu_phy_base = (u64)madt->address; + } + + /* + * Find distributor base address. We expect one distributor entry since + * ACPI 5.1 spec neither support multi-GIC instances nor GIC cascade. + */ + count = acpi_parse_entries(sizeof(struct acpi_table_madt), + gic_acpi_parse_madt_distributor, table, + ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR, + ACPI_MAX_GIC_DISTRIBUTOR_ENTRIES); + if (count <= 0) { + pr_err("Error during GICD entries parsing\n"); + return -EFAULT; + } else if (count > 1) { + pr_err("More than one GICD entry detected\n"); + return -EINVAL; + } + + cpu_base = ioremap(cpu_phy_base, ACPI_GIC_CPU_IF_MEM_SIZE); + if (!cpu_base) { + pr_err("Unable to map GICC registers\n"); + return -ENOMEM; + } + + dist_base = ioremap(dist_phy_base, ACPI_GIC_DIST_MEM_SIZE); + if (!dist_base) { + pr_err("Unable to map GICD registers\n"); + iounmap(cpu_base); + return -ENOMEM; + } + + /* + * Initialize zero GIC instance (no multi-GIC support). Also, set GIC + * as default IRQ domain to allow for GSI registration and GSI to IRQ + * number translation (see acpi_register_gsi() and acpi_gsi_to_irq()). + */ + gic_init_bases(0, -1, dist_base, cpu_base, 0, NULL); + irq_set_default_host(gic_data[0].domain); + return 0; +} +#endif diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h new file mode 100644 index 0000000..ce2ae1a8 --- /dev/null +++ b/include/linux/irqchip/arm-gic-acpi.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2014, Linaro Ltd. + * Author: Tomasz Nowicki <tomasz.nowicki@linaro.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARM_GIC_ACPI_H_ +#define ARM_GIC_ACPI_H_ + +#include <linux/acpi.h> + +#ifdef CONFIG_ACPI +#define ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES 65535 +#define ACPI_MAX_GIC_DISTRIBUTOR_ENTRIES 1 + +/* + * Hard code here, we can not get memory size from MADT (but FDT does), + * Actually no need to do that, because this size can be inferred + * from GIC spec. + */ +#define ACPI_GIC_DIST_MEM_SIZE (SZ_64K) +#define ACPI_GIC_CPU_IF_MEM_SIZE (SZ_8K) + +void acpi_gic_init(void); +int gic_v2_acpi_init(struct acpi_table_header *table); +#else +static inline void acpi_gic_init(void) { } +#endif + +#endif /* ARM_GIC_ACPI_H_ */ -- 1.7.9.5
next prev parent reply other threads:[~2014-09-01 14:57 UTC|newest] Thread overview: 338+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-09-01 14:57 [PATCH v3 00/17] Introduce ACPI for ARM64 based on ACPI 5.1 Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 01/17] ARM64: Move the init of cpu_logical_map(0) before unflatten_device_tree() Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 02/17] ARM64 / ACPI: Get RSDP and ACPI boot-time tables Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-09 16:26 ` Catalin Marinas 2014-09-09 16:26 ` Catalin Marinas 2014-09-09 16:26 ` Catalin Marinas 2014-09-09 16:41 ` Jon Masters 2014-09-09 16:41 ` Jon Masters 2014-09-09 16:41 ` Jon Masters 2014-09-09 16:44 ` Jon Masters 2014-09-09 16:44 ` Jon Masters 2014-09-09 17:15 ` Mark Rutland 2014-09-09 17:15 ` Mark Rutland 2014-09-09 17:15 ` Mark Rutland 2014-09-09 17:33 ` Jon Masters 2014-09-09 17:33 ` Jon Masters 2014-09-09 17:33 ` Jon Masters 2014-09-09 17:50 ` Lorenzo Pieralisi 2014-09-09 17:50 ` Lorenzo Pieralisi 2014-09-09 17:50 ` Lorenzo Pieralisi 2014-09-09 18:05 ` Sudeep Holla 2014-09-09 18:05 ` Sudeep Holla 2014-09-09 18:05 ` Sudeep Holla 2014-09-09 19:06 ` Jon Masters 2014-09-09 19:06 ` Jon Masters 2014-09-09 19:06 ` Jon Masters 2014-09-10 11:13 ` Hanjun Guo 2014-09-10 11:13 ` Hanjun Guo 2014-09-10 11:13 ` Hanjun Guo 2014-09-10 12:33 ` Catalin Marinas 2014-09-10 12:33 ` Catalin Marinas 2014-09-10 12:33 ` Catalin Marinas 2014-09-10 21:51 ` Grant Likely 2014-09-10 21:51 ` Grant Likely 2014-09-10 21:51 ` Grant Likely 2014-09-11 11:01 ` Catalin Marinas 2014-09-11 11:01 ` Catalin Marinas 2014-09-11 11:01 ` Catalin Marinas 2014-09-14 15:40 ` Grant Likely 2014-09-14 15:40 ` Grant Likely 2014-09-14 15:40 ` Grant Likely 2014-09-14 21:59 ` Catalin Marinas 2014-09-14 21:59 ` Catalin Marinas 2014-09-14 21:59 ` Catalin Marinas 2014-09-15 3:53 ` Grant Likely 2014-09-15 3:53 ` Grant Likely 2014-09-15 3:53 ` Grant Likely 2014-09-16 5:29 ` Zheng, Lv 2014-09-16 5:29 ` Zheng, Lv 2014-09-16 5:29 ` Zheng, Lv 2014-09-10 21:41 ` Grant Likely 2014-09-10 21:41 ` Grant Likely 2014-09-10 21:41 ` Grant Likely 2014-09-09 16:54 ` Mark Rutland 2014-09-09 16:54 ` Mark Rutland 2014-09-09 16:54 ` Mark Rutland 2014-09-10 7:30 ` Hanjun Guo 2014-09-10 7:30 ` Hanjun Guo 2014-09-10 7:30 ` Hanjun Guo 2014-09-10 21:37 ` Grant Likely 2014-09-10 21:37 ` Grant Likely 2014-09-10 21:37 ` Grant Likely 2014-09-01 14:57 ` [PATCH v3 03/17] ARM64 / ACPI: Introduce lowlevel suspend function Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-09 16:35 ` Catalin Marinas 2014-09-09 16:35 ` Catalin Marinas 2014-09-09 16:35 ` Catalin Marinas 2014-09-09 22:04 ` Graeme Gregory 2014-09-09 22:04 ` Graeme Gregory 2014-09-09 22:04 ` Graeme Gregory 2014-09-01 14:57 ` [PATCH v3 04/17] ARM64 / ACPI: Introduce early_param for "acpi" Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-09 16:37 ` Catalin Marinas 2014-09-09 16:37 ` Catalin Marinas 2014-09-09 16:37 ` Catalin Marinas 2014-09-09 17:17 ` Bjorn Helgaas 2014-09-09 17:17 ` Bjorn Helgaas 2014-09-09 17:17 ` Bjorn Helgaas 2014-09-09 22:14 ` Jon Masters 2014-09-09 22:14 ` Jon Masters 2014-09-09 22:14 ` Jon Masters 2014-09-10 13:04 ` Will Deacon 2014-09-10 13:04 ` Will Deacon 2014-09-10 13:04 ` Will Deacon 2014-09-10 13:21 ` Bjorn Helgaas 2014-09-10 13:21 ` Bjorn Helgaas 2014-09-10 13:21 ` Bjorn Helgaas 2014-09-10 18:30 ` Will Deacon 2014-09-10 18:30 ` Will Deacon 2014-09-10 18:30 ` Will Deacon 2014-09-10 21:58 ` Grant Likely 2014-09-10 21:58 ` Grant Likely 2014-09-10 21:58 ` Grant Likely 2014-09-01 14:57 ` [PATCH v3 05/17] ARM64 / ACPI: If we chose to boot from acpi then disable FDT Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 06/17] ARM64 / ACPI: Make PCI optional for ACPI on ARM64 Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 07/17] ARM64 / ACPI: Parse FADT table to get PSCI flags for PSCI init Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 08/17] ACPI / table: Print GIC information when MADT is parsed Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 09/17] ARM64 / ACPI: Parse MADT for SMP initialization Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-03 17:21 ` Lorenzo Pieralisi 2014-09-03 17:21 ` Lorenzo Pieralisi 2014-09-03 17:21 ` Lorenzo Pieralisi 2014-09-04 15:29 ` Hanjun Guo 2014-09-04 15:29 ` Hanjun Guo 2014-09-04 15:29 ` Hanjun Guo 2014-09-09 3:55 ` Jon Masters 2014-09-09 10:22 ` Mark Rutland 2014-09-09 10:46 ` Graeme Gregory 2014-09-11 10:32 ` Grant Likely 2014-09-09 4:29 ` Jon Masters 2014-09-09 4:29 ` Jon Masters 2014-09-09 4:29 ` Jon Masters 2014-09-09 5:11 ` Hanjun Guo 2014-09-09 5:11 ` Hanjun Guo 2014-09-09 5:11 ` Hanjun Guo 2014-09-09 5:34 ` Jon Masters 2014-09-09 5:34 ` Jon Masters 2014-09-09 5:34 ` Jon Masters 2014-09-09 16:52 ` Lorenzo Pieralisi 2014-09-09 16:52 ` Lorenzo Pieralisi 2014-09-09 16:52 ` Lorenzo Pieralisi 2014-09-09 17:00 ` Jon Masters 2014-09-09 17:00 ` Jon Masters 2014-09-09 17:00 ` Jon Masters 2014-09-09 17:02 ` Jon Masters 2014-09-09 17:02 ` Jon Masters 2014-09-09 17:02 ` Jon Masters 2014-09-09 4:23 ` Jon Masters 2014-09-09 4:23 ` Jon Masters 2014-09-09 4:23 ` Jon Masters 2014-09-09 4:57 ` Hanjun Guo 2014-09-09 4:57 ` Hanjun Guo 2014-09-09 4:57 ` Hanjun Guo 2014-09-09 5:44 ` Jon Masters 2014-09-09 5:44 ` Jon Masters 2014-09-09 5:44 ` Jon Masters 2014-09-09 16:00 ` Hanjun Guo 2014-09-09 16:00 ` Hanjun Guo 2014-09-09 16:00 ` Hanjun Guo 2014-09-09 16:04 ` Jon Masters 2014-09-09 16:04 ` Jon Masters 2014-09-09 16:04 ` Jon Masters 2014-09-09 16:14 ` Hanjun Guo 2014-09-09 16:14 ` Hanjun Guo 2014-09-09 16:14 ` Hanjun Guo 2014-09-11 14:15 ` Will Deacon 2014-09-11 14:15 ` Will Deacon 2014-09-11 14:15 ` Will Deacon 2014-09-12 21:30 ` Jon Masters 2014-09-12 21:30 ` Jon Masters 2014-09-12 21:30 ` Jon Masters 2014-09-11 10:24 ` Grant Likely 2014-09-11 10:24 ` Grant Likely 2014-09-11 10:24 ` Grant Likely 2014-09-01 14:57 ` [PATCH v3 10/17] ACPI / processor: Make it possible to get CPU hardware ID via GICC Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-03 16:27 ` Lorenzo Pieralisi 2014-09-03 16:27 ` Lorenzo Pieralisi 2014-09-03 16:27 ` Lorenzo Pieralisi 2014-09-08 13:10 ` Hanjun Guo 2014-09-08 13:10 ` Hanjun Guo 2014-09-08 13:10 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 11/17] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-11 11:08 ` Grant Likely 2014-09-11 11:08 ` Grant Likely 2014-09-11 11:08 ` Grant Likely 2014-09-11 11:34 ` Grant Likely 2014-09-11 11:34 ` Grant Likely 2014-09-11 11:34 ` Grant Likely 2014-09-12 9:42 ` Hanjun Guo 2014-09-12 9:42 ` Hanjun Guo 2014-09-12 9:42 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 12/17] ACPI / table: Add new function to get table entries Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo [this message] 2014-09-01 14:57 ` [PATCH v3 13/17] ARM64 / ACPI: Add GICv2 specific ACPI boot support Hanjun Guo 2014-09-01 17:35 ` Marc Zyngier 2014-09-01 17:35 ` Marc Zyngier 2014-09-01 17:35 ` Marc Zyngier 2014-09-02 8:28 ` [Linaro-acpi] " Alexander Spyridakis 2014-09-02 8:28 ` Alexander Spyridakis 2014-09-02 8:28 ` Alexander Spyridakis 2014-09-02 11:48 ` Tomasz Nowicki 2014-09-02 11:48 ` Tomasz Nowicki 2014-09-02 11:48 ` Tomasz Nowicki 2014-09-02 13:02 ` Marc Zyngier 2014-09-02 13:02 ` Marc Zyngier 2014-09-02 13:02 ` Marc Zyngier 2014-09-02 15:45 ` Hanjun Guo 2014-09-02 15:45 ` Hanjun Guo 2014-09-02 15:45 ` Hanjun Guo 2014-09-02 15:59 ` Marc Zyngier 2014-09-02 15:59 ` Marc Zyngier 2014-09-02 15:59 ` Marc Zyngier 2014-09-02 16:11 ` Sudeep Holla 2014-09-02 16:11 ` Sudeep Holla 2014-09-02 16:11 ` Sudeep Holla 2014-09-03 10:30 ` Marc Zyngier 2014-09-03 10:30 ` Marc Zyngier 2014-09-03 10:30 ` Marc Zyngier 2014-09-03 11:17 ` Hanjun Guo 2014-09-03 11:17 ` Hanjun Guo 2014-09-03 11:17 ` Hanjun Guo 2014-09-04 14:03 ` Hanjun Guo 2014-09-04 14:03 ` Hanjun Guo 2014-09-04 14:03 ` Hanjun Guo 2014-09-09 6:21 ` Jon Masters 2014-09-09 6:21 ` Jon Masters 2014-09-09 6:21 ` Jon Masters 2014-09-03 9:26 ` Tomasz Nowicki 2014-09-03 9:26 ` Tomasz Nowicki 2014-09-03 9:26 ` Tomasz Nowicki 2014-09-03 14:57 ` Arnd Bergmann 2014-09-03 14:57 ` Arnd Bergmann 2014-09-03 14:57 ` Arnd Bergmann 2014-09-05 8:52 ` Tomasz Nowicki 2014-09-05 8:52 ` Tomasz Nowicki 2014-09-05 8:52 ` Tomasz Nowicki 2014-09-05 9:47 ` Marc Zyngier 2014-09-05 9:47 ` Marc Zyngier 2014-09-05 9:47 ` Marc Zyngier 2014-09-05 10:13 ` [Linaro-acpi] " Arnd Bergmann 2014-09-05 10:13 ` Arnd Bergmann 2014-09-05 10:13 ` Arnd Bergmann 2014-09-05 10:36 ` Tomasz Nowicki 2014-09-05 10:36 ` Tomasz Nowicki 2014-09-05 10:36 ` Tomasz Nowicki 2014-09-05 10:39 ` Marc Zyngier 2014-09-05 10:39 ` Marc Zyngier 2014-09-05 10:39 ` Marc Zyngier 2014-09-05 10:49 ` Tomasz Nowicki 2014-09-05 10:49 ` Tomasz Nowicki 2014-09-05 10:49 ` Tomasz Nowicki 2014-09-09 6:27 ` Jon Masters 2014-09-09 6:27 ` Jon Masters 2014-09-09 6:27 ` Jon Masters 2014-09-11 13:43 ` Grant Likely 2014-09-11 13:43 ` Grant Likely 2014-09-11 13:43 ` Grant Likely 2014-09-02 16:34 ` Catalin Marinas 2014-09-02 16:34 ` Catalin Marinas 2014-09-02 16:34 ` Catalin Marinas 2014-09-11 11:48 ` Grant Likely 2014-09-11 11:48 ` Grant Likely 2014-09-11 11:48 ` Grant Likely 2014-09-11 12:01 ` Marc Zyngier 2014-09-11 12:01 ` Marc Zyngier 2014-09-11 12:01 ` Marc Zyngier 2014-09-09 6:14 ` Jon Masters 2014-09-09 6:14 ` Jon Masters 2014-09-09 6:14 ` Jon Masters 2014-09-03 18:42 ` Arnd Bergmann 2014-09-03 18:42 ` Arnd Bergmann 2014-09-03 18:42 ` Arnd Bergmann 2014-09-04 10:10 ` Tomasz Nowicki 2014-09-04 10:10 ` Tomasz Nowicki 2014-09-04 10:14 ` Arnd Bergmann 2014-09-04 10:14 ` Arnd Bergmann 2014-09-04 10:39 ` Tomasz Nowicki 2014-09-04 10:39 ` Tomasz Nowicki 2014-09-09 6:35 ` Jon Masters 2014-09-09 6:35 ` Jon Masters 2014-09-09 6:35 ` Jon Masters 2014-09-01 14:57 ` [PATCH v3 14/17] ARM64 / ACPI: Parse GTDT to initialize arch timer Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 15/17] ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64 Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-01 14:57 ` [PATCH v3 16/17] ARM64 / ACPI: Enable ARM64 in Kconfig Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-11 15:18 ` Lorenzo Pieralisi 2014-09-11 15:18 ` Lorenzo Pieralisi 2014-09-11 15:18 ` Lorenzo Pieralisi 2014-09-01 14:57 ` [PATCH v3 17/17] Documentation: ACPI for ARM64 Hanjun Guo 2014-09-01 14:57 ` Hanjun Guo 2014-09-11 13:29 ` [PATCH v3 00/17] Introduce ACPI for ARM64 based on ACPI 5.1 Grant Likely 2014-09-11 13:29 ` Grant Likely 2014-09-11 13:29 ` Grant Likely 2014-09-11 13:49 ` Will Deacon 2014-09-11 13:49 ` Will Deacon 2014-09-11 13:49 ` Will Deacon 2014-09-12 21:38 ` Jon Masters 2014-09-12 21:38 ` Jon Masters 2014-09-12 21:38 ` Jon Masters 2014-09-12 21:43 ` Jon Masters 2014-09-12 21:43 ` Jon Masters 2014-09-12 21:43 ` Jon Masters 2014-09-15 4:21 ` Grant Likely 2014-09-15 4:21 ` Grant Likely 2014-09-15 4:21 ` Grant Likely 2014-09-11 14:23 ` Rafael J. Wysocki 2014-09-11 14:23 ` Rafael J. Wysocki 2014-09-11 14:23 ` Rafael J. Wysocki 2014-09-11 14:04 ` Grant Likely 2014-09-11 14:04 ` Grant Likely 2014-09-11 14:04 ` Grant Likely 2014-09-11 15:37 ` Catalin Marinas 2014-09-11 15:37 ` Catalin Marinas 2014-09-11 15:37 ` Catalin Marinas 2014-09-11 15:57 ` Sudeep Holla 2014-09-11 15:57 ` Sudeep Holla 2014-09-11 15:57 ` Sudeep Holla 2014-09-11 16:06 ` Graeme Gregory 2014-09-11 16:06 ` Graeme Gregory 2014-09-11 16:06 ` Graeme Gregory 2014-09-11 16:14 ` Sudeep Holla 2014-09-11 16:14 ` Sudeep Holla 2014-09-11 16:14 ` Sudeep Holla 2014-09-15 4:31 ` Grant Likely 2014-09-15 4:31 ` Grant Likely 2014-09-15 4:31 ` Grant Likely 2014-09-15 9:15 ` Catalin Marinas 2014-09-15 9:15 ` Catalin Marinas 2014-09-15 9:15 ` Catalin Marinas 2014-09-15 22:48 ` Grant Likely 2014-09-15 22:48 ` Grant Likely 2014-09-15 22:48 ` Grant Likely 2014-09-16 10:12 ` Catalin Marinas 2014-09-16 10:12 ` Catalin Marinas 2014-09-16 10:12 ` Catalin Marinas 2014-09-11 16:05 ` Olof Johansson 2014-09-11 16:05 ` Olof Johansson 2014-09-11 16:05 ` Olof Johansson 2014-09-15 4:37 ` Grant Likely 2014-09-15 4:37 ` Grant Likely 2014-09-15 4:37 ` Grant Likely
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