From: heiko@sntech.de (Heiko Stuebner) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 01/11] clk: rockchip: fix rk3066 pll status register location Date: Sat, 6 Sep 2014 01:06:04 +0200 [thread overview] Message-ID: <1409958374-30937-2-git-send-email-heiko@sntech.de> (raw) In-Reply-To: <1409958374-30937-1-git-send-email-heiko@sntech.de> The register providing the pll lock status is at a different address on the rk3066. The error became apparent while working on cpufreq support for the rockchip SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> --- drivers/clk/rockchip/clk-rk3188.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c index 732118e..b8c5ada 100644 --- a/drivers/clk/rockchip/clk-rk3188.c +++ b/drivers/clk/rockchip/clk-rk3188.c @@ -19,6 +19,7 @@ #include <dt-bindings/clock/rk3188-cru-common.h> #include "clk.h" +#define RK3066_GRF_SOC_STATUS 0x15c #define RK3188_GRF_SOC_STATUS 0xac enum rk3188_plls { @@ -628,9 +629,6 @@ static void __init rk3188_common_clk_init(struct device_node *np) pr_warn("%s: could not register clock usb480m: %ld\n", __func__, PTR_ERR(clk)); - rockchip_clk_register_plls(rk3188_pll_clks, - ARRAY_SIZE(rk3188_pll_clks), - RK3188_GRF_SOC_STATUS); rockchip_clk_register_branches(common_clk_branches, ARRAY_SIZE(common_clk_branches)); rockchip_clk_protect_critical(rk3188_critical_clocks, @@ -643,6 +641,9 @@ static void __init rk3188_common_clk_init(struct device_node *np) static void __init rk3066a_clk_init(struct device_node *np) { rk3188_common_clk_init(np); + rockchip_clk_register_plls(rk3188_pll_clks, + ARRAY_SIZE(rk3188_pll_clks), + RK3066_GRF_SOC_STATUS); rockchip_clk_register_branches(rk3066a_clk_branches, ARRAY_SIZE(rk3066a_clk_branches)); } @@ -651,6 +652,9 @@ CLK_OF_DECLARE(rk3066a_cru, "rockchip,rk3066a-cru", rk3066a_clk_init); static void __init rk3188a_clk_init(struct device_node *np) { rk3188_common_clk_init(np); + rockchip_clk_register_plls(rk3188_pll_clks, + ARRAY_SIZE(rk3188_pll_clks), + RK3188_GRF_SOC_STATUS); rockchip_clk_register_branches(rk3188_clk_branches, ARRAY_SIZE(rk3188_clk_branches)); } -- 2.0.1
next prev parent reply other threads:[~2014-09-05 23:06 UTC|newest] Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-09-05 23:06 [PATCH 00/11] clk: rockchip: add a cpu clock-type Heiko Stuebner 2014-09-05 23:06 ` Heiko Stuebner [this message] 2014-09-05 23:06 ` [PATCH 02/11] clk: rockchip: fix rk3288 pll status register location Heiko Stuebner 2014-09-08 20:48 ` Doug Anderson 2014-09-05 23:06 ` [PATCH 03/11] clk: rockchip: reparent aclk_cpu_pre to the gpll Heiko Stuebner 2014-09-05 23:06 ` [PATCH 04/11] clk: rockchip: make tightly bound armclk child-clocks read-only Heiko Stuebner 2014-09-05 23:06 ` [PATCH 05/11] clk: rockchip: add new clock-type for the cpuclk Heiko Stuebner 2014-09-05 23:06 ` [PATCH 06/11] clk: rockchip: add binding id for ARMCLK Heiko Stuebner 2014-09-05 23:06 ` [PATCH 07/11] clk: rockchip: switch to using the new cpuclk type for armclk Heiko Stuebner 2014-09-05 23:06 ` [PATCH 08/11] ARM: dts: rockchip: add operating points and armclk references Heiko Stuebner 2014-09-08 20:16 ` Doug Anderson 2014-09-08 23:45 ` Naoki FUKAUMI 2014-09-12 7:33 ` Kever Yang 2014-09-12 11:37 ` Naoki FUKAUMI 2014-09-16 1:44 ` Kever Yang 2014-09-16 5:23 ` Naoki FUKAUMI 2014-09-05 23:06 ` [PATCH 09/11] ARM: dts: rockchip: add cpu supplies to boards Heiko Stuebner 2014-09-05 23:06 ` [PATCH 10/11] ARM: rockchip: enable cpufreq-related options Heiko Stuebner 2014-09-08 17:52 ` Doug Anderson 2014-09-05 23:06 ` [PATCH 11/11] ARM: rockchip: add a cpufreq-cpu0 device Heiko Stuebner 2014-09-09 20:22 ` [PATCH 00/11] clk: rockchip: add a cpu clock-type Mike Turquette
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