[PATCH v2 00/12] ARM: dts: TI: Add DCAN support

[PATCH v2 00/12] ARM: dts: TI: Add DCAN support

[Roger Quadros]

Hi,

These patches add DCAN support for am43xx and dra7xx platforms.
We also update the am33xx DCAN nodes to support the driver changes
in the RAMINIT mechanism.

These patches must go in together with [1] (or its revisions)

Patches are available along with dependency [1] patches at

git@github.com:rogerq/linux.git [for-v3.18/dcan-omap]

Changelog:

v2:
- Added vendor prefix "ti," to raminit properties
- Updated am335x dcan nodes

[1] - CAN driver RAMINIT support
http://article.gmane.org/gmane.linux.ports.arm.omap/118368

cheers,
-roger

---

Afzal Mohammed (1):
  arm: dts: am4372: Add dcan nodes

Dave Gerlach (1):
  ARM: dts: am437x-gp-evm: Add pinctrl sleep states for dcan pins

Mugunthan V N (1):
  arm: dts: am437x-gp: Add dcan support

Roger Quadros (9):
  ARM: dts: dra7: Add syscon regmap for CORE CONTROL area
  ARM: dts: DRA7: Add DCAN nodes
  ARM: dts: dra7-evm: Add CAN support
  ARM: dts: dra72-evm: Add CAN support
  ARM: dts: AM43xx: Add aliases to d_can nodes
  ARM: dts: am4372: Add control module syscon node
  ARM: dts: am4372: Add dcan raminit bits
  ARM: dts: am33xx: Add control module syscon node
  ARM: dts: am33xx: Add dcan raminit bits

 arch/arm/boot/dts/am33xx.dtsi       | 19 +++++++++++++----
 arch/arm/boot/dts/am4372.dtsi       | 35 +++++++++++++++++++++++++++++++
 arch/arm/boot/dts/am437x-gp-evm.dts | 42 +++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/dra7-evm.dts      | 21 +++++++++++++++++++
 arch/arm/boot/dts/dra7.dtsi         | 35 +++++++++++++++++++++++++++++++
 arch/arm/boot/dts/dra72-evm.dts     | 23 ++++++++++++++++++++
 6 files changed, 171 insertions(+), 4 deletions(-)

-- 
1.8.3.2

[PATCH v2 01/12] ARM: dts: dra7: Add syscon regmap for CORE CONTROL area

[Roger Quadros]

Display and DCAN drivers use syscon regmap to access some registers
in the CORE control area. Add the syscon regmap node for this
area.

Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152..370009e 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -200,6 +200,11 @@
 			ti,hwmods = "counter_32k";
 		};
 
+		dra7_ctrl_core: ctrl_core@4a002000 {
+			compatible = "syscon";
+			reg = <0x4a002000 0x6d0>;
+		};
+
 		dra7_ctrl_general: tisyscon@4a002e00 {
 			compatible = "syscon";
 			reg = <0x4a002e00 0x7c>;
-- 
1.8.3.2

[PATCH v2 02/12] ARM: dts: DRA7: Add DCAN nodes

[Roger Quadros]

The SoC supports 2 DCAN nodes. Add them.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 370009e..09d5739 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
 		serial3 = &uart4;
 		serial4 = &uart5;
 		serial5 = &uart6;
+		d_can0 = &dcan1;
+		d_can1 = &dcan2;
 	};
 
 	timer {
@@ -1267,6 +1269,34 @@
 			ti,irqs-skip = <10 133 139 140>;
 			ti,irqs-safe-map = <0>;
 		};
+
+		dcan1: can@481cc000 {
+			compatible = "bosch,d_can";
+			ti,hwmods = "dcan1";
+			reg = <0x4ae3c000 0x2000>,
+			      <0x558 0x4>; /* index to RAMINIT reg within syscon */
+			ti,raminit-syscon = <&dra7_ctrl_core>;
+			ti,raminit-start-bit = <3>;
+			ti,raminit-done-bit = <1>;
+			ti,raminit-pulse;
+			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&dcan1_sys_clk_mux>;
+			status = "disabled";
+		};
+
+		dcan2: can@481d0000 {
+			compatible = "bosch,d_can";
+			ti,hwmods = "dcan2";
+			reg = <0x48480000 0x2000>,
+			      <0x558 0x4>; /* index to RAMINIT reg within syscon */
+			ti,raminit-syscon = <&dra7_ctrl_core>;
+			ti,raminit-start-bit = <5>;
+			ti,raminit-done-bit = <2>;
+			ti,raminit-pulse;
+			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sys_clkin1>;
+			status = "disabled";
+		};
 	};
 };
 
-- 
1.8.3.2

[PATCH v2 03/12] ARM: dts: dra7-evm: Add CAN support

[Roger Quadros]

The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.

The second one cannot be used without hardware modification
so we don't enable the second port.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index e03fbf3..d6b9b27 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -171,6 +171,20 @@
 			0xd0	(PIN_OUTPUT | MUX_MODE0)	/* gpmc_be0n_cle */
 		>;
 	};
+
+	dcan1_pins_default: dcan1_pins_default {
+		pinctrl-single,pins = <
+			0x3d4	(PIN_INPUT | MUX_MODE0)		/* dcan1_tx */
+			0x3d8	(PIN_INPUT | MUX_MODE0)		/* dcan1_rx */
+		>;
+	};
+
+	dcan1_pins_sleep: dcan1_pins_sleep {
+		pinctrl-single,pins = <
+			0x3d4	(PIN_INPUT | MUX_MODE15)	/* dcan1_tx */
+			0x3d8	(PIN_INPUT | MUX_MODE15)	/* dcan1_rx */
+		>;
+	};
 };
 
 &i2c1 {
@@ -529,3 +543,10 @@
 	ti,no-reset-on-init;
 	ti,no-idle-on-init;
 };
+
+&dcan1 {
+	status = "ok";
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&dcan1_pins_default>;
+	pinctrl-1 = <&dcan1_pins_sleep>;
+};
-- 
1.8.3.2

[PATCH v2 04/12] ARM: dts: dra72-evm: Add CAN support

[Roger Quadros]

The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.

The second one cannot be used without hardware modification
so we don't enable the second port.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra72-evm.dts | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 5147023..e5b7172 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -19,6 +19,29 @@
 	};
 };
 
+&dra7_pmx_core {
+	dcan1_pins_default: dcan1_pins_default {
+		pinctrl-single,pins = <
+			0x3d4	(PIN_INPUT | MUX_MODE0)		/* dcan1_tx */
+			0x418	(PIN_INPUT | MUX_MODE1)		/* wakeup0.dcan1_rx */
+		>;
+	};
+
+	dcan1_pins_sleep: dcan1_pins_sleep {
+		pinctrl-single,pins = <
+			0x3d4	(PIN_INPUT | MUX_MODE15)	/* dcan1_tx.off */
+			0x418	(PIN_INPUT | MUX_MODE15)	/* wakeup0.off */
+		>;
+	};
+};
+
 &uart1 {
 	status = "okay";
 };
+
+&dcan1 {
+	status = "ok";
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&dcan1_pins_default>;
+	pinctrl-1 = <&dcan1_pins_sleep>;
+};
-- 
1.8.3.2

[PATCH v2 05/12] arm: dts: am4372: Add dcan nodes

[Roger Quadros]

From: Afzal Mohammed <afzal@ti.com>

Add dcan nodes.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 8689949..3514d0a 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -885,6 +885,28 @@
 				clock-names = "fck";
 			};
 		};
+
+		dcan0: can@481cc000 {
+			compatible = "bosch,d_can";
+			ti,hwmods = "d_can0";
+			clocks = <&dcan0_fck>;
+			clock-names = "fck";
+			reg = <0x481cc000 0x2000
+				0x44e10644 0x4>;
+			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		dcan1: can@481d0000 {
+			compatible = "bosch,d_can";
+			ti,hwmods = "d_can1";
+			clocks = <&dcan1_fck>;
+			clock-names = "fck";
+			reg = <0x481d0000 0x2000
+				0x44e10644 0x4>;
+			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
 	};
 };
 
-- 
1.8.3.2

[PATCH v2 06/12] ARM: dts: AM43xx: Add aliases to d_can nodes

[Roger Quadros]

The d_can driver expects appropriately named aliases for
the d_can nodes for the RAMINIT control register access.

Provide those, otherwise RAMINIT register won't be configured.
Get's rid of the following messages during boot.

[   16.419354] c_can_platform 481cc000.can: control memory is not used for raminit
[   16.449142] c_can_platform 481d0000.can: control memory is not used for raminit

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 3514d0a..a705e50 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -25,6 +25,8 @@
 		serial0 = &uart0;
 		ethernet0 = &cpsw_emac0;
 		ethernet1 = &cpsw_emac1;
+		d_can0 = &dcan0;
+		d_can1 = &dcan1;
 	};
 
 	cpus {
-- 
1.8.3.2

[PATCH v2 07/12] arm: dts: am437x-gp: Add dcan support

[Roger Quadros]

From: Mugunthan V N <mugunthanvnm@ti.com>

Add DCAN support for AM437x GP EVM with both DCAN instances.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am437x-gp-evm.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index e7ac47f..6d03baa 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -254,6 +254,20 @@
 			0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
 		>;
 	};
+
+	dcan0_default: dcan0_default_pins {
+		pinctrl-single,pins = <
+			0x178 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
+			0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
+		>;
+	};
+
+	dcan1_default: dcan1_default_pins {
+		pinctrl-single,pins = <
+			0x180 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_rxd.d_can1_tx */
+			0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
+		>;
+	};
 };
 
 &i2c0 {
@@ -511,3 +525,15 @@
 		};
 	};
 };
+
+&dcan0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dcan0_default>;
+	status = "okay";
+};
+
+&dcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dcan1_default>;
+	status = "okay";
+};
-- 
1.8.3.2

[PATCH v2 08/12] ARM: dts: am437x-gp-evm: Add pinctrl sleep states for dcan pins

[Roger Quadros]

From: Dave Gerlach <d-gerlach@ti.com>

Define pinctrl sleep states for both dcan0 and dcan1 to place pull downs
on the lines to optimize power savings during suspend.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am437x-gp-evm.dts | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 6d03baa..ca9e1ab 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -262,12 +262,26 @@
 		>;
 	};
 
+	dcan0_sleep: dcan0_sleep_pins {
+		pinctrl-single,pins = <
+			0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x17c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+		>;
+	};
+
 	dcan1_default: dcan1_default_pins {
 		pinctrl-single,pins = <
 			0x180 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_rxd.d_can1_tx */
 			0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
 		>;
 	};
+
+	dcan1_sleep: dcan1_sleep_pins {
+		pinctrl-single,pins = <
+			0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+		>;
+	};
 };
 
 &i2c0 {
@@ -527,13 +541,15 @@
 };
 
 &dcan0 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&dcan0_default>;
+	pinctrl-1 = <&dcan0_sleep>;
 	status = "okay";
 };
 
 &dcan1 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&dcan1_default>;
+	pinctrl-1 = <&dcan1_sleep>;
 	status = "okay";
 };
-- 
1.8.3.2

[PATCH v2 09/12] ARM: dts: am4372: Add control module syscon node

[Roger Quadros]

Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index a705e50..d38a0ed 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -59,6 +59,11 @@
 		cache-level = <2>;
 	};
 
+	am43xx_control_module: control_module@4a002000 {
+		compatible = "syscon";
+		reg = <0x44e10000 0x7f4>;
+	};
+
 	am43xx_pinmux: pinmux@44e10800 {
 		compatible = "pinctrl-single";
 		reg = <0x44e10800 0x31c>;
-- 
1.8.3.2

[PATCH v2 10/12] ARM: dts: am4372: Add dcan raminit bits

[Roger Quadros]

Add RAMINIT specific bits into the DCAN nodes.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index d38a0ed..847f41b 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -899,7 +899,10 @@
 			clocks = <&dcan0_fck>;
 			clock-names = "fck";
 			reg = <0x481cc000 0x2000
-				0x44e10644 0x4>;
+				0x644 0x4>; /* index to RAMINIT reg within syscon */
+			ti,raminit-syscon = <&am43xx_control_module>;
+			ti,raminit-start-bit = <0>;
+			ti,raminit-done-bit = <8>;
 			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
@@ -910,7 +913,10 @@
 			clocks = <&dcan1_fck>;
 			clock-names = "fck";
 			reg = <0x481d0000 0x2000
-				0x44e10644 0x4>;
+				0x644 0x4>; /* index to RAMINIT reg within syscon */
+			ti,raminit-syscon = <&am43xx_control_module>;
+			ti,raminit-start-bit = <1>;
+			ti,raminit-done-bit = <9>;
 			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
-- 
1.8.3.2

[PATCH v2 11/12] ARM: dts: am33xx: Add control module syscon node

[Roger Quadros]

Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 3a0a161..492c043 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -83,6 +83,11 @@
 		};
 	};
 
+	am33xx_control_module: control_module@4a002000 {
+		compatible = "syscon";
+		reg = <0x44e10000 0x7fc>;
+	};
+
 	am33xx_pinmux: pinmux@44e10800 {
 		compatible = "pinctrl-single";
 		reg = <0x44e10800 0x0238>;
-- 
1.8.3.2

[PATCH v2 12/12] ARM: dts: am33xx: Add dcan raminit bits

[Roger Quadros]

Add RAMINIT specific bits into the DCAN nodes.
Also rename can nodes from "d_can" to "can" to be compliant
with the ePAPR specs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 492c043..0661cdd 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -334,20 +334,26 @@
 			interrupts = <91>;
 		};
 
-		dcan0: d_can@481cc000 {
+		dcan0: can@481cc000 {
 			compatible = "bosch,d_can";
 			ti,hwmods = "d_can0";
 			reg = <0x481cc000 0x2000
-				0x44e10644 0x4>;
+				0x644 0x4>; /* index to RAMINIT reg within syscon */
+			ti,raminit-syscon = <&am33xx_control_module>;
+			ti,raminit-start-bit = <0>;
+			ti,raminit-done-bit = <8>;
 			interrupts = <52>;
 			status = "disabled";
 		};
 
-		dcan1: d_can@481d0000 {
+		dcan1: can@481d0000 {
 			compatible = "bosch,d_can";
 			ti,hwmods = "d_can1";
 			reg = <0x481d0000 0x2000
-				0x44e10644 0x4>;
+				0x644 0x4>; /* index to RAMINIT reg within syscon */
+			ti,raminit-syscon = <&am33xx_control_module>;
+			ti,raminit-start-bit = <1>;
+			ti,raminit-done-bit = <9>;
 			interrupts = <55>;
 			status = "disabled";
 		};
-- 
1.8.3.2

Re: [PATCH v2 02/12] ARM: dts: DRA7: Add DCAN nodes

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 2163 bytes --]

On 09/09/2014 04:55 PM, Roger Quadros wrote:
> The SoC supports 2 DCAN nodes. Add them.

I think you should put the device-tree ml for DT related patches on Cc.

> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
>  arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 370009e..09d5739 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -34,6 +34,8 @@
>  		serial3 = &uart4;
>  		serial4 = &uart5;
>  		serial5 = &uart6;
> +		d_can0 = &dcan1;
> +		d_can1 = &dcan2;
>  	};
>  
>  	timer {
> @@ -1267,6 +1269,34 @@
>  			ti,irqs-skip = <10 133 139 140>;
>  			ti,irqs-safe-map = <0>;
>  		};
> +
> +		dcan1: can@481cc000 {
> +			compatible = "bosch,d_can";
> +			ti,hwmods = "dcan1";
> +			reg = <0x4ae3c000 0x2000>,
> +			      <0x558 0x4>; /* index to RAMINIT reg within syscon */

Putting the offset within the syscon here doesn't look good.

> +			ti,raminit-syscon = <&dra7_ctrl_core>;

Why not add it as a second parameter to the ti,raminit-syscon instead?

> +			ti,raminit-start-bit = <3>;
> +			ti,raminit-done-bit = <1>;
> +			ti,raminit-pulse;
> +			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&dcan1_sys_clk_mux>;
> +			status = "disabled";
> +		};
> +
> +		dcan2: can@481d0000 {
> +			compatible = "bosch,d_can";
> +			ti,hwmods = "dcan2";
> +			reg = <0x48480000 0x2000>,
> +			      <0x558 0x4>; /* index to RAMINIT reg within syscon */
> +			ti,raminit-syscon = <&dra7_ctrl_core>;
> +			ti,raminit-start-bit = <5>;
> +			ti,raminit-done-bit = <2>;
> +			ti,raminit-pulse;
> +			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&sys_clkin1>;
> +			status = "disabled";
> +		};
>  	};
>  };
>  
> 

Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
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Re: [PATCH v2 02/12] ARM: dts: DRA7: Add DCAN nodes

[Marc Kleine-Budde]

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On 09/09/2014 05:04 PM, Marc Kleine-Budde wrote:
> On 09/09/2014 04:55 PM, Roger Quadros wrote:
>> The SoC supports 2 DCAN nodes. Add them.
> 
> I think you should put the device-tree ml for DT related patches on Cc.
> 
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>>  arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++
>>  1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>> index 370009e..09d5739 100644
>> --- a/arch/arm/boot/dts/dra7.dtsi
>> +++ b/arch/arm/boot/dts/dra7.dtsi
>> @@ -34,6 +34,8 @@
>>  		serial3 = &uart4;
>>  		serial4 = &uart5;
>>  		serial5 = &uart6;
>> +		d_can0 = &dcan1;
>> +		d_can1 = &dcan2;
>>  	};
>>  
>>  	timer {
>> @@ -1267,6 +1269,34 @@
>>  			ti,irqs-skip = <10 133 139 140>;
>>  			ti,irqs-safe-map = <0>;
>>  		};
>> +
>> +		dcan1: can@481cc000 {
>> +			compatible = "bosch,d_can";
>> +			ti,hwmods = "dcan1";
>> +			reg = <0x4ae3c000 0x2000>,
>> +			      <0x558 0x4>; /* index to RAMINIT reg within syscon */
> 
> Putting the offset within the syscon here doesn't look good.
> 
>> +			ti,raminit-syscon = <&dra7_ctrl_core>;
> 
> Why not add it as a second parameter to the ti,raminit-syscon instead?

./drivers/power/reset/keystone-reset.c does this.

Marc


-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |


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Re: [PATCH v2 06/12] ARM: dts: AM43xx: Add aliases to d_can nodes

[Marc Kleine-Budde]

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On 09/09/2014 04:55 PM, Roger Quadros wrote:
> The d_can driver expects appropriately named aliases for
> the d_can nodes for the RAMINIT control register access.
> 
> Provide those, otherwise RAMINIT register won't be configured.
> Get's rid of the following messages during boot.

With your patch set this is not true anymore, is it?

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
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Re: [PATCH v2 05/12] arm: dts: am4372: Add dcan nodes

[Marc Kleine-Budde]

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On 09/09/2014 04:55 PM, Roger Quadros wrote:
> From: Afzal Mohammed <afzal@ti.com>
> 
> Add dcan nodes.
> 
> Signed-off-by: Afzal Mohammed <afzal@ti.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: George Cherian <george.cherian@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
>  arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
> index 8689949..3514d0a 100644
> --- a/arch/arm/boot/dts/am4372.dtsi
> +++ b/arch/arm/boot/dts/am4372.dtsi
> @@ -885,6 +885,28 @@
>  				clock-names = "fck";
>  			};
>  		};
> +
> +		dcan0: can@481cc000 {
> +			compatible = "bosch,d_can";
> +			ti,hwmods = "d_can0";
> +			clocks = <&dcan0_fck>;
> +			clock-names = "fck";
> +			reg = <0x481cc000 0x2000
> +				0x44e10644 0x4>;
> +			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;

Where are the syscon phandles?

> +			status = "disabled";
> +		};
> +
> +		dcan1: can@481d0000 {
> +			compatible = "bosch,d_can";
> +			ti,hwmods = "d_can1";
> +			clocks = <&dcan1_fck>;
> +			clock-names = "fck";
> +			reg = <0x481d0000 0x2000
> +				0x44e10644 0x4>;
> +			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
> +		};
>  	};
>  };
>  
> 

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |


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Re: [PATCH v2 02/12] ARM: dts: DRA7: Add DCAN nodes

[Roger Quadros]

On 09/09/2014 06:06 PM, Marc Kleine-Budde wrote:
> On 09/09/2014 05:04 PM, Marc Kleine-Budde wrote:
>> On 09/09/2014 04:55 PM, Roger Quadros wrote:
>>> The SoC supports 2 DCAN nodes. Add them.
>>
>> I think you should put the device-tree ml for DT related patches on Cc.

OK.

>>
>>>
>>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>>> ---
>>>  arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++
>>>  1 file changed, 30 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>> index 370009e..09d5739 100644
>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>> @@ -34,6 +34,8 @@
>>>  		serial3 = &uart4;
>>>  		serial4 = &uart5;
>>>  		serial5 = &uart6;
>>> +		d_can0 = &dcan1;
>>> +		d_can1 = &dcan2;
>>>  	};
>>>  
>>>  	timer {
>>> @@ -1267,6 +1269,34 @@
>>>  			ti,irqs-skip = <10 133 139 140>;
>>>  			ti,irqs-safe-map = <0>;
>>>  		};
>>> +
>>> +		dcan1: can@481cc000 {
>>> +			compatible = "bosch,d_can";
>>> +			ti,hwmods = "dcan1";
>>> +			reg = <0x4ae3c000 0x2000>,
>>> +			      <0x558 0x4>; /* index to RAMINIT reg within syscon */
>>
>> Putting the offset within the syscon here doesn't look good.
>>
>>> +			ti,raminit-syscon = <&dra7_ctrl_core>;
>>
>> Why not add it as a second parameter to the ti,raminit-syscon instead?

Yes, that would be better.

> 
> ./drivers/power/reset/keystone-reset.c does this.

Thanks for the hint. I'll fix this in v3.

cheers,
-rogre

Re: [PATCH v2 05/12] arm: dts: am4372: Add dcan nodes

[Roger Quadros]

On 09/09/2014 06:09 PM, Marc Kleine-Budde wrote:
> On 09/09/2014 04:55 PM, Roger Quadros wrote:
>> From: Afzal Mohammed <afzal@ti.com>
>>
>> Add dcan nodes.
>>
>> Signed-off-by: Afzal Mohammed <afzal@ti.com>
>> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>> Signed-off-by: George Cherian <george.cherian@ti.com>
>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>>  arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++
>>  1 file changed, 22 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
>> index 8689949..3514d0a 100644
>> --- a/arch/arm/boot/dts/am4372.dtsi
>> +++ b/arch/arm/boot/dts/am4372.dtsi
>> @@ -885,6 +885,28 @@
>>  				clock-names = "fck";
>>  			};
>>  		};
>> +
>> +		dcan0: can@481cc000 {
>> +			compatible = "bosch,d_can";
>> +			ti,hwmods = "d_can0";
>> +			clocks = <&dcan0_fck>;
>> +			clock-names = "fck";
>> +			reg = <0x481cc000 0x2000
>> +				0x44e10644 0x4>;
>> +			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> 
> Where are the syscon phandles?

They are added in patch 10. As that doesn't look nice, I'll squash it to this patch.

> 
>> +			status = "disabled";
>> +		};
>> +
>> +		dcan1: can@481d0000 {
>> +			compatible = "bosch,d_can";
>> +			ti,hwmods = "d_can1";
>> +			clocks = <&dcan1_fck>;
>> +			clock-names = "fck";
>> +			reg = <0x481d0000 0x2000
>> +				0x44e10644 0x4>;
>> +			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
>> +			status = "disabled";
>> +		};
>>  	};
>>  };
>>  
>>

cheers,
-roger

Re: [PATCH v2 06/12] ARM: dts: AM43xx: Add aliases to d_can nodes

[Roger Quadros]

On 09/09/2014 06:08 PM, Marc Kleine-Budde wrote:
> On 09/09/2014 04:55 PM, Roger Quadros wrote:
>> The d_can driver expects appropriately named aliases for
>> the d_can nodes for the RAMINIT control register access.
>>
>> Provide those, otherwise RAMINIT register won't be configured.
>> Get's rid of the following messages during boot.
> 
> With your patch set this is not true anymore, is it?

Right. I'll drop this patch.

cheers,
-roger