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From: Pierre Mallard <mallard.pierre@gmail.com>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: tommusta@gmail.com, Pierre Mallard <mallard.pierre@gmail.com>
Subject: [Qemu-devel] [PATCH 1/3] target-ppc : Add floating point ability to 440x5 PPC CPU
Date: Wed, 10 Sep 2014 07:03:31 +0200	[thread overview]
Message-ID: <1410325413-3660-2-git-send-email-mallard.pierre@gmail.com> (raw)
In-Reply-To: <1410325413-3660-1-git-send-email-mallard.pierre@gmail.com>

This patch add some floating point operation for PPC440x5.
Compile with PPC440x5_HAVE_FPU enabled in configure extra-cflags

Signed-off-by: Pierre Mallard <mallard.pierre@gmail.com>
---
 target-ppc/translate_init.c |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 48177ed..b4dedce 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -3897,6 +3897,10 @@ POWERPC_FAMILY(440x5)(ObjectClass *oc, void *data)
     pcc->init_proc = init_proc_440x5;
     pcc->check_pow = check_pow_nocheck;
     pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING |
+#ifdef PPC440x5_HAVE_FPU
+                       PPC_FLOAT | PPC_FLOAT_FSQRT | 
+                       PPC_FLOAT_STFIWX |
+#endif
                        PPC_DCR | PPC_WRTEE | PPC_RFMCI |
                        PPC_CACHE | PPC_CACHE_ICBI |
                        PPC_CACHE_DCBZ | PPC_CACHE_DCBA |
-- 
1.7.10.4

  reply	other threads:[~2014-09-10  5:04 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-10  5:03 [Qemu-devel] [PATCH 0/3] Enabling floating point instruction to 440x5 CPUs Pierre Mallard
2014-09-10  5:03 ` Pierre Mallard [this message]
2014-09-10  9:13   ` [Qemu-devel] [Qemu-ppc] [PATCH 1/3] target-ppc : Add floating point ability to 440x5 PPC CPU Alexander Graf
2014-09-10  5:03 ` [Qemu-devel] [PATCH 2/3] target-ppc : Add PPC_FLOAT_64 flag to instructions type Pierre Mallard
2014-09-10  9:18   ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-09-10 16:23     ` Tom Musta
2014-09-10  5:03 ` [Qemu-devel] [PATCH 3/3] target-ppc : Add PPC_FLOAT_64 type to fctid, fctidz and fcfid and remove their TARGET_PPC64 restriction Pierre Mallard
2014-09-10  9:19   ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-09-10 16:44     ` Tom Musta
2014-09-10  9:20 ` [Qemu-devel] [Qemu-ppc] [PATCH 0/3] Enabling floating point instruction to 440x5 CPUs Alexander Graf
2014-09-10 17:15   ` Tom Musta
2014-09-10 18:02     ` Pierre Mallard
2014-09-10 22:43     ` Pierre Mallard
2014-09-11 12:30       ` Tom Musta

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