From: Alexander Graf <agraf@suse.de>
To: Pierre Mallard <mallard.pierre@gmail.com>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: tommusta@gmail.com
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 1/3] target-ppc : Add floating point ability to 440x5 PPC CPU
Date: Wed, 10 Sep 2014 11:13:44 +0200 [thread overview]
Message-ID: <54101648.5080307@suse.de> (raw)
In-Reply-To: <1410325413-3660-2-git-send-email-mallard.pierre@gmail.com>
On 10.09.14 07:03, Pierre Mallard wrote:
> This patch add some floating point operation for PPC440x5.
> Compile with PPC440x5_HAVE_FPU enabled in configure extra-cflags
>
> Signed-off-by: Pierre Mallard <mallard.pierre@gmail.com>
Instead of the define, could we just create a new CPU that has these
flags enabled? Just call it "440x5-fpu" or so.
Alex
> ---
> target-ppc/translate_init.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 48177ed..b4dedce 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -3897,6 +3897,10 @@ POWERPC_FAMILY(440x5)(ObjectClass *oc, void *data)
> pcc->init_proc = init_proc_440x5;
> pcc->check_pow = check_pow_nocheck;
> pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING |
> +#ifdef PPC440x5_HAVE_FPU
> + PPC_FLOAT | PPC_FLOAT_FSQRT |
> + PPC_FLOAT_STFIWX |
> +#endif
> PPC_DCR | PPC_WRTEE | PPC_RFMCI |
> PPC_CACHE | PPC_CACHE_ICBI |
> PPC_CACHE_DCBZ | PPC_CACHE_DCBA |
>
next prev parent reply other threads:[~2014-09-10 9:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-10 5:03 [Qemu-devel] [PATCH 0/3] Enabling floating point instruction to 440x5 CPUs Pierre Mallard
2014-09-10 5:03 ` [Qemu-devel] [PATCH 1/3] target-ppc : Add floating point ability to 440x5 PPC CPU Pierre Mallard
2014-09-10 9:13 ` Alexander Graf [this message]
2014-09-10 5:03 ` [Qemu-devel] [PATCH 2/3] target-ppc : Add PPC_FLOAT_64 flag to instructions type Pierre Mallard
2014-09-10 9:18 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-09-10 16:23 ` Tom Musta
2014-09-10 5:03 ` [Qemu-devel] [PATCH 3/3] target-ppc : Add PPC_FLOAT_64 type to fctid, fctidz and fcfid and remove their TARGET_PPC64 restriction Pierre Mallard
2014-09-10 9:19 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-09-10 16:44 ` Tom Musta
2014-09-10 9:20 ` [Qemu-devel] [Qemu-ppc] [PATCH 0/3] Enabling floating point instruction to 440x5 CPUs Alexander Graf
2014-09-10 17:15 ` Tom Musta
2014-09-10 18:02 ` Pierre Mallard
2014-09-10 22:43 ` Pierre Mallard
2014-09-11 12:30 ` Tom Musta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54101648.5080307@suse.de \
--to=agraf@suse.de \
--cc=mallard.pierre@gmail.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=tommusta@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.