All of lore.kernel.org
 help / color / mirror / Atom feed
From: Michael Neuling <mikey@neuling.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: greg@kroah.com, arnd@arndb.de, mpe@ellerman.id.au,
	benh@kernel.crashing.org, anton@samba.org,
	linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
	jk@ozlabs.org, imunsie@au1.ibm.com, cbe-oss-dev@lists.ozlabs.org
Subject: Re: [PATCH v2 02/17] powerpc/cell: Move data segment faulting code out of cell platform
Date: Wed, 01 Oct 2014 21:10:47 +1000	[thread overview]
Message-ID: <1412161847.19209.62.camel@ale.ozlabs.ibm.com> (raw)
In-Reply-To: <8738b8nmwr.fsf@linux.vnet.ibm.com>

On Wed, 2014-10-01 at 15:15 +0530, Aneesh Kumar K.V wrote:
> Michael Neuling <mikey@neuling.org> writes:
> 
> > From: Ian Munsie <imunsie@au1.ibm.com>
> >
> > __spu_trap_data_seg() currently contains code to determine the VSID and ESID
> > required for a particular EA and mm struct.
> >
> > This code is generically useful for other co-processors.  This moves the code
> > of the cell platform so it can be used by other powerpc code.  It also adds 1TB
> > segment handling which Cell didn't have.
> >
> > Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
> > ---
> >  arch/powerpc/include/asm/mmu-hash64.h  |  7 ++++-
> >  arch/powerpc/mm/copro_fault.c          | 48 ++++++++++++++++++++++++++++++++++
> >  arch/powerpc/mm/slb.c                  |  3 ---
> >  arch/powerpc/platforms/cell/spu_base.c | 41 +++--------------------------
> >  4 files changed, 58 insertions(+), 41 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
> > index d765144..6d0b7a2 100644
> > --- a/arch/powerpc/include/asm/mmu-hash64.h
> > +++ b/arch/powerpc/include/asm/mmu-hash64.h
> > @@ -189,7 +189,12 @@ static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
> >  #define LP_MASK(i)	((0xFF >> (i)) << LP_SHIFT)
> >  
> >  #ifndef __ASSEMBLY__
> > -
> > +static inline int slb_vsid_shift(int ssize)
> > +{
> > +	if (ssize == MMU_SEGSIZE_256M)
> > +		return SLB_VSID_SHIFT;
> > +	return SLB_VSID_SHIFT_1T;
> > +}
> >  static inline int segment_shift(int ssize)
> >  {
> >  	if (ssize == MMU_SEGSIZE_256M)
> > diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c
> > index ba7df14..b865697 100644
> > --- a/arch/powerpc/mm/copro_fault.c
> > +++ b/arch/powerpc/mm/copro_fault.c
> > @@ -90,3 +90,51 @@ out_unlock:
> >  	return ret;
> >  }
> >  EXPORT_SYMBOL_GPL(copro_handle_mm_fault);
> > +
> > +int copro_data_segment(struct mm_struct *mm, u64 ea, u64 *esid, u64 *vsid)
> > +{
> > +	int psize, ssize;
> > +
> > +	*esid = (ea & ESID_MASK) | SLB_ESID_V;
> > +
> > +	switch (REGION_ID(ea)) {
> > +	case USER_REGION_ID:
> > +		pr_devel("copro_data_segment: 0x%llx -- USER_REGION_ID\n", ea);
> > +#ifdef CONFIG_PPC_MM_SLICES
> > +		psize = get_slice_psize(mm, ea);
> > +#else
> > +		psize = mm->context.user_psize;
> > +#endif
> 
> We don't really need that as explained in last review.

That cleanup is in patch 10. I avoided changing it here so it's clearer
that what is being removed is the same as what is being added.

Mikey


WARNING: multiple messages have this Message-ID (diff)
From: Michael Neuling <mikey@neuling.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: cbe-oss-dev@lists.ozlabs.org, arnd@arndb.de, greg@kroah.com,
	linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
	anton@samba.org, imunsie@au1.ibm.com, jk@ozlabs.org
Subject: Re: [PATCH v2 02/17] powerpc/cell: Move data segment faulting code out of cell platform
Date: Wed, 01 Oct 2014 21:10:47 +1000	[thread overview]
Message-ID: <1412161847.19209.62.camel@ale.ozlabs.ibm.com> (raw)
In-Reply-To: <8738b8nmwr.fsf@linux.vnet.ibm.com>

On Wed, 2014-10-01 at 15:15 +0530, Aneesh Kumar K.V wrote:
> Michael Neuling <mikey@neuling.org> writes:
>=20
> > From: Ian Munsie <imunsie@au1.ibm.com>
> >
> > __spu_trap_data_seg() currently contains code to determine the VSID and=
 ESID
> > required for a particular EA and mm struct.
> >
> > This code is generically useful for other co-processors.  This moves th=
e code
> > of the cell platform so it can be used by other powerpc code.  It also =
adds 1TB
> > segment handling which Cell didn't have.
> >
> > Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
> > ---
> >  arch/powerpc/include/asm/mmu-hash64.h  |  7 ++++-
> >  arch/powerpc/mm/copro_fault.c          | 48 ++++++++++++++++++++++++++=
++++++++
> >  arch/powerpc/mm/slb.c                  |  3 ---
> >  arch/powerpc/platforms/cell/spu_base.c | 41 +++-----------------------=
---
> >  4 files changed, 58 insertions(+), 41 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/inclu=
de/asm/mmu-hash64.h
> > index d765144..6d0b7a2 100644
> > --- a/arch/powerpc/include/asm/mmu-hash64.h
> > +++ b/arch/powerpc/include/asm/mmu-hash64.h
> > @@ -189,7 +189,12 @@ static inline unsigned int mmu_psize_to_shift(unsi=
gned int mmu_psize)
> >  #define LP_MASK(i)	((0xFF >> (i)) << LP_SHIFT)
> > =20
> >  #ifndef __ASSEMBLY__
> > -
> > +static inline int slb_vsid_shift(int ssize)
> > +{
> > +	if (ssize =3D=3D MMU_SEGSIZE_256M)
> > +		return SLB_VSID_SHIFT;
> > +	return SLB_VSID_SHIFT_1T;
> > +}
> >  static inline int segment_shift(int ssize)
> >  {
> >  	if (ssize =3D=3D MMU_SEGSIZE_256M)
> > diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_faul=
t.c
> > index ba7df14..b865697 100644
> > --- a/arch/powerpc/mm/copro_fault.c
> > +++ b/arch/powerpc/mm/copro_fault.c
> > @@ -90,3 +90,51 @@ out_unlock:
> >  	return ret;
> >  }
> >  EXPORT_SYMBOL_GPL(copro_handle_mm_fault);
> > +
> > +int copro_data_segment(struct mm_struct *mm, u64 ea, u64 *esid, u64 *v=
sid)
> > +{
> > +	int psize, ssize;
> > +
> > +	*esid =3D (ea & ESID_MASK) | SLB_ESID_V;
> > +
> > +	switch (REGION_ID(ea)) {
> > +	case USER_REGION_ID:
> > +		pr_devel("copro_data_segment: 0x%llx -- USER_REGION_ID\n", ea);
> > +#ifdef CONFIG_PPC_MM_SLICES
> > +		psize =3D get_slice_psize(mm, ea);
> > +#else
> > +		psize =3D mm->context.user_psize;
> > +#endif
>=20
> We don't really need that as explained in last review.

That cleanup is in patch 10. I avoided changing it here so it's clearer
that what is being removed is the same as what is being added.

Mikey

  reply	other threads:[~2014-10-01 11:10 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-30 10:34 [PATCH v2 0/17] POWER8 Coherent Accelerator device driver Michael Neuling
2014-09-30 10:34 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 01/17] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 02/17] powerpc/cell: Move data segment faulting code " Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-01  6:47   ` Michael Ellerman
2014-10-01  6:47     ` Michael Ellerman
2014-10-01  6:51     ` Benjamin Herrenschmidt
2014-10-01  6:51       ` Benjamin Herrenschmidt
2014-10-02  0:42     ` Michael Neuling
2014-10-02  0:42       ` Michael Neuling
2014-10-01  9:45   ` Aneesh Kumar K.V
2014-10-01  9:45     ` Aneesh Kumar K.V
2014-10-01 11:10     ` Michael Neuling [this message]
2014-10-01 11:10       ` Michael Neuling
2014-10-01  9:53   ` Aneesh Kumar K.V
2014-10-01  9:53     ` Aneesh Kumar K.V
2014-10-02  0:58     ` Michael Neuling
2014-10-02  0:58       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 03/17] powerpc/cell: Make spu_flush_all_slbs() generic Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-09-30 10:40   ` Arnd Bergmann
2014-09-30 10:40     ` Arnd Bergmann
2014-10-01  7:13   ` Michael Ellerman
2014-10-01  7:13     ` Michael Ellerman
2014-10-01 10:51     ` Michael Neuling
2014-10-01 10:51       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 04/17] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-01  7:13   ` Michael Ellerman
2014-10-01  7:13     ` Michael Ellerman
2014-10-02  2:01     ` Michael Neuling
2014-10-02  2:01       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 05/17] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-01  7:13   ` Michael Ellerman
2014-10-01  7:13     ` Michael Ellerman
2014-10-02  3:13     ` Michael Neuling
2014-10-02  3:13       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 06/17] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-02  1:57   ` Michael Ellerman
2014-10-02  1:57     ` Michael Ellerman
2014-10-02  5:22     ` Michael Neuling
2014-10-02  5:22       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 07/17] cxl: Add new header for call backs and structs Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-01 12:00   ` Michael Ellerman
2014-10-01 12:00     ` Michael Ellerman
2014-10-02  3:37     ` Michael Neuling
2014-10-02  3:37       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 08/17] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-02  3:16   ` Michael Ellerman
2014-10-02  3:16     ` Michael Ellerman
2014-10-02  6:09     ` Michael Neuling
2014-10-02  6:09       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 09/17] powerpc/mm: Add new hash_page_mm() Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-01  9:43   ` Aneesh Kumar K.V
2014-10-01  9:43     ` Aneesh Kumar K.V
2014-10-02  7:10     ` Michael Neuling
2014-10-02  7:10       ` Michael Neuling
2014-10-02  3:48   ` Michael Ellerman
2014-10-02  3:48     ` Michael Ellerman
2014-10-02  7:39     ` Michael Neuling
2014-10-02  7:39       ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 10/17] powerpc/mm: Merge vsid calculation in hash_page() and copro_data_segment() Michael Neuling
2014-09-30 10:34   ` Michael Neuling
2014-10-01  9:55   ` Aneesh Kumar K.V
2014-10-01  9:55     ` Aneesh Kumar K.V
2014-10-02  6:44     ` Michael Neuling
2014-10-02  6:44       ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 11/17] powerpc/opal: Add PHB to cxl mode call Michael Neuling
2014-09-30 10:35   ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 12/17] powerpc/mm: Add hooks for cxl Michael Neuling
2014-09-30 10:35   ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 13/17] cxl: Add base builtin support Michael Neuling
2014-09-30 10:35   ` Michael Neuling
2014-10-01 12:00   ` Michael Ellerman
2014-10-01 12:00     ` Michael Ellerman
2014-10-02  3:43     ` Michael Neuling
2014-10-02  3:43       ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 14/17] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling
2014-09-30 10:35   ` Michael Neuling
2014-10-02  7:02   ` Michael Ellerman
2014-10-02  7:02     ` Michael Ellerman
2014-09-30 10:35 ` [PATCH v2 15/17] cxl: Userspace header file Michael Neuling
2014-09-30 10:35   ` Michael Neuling
2014-10-02  6:02   ` Michael Ellerman
2014-10-02  6:02     ` Michael Ellerman
2014-10-02 10:28     ` Ian Munsie
2014-10-02 10:28       ` Ian Munsie
2014-10-02 12:42       ` Benjamin Herrenschmidt
2014-10-02 12:42         ` Benjamin Herrenschmidt
2014-09-30 10:35 ` [PATCH v2 16/17] cxl: Add driver to Kbuild and Makefiles Michael Neuling
2014-09-30 10:35   ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 17/17] cxl: Add documentation for userspace APIs Michael Neuling
2014-09-30 10:35   ` Michael Neuling

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1412161847.19209.62.camel@ale.ozlabs.ibm.com \
    --to=mikey@neuling.org \
    --cc=aneesh.kumar@linux.vnet.ibm.com \
    --cc=anton@samba.org \
    --cc=arnd@arndb.de \
    --cc=benh@kernel.crashing.org \
    --cc=cbe-oss-dev@lists.ozlabs.org \
    --cc=greg@kroah.com \
    --cc=imunsie@au1.ibm.com \
    --cc=jk@ozlabs.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linuxppc-dev@ozlabs.org \
    --cc=mpe@ellerman.id.au \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.