[U-Boot] [PATCH v3 0/8] Add SD/NAND boot support for LS1021AQDS/TWR board

[U-Boot] [PATCH v3 0/8] Add SD/NAND boot support for LS1021AQDS/TWR board

[Alison Wang]

This series contain SD boot support for LS1021AQDS/TWR board
and NAND boot support for LS1021AQDS board.SPL framework is
used. PBL initialize the internal RAM and copy SPL to it,
then SPL initialize DDR using SPD and copy u-boot from SD
card or NAND flash to DDR, finally SPL transfer control to
u-boot.

The patches are based on the previous 5 patches,
[U-Boot,v2,5/5] arm: ls102xa: Select ge2_clk125 for eTSEC clock muxing
[U-Boot,v2,4/5] arm: ls102xa: Add SystemID EEPROM support for LS1021ATWR board
[U-Boot,v2,3/5] ls102xa: ifc: nor: fix the write issue when bytes unaligned
[U-Boot,v2,2/5] arm: ls102xa: Remove bit reversing for SCFG registers
[U-Boot,v2,1/5] arm: ls102xa: Add snoop disable for slave port 0, 1 and 2

Change log:
 v3: Change the Copyright year.
     Gave more explaination in the commit.
     Update MAINTAINERS files.
     Update PBI and RCW for SD boot.
 v2: Remove the definition of CONFIG_SPL_MAX_SIZE.
     Pad the variable u-boot size to 64 byte boundary in pblimage tool.
     Use pblimage_check_params() insteady of basing on the file name.
     Use generic u-boot-spl.lds.

----------------------------------------------------------------
Alison Wang (8):
      ls102xa: pblimage: Add pblimage tool support for LS102xA
      spl: Use u-boot.img instead of u-boot.bin
      arm: spl: Add I2C linker list in generic .lds
      common: spl: Add interactive DDR debugger support for SPL image
      ls102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro
      arm: ls102xa: Add SD boot support for LS1021AQDS board
      arm: ls102xa: Add SD boot support for LS1021ATWR board
      arm: ls102xa: Add NAND boot support for LS1021AQDS board

 Makefile                                          |  11 +++++-
 arch/arm/cpu/armv7/ls102xa/Makefile               |   1 +
 arch/arm/cpu/armv7/ls102xa/spl.c                  |  33 +++++++++++++++++
 arch/arm/cpu/u-boot-spl.lds                       |   3 ++
 arch/arm/include/asm/arch-ls102xa/config.h        |   1 +
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |   2 +
 arch/arm/include/asm/arch-ls102xa/spl.h           |  20 ++++++++++
 board/freescale/common/qixis.h                    |   7 ++++
 board/freescale/ls1021aqds/MAINTAINERS            |   2 +
 board/freescale/ls1021aqds/ddr.c                  |   5 ++-
 board/freescale/ls1021aqds/ls1021aqds.c           |  47 +++++++++++++++++++++++
 board/freescale/ls1021aqds/ls102xa_pbi.cfg        |  12 ++++++
 board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg   |   7 ++++
 board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg     |  14 +++++++
 board/freescale/ls1021atwr/MAINTAINERS            |   1 +
 board/freescale/ls1021atwr/ls1021atwr.c           |  30 +++++++++++++++
 board/freescale/ls1021atwr/ls102xa_pbi.cfg        |  12 ++++++
 board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg     |  14 +++++++
 common/Makefile                                   |  20 +++++-----
 configs/ls1021aqds_nand_defconfig                 |   4 ++
 configs/ls1021aqds_sdcard_defconfig               |   4 ++
 configs/ls1021atwr_sdcard_defconfig               |   4 ++
 drivers/mtd/nand/fsl_ifc_spl.c                    |   8 ++++
 include/configs/ls1021aqds.h                      | 134 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/configs/ls1021atwr.h                      |  51 +++++++++++++++++++++++++
 tools/pblimage.c                                  | 108 ++++++++++++++++++++++++++++++++++++-----------------
 26 files changed, 508 insertions(+), 47 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/ls102xa/spl.c
 create mode 100644 arch/arm/include/asm/arch-ls102xa/spl.h
 create mode 100644 board/freescale/ls1021aqds/ls102xa_pbi.cfg
 create mode 100644 board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
 create mode 100644 board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg
 create mode 100644 board/freescale/ls1021atwr/ls102xa_pbi.cfg
 create mode 100644 board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg
 create mode 100644 configs/ls1021aqds_nand_defconfig
 create mode 100644 configs/ls1021aqds_sdcard_defconfig
 create mode 100644 configs/ls1021atwr_sdcard_defconfig

[U-Boot] [PATCH v3 1/8] ls102xa: pblimage: Add pblimage tool support for LS102xA

[Alison Wang]

For LS102xA, the size of spl/u-boot-spl.bin is variable.
This patch adds the support to deal with the variable
u-boot size in pblimage tool. It will be padded to 64
byte boundary.

Use pblimage_check_params() to add the specific operations
for ARM, such as PBI CRC and END command and the calculation
of pbl_cmd_initaddr.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
Change log:
 v3: Change the Copyright year.
 v2: Remove the definition of CONFIG_SPL_MAX_SIZE.
     Pad the variable u-boot size to 64 byte boundary in pblimage tool.
     Use pblimage_check_params() insteady of basing on the file name.

 Makefile         |   3 +-
 tools/pblimage.c | 108 +++++++++++++++++++++++++++++++++++++------------------
 2 files changed, 76 insertions(+), 35 deletions(-)

diff --git a/Makefile b/Makefile
index 99097e1..164929e 100644
--- a/Makefile
+++ b/Makefile
@@ -963,7 +963,8 @@ u-boot-img.bin: spl/u-boot-spl.bin u-boot.img FORCE
 #concatenated with u-boot binary. It is need by PowerPC SoC having
 #internal SRAM <= 512KB.
 MKIMAGEFLAGS_u-boot-spl.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
-		-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage
+		-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage \
+		-A $(ARCH) -a $(CONFIG_SPL_TEXT_BASE)
 
 spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)
diff --git a/tools/pblimage.c b/tools/pblimage.c
index 6e6e801..28b0248 100644
--- a/tools/pblimage.c
+++ b/tools/pblimage.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012-2014 Freescale Semiconductor, Inc.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -8,6 +8,10 @@
 #include "pblimage.h"
 #include "pbl_crc32.h"
 
+#define roundup(x, y)		((((x) + ((y) - 1)) / (y)) * (y))
+#define PBL_ACS_CONT_CMD	0x81000000
+#define PBL_ADDR_24BIT_MASK	0x00ffffff
+
 /*
  * Initialize to an invalid value.
  */
@@ -22,6 +26,13 @@ static int pbl_size;
 static char *fname = "Unknown";
 static int lineno = -1;
 static struct pbl_header pblimage_header;
+static int uboot_size;
+static int arch_flag;
+
+static uint32_t pbl_cmd_initaddr;
+static uint32_t pbi_crc_cmd1;
+static uint32_t pbi_crc_cmd2;
+static uint32_t pbl_end_cmd[4];
 
 static union
 {
@@ -38,20 +49,6 @@ static union
  * start offset by subtracting the size of the u-boot image from the
  * top of the allowable 24-bit range.
  */
-static void init_next_pbl_cmd(FILE *fp_uboot)
-{
-	struct stat st;
-	int fd = fileno(fp_uboot);
-
-	if (fstat(fd, &st) == -1) {
-		printf("Error: Could not determine u-boot image size. %s\n",
-			strerror(errno));
-		exit(EXIT_FAILURE);
-	}
-
-	next_pbl_cmd = 0x82000000 - st.st_size;
-}
-
 static void generate_pbl_cmd(void)
 {
 	uint32_t val = next_pbl_cmd;
@@ -69,8 +66,12 @@ static void pbl_fget(size_t size, FILE *stream)
 	unsigned char c;
 	int c_temp;
 
-	while (size && (c_temp = fgetc(stream)) != EOF) {
-		c = (unsigned char)c_temp;
+	while (size) {
+		c_temp = fgetc(stream);
+		if (c_temp != EOF)
+			c = (unsigned char)c_temp;
+		else if ((c_temp == EOF) && (arch_flag == IH_ARCH_ARM))
+			c = 0xff;
 		*pmem_buf++ = c;
 		pbl_size++;
 		size--;
@@ -80,8 +81,8 @@ static void pbl_fget(size_t size, FILE *stream)
 /* load split u-boot with PBI command 81xxxxxx. */
 static void load_uboot(FILE *fp_uboot)
 {
-	init_next_pbl_cmd(fp_uboot);
-	while (next_pbl_cmd < 0x82000000) {
+	next_pbl_cmd = pbl_cmd_initaddr - uboot_size;
+	while (next_pbl_cmd < pbl_cmd_initaddr) {
 		generate_pbl_cmd();
 		pbl_fget(64, fp_uboot);
 	}
@@ -154,8 +155,6 @@ static uint32_t reverse_byte(uint32_t val)
 /* write end command and crc command to memory. */
 static void add_end_cmd(void)
 {
-	uint32_t pbl_end_cmd[4] = {0x09138000, 0x00000000,
-		0x091380c0, 0x00000000};
 	uint32_t crc32_pbl;
 	int i;
 	unsigned char *p = (unsigned char *)&pbl_end_cmd;
@@ -172,8 +171,8 @@ static void add_end_cmd(void)
 
 	/* Add PBI CRC command. */
 	*pmem_buf++ = 0x08;
-	*pmem_buf++ = 0x13;
-	*pmem_buf++ = 0x80;
+	*pmem_buf++ = pbi_crc_cmd1;
+	*pmem_buf++ = pbi_crc_cmd2;
 	*pmem_buf++ = 0x40;
 	pbl_size += 4;
 
@@ -184,17 +183,6 @@ static void add_end_cmd(void)
 	*pmem_buf++ = (crc32_pbl >> 8) & 0xff;
 	*pmem_buf++ = (crc32_pbl) & 0xff;
 	pbl_size += 4;
-
-	if ((pbl_size % 16) != 0) {
-		for (i = 0; i < 8; i++) {
-			*pmem_buf++ = 0x0;
-			pbl_size++;
-		}
-	}
-	if ((pbl_size % 16 != 0)) {
-		printf("Error: Bad size of image file\n");
-		exit(EXIT_FAILURE);
-	}
 }
 
 void pbl_load_uboot(int ifd, struct image_tool_params *params)
@@ -268,12 +256,64 @@ static void pblimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 	/*nothing need to do, pbl_load_uboot takes care of whole file. */
 }
 
+int pblimage_check_params(struct image_tool_params *params)
+{
+	FILE *fp_uboot;
+	int fd;
+	struct stat st;
+
+	if (!params)
+		return EXIT_FAILURE;
+
+	fp_uboot = fopen(params->datafile, "r");
+	if (fp_uboot == NULL) {
+		printf("Error: %s open failed\n", params->datafile);
+		exit(EXIT_FAILURE);
+	}
+	fd = fileno(fp_uboot);
+
+	if (fstat(fd, &st) == -1) {
+		printf("Error: Could not determine u-boot image size. %s\n",
+		       strerror(errno));
+		exit(EXIT_FAILURE);
+	}
+
+	/* For the variable size, we need to pad it to 64 byte boundary */
+	uboot_size = roundup(st.st_size, 64);
+
+	if (params->arch == IH_ARCH_ARM) {
+		arch_flag = IH_ARCH_ARM;
+		pbi_crc_cmd1 = 0x61;
+		pbi_crc_cmd2 = 0;
+		pbl_cmd_initaddr = params->addr & PBL_ADDR_24BIT_MASK;
+		pbl_cmd_initaddr |= PBL_ACS_CONT_CMD;
+		pbl_cmd_initaddr |= uboot_size;
+		pbl_end_cmd[0] = 0x09610000;
+		pbl_end_cmd[1] = 0x00000000;
+		pbl_end_cmd[2] = 0x096100c0;
+		pbl_end_cmd[3] = 0x00000000;
+	} else if (params->arch == IH_ARCH_PPC) {
+		arch_flag = IH_ARCH_PPC;
+		pbi_crc_cmd1 = 0x13;
+		pbi_crc_cmd2 = 0x80;
+		pbl_cmd_initaddr = 0x82000000;
+		pbl_end_cmd[0] = 0x09138000;
+		pbl_end_cmd[1] = 0x00000000;
+		pbl_end_cmd[2] = 0x091380c0;
+		pbl_end_cmd[3] = 0x00000000;
+	}
+
+	next_pbl_cmd = pbl_cmd_initaddr;
+	return 0;
+};
+
 /* pblimage parameters */
 static struct image_type_params pblimage_params = {
 	.name		= "Freescale PBL Boot Image support",
 	.header_size	= sizeof(struct pbl_header),
 	.hdr		= (void *)&pblimage_header,
 	.check_image_type = pblimage_check_image_types,
+	.check_params	= pblimage_check_params,
 	.verify_header	= pblimage_verify_header,
 	.print_header	= pblimage_print_header,
 	.set_header	= pblimage_set_header,
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 2/8] spl: Use u-boot.img instead of u-boot.bin

[Alison Wang]

In SD boot, the magic number of u-boot image will be checked.
For LS102xA, u-boot.bin doesn't have the magic number. So use
u-boot.img which includes the magic number instead of u-boot.bin
when producing u-boot-with-spl-pbl.bin.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
Change log:
 v3: No change.
 v2: No change.

 Makefile | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 164929e..f22d767 100644
--- a/Makefile
+++ b/Makefile
@@ -969,10 +969,16 @@ MKIMAGEFLAGS_u-boot-spl.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
 spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)
 
+ifeq ($(ARCH),arm)
+UBOOT_BINLOAD := u-boot.img
+else
+UBOOT_BINLOAD := u-boot.bin
+endif
+
 OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
 			  --gap-fill=0xff
 
-u-boot-with-spl-pbl.bin: spl/u-boot-spl.pbl u-boot.bin FORCE
+u-boot-with-spl-pbl.bin: spl/u-boot-spl.pbl $(UBOOT_BINLOAD) FORCE
 	$(call if_changed,pad_cat)
 
 # PPC4xx needs the SPL at the end of the image, since the reset vector
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 3/8] arm: spl: Add I2C linker list in generic .lds

[Alison Wang]

On LS1, DDR is initialized by reading SPD through I2C interface
in SPL code. For I2C, ll_entry_count() is called, and it returns
the number of elements of a linker-generated array placed into
subsection of .u_boot_list section specified by _list argument.
So add I2C linker list in the generic .lds to fix the issue about
using I2C in SPL.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
Change log:
 v3: No change.
 v2: New file.

 arch/arm/cpu/u-boot-spl.lds | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index 4beddf0..bddef74 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -32,6 +32,9 @@ SECTIONS
 	}
 
 	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*_i2c_*)));
+	}
 
 	. = .;
 
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[Alison Wang]

To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o,
command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for
drivers/ddr/fsl/interactive.c.

In current common/Makefile, the above .o files are only produced when
CONFIG_SPL_BUILD is disabled.

For LS102xA, interactive DDR debugger is needed in SD/NAND boot too, and
I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the current
common/Makfile, all the above .o files are not produced in SPL part
because CONFIG_SPL_BUILD is enabled in SPL part, the following error
will be shown,

drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive':
/home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871:
undefined reference to `cli_readline_into_buffer'
/home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873:
undefined reference to `cli_simple_parse_line'
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

So this patch fixed this issue and the above .o files will be produced
no matter CONFIG_SPL_BUILD is enabled or disabled.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
Change log:
 v3: Gave more explaination in the commit.
 v2: No change.

 common/Makefile | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/common/Makefile b/common/Makefile
index b19d379..a166e4c 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -8,22 +8,12 @@
 # core
 ifndef CONFIG_SPL_BUILD
 obj-y += main.o
-obj-y += command.o
 obj-y += exports.o
 obj-y += hash.o
 ifdef CONFIG_SYS_HUSH_PARSER
 obj-y += cli_hush.o
 endif
 
-# We always have this since drivers/ddr/fs/interactive.c needs it
-obj-y += cli_simple.o
-
-obj-y += cli.o
-obj-y += cli_readline.o
-obj-y += s_record.o
-obj-y += xyzModem.o
-obj-y += cmd_disk.o
-
 # This option is not just y/n - it can have a numeric value
 ifdef CONFIG_BOOTDELAY
 obj-y += autoboot.o
@@ -265,4 +255,14 @@ obj-y += aboot.o
 obj-y += fb_mmc.o
 endif
 
+# We always have this since drivers/ddr/fs/interactive.c needs it
+obj-y += cli_simple.o
+
+obj-y += cli.o
+obj-y += cli_readline.o
+obj-y += command.o
+obj-y += s_record.o
+obj-y += xyzModem.o
+obj-y += cmd_disk.o
+
 CFLAGS_env_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools/envcrc 2>/dev/null)
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 5/8] ls102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro

[Alison Wang]

Through adding CONFIG_QIXIS_I2C_ACCESS macro,
QIXIS_READ(reg)/QIXIS_WRITE(reg, value) can be used
for both i2c and ifc access to QIXIS FPGA. This is
more convenient for coding.

Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
Change log: 
 v3: No change.
 v2: No change.

 board/freescale/common/qixis.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h
index d8fed14..52d2021 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -100,8 +100,15 @@ u8 qixis_read_i2c(unsigned int reg);
 void qixis_write_i2c(unsigned int reg, u8 value);
 #endif
 
+#if defined(CONFIG_QIXIS_I2C_ACCESS) && defined(CONFIG_SYS_I2C_FPGA_ADDR)
+#define QIXIS_READ(reg) qixis_read_i2c(offsetof(struct qixis, reg))
+#define QIXIS_WRITE(reg, value) \
+	qixis_write_i2c(offsetof(struct qixis, reg), value)
+#else
 #define QIXIS_READ(reg) qixis_read(offsetof(struct qixis, reg))
 #define QIXIS_WRITE(reg, value) qixis_write(offsetof(struct qixis, reg), value)
+#endif
+
 #ifdef CONFIG_SYS_I2C_FPGA_ADDR
 #define QIXIS_READ_I2C(reg) qixis_read_i2c(offsetof(struct qixis, reg))
 #define QIXIS_WRITE_I2C(reg, value) \
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 6/8] arm: ls102xa: Add SD boot support for LS1021AQDS board

[Alison Wang]

This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
---
Change log:
 v3: Update MAINTAINERS file.
     Update PBI and RCW for SD boot.
 v2: Use generic u-boot-spl.lds. 

 arch/arm/cpu/armv7/ls102xa/Makefile           |  1 +
 arch/arm/cpu/armv7/ls102xa/spl.c              | 33 ++++++++++++++
 arch/arm/include/asm/arch-ls102xa/spl.h       | 20 ++++++++
 board/freescale/ls1021aqds/MAINTAINERS        |  1 +
 board/freescale/ls1021aqds/ddr.c              |  5 +-
 board/freescale/ls1021aqds/ls1021aqds.c       | 31 +++++++++++++
 board/freescale/ls1021aqds/ls102xa_pbi.cfg    | 12 +++++
 board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg | 14 ++++++
 configs/ls1021aqds_sdcard_defconfig           |  4 ++
 include/configs/ls1021aqds.h                  | 66 +++++++++++++++++++++++++++
 10 files changed, 186 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv7/ls102xa/spl.c
 create mode 100644 arch/arm/include/asm/arch-ls102xa/spl.h
 create mode 100644 board/freescale/ls1021aqds/ls102xa_pbi.cfg
 create mode 100644 board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg
 create mode 100644 configs/ls1021aqds_sdcard_defconfig

diff --git a/arch/arm/cpu/armv7/ls102xa/Makefile b/arch/arm/cpu/armv7/ls102xa/Makefile
index d82ce8d..56ef3a7 100644
--- a/arch/arm/cpu/armv7/ls102xa/Makefile
+++ b/arch/arm/cpu/armv7/ls102xa/Makefile
@@ -10,3 +10,4 @@ obj-y	+= timer.o
 
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o
+obj-$(CONFIG_SPL) += spl.o
diff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c
new file mode 100644
index 0000000..1dfbf54
--- /dev/null
+++ b/arch/arm/cpu/armv7/ls102xa/spl.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+
+u32 spl_boot_device(void)
+{
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	return BOOT_DEVICE_MMC1;
+#endif
+	return BOOT_DEVICE_NAND;
+}
+
+u32 spl_boot_mode(void)
+{
+	switch (spl_boot_device()) {
+	case BOOT_DEVICE_MMC1:
+#ifdef CONFIG_SPL_FAT_SUPPORT
+		return MMCSD_MODE_FAT;
+#else
+		return MMCSD_MODE_RAW;
+#endif
+	case BOOT_DEVICE_NAND:
+		return 0;
+	default:
+		puts("spl: error: unsupported device\n");
+		hang();
+	}
+}
diff --git a/arch/arm/include/asm/arch-ls102xa/spl.h b/arch/arm/include/asm/arch-ls102xa/spl.h
new file mode 100644
index 0000000..26e4ea1
--- /dev/null
+++ b/arch/arm/include/asm/arch-ls102xa/spl.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_SPL_H__
+#define __ASM_ARCH_SPL_H__
+
+#define BOOT_DEVICE_NONE	0
+#define BOOT_DEVICE_XIP		1
+#define BOOT_DEVICE_XIPWAIT	2
+#define BOOT_DEVICE_NAND	3
+#define BOOT_DEVICE_ONENAND	4
+#define BOOT_DEVICE_MMC1	5
+#define BOOT_DEVICE_MMC2	6
+#define BOOT_DEVICE_MMC2_2	7
+#define BOOT_DEVICE_SPI		10
+
+#endif	/* __ASM_ARCH_SPL_H__ */
diff --git a/board/freescale/ls1021aqds/MAINTAINERS b/board/freescale/ls1021aqds/MAINTAINERS
index ccf4513..de11203 100644
--- a/board/freescale/ls1021aqds/MAINTAINERS
+++ b/board/freescale/ls1021aqds/MAINTAINERS
@@ -5,3 +5,4 @@ F:	board/freescale/ls1021aqds/
 F:	include/configs/ls1021aqds.h
 F:	configs/ls1021aqds_nor_defconfig
 F:	configs/ls1021aqds_ddr4_nor_defconfig
+F:	configs/ls1021aqds_sdcard_defconfig
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index 5898e33..a539ff9 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -153,9 +153,12 @@ phys_size_t initdram(int board_type)
 {
 	phys_size_t dram_size;
 
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)
 	puts("Initializing DDR....using SPD\n");
 	dram_size = fsl_ddr_sdram();
-
+#else
+	dram_size =  fsl_ddr_sdram_size();
+#endif
 	return dram_size;
 }
 
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index b744250..34f54ab 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -13,6 +13,7 @@
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>
+#include <spl.h>
 
 #include "../common/qixis.h"
 #include "ls1021aqds_qixis.h"
@@ -29,10 +30,13 @@ enum {
 int checkboard(void)
 {
 	char buf[64];
+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)
 	u8 sw;
+#endif
 
 	puts("Board: LS1021AQDS\n");
 
+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)
 	sw = QIXIS_READ(brdcfg[0]);
 	sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
 
@@ -46,6 +50,7 @@ int checkboard(void)
 		printf("IFCCard\n");
 	else
 		printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
+#endif
 
 	printf("Sys ID:0x%02x, Sys Ver: 0x%02x\n",
 	       QIXIS_READ(id), QIXIS_READ(arch));
@@ -154,6 +159,32 @@ int board_early_init_f(void)
 	return 0;
 }
 
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+
+	/* Set global data pointer */
+	gd = &gdata;
+
+	/* Clear the BSS */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	get_clocks();
+
+	preloader_console_init();
+
+#ifdef CONFIG_SPL_I2C_SUPPORT
+	i2c_init_all();
+#endif
+	out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);
+
+	dram_init();
+
+	board_init_r(NULL, 0);
+}
+#endif
+
 int config_board_mux(int ctrl_type)
 {
 	u8 reg12;
diff --git a/board/freescale/ls1021aqds/ls102xa_pbi.cfg b/board/freescale/ls1021aqds/ls102xa_pbi.cfg
new file mode 100644
index 0000000..f1a1b63
--- /dev/null
+++ b/board/freescale/ls1021aqds/ls102xa_pbi.cfg
@@ -0,0 +1,12 @@
+#PBI commands
+
+09570200 ffffffff
+09570158 00000300
+8940007c 21f47300
+
+#Configure Scratch register
+09ee0200 10000000
+#Configure alternate space
+09570158 00001000
+#Flush PBL data
+096100c0 000FFFFF
diff --git a/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg b/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg
new file mode 100644
index 0000000..4cdd2a5
--- /dev/null
+++ b/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg
@@ -0,0 +1,14 @@
+#PBL preamble and RCW header
+aa55aa55 01ee0100
+
+#enable IFC, disable QSPI and DSPI
+#0608000a 00000000 00000000 00000000
+#00000000 00404000 60025a00 21042000
+#00200000 00000000 00000000 01038000
+#00000000 001b1200 00000000 00000000
+
+#disable IFC, enable QSPI and DSPI
+0608000a 00000000 00000000 00000000
+60000000 00407900 60025a00 21046000
+00000000 00000000 00000000 00038000
+20024800 001b7200 00000000 00000000
diff --git a/configs/ls1021aqds_sdcard_defconfig b/configs/ls1021aqds_sdcard_defconfig
new file mode 100644
index 0000000..e03c3b4
--- /dev/null
+++ b/configs/ls1021aqds_sdcard_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_LS1021AQDS=y
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 7e78e78..71021cf 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -37,8 +37,47 @@ unsigned long get_board_sys_clk(void);
 unsigned long get_board_ddr_clk(void);
 #endif
 
+#if defined(CONFIG_SD_BOOT) || defined(CONFIG_QSPI_BOOT)
+#define CONFIG_SYS_CLK_FREQ            100000000
+#define CONFIG_DDR_CLK_FREQ            100000000
+#define CONFIG_QIXIS_I2C_ACCESS
+#else
 #define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
 #define CONFIG_DDR_CLK_FREQ		get_board_ddr_clk()
+#endif
+
+#ifdef CONFIG_RAMBOOT_PBL
+#define CONFIG_SYS_FSL_PBL_PBI	board/freescale/ls1021aqds/ls102xa_pbi.cfg
+#endif
+
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_SYS_FSL_PBL_RCW	board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LDSCRIPT	"arch/$(ARCH)/cpu/u-boot-spl.lds"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR		0xe8
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS		0x400
+
+#define CONFIG_SPL_TEXT_BASE		0x10000000
+#define CONFIG_SPL_MAX_SIZE		0x1a000
+#define CONFIG_SPL_STACK		0x1001d000
+#define CONFIG_SPL_PAD_TO		0x1c000
+#define CONFIG_SYS_TEXT_BASE		0x82000000
+
+#define CONFIG_SYS_SPL_MALLOC_START	0x80200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
+#define CONFIG_SPL_BSS_START_ADDR	0x80100000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
+#define CONFIG_SYS_MONITOR_LEN		0x80000
+#define CONFIG_SYS_NO_FLASH
+#endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE		0x67f80000
@@ -72,6 +111,7 @@ unsigned long get_board_ddr_clk(void);
 /*
  * IFC Definitions
  */
+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)
 #define CONFIG_FSL_IFC
 #define CONFIG_SYS_FLASH_BASE		0x60000000
 #define CONFIG_SYS_FLASH_BASE_PHYS	CONFIG_SYS_FLASH_BASE
@@ -164,6 +204,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMD_NAND
 
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
+#endif
 
 /*
  * QIXIS Definitions
@@ -325,7 +366,12 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_CMDLINE_EDITING
+
+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)
 #define CONFIG_CMD_IMLS
+#else
+#undef CONFIG_CMD_IMLS
+#endif
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		128
@@ -373,17 +419,37 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
+#else
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
+#endif
 
 /*
  * Environment
  */
 #define CONFIG_ENV_OVERWRITE
 
+#if defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET		(1024 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		0
+#define CONFIG_ENV_SIZE			0x2000
+#elif defined(CONFIG_NAND_BOOT)
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SIZE			0x2000
+#define CONFIG_ENV_OFFSET		(10 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE			0x2000          /* 8KB */
+#define CONFIG_ENV_OFFSET		0x100000        /* 1MB */
+#define CONFIG_ENV_SECT_SIZE		0x10000
+#else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_ENV_SECT_SIZE		0x20000 /* 128K (one sector) */
+#endif
 
 #define CONFIG_OF_LIBFDT
 #define CONFIG_OF_BOARD_SETUP
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[Albert ARIBAUD]

Hello Alison,

On Fri, 17 Oct 2014 16:00:30 +0800, Alison Wang <b18965@freescale.com>
wrote:
> To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o,
> command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for
> drivers/ddr/fsl/interactive.c.
> 
> In current common/Makefile, the above .o files are only produced when
> CONFIG_SPL_BUILD is disabled.
> 
> For LS102xA, interactive DDR debugger is needed in SD/NAND boot too, and
> I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the current
> common/Makfile, all the above .o files are not produced in SPL part
> because CONFIG_SPL_BUILD is enabled in SPL part, the following error
> will be shown,
> 
> drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive':
> /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871:
> undefined reference to `cli_readline_into_buffer'
> /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873:
> undefined reference to `cli_simple_parse_line'
> make[1]: *** [spl/u-boot-spl] Error 1
> make: *** [spl/u-boot-spl] Error 2
> 
> So this patch fixed this issue and the above .o files will be produced
> no matter CONFIG_SPL_BUILD is enabled or disabled.
> 
> Signed-off-by: Alison Wang <alison.wang@freescale.com>
> ---
> Change log:
>  v3: Gave more explaination in the commit.
>  v2: No change.

This does not apply cleanly. Could you rebase and resubmit?

Amicalement,
-- 
Albert.

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[Huan Wang]

Hello, Albert,

> On Fri, 17 Oct 2014 16:00:30 +0800, Alison Wang <b18965@freescale.com>
> wrote:
> > To support interactive DDR debugger, cli_simple.o, cli.o,
> > cli_readline.o, command.o, s_record.o, xyzModem.o and cmd_disk.o are
> > all needed for drivers/ddr/fsl/interactive.c.
> >
> > In current common/Makefile, the above .o files are only produced when
> > CONFIG_SPL_BUILD is disabled.
> >
> > For LS102xA, interactive DDR debugger is needed in SD/NAND boot too,
> > and I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the
> current
> > common/Makfile, all the above .o files are not produced in SPL part
> > because CONFIG_SPL_BUILD is enabled in SPL part, the following error
> > will be shown,
> >
> > drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive':
> > /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871:
> > undefined reference to `cli_readline_into_buffer'
> > /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873:
> > undefined reference to `cli_simple_parse_line'
> > make[1]: *** [spl/u-boot-spl] Error 1
> > make: *** [spl/u-boot-spl] Error 2
> >
> > So this patch fixed this issue and the above .o files will be
> produced
> > no matter CONFIG_SPL_BUILD is enabled or disabled.
> >
> > Signed-off-by: Alison Wang <alison.wang@freescale.com>
> > ---
> > Change log:
> >  v3: Gave more explaination in the commit.
> >  v2: No change.
> 
> This does not apply cleanly. Could you rebase and resubmit?
[Alison Wang] ok, I will rebase and resubmit the set. Thanks.


Best Regards,
Alison Wang

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[York Sun]

On 10/27/2014 02:29 AM, Albert ARIBAUD wrote:
> Hello Alison,
> 
> On Fri, 17 Oct 2014 16:00:30 +0800, Alison Wang <b18965@freescale.com>
> wrote:
>> To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o,
>> command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for
>> drivers/ddr/fsl/interactive.c.
>>
>> In current common/Makefile, the above .o files are only produced when
>> CONFIG_SPL_BUILD is disabled.
>>
>> For LS102xA, interactive DDR debugger is needed in SD/NAND boot too, and
>> I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the current
>> common/Makfile, all the above .o files are not produced in SPL part
>> because CONFIG_SPL_BUILD is enabled in SPL part, the following error
>> will be shown,
>>
>> drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive':
>> /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871:
>> undefined reference to `cli_readline_into_buffer'
>> /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873:
>> undefined reference to `cli_simple_parse_line'
>> make[1]: *** [spl/u-boot-spl] Error 1
>> make: *** [spl/u-boot-spl] Error 2
>>
>> So this patch fixed this issue and the above .o files will be produced
>> no matter CONFIG_SPL_BUILD is enabled or disabled.
>>
>> Signed-off-by: Alison Wang <alison.wang@freescale.com>
>> ---
>> Change log:
>>  v3: Gave more explaination in the commit.
>>  v2: No change.
> 
> This does not apply cleanly. Could you rebase and resubmit?
> 

Albert,

Are you trying to test/apply this patch?

York

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[York Sun]

On 10/27/2014 06:48 PM, Wang Huan-B18965 wrote:
> Hello, Albert,
> 

<snip>
>>> ---
>>> Change log:
>>>  v3: Gave more explaination in the commit.
>>>  v2: No change.
>>
>> This does not apply cleanly. Could you rebase and resubmit?
> [Alison Wang] ok, I will rebase and resubmit the set. Thanks.
> 

Alison,

Where are we on this patch? If you haven't sent an update, I can take this one
and resolve the conflict.

Albert,

This set primarily deals with FSL specific boards. I can take them in if you
don't see any issue with the patches (except the conflicts).

York

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[Albert ARIBAUD]

Hello York,

On Mon, 17 Nov 2014 15:00:42 -0800, York Sun <yorksun@freescale.com>
wrote:
> On 10/27/2014 06:48 PM, Wang Huan-B18965 wrote:
> > Hello, Albert,
> > 
> 
> <snip>
> >>> ---
> >>> Change log:
> >>>  v3: Gave more explaination in the commit.
> >>>  v2: No change.
> >>
> >> This does not apply cleanly. Could you rebase and resubmit?
> > [Alison Wang] ok, I will rebase and resubmit the set. Thanks.
> > 
> 
> Alison,
> 
> Where are we on this patch? If you haven't sent an update, I can take this one
> and resolve the conflict.
> 
> Albert,
> 
> This set primarily deals with FSL specific boards. I can take them in if you
> don't see any issue with the patches (except the conflicts).

Thanks York for the proposal, but I would prefer the patch to be
rebased and resubmitted, as rebasing does require some changes
which could be trivial, and thus be handled by the custodian, or not
trivial, and thus require review; best, therefore, to rebase and repost.

> York

Amicalement,
-- 
Albert.

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[York Sun]

On 11/17/2014 11:02 PM, Albert ARIBAUD wrote:
> Hello York,
> 
> On Mon, 17 Nov 2014 15:00:42 -0800, York Sun <yorksun@freescale.com>
> wrote:
>> On 10/27/2014 06:48 PM, Wang Huan-B18965 wrote:
>>> Hello, Albert,
>>>
>>
>> <snip>
>>>>> ---
>>>>> Change log:
>>>>>  v3: Gave more explaination in the commit.
>>>>>  v2: No change.
>>>>
>>>> This does not apply cleanly. Could you rebase and resubmit?
>>> [Alison Wang] ok, I will rebase and resubmit the set. Thanks.
>>>
>>
>> Alison,
>>
>> Where are we on this patch? If you haven't sent an update, I can take this one
>> and resolve the conflict.
>>
>> Albert,
>>
>> This set primarily deals with FSL specific boards. I can take them in if you
>> don't see any issue with the patches (except the conflicts).
> 
> Thanks York for the proposal, but I would prefer the patch to be
> rebased and resubmitted, as rebasing does require some changes
> which could be trivial, and thus be handled by the custodian, or not
> trivial, and thus require review; best, therefore, to rebase and repost.
> 

All right, then. Alison, please send a new set after you test it. I will mark
this set "change requested".

York

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[York Sun]

On 11/18/2014 09:07 AM, York Sun wrote:
> On 11/17/2014 11:02 PM, Albert ARIBAUD wrote:
>> Hello York,
>>
>> On Mon, 17 Nov 2014 15:00:42 -0800, York Sun <yorksun@freescale.com>
>> wrote:
>>> On 10/27/2014 06:48 PM, Wang Huan-B18965 wrote:
>>>> Hello, Albert,
>>>>
>>>
>>> <snip>
>>>>>> ---
>>>>>> Change log:
>>>>>>  v3: Gave more explaination in the commit.
>>>>>>  v2: No change.
>>>>>
>>>>> This does not apply cleanly. Could you rebase and resubmit?
>>>> [Alison Wang] ok, I will rebase and resubmit the set. Thanks.
>>>>
>>>
>>> Alison,
>>>
>>> Where are we on this patch? If you haven't sent an update, I can take this one
>>> and resolve the conflict.
>>>
>>> Albert,
>>>
>>> This set primarily deals with FSL specific boards. I can take them in if you
>>> don't see any issue with the patches (except the conflicts).
>>
>> Thanks York for the proposal, but I would prefer the patch to be
>> rebased and resubmitted, as rebasing does require some changes
>> which could be trivial, and thus be handled by the custodian, or not
>> trivial, and thus require review; best, therefore, to rebase and repost.
>>
> 
> All right, then. Alison, please send a new set after you test it. I will mark
> this set "change requested".
> 

Albert,

I haven't seen a new version yet. I need this patch to apply other patches. I
can fix the conflict in this patch. Do you mind if I take this v3 set? I think
other patches in this set are OK.

York

[U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR debugger support for SPL image

[Huan Wang]

Hi, York,

> On 11/17/2014 11:02 PM, Albert ARIBAUD wrote:
> > Hello York,
> >
> > On Mon, 17 Nov 2014 15:00:42 -0800, York Sun <yorksun@freescale.com>
> > wrote:
> >> On 10/27/2014 06:48 PM, Wang Huan-B18965 wrote:
> >>> Hello, Albert,
> >>>
> >>
> >> <snip>
> >>>>> ---
> >>>>> Change log:
> >>>>>  v3: Gave more explaination in the commit.
> >>>>>  v2: No change.
> >>>>
> >>>> This does not apply cleanly. Could you rebase and resubmit?
> >>> [Alison Wang] ok, I will rebase and resubmit the set. Thanks.
> >>>
> >>
> >> Alison,
> >>
> >> Where are we on this patch? If you haven't sent an update, I can
> take
> >> this one and resolve the conflict.
> >>
> >> Albert,
> >>
> >> This set primarily deals with FSL specific boards. I can take them
> in
> >> if you don't see any issue with the patches (except the conflicts).
> >
> > Thanks York for the proposal, but I would prefer the patch to be
> > rebased and resubmitted, as rebasing does require some changes which
> > could be trivial, and thus be handled by the custodian, or not
> > trivial, and thus require review; best, therefore, to rebase and
> repost.
> >
> 
> All right, then. Alison, please send a new set after you test it. I
> will mark this set "change requested".
[Alison Wang] I rebased, tested and submitted the new set. Please help to review it.
Thanks.

Best Regards,
Alison Wang