[PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements

[PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements

[Roger Quadros]

Hi Tony,

These patches address GPMC configuration issues and are for v3.19.
Patches based on v3.18-rc1.

- Make sure to print a user visible error if a requested GPMC timing
configuration can't be met.

- Don't create GPMC child device if a GPMC timing could not be set.

- Always enable address lines A26-A11 for non-NAND devices.

- Perform GPMC configuration as per recommended procedure i.e.
keep Chip Select disabled while changing GPMC configuration.

Tested on dra7-evm, am437x-gp-evm and beagleboard.

cheers,
-roger

Roger Quadros (5):
  ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()
  ARM: OMAP2+: gpmc: Error out if timings fail in
    gpmc_probe_generic_child()
  ARM: OMAP2+: gpmc: Always enable A26-A11 for non NAND devices
  ARM: OMAP2+: gpmc: Keep Chip Select disabled while configuring it
  ARM: OMAP2+: gpmc: Sanity check GPMC fck on probe

 arch/arm/mach-omap2/gpmc.c | 87 ++++++++++++++++++++++++++++------------------
 1 file changed, 54 insertions(+), 33 deletions(-)

-- 
1.8.3.2

[PATCH 1/5] ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()

[Roger Quadros]

Simplify set_gpmc_timing_reg() and always print error message
if the requested timing cannot be achieved due to a too fast
GPMC functional clock, irrespective if whether DEBUG is defined
or not. This should help us debug timing configuration issues,
which were otherwise simply not being displayed in the kernel log.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/gpmc.c | 23 ++++++-----------------
 1 file changed, 6 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5fa3755..45f680f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -283,13 +283,8 @@ static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p)
 			   p->cycle2cyclediffcsen);
 }
 
-#ifdef DEBUG
 static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
 			       int time, const char *name)
-#else
-static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
-			       int time)
-#endif
 {
 	u32 l;
 	int ticks, mask, nr_bits;
@@ -299,15 +294,15 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
 	else
 		ticks = gpmc_ns_to_ticks(time);
 	nr_bits = end_bit - st_bit + 1;
-	if (ticks >= 1 << nr_bits) {
-#ifdef DEBUG
-		printk(KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n",
-				cs, name, time, ticks, 1 << nr_bits);
-#endif
+	mask = (1 << nr_bits) - 1;
+
+	if (ticks > mask) {
+		pr_err("%s: GPMC error! CS%d: %s: %d ns, %d ticks > %d\n",
+		       __func__, cs, name, time, ticks, mask);
+
 		return -1;
 	}
 
-	mask = (1 << nr_bits) - 1;
 	l = gpmc_cs_read_reg(cs, reg);
 #ifdef DEBUG
 	printk(KERN_INFO
@@ -322,16 +317,10 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
 	return 0;
 }
 
-#ifdef DEBUG
 #define GPMC_SET_ONE(reg, st, end, field) \
 	if (set_gpmc_timing_reg(cs, (reg), (st), (end),		\
 			t->field, #field) < 0)			\
 		return -1
-#else
-#define GPMC_SET_ONE(reg, st, end, field) \
-	if (set_gpmc_timing_reg(cs, (reg), (st), (end), t->field) < 0) \
-		return -1
-#endif
 
 int gpmc_calc_divider(unsigned int sync_clk)
 {
-- 
1.8.3.2

[PATCH 2/5] ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()

[Roger Quadros]

gpmc_cs_set_timings() returns non-zero if there was
an error while setting the GPMC timings. e.g. Timing was too
large to be accomodated with current GPMC clock frequency and available
timing range. Fail in this case, else we risk operating a NOR device
with non compliant timings.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/gpmc.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 45f680f..f5d9dd2 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1562,7 +1562,12 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
 		goto err;
 
 	gpmc_read_timings_dt(child, &gpmc_t);
-	gpmc_cs_set_timings(cs, &gpmc_t);
+	ret = gpmc_cs_set_timings(cs, &gpmc_t);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to set gpmc timings for: %s\n",
+			child->name);
+		goto err;
+	}
 
 no_timings:
 	if (of_platform_device_create(child, NULL, &pdev->dev))
-- 
1.8.3.2

[PATCH 3/5] ARM: OMAP2+: gpmc: Always enable A26-A11 for non NAND devices

[Roger Quadros]

Although RESET state of LIMITEDADDRESS bit in GPMC_CONFIG register
is 0 (i.e. A26-A11 enabled), faulty bootloaders might accidentally
set this bit. e.g. u-boot 2014.07 with CONFIG_NOR disabled.

Explicity disable LIMITEDADDRESS bit for non NAND devices so that
they can always work.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/gpmc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f5d9dd2..0ba95d3 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -85,6 +85,8 @@
 #define GPMC_ECC_CTRL_ECCREG8		0x008
 #define GPMC_ECC_CTRL_ECCREG9		0x009
 
+#define GPMC_CONFIG_LIMITEDADDRESS		BIT(1)
+
 #define	GPMC_CONFIG2_CSEXTRADELAY		BIT(7)
 #define	GPMC_CONFIG3_ADVEXTRADELAY		BIT(7)
 #define	GPMC_CONFIG4_OEEXTRADELAY		BIT(7)
@@ -1501,6 +1503,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
 	struct resource res;
 	unsigned long base;
 	int ret, cs;
+	u32 val;
 
 	if (of_property_read_u32(child, "reg", &cs) < 0) {
 		dev_err(&pdev->dev, "%s has no 'reg' property\n",
@@ -1569,6 +1572,11 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
 		goto err;
 	}
 
+	/* Clear limited address i.e. enable A26-A11 */
+	val = gpmc_read_reg(GPMC_CONFIG);
+	val &= ~GPMC_CONFIG_LIMITEDADDRESS;
+	gpmc_write_reg(GPMC_CONFIG, val);
+
 no_timings:
 	if (of_platform_device_create(child, NULL, &pdev->dev))
 		return 0;
-- 
1.8.3.2

[PATCH 4/5] ARM: OMAP2+: gpmc: Keep Chip Select disabled while configuring it

[Roger Quadros]

As per the OMAP reference manual [1], the Chip Select must be
disabled (i.e. CSVALID is 0) while configuring any of the
Chip select parameters.

[1] - 10.1.5.1 Chip-Select Base Address and Region Size Configuration
http://www.ti.com/lit/pdf/swpu177

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/gpmc.c | 34 +++++++++++++++++++++++++++-------
 1 file changed, 27 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 0ba95d3..437fb6f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -397,7 +397,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
 	return 0;
 }
 
-static int gpmc_cs_enable_mem(int cs, u32 base, u32 size)
+static int gpmc_cs_set_memconf(int cs, u32 base, u32 size)
 {
 	u32 l;
 	u32 mask;
@@ -421,6 +421,15 @@ static int gpmc_cs_enable_mem(int cs, u32 base, u32 size)
 	return 0;
 }
 
+static void gpmc_cs_enable_mem(int cs)
+{
+	u32 l;
+
+	l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
+	l |= GPMC_CONFIG7_CSVALID;
+	gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
+}
+
 static void gpmc_cs_disable_mem(int cs)
 {
 	u32 l;
@@ -532,18 +541,18 @@ static int gpmc_cs_remap(int cs, u32 base)
 	gpmc_cs_get_memconf(cs, &old_base, &size);
 	if (base == old_base)
 		return 0;
-	gpmc_cs_disable_mem(cs);
+
 	ret = gpmc_cs_delete_mem(cs);
 	if (ret < 0)
 		return ret;
+
 	ret = gpmc_cs_insert_mem(cs, base, size);
 	if (ret < 0)
 		return ret;
-	ret = gpmc_cs_enable_mem(cs, base, size);
-	if (ret < 0)
-		return ret;
 
-	return 0;
+	ret = gpmc_cs_set_memconf(cs, base, size);
+
+	return ret;
 }
 
 int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
@@ -572,12 +581,17 @@ int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
 	if (r < 0)
 		goto out;
 
-	r = gpmc_cs_enable_mem(cs, res->start, resource_size(res));
+	/* Disable CS while changing base address and size mask */
+	gpmc_cs_disable_mem(cs);
+
+	r = gpmc_cs_set_memconf(cs, res->start, resource_size(res));
 	if (r < 0) {
 		release_resource(res);
 		goto out;
 	}
 
+	/* Enable CS */
+	gpmc_cs_enable_mem(cs);
 	*base = res->start;
 	gpmc_cs_set_reserved(cs, 1);
 out:
@@ -1539,6 +1553,9 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
 		goto no_timings;
 	}
 
+	/* CS must be disabled while making changes to gpmc configuration */
+	gpmc_cs_disable_mem(cs);
+
 	/*
 	 * FIXME: gpmc_cs_request() will map the CS to an arbitary
 	 * location in the gpmc address space. When booting with
@@ -1577,6 +1594,9 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
 	val &= ~GPMC_CONFIG_LIMITEDADDRESS;
 	gpmc_write_reg(GPMC_CONFIG, val);
 
+	/* Enable CS region */
+	gpmc_cs_enable_mem(cs);
+
 no_timings:
 	if (of_platform_device_create(child, NULL, &pdev->dev))
 		return 0;
-- 
1.8.3.2

[PATCH 5/5] ARM: OMAP2+: gpmc: Sanity check GPMC fck on probe

[Roger Quadros]

This prevents potential division by zero errors
if GPMC fck turns out to be zero due to faulty clock
data.

Use resource managed clk_get() API.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/gpmc.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 437fb6f..104bc2c 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -204,11 +204,6 @@ static unsigned long gpmc_get_fclk_period(void)
 {
 	unsigned long rate = clk_get_rate(gpmc_l3_clk);
 
-	if (rate == 0) {
-		printk(KERN_WARNING "gpmc_l3_clk not enabled\n");
-		return 0;
-	}
-
 	rate /= 1000;
 	rate = 1000000000 / rate;	/* In picoseconds */
 
@@ -1692,13 +1687,18 @@ static int gpmc_probe(struct platform_device *pdev)
 	else
 		gpmc_irq = res->start;
 
-	gpmc_l3_clk = clk_get(&pdev->dev, "fck");
+	gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck");
 	if (IS_ERR(gpmc_l3_clk)) {
-		dev_err(&pdev->dev, "error: clk_get\n");
+		dev_err(&pdev->dev, "Failed to get GPMC fck\n");
 		gpmc_irq = 0;
 		return PTR_ERR(gpmc_l3_clk);
 	}
 
+	if (!clk_get_rate(gpmc_l3_clk)) {
+		dev_err(&pdev->dev, "Invalid GPMC fck clock rate\n");
+		return -EINVAL;
+	}
+
 	pm_runtime_enable(&pdev->dev);
 	pm_runtime_get_sync(&pdev->dev);
 
@@ -1741,7 +1741,6 @@ static int gpmc_probe(struct platform_device *pdev)
 	rc = gpmc_probe_dt(pdev);
 	if (rc < 0) {
 		pm_runtime_put_sync(&pdev->dev);
-		clk_put(gpmc_l3_clk);
 		dev_err(gpmc_dev, "failed to probe DT parameters\n");
 		return rc;
 	}
-- 
1.8.3.2

Re: [PATCH 1/5] ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141021 05:43]:
> Simplify set_gpmc_timing_reg() and always print error message
> if the requested timing cannot be achieved due to a too fast
> GPMC functional clock, irrespective if whether DEBUG is defined
> or not. This should help us debug timing configuration issues,
> which were otherwise simply not being displayed in the kernel log.

I think some newer versions of GPMC have a divider in the
GPMC_CONFIG regs somewhere but we're not currently using it.
Probably does not affect this patch, just FYI.

Regards,

Tony
 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---
>  arch/arm/mach-omap2/gpmc.c | 23 ++++++-----------------
>  1 file changed, 6 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
> index 5fa3755..45f680f 100644
> --- a/arch/arm/mach-omap2/gpmc.c
> +++ b/arch/arm/mach-omap2/gpmc.c
> @@ -283,13 +283,8 @@ static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p)
>  			   p->cycle2cyclediffcsen);
>  }
>  
> -#ifdef DEBUG
>  static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
>  			       int time, const char *name)
> -#else
> -static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
> -			       int time)
> -#endif
>  {
>  	u32 l;
>  	int ticks, mask, nr_bits;
> @@ -299,15 +294,15 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
>  	else
>  		ticks = gpmc_ns_to_ticks(time);
>  	nr_bits = end_bit - st_bit + 1;
> -	if (ticks >= 1 << nr_bits) {
> -#ifdef DEBUG
> -		printk(KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n",
> -				cs, name, time, ticks, 1 << nr_bits);
> -#endif
> +	mask = (1 << nr_bits) - 1;
> +
> +	if (ticks > mask) {
> +		pr_err("%s: GPMC error! CS%d: %s: %d ns, %d ticks > %d\n",
> +		       __func__, cs, name, time, ticks, mask);
> +
>  		return -1;
>  	}
>  
> -	mask = (1 << nr_bits) - 1;
>  	l = gpmc_cs_read_reg(cs, reg);
>  #ifdef DEBUG
>  	printk(KERN_INFO
> @@ -322,16 +317,10 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
>  	return 0;
>  }
>  
> -#ifdef DEBUG
>  #define GPMC_SET_ONE(reg, st, end, field) \
>  	if (set_gpmc_timing_reg(cs, (reg), (st), (end),		\
>  			t->field, #field) < 0)			\
>  		return -1
> -#else
> -#define GPMC_SET_ONE(reg, st, end, field) \
> -	if (set_gpmc_timing_reg(cs, (reg), (st), (end), t->field) < 0) \
> -		return -1
> -#endif
>  
>  int gpmc_calc_divider(unsigned int sync_clk)
>  {
> -- 
> 1.8.3.2
> 

Re: [PATCH 1/5] ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()

[Roger Quadros]

On 10/29/2014 12:23 AM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [141021 05:43]:
>> Simplify set_gpmc_timing_reg() and always print error message
>> if the requested timing cannot be achieved due to a too fast
>> GPMC functional clock, irrespective if whether DEBUG is defined
>> or not. This should help us debug timing configuration issues,
>> which were otherwise simply not being displayed in the kernel log.
> 
> I think some newer versions of GPMC have a divider in the
> GPMC_CONFIG regs somewhere but we're not currently using it.
> Probably does not affect this patch, just FYI.

Right, we don't use it. In the future it could be a possibility that the GPMC
driver scales the clock as necessary by using the GPMC_FCLK divider
to accommodate slower devices. But then again, who needs slower devices? ;)

cheers,
-roger

Re: [PATCH 1/5] ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141029 01:51]:
> On 10/29/2014 12:23 AM, Tony Lindgren wrote:
> > * Roger Quadros <rogerq@ti.com> [141021 05:43]:
> >> Simplify set_gpmc_timing_reg() and always print error message
> >> if the requested timing cannot be achieved due to a too fast
> >> GPMC functional clock, irrespective if whether DEBUG is defined
> >> or not. This should help us debug timing configuration issues,
> >> which were otherwise simply not being displayed in the kernel log.
> > 
> > I think some newer versions of GPMC have a divider in the
> > GPMC_CONFIG regs somewhere but we're not currently using it.
> > Probably does not affect this patch, just FYI.
> 
> Right, we don't use it. In the future it could be a possibility that the GPMC
> driver scales the clock as necessary by using the GPMC_FCLK divider
> to accommodate slower devices. But then again, who needs slower devices? ;)

I think some devices need such slow timings that we're already
hitting the issue with 200MHz L3 on 37xx connected to a SMSC
LAN9220 at least. With LAN9221 this is not an issue with faster
timings. Anyways, I think the issue is out of the way now with
LAN9220 and GPMC_FCLK divider support can be added later on as
needed.

Regards,

Tony

Re: [PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141021 05:43]:
> Hi Tony,
> 
> These patches address GPMC configuration issues and are for v3.19.
> Patches based on v3.18-rc1.
> 
> - Make sure to print a user visible error if a requested GPMC timing
> configuration can't be met.
> 
> - Don't create GPMC child device if a GPMC timing could not be set.
> 
> - Always enable address lines A26-A11 for non-NAND devices.
> 
> - Perform GPMC configuration as per recommended procedure i.e.
> keep Chip Select disabled while changing GPMC configuration.
> 
> Tested on dra7-evm, am437x-gp-evm and beagleboard.

For all these, please feel free to add:

Acked-by: Tony Lindgren <tony@atomide.com>

Re: [PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements

[Roger Quadros]

On 10/30/2014 05:10 PM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [141021 05:43]:
>> Hi Tony,
>>
>> These patches address GPMC configuration issues and are for v3.19.
>> Patches based on v3.18-rc1.
>>
>> - Make sure to print a user visible error if a requested GPMC timing
>> configuration can't be met.
>>
>> - Don't create GPMC child device if a GPMC timing could not be set.
>>
>> - Always enable address lines A26-A11 for non-NAND devices.
>>
>> - Perform GPMC configuration as per recommended procedure i.e.
>> keep Chip Select disabled while changing GPMC configuration.
>>
>> Tested on dra7-evm, am437x-gp-evm and beagleboard.
> 
> For all these, please feel free to add:
> 
> Acked-by: Tony Lindgren <tony@atomide.com>
> 

Thanks. These patches are now available at

git@github.com:rogerq/linux.git		for-v3.19/gpmc-omap


cheers,
-roger

Re: [PATCH 2/5] ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141021 05:43]:
> gpmc_cs_set_timings() returns non-zero if there was
> an error while setting the GPMC timings. e.g. Timing was too
> large to be accomodated with current GPMC clock frequency and available
> timing range. Fail in this case, else we risk operating a NOR device
> with non compliant timings.

With the error checks now enabled properly, I noticed our
LAN9220 timings are overflowing. So we need the following
patch to switch over to use the known working u-boot timings.
Otherwise NFSroot will fail on quite a few boards.

Regards,

Tony

8< --------------------
From: Tony Lindgren <tony@atomide.com>
Date: Mon, 3 Nov 2014 16:33:14 -0800
Subject: [PATCH] ARM: dts: Use better omap GPMC timings for LAN9220

With the GPMC warnings now enabled, I noticed the LAN9220 timings
can overflow the GPMC registers with 200MHz L3 speed. Earlier we
were just skipping the bad timings and would continue with the
bootloader timings. Now we no longer allow to continue with bad
timings as we have the timings in the .dts files.

We could start using the GPMC clock divider, but let's instead
use the u-boot timings that are known to be working and a bit
faster. These are basically the u-boot NET_GPMC_CONFIG[1-6]
defines deciphered.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -23,24 +23,30 @@
 	ethernet@gpmc {
 		compatible = "smsc,lan9221", "smsc,lan9115";
 		bank-width = <2>;
-		gpmc,mux-add-data;
-		gpmc,cs-on-ns = <1>;
-		gpmc,cs-rd-off-ns = <180>;
-		gpmc,cs-wr-off-ns = <180>;
-		gpmc,adv-rd-off-ns = <18>;
-		gpmc,adv-wr-off-ns = <48>;
-		gpmc,oe-on-ns = <54>;
-		gpmc,oe-off-ns = <168>;
-		gpmc,we-on-ns = <54>;
-		gpmc,we-off-ns = <168>;
-		gpmc,rd-cycle-ns = <186>;
-		gpmc,wr-cycle-ns = <186>;
-		gpmc,access-ns = <144>;
-		gpmc,page-burst-access-ns = <24>;
-		gpmc,bus-turnaround-ns = <90>;
-		gpmc,cycle2cycle-delay-ns = <90>;
-		gpmc,cycle2cycle-samecsen;
-		gpmc,cycle2cycle-diffcsen;
+		gpmc,device-width = <1>;
+		gpmc,burst-length = <4>;
+		gpmc,cycle2cycle-samecsen = <1>;
+		gpmc,cycle2cycle-diffcsen = <1>;
+		gpmc,cs-on-ns = <5>;
+		gpmc,cs-rd-off-ns = <150>;
+		gpmc,cs-wr-off-ns = <150>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <15>;
+		gpmc,adv-wr-off-ns = <40>;
+		gpmc,oe-on-ns = <45>;
+		gpmc,oe-off-ns = <140>;
+		gpmc,we-on-ns = <45>;
+		gpmc,we-off-ns = <140>;
+		gpmc,rd-cycle-ns = <155>;
+		gpmc,wr-cycle-ns = <155>;
+		gpmc,access-ns = <120>;
+		gpmc,page-burst-access-ns = <20>;
+		gpmc,bus-turnaround-ns = <75>;
+		gpmc,cycle2cycle-delay-ns = <75>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,clk-activation-ns = <0>;
+		gpmc,wr-data-mux-bus-ns = <0>;
+		gpmc,wr-access-ns = <0>;
 		vddvario-supply = <&vddvario>;
 		vdd33a-supply = <&vdd33a>;
 		reg-io-width = <4>;
diff --git a/arch/arm/boot/dts/omap3-sb-t35.dtsi b/arch/arm/boot/dts/omap3-sb-t35.dtsi
index d59e3de..fbbb455 100644
--- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
+++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
@@ -22,24 +22,30 @@
 		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 		reg = <4 0 0xff>;
 		bank-width = <2>;
-		gpmc,mux-add-data;
-		gpmc,cs-on-ns = <1>;
-		gpmc,cs-rd-off-ns = <180>;
-		gpmc,cs-wr-off-ns = <180>;
-		gpmc,adv-rd-off-ns = <18>;
-		gpmc,adv-wr-off-ns = <48>;
-		gpmc,oe-on-ns = <54>;
-		gpmc,oe-off-ns = <168>;
-		gpmc,we-on-ns = <54>;
-		gpmc,we-off-ns = <168>;
-		gpmc,rd-cycle-ns = <186>;
-		gpmc,wr-cycle-ns = <186>;
-		gpmc,access-ns = <144>;
-		gpmc,page-burst-access-ns = <24>;
-		gpmc,bus-turnaround-ns = <90>;
-		gpmc,cycle2cycle-delay-ns = <90>;
-		gpmc,cycle2cycle-samecsen;
-		gpmc,cycle2cycle-diffcsen;
+		gpmc,device-width = <1>;
+		gpmc,burst-length = <4>;
+		gpmc,cycle2cycle-samecsen = <1>;
+		gpmc,cycle2cycle-diffcsen = <1>;
+		gpmc,cs-on-ns = <5>;
+		gpmc,cs-rd-off-ns = <150>;
+		gpmc,cs-wr-off-ns = <150>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <15>;
+		gpmc,adv-wr-off-ns = <40>;
+		gpmc,oe-on-ns = <45>;
+		gpmc,oe-off-ns = <140>;
+		gpmc,we-on-ns = <45>;
+		gpmc,we-off-ns = <140>;
+		gpmc,rd-cycle-ns = <155>;
+		gpmc,wr-cycle-ns = <155>;
+		gpmc,access-ns = <120>;
+		gpmc,page-burst-access-ns = <20>;
+		gpmc,bus-turnaround-ns = <75>;
+		gpmc,cycle2cycle-delay-ns = <75>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,clk-activation-ns = <0>;
+		gpmc,wr-data-mux-bus-ns = <0>;
+		gpmc,wr-access-ns = <0>;
 		vddvario-supply = <&vddvario>;
 		vdd33a-supply = <&vdd33a>;
 		reg-io-width = <4>;

Re: [PATCH 2/5] ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [141103 16:48]:
> --- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
> +++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
> +		gpmc,device-width = <1>;
> +		gpmc,burst-length = <4>;

I've left out the gpmc,burst-length as that produces now
warnings about not being used and does not seem to work if
enabled.

> --- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
> +++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
> +		gpmc,device-width = <1>;
> +		gpmc,burst-length = <4>;

And here too.

Regards,

Tony

Re: [PATCH 2/5] ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()

[Roger Quadros]

On 11/04/2014 03:14 AM, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [141103 16:48]:
>> --- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
>> +++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
>> +		gpmc,device-width = <1>;
>> +		gpmc,burst-length = <4>;
> 
> I've left out the gpmc,burst-length as that produces now
> warnings about not being used and does not seem to work if
> enabled.

OK. Seems like it must be used together with either 'gpmc,burst-read'
or/and 'gpmc,burst-write'

cheers,
-roger

> 
>> --- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
>> +++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
>> +		gpmc,device-width = <1>;
>> +		gpmc,burst-length = <4>;
> 
> And here too.
> 
> Regards,
> 
> Tony
> 

Re: [PATCH 2/5] ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141104 01:04]:
> On 11/04/2014 03:14 AM, Tony Lindgren wrote:
> > * Tony Lindgren <tony@atomide.com> [141103 16:48]:
> >> --- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
> >> +++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
> >> +		gpmc,device-width = <1>;
> >> +		gpmc,burst-length = <4>;
> > 
> > I've left out the gpmc,burst-length as that produces now
> > warnings about not being used and does not seem to work if
> > enabled.
> 
> OK. Seems like it must be used together with either 'gpmc,burst-read'
> or/and 'gpmc,burst-write'

Yes I did a quick test trying to enable both or one of those,
but that won't for smsc911x.

Regards,

Tony

Re: [PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141030 08:25]:
> On 10/30/2014 05:10 PM, Tony Lindgren wrote:
> > * Roger Quadros <rogerq@ti.com> [141021 05:43]:
> >> Hi Tony,
> >>
> >> These patches address GPMC configuration issues and are for v3.19.
> >> Patches based on v3.18-rc1.
> >>
> >> - Make sure to print a user visible error if a requested GPMC timing
> >> configuration can't be met.
> >>
> >> - Don't create GPMC child device if a GPMC timing could not be set.
> >>
> >> - Always enable address lines A26-A11 for non-NAND devices.
> >>
> >> - Perform GPMC configuration as per recommended procedure i.e.
> >> keep Chip Select disabled while changing GPMC configuration.
> >>
> >> Tested on dra7-evm, am437x-gp-evm and beagleboard.
> > 
> > For all these, please feel free to add:
> > 
> > Acked-by: Tony Lindgren <tony@atomide.com>
> > 
> 
> Thanks. These patches are now available at
> 
> git@github.com:rogerq/linux.git		for-v3.19/gpmc-omap
> 

Merged these on top of the patches I did to omap-for-v3.19/gpmc.
There were few merge conflicts so you may want to check.

Regards,

Tony

Re: [PATCH 1/5] ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()

[pekon]

On Tuesday 21 October 2014 06:11 PM, Roger Quadros wrote:
> Simplify set_gpmc_timing_reg() and always print error message
> if the requested timing cannot be achieved due to a too fast
> GPMC functional clock, irrespective if whether DEBUG is defined
> or not. This should help us debug timing configuration issues,
> which were otherwise simply not being displayed in the kernel log.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---

Thanks for this patch.
Its helpful in tweaking NAND signal timing, while trying to squeeze 
read/write performance especially with new NAND devices.


with regards, pekon

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Re: [PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements

[Roger Quadros]

On 11/04/2014 07:49 PM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [141030 08:25]:
>> On 10/30/2014 05:10 PM, Tony Lindgren wrote:
>>> * Roger Quadros <rogerq@ti.com> [141021 05:43]:
>>>> Hi Tony,
>>>>
>>>> These patches address GPMC configuration issues and are for v3.19.
>>>> Patches based on v3.18-rc1.
>>>>
>>>> - Make sure to print a user visible error if a requested GPMC timing
>>>> configuration can't be met.
>>>>
>>>> - Don't create GPMC child device if a GPMC timing could not be set.
>>>>
>>>> - Always enable address lines A26-A11 for non-NAND devices.
>>>>
>>>> - Perform GPMC configuration as per recommended procedure i.e.
>>>> keep Chip Select disabled while changing GPMC configuration.
>>>>
>>>> Tested on dra7-evm, am437x-gp-evm and beagleboard.
>>>
>>> For all these, please feel free to add:
>>>
>>> Acked-by: Tony Lindgren <tony@atomide.com>
>>>
>>
>> Thanks. These patches are now available at
>>
>> git@github.com:rogerq/linux.git		for-v3.19/gpmc-omap
>>
> 
> Merged these on top of the patches I did to omap-for-v3.19/gpmc.
> There were few merge conflicts so you may want to check.

Thanks. The conflict resolution seems fine.
I've also tested NAND to be fine on am335x-evm, am437x-evm and dra7-evm.

cheers,
-roger

Re: [PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141105 04:47]:
> On 11/04/2014 07:49 PM, Tony Lindgren wrote:
> > * Roger Quadros <rogerq@ti.com> [141030 08:25]:
> >> On 10/30/2014 05:10 PM, Tony Lindgren wrote:
> >>> * Roger Quadros <rogerq@ti.com> [141021 05:43]:
> >>>> Hi Tony,
> >>>>
> >>>> These patches address GPMC configuration issues and are for v3.19.
> >>>> Patches based on v3.18-rc1.
> >>>>
> >>>> - Make sure to print a user visible error if a requested GPMC timing
> >>>> configuration can't be met.
> >>>>
> >>>> - Don't create GPMC child device if a GPMC timing could not be set.
> >>>>
> >>>> - Always enable address lines A26-A11 for non-NAND devices.
> >>>>
> >>>> - Perform GPMC configuration as per recommended procedure i.e.
> >>>> keep Chip Select disabled while changing GPMC configuration.
> >>>>
> >>>> Tested on dra7-evm, am437x-gp-evm and beagleboard.
> >>>
> >>> For all these, please feel free to add:
> >>>
> >>> Acked-by: Tony Lindgren <tony@atomide.com>
> >>>
> >>
> >> Thanks. These patches are now available at
> >>
> >> git@github.com:rogerq/linux.git		for-v3.19/gpmc-omap
> >>
> > 
> > Merged these on top of the patches I did to omap-for-v3.19/gpmc.
> > There were few merge conflicts so you may want to check.
> 
> Thanks. The conflict resolution seems fine.
> I've also tested NAND to be fine on am335x-evm, am437x-evm and dra7-evm.

OK great thanks,

Tony