[U-Boot] [PATCH v1 0/3] arm, at91: taurus board updates

[U-Boot] [PATCH v1 0/3] arm, at91: taurus board updates

[Heiko Schocher]

This series enables THUMB mode in SPL for the taurus board. On this
hw are 16k only for SPL code, so THUMB mode is needed, because we
need to detect the nor flash on the spi bus. This is needed because
we want to erase sector 0 of the spi nor flash if the recovery button
is pressed in SPL.


Heiko Schocher (3):
  arm, arm926ejs: make thumb mode compileable
  arm, at91: enable thumb mode for taurus board in SPL
  taurus, spl: erase also spi flash if recovery button is pressed

 arch/arm/cpu/arm926ejs/cpu.c  |  2 ++
 arch/arm/lib/cache.c          |  2 ++
 board/siemens/taurus/taurus.c | 24 +++++++++++++++---------
 include/configs/taurus.h      | 23 ++++++++++++++++++++++-
 4 files changed, 41 insertions(+), 10 deletions(-)

-- 
1.8.3.1

[U-Boot] [PATCH v1 1/3] arm, arm926ejs: make thumb mode compileable

[Heiko Schocher]

in thumb mode compiler says for example for arch/arm/lib/cache-cp15.c
when enabling CONFIG_SYS_THUMB_BUILD:

{standard input}: Assembler messages:
{standard input}:373: Error: selected processor does not support Thumb mode `mrc p15,0,r4,c1,c0,0'
{standard input}:416: Error: selected processor does not support Thumb mode `mcr p15,0,r3,c2,c0,0'

so, if caches are disabled, do not use this command on arm926ejs.
used on at91 in SPL, to reduce size of SPL.

Signed-off-by: Heiko Schocher <hs@denx.de>

---

 arch/arm/cpu/arm926ejs/cpu.c | 2 ++
 arch/arm/lib/cache.c         | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
index e37e87b..a90ce30 100644
--- a/arch/arm/cpu/arm926ejs/cpu.c
+++ b/arch/arm/cpu/arm926ejs/cpu.c
@@ -45,7 +45,9 @@ int cleanup_before_linux (void)
 /* flush I/D-cache */
 static void cache_flush (void)
 {
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 	unsigned long i = 0;
 
 	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
+#endif
 }
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 4e597a4..b016558 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -24,10 +24,12 @@ __weak void flush_cache(unsigned long start, unsigned long size)
 #endif /* CONFIG_ARM1136 */
 
 #ifdef CONFIG_ARM926EJS
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 	/* test and clean, page 2-23 of arm926ejs manual */
 	asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
 	/* disable write buffer as well (page 2-22) */
 	asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
+#endif
 #endif /* CONFIG_ARM926EJS */
 	return;
 }
-- 
1.8.3.1

[U-Boot] [PATCH v1 2/3] arm, at91: enable thumb mode for taurus board in SPL

[Heiko Schocher]

Signed-off-by: Heiko Schocher <hs@denx.de>
---

 include/configs/taurus.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 20194ae..06725cd 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -26,6 +26,11 @@
 
 #define CONFIG_SYS_GENERIC_BOARD
 
+#if defined(CONFIG_SPL_BUILD)
+#define CONFIG_SYS_THUMB_BUILD
+#define CONFIG_SYS_ICACHE_OFF
+#define CONFIG_SYS_DCACHE_OFF
+#endif
 /*
  * Warning: changing CONFIG_SYS_TEXT_BASE requires
  * adapting the initial boot program.
-- 
1.8.3.1

[U-Boot] [PATCH v1 3/3] taurus, spl: erase also spi flash if recovery button is pressed

[Heiko Schocher]

if in SPL mode recovery button is pressed, erase also spi flash
from offset 0 to CONFIG_SYS_NAND_U_BOOT_SIZE on the taurus board.

Signed-off-by: Heiko Schocher <hs@denx.de>
---

 board/siemens/taurus/taurus.c | 24 +++++++++++++++---------
 include/configs/taurus.h      | 18 +++++++++++++++++-
 2 files changed, 32 insertions(+), 10 deletions(-)

diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index b8ff478..013dac2 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -68,6 +68,7 @@ static void taurus_nand_hw_init(void)
 #if defined(CONFIG_SPL_BUILD)
 #include <spl.h>
 #include <nand.h>
+#include <spi_flash.h>
 
 void matrix_init(void)
 {
@@ -81,23 +82,28 @@ void matrix_init(void)
 void at91_spl_board_init(void)
 {
 	taurus_nand_hw_init();
+	at91_spi0_hw_init(TAURUS_SPI_MASK);
 
 	/* Configure recovery button PINs */
 	at91_set_gpio_input(AT91_PIN_PA31, 1);
 
 	/* check if button is pressed */
 	if (at91_get_gpio_value(AT91_PIN_PA31) == 0) {
-		u32 boot_device;
+		struct spi_flash *flash;
 
 		debug("Recovery button pressed\n");
-		boot_device = spl_boot_device();
-		switch (boot_device) {
-#ifdef CONFIG_SPL_NAND_SUPPORT
-		case BOOT_DEVICE_NAND:
-			nand_init();
-			spl_nand_erase_one(0, 0);
-			break;
-#endif
+		nand_init();
+		spl_nand_erase_one(0, 0);
+		flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
+					0,
+					CONFIG_SF_DEFAULT_SPEED,
+					SPI_MODE_3);
+		if (!flash) {
+			puts("no flash\n");
+		} else {
+			puts("erase spi flash sector 0\n");
+			spi_flash_erase(flash, 0,
+					CONFIG_SYS_NAND_U_BOOT_SIZE);
 		}
 	}
 }
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 06725cd..65468ad 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -142,6 +142,19 @@
 #define TAURUS_SPI_MASK (1 << 4)
 #define TAURUS_SPI_CS_PIN	AT91_PIN_PA3
 
+#if defined(CONFIG_SPL_BUILD)
+/* SPL related */
+#undef CONFIG_SPL_OS_BOOT		/* Not supported by existing map */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
+
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_SPEED 10000000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#endif
+
 /* load address */
 #define CONFIG_SYS_LOAD_ADDR			0x22000000
 
@@ -176,8 +189,11 @@
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x0
-#define CONFIG_SPL_MAX_SIZE		(11 * 1024)
+#define CONFIG_SPL_MAX_SIZE		(14 * 1024)
 #define CONFIG_SPL_STACK		(16 * 1024)
+#define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
+					CONFIG_SYS_MALLOC_LEN)
+#define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
 
 #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
 #define CONFIG_SPL_BSS_MAX_SIZE		(3 * 1024)
-- 
1.8.3.1

[U-Boot] [U-Boot,v1,1/3] arm, arm926ejs: make thumb mode compileable

[Andreas Bießmann]

Dear Heiko Schocher,

Heiko Schocher <hs@denx.de> writes:
>in thumb mode compiler says for example for arch/arm/lib/cache-cp15.c
>when enabling CONFIG_SYS_THUMB_BUILD:
>
>{standard input}: Assembler messages:
>{standard input}:373: Error: selected processor does not support Thumb mode `mrc p15,0,r4,c1,c0,0'
>{standard input}:416: Error: selected processor does not support Thumb mode `mcr p15,0,r3,c2,c0,0'
>
>so, if caches are disabled, do not use this command on arm926ejs.
>used on at91 in SPL, to reduce size of SPL.
>
>Signed-off-by: Heiko Schocher <hs@denx.de>
>---
>
> arch/arm/cpu/arm926ejs/cpu.c | 2 ++
> arch/arm/lib/cache.c         | 2 ++
> 2 files changed, 4 insertions(+)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

[U-Boot] [U-Boot,v1,2/3] arm, at91: enable thumb mode for taurus board in SPL

[Andreas Bießmann]

Dear Heiko Schocher,

Heiko Schocher <hs@denx.de> writes:
>Signed-off-by: Heiko Schocher <hs@denx.de>
>---
>
> include/configs/taurus.h | 5 +++++
> 1 file changed, 5 insertions(+)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

[U-Boot] [U-Boot, v1, 3/3] taurus, spl: erase also spi flash if recovery button is pressed

[Andreas Bießmann]

Dear Heiko Schocher,

Heiko Schocher <hs@denx.de> writes:
>if in SPL mode recovery button is pressed, erase also spi flash
>from offset 0 to CONFIG_SYS_NAND_U_BOOT_SIZE on the taurus board.
>
>Signed-off-by: Heiko Schocher <hs@denx.de>
>---
>
> board/siemens/taurus/taurus.c | 24 +++++++++++++++---------
> include/configs/taurus.h      | 18 +++++++++++++++++-
> 2 files changed, 32 insertions(+), 10 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann