[U-Boot] [PATCH 0/4] mmc: Fix recognition and selection of Dual Data Rate mode

[U-Boot] [PATCH 0/4] mmc: Fix recognition and selection of Dual Data Rate mode

[Andrew Gabbasov]

This set of commits fixes some problems and drawbacks in current
implementation of MMC Dual Data Rate mode support.

These changes were tested not with dw_mmc driver, but with DDR mode
support implementation for fsl_esdhc driver, ported from Freescale's
2009.08 based version and not yet submitted to the community.

Andrew Gabbasov (4):
  mmc: Fix handling of bus widths and DDR card capabilities
  mmc: Fix Dual Data Rate capability recognition
  mmc: Fix block length for DDR mode
  mmc: dw_mmc: Use active DDR mode flag

 common/cmd_mmc.c     |  3 ++-
 drivers/mmc/dw_mmc.c |  2 +-
 drivers/mmc/mmc.c    | 60 +++++++++++++++++++++++++++++++++-------------------
 include/mmc.h        |  1 +
 4 files changed, 42 insertions(+), 24 deletions(-)

-- 
2.1.0

[U-Boot] [PATCH 1/4] mmc: Fix handling of bus widths and DDR card capabilities

[Andrew Gabbasov]

If the MMC_MODE_DDR_52MHz flag is set in card capabilities bitmask,
it is never cleared, even if switching to DDR mode fails, and if
the controller driver uses this flag to check the DDR mode, it can
take incorrect actions.

Also, DDR related checks in mmc_startup() incorrectly handle the case
when the host controller does not support some bus widths (e.g. can't
support 8 bits), since the host_caps is checked for DDR bit, but not
bus width bits.

This fix clearly separates using of card_caps bitmask, having there
the flags for the capabilities, that the card can support, and actual
operation mode, described outside of card_caps (i.e. bus_width and
ddr_mode fields in mmc structure). Separate host controller drivers
may need to be updated to use the actual flags. Respectively,
the capabilities checks in mmc_startup are made more correct and clear.

Also, some clean up is made with errors handling and code syntax layout.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
---
 common/cmd_mmc.c  |  3 ++-
 drivers/mmc/mmc.c | 52 +++++++++++++++++++++++++++++++---------------------
 include/mmc.h     |  1 +
 3 files changed, 34 insertions(+), 22 deletions(-)

diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 4286e26..96478e4 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -90,7 +90,8 @@ static void print_mmcinfo(struct mmc *mmc)
 	puts("Capacity: ");
 	print_size(mmc->capacity, "\n");
 
-	printf("Bus Width: %d-bit\n", mmc->bus_width);
+	printf("Bus Width: %d-bit%s\n", mmc->bus_width,
+			mmc->ddr_mode ? " DDR" : "");
 }
 static struct mmc *init_mmc_device(int dev, bool force_init)
 {
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 44a4feb..4603a81 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -159,7 +159,7 @@ int mmc_set_blocklen(struct mmc *mmc, int len)
 {
 	struct mmc_cmd cmd;
 
-	if (mmc->card_caps & MMC_MODE_DDR_52MHz)
+	if (mmc->ddr_mode)
 		return 0;
 
 	cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
@@ -486,7 +486,7 @@ static int mmc_change_freq(struct mmc *mmc)
 	char cardtype;
 	int err;
 
-	mmc->card_caps = 0;
+	mmc->card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
 
 	if (mmc_host_is_spi(mmc))
 		return 0;
@@ -1103,8 +1103,10 @@ static int mmc_startup(struct mmc *mmc)
 
 		/* An array to map CSD bus widths to host cap bits */
 		static unsigned ext_to_hostcaps[] = {
-			[EXT_CSD_DDR_BUS_WIDTH_4] = MMC_MODE_DDR_52MHz,
-			[EXT_CSD_DDR_BUS_WIDTH_8] = MMC_MODE_DDR_52MHz,
+			[EXT_CSD_DDR_BUS_WIDTH_4] =
+				MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
+			[EXT_CSD_DDR_BUS_WIDTH_8] =
+				MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
 			[EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
 			[EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
 		};
@@ -1116,13 +1118,13 @@ static int mmc_startup(struct mmc *mmc)
 
 		for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
 			unsigned int extw = ext_csd_bits[idx];
+			unsigned int caps = ext_to_hostcaps[extw];
 
 			/*
-			 * Check to make sure the controller supports
-			 * this bus width, if it's more than 1
+			 * Check to make sure the card and controller support
+			 * these capabilities
 			 */
-			if (extw != EXT_CSD_BUS_WIDTH_1 &&
-					!(mmc->cfg->host_caps & ext_to_hostcaps[extw]))
+			if ((mmc->card_caps & caps) != caps)
 				continue;
 
 			err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
@@ -1131,26 +1133,33 @@ static int mmc_startup(struct mmc *mmc)
 			if (err)
 				continue;
 
+			mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
 			mmc_set_bus_width(mmc, widths[idx]);
 
 			err = mmc_send_ext_csd(mmc, test_csd);
+
+			if (err)
+				continue;
+
 			/* Only compare read only fields */
-			if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
-				    == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
-				 && ext_csd[EXT_CSD_HC_WP_GRP_SIZE] \
-				    == test_csd[EXT_CSD_HC_WP_GRP_SIZE] \
-				 && ext_csd[EXT_CSD_REV] \
-				    == test_csd[EXT_CSD_REV]
-				 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
-				    == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
-				 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
-					&test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
-
-				mmc->card_caps |= ext_to_hostcaps[extw];
+			if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
+				== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
+			    ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
+				== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
+			    ext_csd[EXT_CSD_REV]
+				== test_csd[EXT_CSD_REV] &&
+			    ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
+				== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
+			    memcmp(&ext_csd[EXT_CSD_SEC_CNT],
+				   &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
 				break;
-			}
+			else
+				err = SWITCH_ERR;
 		}
 
+		if (err)
+			return err;
+
 		if (mmc->card_caps & MMC_MODE_HS) {
 			if (mmc->card_caps & MMC_MODE_HS_52MHz)
 				mmc->tran_speed = 52000000;
@@ -1299,6 +1308,7 @@ int mmc_start_init(struct mmc *mmc)
 	if (err)
 		return err;
 
+	mmc->ddr_mode = 0;
 	mmc_set_bus_width(mmc, 1);
 	mmc_set_clock(mmc, 1);
 
diff --git a/include/mmc.h b/include/mmc.h
index d74a190..9c6d792 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -314,6 +314,7 @@ struct mmc {
 	char init_in_progress;	/* 1 if we have done mmc_start_init() */
 	char preinit;		/* start init as early as possible */
 	uint op_cond_response;	/* the response byte from the last op_cond */
+	int ddr_mode;
 };
 
 int mmc_register(struct mmc *mmc);
-- 
2.1.0

[U-Boot] [PATCH 2/4] mmc: Fix Dual Data Rate capability recognition

[Andrew Gabbasov]

Since the driver doesn't work in 1.2V or 1.8V signaling level modes,
Dual Data Rate mode can be supported by the driver only if it is supported
by the card in regular 3.3V mode. So, check for a particular single
bit in card type field.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
---
 drivers/mmc/mmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 4603a81..d878c1e 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -519,7 +519,7 @@ static int mmc_change_freq(struct mmc *mmc)
 
 	/* High Speed is set, there are two types: 52MHz and 26MHz */
 	if (cardtype & EXT_CSD_CARD_TYPE_52) {
-		if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
+		if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
 			mmc->card_caps |= MMC_MODE_DDR_52MHz;
 		mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 	} else {
-- 
2.1.0

[U-Boot] [PATCH 3/4] mmc: Fix block length for DDR mode

[Andrew Gabbasov]

Block length for write and read commands is fixed to 512 bytes
when the card is in Dual Data Rate mode. If block length read from CSD
is different, make sure the driver will use correct length
in all further calculations and settings.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
---
 drivers/mmc/mmc.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d878c1e..9918597 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1170,6 +1170,12 @@ static int mmc_startup(struct mmc *mmc)
 
 	mmc_set_clock(mmc, mmc->tran_speed);
 
+	/* Fix the block length for DDR mode */
+	if (mmc->ddr_mode) {
+		mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
+		mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
+	}
+
 	/* fill in device description */
 	mmc->block_dev.lun = 0;
 	mmc->block_dev.type = 0;
-- 
2.1.0

[U-Boot] [PATCH 4/4] mmc: dw_mmc: Use active DDR mode flag

[Andrew Gabbasov]

The card_caps bit should denote the card capability to use DDR mode,
but we need the flag indicating that the DDR mode is active.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
---
 drivers/mmc/dw_mmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 785eed5..b18c75d 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -318,7 +318,7 @@ static void dwmci_set_ios(struct mmc *mmc)
 	dwmci_writel(host, DWMCI_CTYPE, ctype);
 
 	regs = dwmci_readl(host, DWMCI_UHS_REG);
-	if (mmc->card_caps & MMC_MODE_DDR_52MHz)
+	if (mmc->ddr_mode)
 		regs |= DWMCI_DDR_MODE;
 	else
 		regs &= DWMCI_DDR_MODE;
-- 
2.1.0

[U-Boot] [PATCH 1/4] mmc: Fix handling of bus widths and DDR card capabilities

[Pantelis Antoniou]

Hi Andrew,

Looks good. I don?t have a DDR capable board to test, but at first glance
it?s fine.

> On Dec 1, 2014, at 14:59 , Andrew Gabbasov <andrew_gabbasov@mentor.com> wrote:
> 
> If the MMC_MODE_DDR_52MHz flag is set in card capabilities bitmask,
> it is never cleared, even if switching to DDR mode fails, and if
> the controller driver uses this flag to check the DDR mode, it can
> take incorrect actions.
> 
> Also, DDR related checks in mmc_startup() incorrectly handle the case
> when the host controller does not support some bus widths (e.g. can't
> support 8 bits), since the host_caps is checked for DDR bit, but not
> bus width bits.
> 
> This fix clearly separates using of card_caps bitmask, having there
> the flags for the capabilities, that the card can support, and actual
> operation mode, described outside of card_caps (i.e. bus_width and
> ddr_mode fields in mmc structure). Separate host controller drivers
> may need to be updated to use the actual flags. Respectively,
> the capabilities checks in mmc_startup are made more correct and clear.
> 
> Also, some clean up is made with errors handling and code syntax layout.
> 
> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
> ---
> common/cmd_mmc.c  |  3 ++-
> drivers/mmc/mmc.c | 52 +++++++++++++++++++++++++++++++---------------------
> include/mmc.h     |  1 +
> 3 files changed, 34 insertions(+), 22 deletions(-)
> 
> diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
> index 4286e26..96478e4 100644
> --- a/common/cmd_mmc.c
> +++ b/common/cmd_mmc.c
> @@ -90,7 +90,8 @@ static void print_mmcinfo(struct mmc *mmc)
> 	puts("Capacity: ");
> 	print_size(mmc->capacity, "\n");
> 
> -	printf("Bus Width: %d-bit\n", mmc->bus_width);
> +	printf("Bus Width: %d-bit%s\n", mmc->bus_width,
> +			mmc->ddr_mode ? " DDR" : "");
> }
> static struct mmc *init_mmc_device(int dev, bool force_init)
> {
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 44a4feb..4603a81 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -159,7 +159,7 @@ int mmc_set_blocklen(struct mmc *mmc, int len)
> {
> 	struct mmc_cmd cmd;
> 
> -	if (mmc->card_caps & MMC_MODE_DDR_52MHz)
> +	if (mmc->ddr_mode)
> 		return 0;
> 
> 	cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
> @@ -486,7 +486,7 @@ static int mmc_change_freq(struct mmc *mmc)
> 	char cardtype;
> 	int err;
> 
> -	mmc->card_caps = 0;
> +	mmc->card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
> 
> 	if (mmc_host_is_spi(mmc))
> 		return 0;
> @@ -1103,8 +1103,10 @@ static int mmc_startup(struct mmc *mmc)
> 
> 		/* An array to map CSD bus widths to host cap bits */
> 		static unsigned ext_to_hostcaps[] = {
> -			[EXT_CSD_DDR_BUS_WIDTH_4] = MMC_MODE_DDR_52MHz,
> -			[EXT_CSD_DDR_BUS_WIDTH_8] = MMC_MODE_DDR_52MHz,
> +			[EXT_CSD_DDR_BUS_WIDTH_4] =
> +				MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
> +			[EXT_CSD_DDR_BUS_WIDTH_8] =
> +				MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
> 			[EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
> 			[EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
> 		};
> @@ -1116,13 +1118,13 @@ static int mmc_startup(struct mmc *mmc)
> 
> 		for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
> 			unsigned int extw = ext_csd_bits[idx];
> +			unsigned int caps = ext_to_hostcaps[extw];
> 
> 			/*
> -			 * Check to make sure the controller supports
> -			 * this bus width, if it's more than 1
> +			 * Check to make sure the card and controller support
> +			 * these capabilities
> 			 */
> -			if (extw != EXT_CSD_BUS_WIDTH_1 &&
> -					!(mmc->cfg->host_caps & ext_to_hostcaps[extw]))
> +			if ((mmc->card_caps & caps) != caps)
> 				continue;
> 
> 			err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
> @@ -1131,26 +1133,33 @@ static int mmc_startup(struct mmc *mmc)
> 			if (err)
> 				continue;
> 
> +			mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
> 			mmc_set_bus_width(mmc, widths[idx]);
> 
> 			err = mmc_send_ext_csd(mmc, test_csd);
> +
> +			if (err)
> +				continue;
> +
> 			/* Only compare read only fields */
> -			if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
> -				    == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
> -				 && ext_csd[EXT_CSD_HC_WP_GRP_SIZE] \
> -				    == test_csd[EXT_CSD_HC_WP_GRP_SIZE] \
> -				 && ext_csd[EXT_CSD_REV] \
> -				    == test_csd[EXT_CSD_REV]
> -				 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
> -				    == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
> -				 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
> -					&test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
> -
> -				mmc->card_caps |= ext_to_hostcaps[extw];
> +			if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
> +				== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
> +			    ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
> +				== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
> +			    ext_csd[EXT_CSD_REV]
> +				== test_csd[EXT_CSD_REV] &&
> +			    ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
> +				== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
> +			    memcmp(&ext_csd[EXT_CSD_SEC_CNT],
> +				   &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
> 				break;
> -			}
> +			else
> +				err = SWITCH_ERR;
> 		}
> 
> +		if (err)
> +			return err;
> +
> 		if (mmc->card_caps & MMC_MODE_HS) {
> 			if (mmc->card_caps & MMC_MODE_HS_52MHz)
> 				mmc->tran_speed = 52000000;
> @@ -1299,6 +1308,7 @@ int mmc_start_init(struct mmc *mmc)
> 	if (err)
> 		return err;
> 
> +	mmc->ddr_mode = 0;
> 	mmc_set_bus_width(mmc, 1);
> 	mmc_set_clock(mmc, 1);
> 
> diff --git a/include/mmc.h b/include/mmc.h
> index d74a190..9c6d792 100644
> --- a/include/mmc.h
> +++ b/include/mmc.h
> @@ -314,6 +314,7 @@ struct mmc {
> 	char init_in_progress;	/* 1 if we have done mmc_start_init() */
> 	char preinit;		/* start init as early as possible */
> 	uint op_cond_response;	/* the response byte from the last op_cond */
> +	int ddr_mode;
> };
> 
> int mmc_register(struct mmc *mmc);
> -- 
> 2.1.0

Applied, thanks.

? Pantelis

[U-Boot] [PATCH 2/4] mmc: Fix Dual Data Rate capability recognition

[Pantelis Antoniou]

Hi Andrew,

> On Dec 1, 2014, at 14:59 , Andrew Gabbasov <andrew_gabbasov@mentor.com> wrote:
> 
> Since the driver doesn't work in 1.2V or 1.8V signaling level modes,
> Dual Data Rate mode can be supported by the driver only if it is supported
> by the card in regular 3.3V mode. So, check for a particular single
> bit in card type field.
> 
> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
> ---
> drivers/mmc/mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 4603a81..d878c1e 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -519,7 +519,7 @@ static int mmc_change_freq(struct mmc *mmc)
> 
> 	/* High Speed is set, there are two types: 52MHz and 26MHz */
> 	if (cardtype & EXT_CSD_CARD_TYPE_52) {
> -		if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
> +		if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
> 			mmc->card_caps |= MMC_MODE_DDR_52MHz;
> 		mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
> 	} else {
> -- 
> 2.1.0

Applied, thanks.

? Pantelis

[U-Boot] [PATCH 4/4] mmc: dw_mmc: Use active DDR mode flag

[Pantelis Antoniou]

Hi Andrew,

> On Dec 1, 2014, at 14:59 , Andrew Gabbasov <andrew_gabbasov@mentor.com> wrote:
> 
> The card_caps bit should denote the card capability to use DDR mode,
> but we need the flag indicating that the DDR mode is active.
> 
> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
> ---
> drivers/mmc/dw_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index 785eed5..b18c75d 100644
> --- a/drivers/mmc/dw_mmc.c
> +++ b/drivers/mmc/dw_mmc.c
> @@ -318,7 +318,7 @@ static void dwmci_set_ios(struct mmc *mmc)
> 	dwmci_writel(host, DWMCI_CTYPE, ctype);
> 
> 	regs = dwmci_readl(host, DWMCI_UHS_REG);
> -	if (mmc->card_caps & MMC_MODE_DDR_52MHz)
> +	if (mmc->ddr_mode)
> 		regs |= DWMCI_DDR_MODE;
> 	else
> 		regs &= DWMCI_DDR_MODE;
> -- 
> 2.1.0

Applied, thanks

? Pantelis

[U-Boot] [PATCH 3/4] mmc: Fix block length for DDR mode

[Pantelis Antoniou]

Hi Andrew,

> On Dec 1, 2014, at 14:59 , Andrew Gabbasov <andrew_gabbasov@mentor.com> wrote:
> 
> Block length for write and read commands is fixed to 512 bytes
> when the card is in Dual Data Rate mode. If block length read from CSD
> is different, make sure the driver will use correct length
> in all further calculations and settings.
> 
> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
> ---
> drivers/mmc/mmc.c | 6 ++++++
> 1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index d878c1e..9918597 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -1170,6 +1170,12 @@ static int mmc_startup(struct mmc *mmc)
> 
> 	mmc_set_clock(mmc, mmc->tran_speed);
> 
> +	/* Fix the block length for DDR mode */
> +	if (mmc->ddr_mode) {
> +		mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
> +		mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
> +	}
> +
> 	/* fill in device description */
> 	mmc->block_dev.lun = 0;
> 	mmc->block_dev.type = 0;
> -- 
> 2.1.0

Applied, thanks.

? Pantelis