* [PATCH 0/2][dizzy-next] linux-imx: add clock fix for T1.0
@ 2014-12-03 17:07 Gary Bisson
2014-12-03 17:07 ` [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2 Gary Bisson
2014-12-03 17:07 ` [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q Gary Bisson
0 siblings, 2 replies; 13+ messages in thread
From: Gary Bisson @ 2014-12-03 17:07 UTC (permalink / raw)
To: meta-freescale; +Cc: fabio.estevam, Gary Bisson, otavio
This serie of patch provides a clock patch for T1.0 version of the SoC which
was causing the following error message during bootup:
mxc_sdc_fb fb.27: timeout when waiting for flip irq
https://lists.yoctoproject.org/pipermail/meta-freescale/2014-May/008553.html
This patch has been tested with a Sabrelite rev D (5-9-12).
However I've realized this patch doesn't fix the HDMI at 1080p60 when testing
Eric's patches on mainline. The reason for it is that 6x_bootscript fixes the
resolution at 720p30 which now works great when using FSL kernel. But mainline
kernel is forcing 1080p60 by default and can't seem to be changed (don't know
what video parameters to use).
Doing more testing on FSL kernel proved that it works only up to 1080p30 but
using 60fps seems to still be broken. It is to be noted that the error message
doesn't appear anymore. I'll try to compare again the IMX_CHIP_REVISION
checks between the 3.0.35 and the 3.10.17 as 1080p60 works on 3.0.35.
I figured it might still be worth integrating this patch as the clock index is
clearly wrong. In the meantime I'll work on getting 1080p60 fixed. Only then I
will submit the patches to the lkml.
Let me know your thoughts.
Thanks!
Gary Bisson (2):
linux-imx: remove unnecessary patches for 3.10.17-1.0.2
linux-imx: add clock patch for T1.0 version of i.MX6Q
...6q-fix-video-divider-for-revision-1.0-of-.patch | 33 +
...8-ARM-imx6sl-gpc-add-chip-revision-check-.patch | 52 -
...2-regulator-pfuze100-Fix-address-of-FABID.patch | 36 -
...3-regulator-pfuze100-add-pfuze200-support.patch | 506 --------
...fuze100-Add-terminate-entry-for-i2c-of-_d.patch | 61 -
...fuze100-Add-PFUZE200-support-to-Kconfig-a.patch | 56 -
...gulator-pfuze100-Use-of_get_child_by_name.patch | 34 -
...ze100-regulator-Fix-of_node_get-parameter.patch | 44 -
...8-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch | 752 ------------
...8-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch | 1202 --------------------
...2-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch | 133 ---
recipes-kernel/linux/linux-imx_3.10.17.bb | 2 +
12 files changed, 35 insertions(+), 2876 deletions(-)
create mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch
--
2.1.3
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2
2014-12-03 17:07 [PATCH 0/2][dizzy-next] linux-imx: add clock fix for T1.0 Gary Bisson
@ 2014-12-03 17:07 ` Gary Bisson
2014-12-03 17:29 ` Daiane Angolini
2014-12-03 17:07 ` [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q Gary Bisson
1 sibling, 1 reply; 13+ messages in thread
From: Gary Bisson @ 2014-12-03 17:07 UTC (permalink / raw)
To: meta-freescale; +Cc: fabio.estevam, Gary Bisson, otavio
Those have been removed from the recipe by Laurent Post:
438d4438: linux-imx: Upgrade to 3.10.17-1.0.2 patch release
Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
---
...8-ARM-imx6sl-gpc-add-chip-revision-check-.patch | 52 -
...2-regulator-pfuze100-Fix-address-of-FABID.patch | 36 -
...3-regulator-pfuze100-add-pfuze200-support.patch | 506 --------
...fuze100-Add-terminate-entry-for-i2c-of-_d.patch | 61 -
...fuze100-Add-PFUZE200-support-to-Kconfig-a.patch | 56 -
...gulator-pfuze100-Use-of_get_child_by_name.patch | 34 -
...ze100-regulator-Fix-of_node_get-parameter.patch | 44 -
...8-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch | 752 ------------
...8-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch | 1202 --------------------
...2-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch | 133 ---
10 files changed, 2876 deletions(-)
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch
delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch b/recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch
deleted file mode 100644
index 962a804..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 5dad39098c3c8686f23db638505bf00ae2cc092f Mon Sep 17 00:00:00 2001
-From: Robby Cai <r63905@freescale.com>
-Date: Fri, 23 May 2014 16:02:13 +0800
-Subject: [PATCH 01/10] ENGR00309838 ARM: imx6sl: gpc: add chip revision check
- for dispmix
-Organization: O.S. Systems Software LTDA.
-
-The dispmix feature works without problem since TO1.2.
-This patch adds the back-compatibility for older chip.
-
-Signed-off-by: Robby Cai <r63905@freescale.com>
-(cherry picked from commit a187b916d55052fed10de1797009250095b598fb)
-
-Upstream-Status: Pending
----
- arch/arm/mach-imx/gpc.c | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
-index 9734327..25e987c 100644
---- a/arch/arm/mach-imx/gpc.c
-+++ b/arch/arm/mach-imx/gpc.c
-@@ -1,5 +1,5 @@
- /*
-- * Copyright 2011-2013 Freescale Semiconductor, Inc.
-+ * Copyright 2011-2014 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
-@@ -90,7 +90,8 @@ static void imx_disp_clk(bool enable)
-
- static void imx_gpc_dispmix_on(void)
- {
-- if (cpu_is_imx6sl()) {
-+ if (cpu_is_imx6sl() &&
-+ imx_get_soc_revision() >= IMX_CHIP_REVISION_1_2) {
- imx_disp_clk(true);
-
- writel_relaxed(0x0, gpc_base + GPC_PGC_DISP_PGCR_OFFSET);
-@@ -105,7 +106,8 @@ static void imx_gpc_dispmix_on(void)
-
- static void imx_gpc_dispmix_off(void)
- {
-- if (cpu_is_imx6sl()) {
-+ if (cpu_is_imx6sl() &&
-+ imx_get_soc_revision() >= IMX_CHIP_REVISION_1_2) {
- imx_disp_clk(true);
-
- writel_relaxed(0xFFFFFFFF,
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch b/recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch
deleted file mode 100644
index ff36488..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From a38734076be8b4fbb1a9db757e1a69dddef61f63 Mon Sep 17 00:00:00 2001
-From: Axel Lin <axel.lin@ingics.com>
-Date: Mon, 9 Dec 2013 15:24:19 +0800
-Subject: [PATCH 02/10] regulator: pfuze100: Fix address of FABID
-Organization: O.S. Systems Software LTDA.
-
-According to the datasheet, the address of FABID is 0x4. Fix it.
-
-Signed-off-by: Axel Lin <axel.lin@ingics.com>
-Acked-by: Robin Gong <b38343@freescale.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Cc: stable@vger.kernel.org
-(cherry picked from commit c07a24939f36fb6de522a9726369ea64eee5d98d)
-(cherry picked from commit cfec286ff9f375c2c289072d63cedbb0c7917a48)
-
-Upstream-Status: Pending
----
- drivers/regulator/pfuze100-regulator.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
-index ba67b2c..565a631 100644
---- a/drivers/regulator/pfuze100-regulator.c
-+++ b/drivers/regulator/pfuze100-regulator.c
-@@ -38,7 +38,7 @@
-
- #define PFUZE100_DEVICEID 0x0
- #define PFUZE100_REVID 0x3
--#define PFUZE100_FABID 0x3
-+#define PFUZE100_FABID 0x4
-
- #define PFUZE100_SW1ABVOL 0x20
- #define PFUZE100_SW1CVOL 0x2e
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch b/recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch
deleted file mode 100644
index 923da0a..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch
+++ /dev/null
@@ -1,506 +0,0 @@
-From 08284f19c7cfdf84332c8098204f6e7fad368308 Mon Sep 17 00:00:00 2001
-From: Robin Gong <b38343@freescale.com>
-Date: Tue, 4 Mar 2014 17:40:36 +0800
-Subject: [PATCH 03/10] regulator: pfuze100: add pfuze200 support
-Organization: O.S. Systems Software LTDA.
-
-support pfuze200 chip which remove SW1C and SW4 based on pfuze100.
-
-Signed-off-by: Robin Gong <b38343@freescale.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit f2518480c7b744296a5587990a54e3a284d932b8)
-
-Conflicts:
-
- drivers/regulator/pfuze100-regulator.c
-(cherry picked from commit f9e62732cfb59ff68fed303bbbb3913d2f1002bf)
-
-Upstream-Status: Pending
----
- .../devicetree/bindings/regulator/pfuze100.txt | 96 ++++++++++-
- drivers/regulator/pfuze100-regulator.c | 181 ++++++++++++++++-----
- include/linux/regulator/pfuze100.h | 14 ++
- 3 files changed, 245 insertions(+), 46 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt b/Documentation/devicetree/bindings/regulator/pfuze100.txt
-index fc989b2..34ef5d1 100644
---- a/Documentation/devicetree/bindings/regulator/pfuze100.txt
-+++ b/Documentation/devicetree/bindings/regulator/pfuze100.txt
-@@ -1,7 +1,7 @@
- PFUZE100 family of regulators
-
- Required properties:
--- compatible: "fsl,pfuze100"
-+- compatible: "fsl,pfuze100" or "fsl,pfuze200"
- - reg: I2C slave address
-
- Required child node:
-@@ -10,11 +10,14 @@ Required child node:
- Documentation/devicetree/bindings/regulator/regulator.txt.
-
- The valid names for regulators are:
-+ --PFUZE100
- sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6
-+ --PFUZE200
-+ sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6
-
- Each regulator is defined using the standard binding for regulators.
-
--Example:
-+Example 1: PFUZE100
-
- pmic: pfuze100@08 {
- compatible = "fsl,pfuze100";
-@@ -113,3 +116,92 @@ Example:
- };
- };
- };
-+
-+
-+Example 2: PFUZE200
-+
-+ pmic: pfuze200@08 {
-+ compatible = "fsl,pfuze200";
-+ reg = <0x08>;
-+
-+ regulators {
-+ sw1a_reg: sw1ab {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
-+ };
-+
-+ sw2_reg: sw2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3a_reg: sw3a {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3b_reg: sw3b {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ swbst_reg: swbst {
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5150000>;
-+ };
-+
-+ snvs_reg: vsnvs {
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vref_reg: vrefddr {
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vgen1_reg: vgen1 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen2_reg: vgen2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen3_reg: vgen3 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ vgen4_reg: vgen4 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen5_reg: vgen5 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen6_reg: vgen6 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
-index 565a631..35b1de1 100644
---- a/drivers/regulator/pfuze100-regulator.c
-+++ b/drivers/regulator/pfuze100-regulator.c
-@@ -56,6 +56,8 @@
- #define PFUZE100_VGEN5VOL 0x70
- #define PFUZE100_VGEN6VOL 0x71
-
-+enum chips {PFUZE100, PFUZE200, PFUZE_NUM};
-+
- struct pfuze_regulator {
- struct regulator_desc desc;
- unsigned char stby_reg;
-@@ -63,6 +65,7 @@ struct pfuze_regulator {
- };
-
- struct pfuze_chip {
-+ int chip_id;
- struct regmap *regmap;
- struct device *dev;
- struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
-@@ -77,15 +80,15 @@ static const int pfuze100_vsnvs[] = {
- 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
- };
-
--static const struct i2c_device_id pfuze_device_id[] = {
-- {.name = "pfuze100"},
-- {},
-+static const struct i2c_device_id pfuze_device_id[PFUZE_NUM] = {
-+ {.name = "pfuze100", .driver_data = PFUZE100},
-+ {.name = "pfuze200", .driver_data = PFUZE200},
- };
- MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
-
--static const struct of_device_id pfuze_dt_ids[] = {
-- { .compatible = "fsl,pfuze100" },
-- {},
-+static const struct of_device_id pfuze_dt_ids[PFUZE_NUM] = {
-+ { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
-+ { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
- };
- MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
-
-@@ -139,14 +142,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
-
- };
-
--#define PFUZE100_FIXED_REG(_name, base, voltage) \
-- [PFUZE100_ ## _name] = { \
-+#define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
-+ [_chip ## _ ## _name] = { \
- .desc = { \
- .name = #_name, \
- .n_voltages = 1, \
- .ops = &pfuze100_fixed_regulator_ops, \
- .type = REGULATOR_VOLTAGE, \
-- .id = PFUZE100_ ## _name, \
-+ .id = _chip ## _ ## _name, \
- .owner = THIS_MODULE, \
- .min_uV = (voltage), \
- .enable_reg = (base), \
-@@ -154,14 +157,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
- }, \
- }
-
--#define PFUZE100_SW_REG(_name, base, min, max, step) \
-- [PFUZE100_ ## _name] = { \
-+#define PFUZE100_SW_REG(_chip, _name, base, min, max, step) \
-+ [_chip ## _ ## _name] = { \
- .desc = { \
- .name = #_name,\
- .n_voltages = ((max) - (min)) / (step) + 1, \
- .ops = &pfuze100_sw_regulator_ops, \
- .type = REGULATOR_VOLTAGE, \
-- .id = PFUZE100_ ## _name, \
-+ .id = _chip ## _ ## _name, \
- .owner = THIS_MODULE, \
- .min_uV = (min), \
- .uV_step = (step), \
-@@ -172,14 +175,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
- .stby_mask = 0x3f, \
- }
-
--#define PFUZE100_SWB_REG(_name, base, mask, voltages) \
-- [PFUZE100_ ## _name] = { \
-+#define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \
-+ [_chip ## _ ## _name] = { \
- .desc = { \
- .name = #_name, \
- .n_voltages = ARRAY_SIZE(voltages), \
- .ops = &pfuze100_swb_regulator_ops, \
- .type = REGULATOR_VOLTAGE, \
-- .id = PFUZE100_ ## _name, \
-+ .id = _chip ## _ ## _name, \
- .owner = THIS_MODULE, \
- .volt_table = voltages, \
- .vsel_reg = (base), \
-@@ -187,14 +190,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
- }, \
- }
-
--#define PFUZE100_VGEN_REG(_name, base, min, max, step) \
-- [PFUZE100_ ## _name] = { \
-+#define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step) \
-+ [_chip ## _ ## _name] = { \
- .desc = { \
- .name = #_name, \
- .n_voltages = ((max) - (min)) / (step) + 1, \
- .ops = &pfuze100_ldo_regulator_ops, \
- .type = REGULATOR_VOLTAGE, \
-- .id = PFUZE100_ ## _name, \
-+ .id = _chip ## _ ## _name, \
- .owner = THIS_MODULE, \
- .min_uV = (min), \
- .uV_step = (step), \
-@@ -207,25 +210,45 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
- .stby_mask = 0x20, \
- }
-
-+/* PFUZE100 */
- static struct pfuze_regulator pfuze100_regulators[] = {
-- PFUZE100_SW_REG(SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
-- PFUZE100_SW_REG(SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
-- PFUZE100_SW_REG(SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
-- PFUZE100_SW_REG(SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
-- PFUZE100_SW_REG(SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
-- PFUZE100_SW_REG(SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
-- PFUZE100_SWB_REG(SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
-- PFUZE100_SWB_REG(VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
-- PFUZE100_FIXED_REG(VREFDDR, PFUZE100_VREFDDRCON, 750000),
-- PFUZE100_VGEN_REG(VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
-- PFUZE100_VGEN_REG(VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
-- PFUZE100_VGEN_REG(VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
-- PFUZE100_VGEN_REG(VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
-- PFUZE100_VGEN_REG(VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
-- PFUZE100_VGEN_REG(VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
-+ PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
-+ PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
-+ PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
-+ PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
-+ PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
-+ PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
-+ PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
-+ PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
-+ PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
-+ PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
-+ PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
-+ PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
-+ PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
-+ PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
-+ PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
-+};
-+
-+static struct pfuze_regulator pfuze200_regulators[] = {
-+ PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
-+ PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
-+ PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
-+ PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
-+ PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
-+ PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
-+ PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
-+ PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
-+ PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
-+ PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
-+ PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
-+ PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
-+ PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
- };
-
-+static struct pfuze_regulator *pfuze_regulators;
-+
- #ifdef CONFIG_OF
-+/* PFUZE100 */
- static struct of_regulator_match pfuze100_matches[] = {
- { .name = "sw1ab", },
- { .name = "sw1c", },
-@@ -244,6 +267,26 @@ static struct of_regulator_match pfuze100_matches[] = {
- { .name = "vgen6", },
- };
-
-+/* PFUZE200 */
-+static struct of_regulator_match pfuze200_matches[] = {
-+
-+ { .name = "sw1ab", },
-+ { .name = "sw2", },
-+ { .name = "sw3a", },
-+ { .name = "sw3b", },
-+ { .name = "swbst", },
-+ { .name = "vsnvs", },
-+ { .name = "vrefddr", },
-+ { .name = "vgen1", },
-+ { .name = "vgen2", },
-+ { .name = "vgen3", },
-+ { .name = "vgen4", },
-+ { .name = "vgen5", },
-+ { .name = "vgen6", },
-+};
-+
-+static struct of_regulator_match *pfuze_matches;
-+
- static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
- {
- struct device *dev = chip->dev;
-@@ -260,8 +303,20 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
- return -EINVAL;
- }
-
-- ret = of_regulator_match(dev, parent, pfuze100_matches,
-- ARRAY_SIZE(pfuze100_matches));
-+ switch (chip->chip_id) {
-+ case PFUZE200:
-+ pfuze_matches = pfuze200_matches;
-+ ret = of_regulator_match(dev, parent, pfuze200_matches,
-+ ARRAY_SIZE(pfuze200_matches));
-+ break;
-+
-+ case PFUZE100:
-+ default:
-+ pfuze_matches = pfuze100_matches;
-+ ret = of_regulator_match(dev, parent, pfuze100_matches,
-+ ARRAY_SIZE(pfuze100_matches));
-+ break;
-+ }
-
- of_node_put(parent);
- if (ret < 0) {
-@@ -275,12 +330,12 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
-
- static inline struct regulator_init_data *match_init_data(int index)
- {
-- return pfuze100_matches[index].init_data;
-+ return pfuze_matches[index].init_data;
- }
-
- static inline struct device_node *match_of_node(int index)
- {
-- return pfuze100_matches[index].of_node;
-+ return pfuze_matches[index].of_node;
- }
- #else
- static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
-@@ -308,7 +363,8 @@ static int pfuze_identify(struct pfuze_chip *pfuze_chip)
- if (ret)
- return ret;
-
-- if (value & 0x0f) {
-+ if ((value & 0x0f) != pfuze_chip->chip_id) {
-+ /* device id NOT match with your setting */
- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
- return -ENODEV;
- }
-@@ -344,17 +400,31 @@ static int pfuze100_regulator_probe(struct i2c_client *client,
- dev_get_platdata(&client->dev);
- struct regulator_config config = { };
- int i, ret;
-+ const struct of_device_id *match;
-+ u32 regulator_num;
-+ u32 sw_check_start, sw_check_end;
-
- pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
- GFP_KERNEL);
- if (!pfuze_chip)
- return -ENOMEM;
-
-- i2c_set_clientdata(client, pfuze_chip);
--
-- memcpy(pfuze_chip->regulator_descs, pfuze100_regulators,
-- sizeof(pfuze_chip->regulator_descs));
-+ if (client->dev.of_node) {
-+ match = of_match_device(of_match_ptr(pfuze_dt_ids),
-+ &client->dev);
-+ if (!match) {
-+ dev_err(&client->dev, "Error: No device match found\n");
-+ return -ENODEV;
-+ }
-+ pfuze_chip->chip_id = (int)(long)match->data;
-+ } else if (id) {
-+ pfuze_chip->chip_id = id->driver_data;
-+ } else {
-+ dev_err(&client->dev, "No dts match or id table match found\n");
-+ return -ENODEV;
-+ }
-
-+ i2c_set_clientdata(client, pfuze_chip);
- pfuze_chip->dev = &client->dev;
-
- pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
-@@ -371,11 +441,34 @@ static int pfuze100_regulator_probe(struct i2c_client *client,
- return ret;
- }
-
-+ /* use the right regulators after identify the right device */
-+ switch (pfuze_chip->chip_id) {
-+ case PFUZE200:
-+ pfuze_regulators = pfuze200_regulators;
-+ regulator_num = ARRAY_SIZE(pfuze200_regulators);
-+ sw_check_start = PFUZE200_SW2;
-+ sw_check_end = PFUZE200_SW3B;
-+ break;
-+
-+ case PFUZE100:
-+ default:
-+ pfuze_regulators = pfuze100_regulators;
-+ regulator_num = ARRAY_SIZE(pfuze100_regulators);
-+ sw_check_start = PFUZE100_SW2;
-+ sw_check_end = PFUZE100_SW4;
-+ break;
-+ }
-+ dev_info(&client->dev, "pfuze%s found.\n",
-+ (pfuze_chip->chip_id == PFUZE100) ? "100" : "200");
-+
-+ memcpy(pfuze_chip->regulator_descs, pfuze_regulators,
-+ sizeof(pfuze_chip->regulator_descs));
-+
- ret = pfuze_parse_regulators_dt(pfuze_chip);
- if (ret)
- return ret;
-
-- for (i = 0; i < PFUZE100_MAX_REGULATOR; i++) {
-+ for (i = 0; i < regulator_num; i++) {
- struct regulator_init_data *init_data;
- struct regulator_desc *desc;
- int val;
-@@ -388,7 +481,7 @@ static int pfuze100_regulator_probe(struct i2c_client *client,
- init_data = match_init_data(i);
-
- /* SW2~SW4 high bit check and modify the voltage value table */
-- if (i > PFUZE100_SW1C && i < PFUZE100_SWBST) {
-+ if (i >= sw_check_start && i <= sw_check_end) {
- regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
- if (val & 0x40) {
- desc->min_uV = 800000;
-diff --git a/include/linux/regulator/pfuze100.h b/include/linux/regulator/pfuze100.h
-index 65d550b..364f7a7 100644
---- a/include/linux/regulator/pfuze100.h
-+++ b/include/linux/regulator/pfuze100.h
-@@ -35,6 +35,20 @@
- #define PFUZE100_VGEN6 14
- #define PFUZE100_MAX_REGULATOR 15
-
-+#define PFUZE200_SW1AB 0
-+#define PFUZE200_SW2 1
-+#define PFUZE200_SW3A 2
-+#define PFUZE200_SW3B 3
-+#define PFUZE200_SWBST 4
-+#define PFUZE200_VSNVS 5
-+#define PFUZE200_VREFDDR 6
-+#define PFUZE200_VGEN1 7
-+#define PFUZE200_VGEN2 8
-+#define PFUZE200_VGEN3 9
-+#define PFUZE200_VGEN4 10
-+#define PFUZE200_VGEN5 11
-+#define PFUZE200_VGEN6 12
-+
- struct regulator_init_data;
-
- struct pfuze_regulator_platform_data {
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch b/recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch
deleted file mode 100644
index c7381e3..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From fdbdb66994db6b896a5a6464b9c1efd7abfbfdb9 Mon Sep 17 00:00:00 2001
-From: Axel Lin <axel.lin@ingics.com>
-Date: Tue, 4 Mar 2014 18:20:14 +0800
-Subject: [PATCH 04/10] regulator: pfuze100: Add terminate entry for
- [i2c|of]_device_id tables
-Organization: O.S. Systems Software LTDA.
-
-Also remove PFUZE_NUM to avoid below build warnings:
-
- CC [M] drivers/regulator/pfuze100-regulator.o
-drivers/regulator/pfuze100-regulator.c:86:2: warning: excess elements in array initializer [enabled by default]
-drivers/regulator/pfuze100-regulator.c:86:2: warning: (near initialization for 'pfuze_device_id') [enabled by default]
-drivers/regulator/pfuze100-regulator.c:93:2: warning: excess elements in array initializer [enabled by default]
-drivers/regulator/pfuze100-regulator.c:93:2: warning: (near initialization for 'pfuze_dt_ids') [enabled by default]
-
-Signed-off-by: Axel Lin <axel.lin@ingics.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit e6c4c3378d82c5eeb136ed06b1a23651bcdaf739)
-(cherry picked from commit 12c7dd7c396378fd6dc907903a4ae540a75b31f5)
-
-Upstream-Status: Pending
----
- drivers/regulator/pfuze100-regulator.c | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
-index 35b1de1..0f4924e0 100644
---- a/drivers/regulator/pfuze100-regulator.c
-+++ b/drivers/regulator/pfuze100-regulator.c
-@@ -56,7 +56,7 @@
- #define PFUZE100_VGEN5VOL 0x70
- #define PFUZE100_VGEN6VOL 0x71
-
--enum chips {PFUZE100, PFUZE200, PFUZE_NUM};
-+enum chips { PFUZE100, PFUZE200 };
-
- struct pfuze_regulator {
- struct regulator_desc desc;
-@@ -80,15 +80,17 @@ static const int pfuze100_vsnvs[] = {
- 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
- };
-
--static const struct i2c_device_id pfuze_device_id[PFUZE_NUM] = {
-+static const struct i2c_device_id pfuze_device_id[] = {
- {.name = "pfuze100", .driver_data = PFUZE100},
- {.name = "pfuze200", .driver_data = PFUZE200},
-+ { }
- };
- MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
-
--static const struct of_device_id pfuze_dt_ids[PFUZE_NUM] = {
-+static const struct of_device_id pfuze_dt_ids[] = {
- { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
- { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
-+ { }
- };
- MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
-
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch b/recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch
deleted file mode 100644
index 7fcc79d..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 2610dd3d4f0f167b77c4ce24e1756f7434a17cde Mon Sep 17 00:00:00 2001
-From: Axel Lin <axel.lin@ingics.com>
-Date: Wed, 5 Mar 2014 18:02:43 +0800
-Subject: [PATCH 05/10] regulator: pfuze100: Add PFUZE200 support to Kconfig
- and module description
-Organization: O.S. Systems Software LTDA.
-
-Signed-off-by: Axel Lin <axel.lin@ingics.com>
-Acked-by: Robin Gong <b38343@freescale.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 2cee2121db44cfeee206d0854bedd52344eea444)
-
-Signed-off-by: Robin Gong <b38343@freescale.com>
-(cherry picked from commit 88236aaba4ed9b89a7873b30fc1ca9cdcb6b407d)
-
-Upstream-Status: Pending
----
- drivers/regulator/Kconfig | 6 +++---
- drivers/regulator/pfuze100-regulator.c | 2 +-
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
-index 1339404..5b64f2c 100644
---- a/drivers/regulator/Kconfig
-+++ b/drivers/regulator/Kconfig
-@@ -305,12 +305,12 @@ config REGULATOR_PCF50633
- on PCF50633
-
- config REGULATOR_PFUZE100
-- tristate "Support regulators on Freescale PFUZE100 PMIC"
-+ tristate "Freescale PFUZE100/PFUZE200 regulator driver"
- depends on I2C
- select REGMAP_I2C
- help
-- Say y here to support the regulators found on the Freescale PFUZE100
-- PMIC.
-+ Say y here to support the regulators found on the Freescale
-+ PFUZE100/PFUZE200 PMIC.
-
- config REGULATOR_RC5T583
- tristate "RICOH RC5T583 Power regulators"
-diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
-index 0f4924e0..21114f7 100644
---- a/drivers/regulator/pfuze100-regulator.c
-+++ b/drivers/regulator/pfuze100-regulator.c
-@@ -535,6 +535,6 @@ static struct i2c_driver pfuze_driver = {
- module_i2c_driver(pfuze_driver);
-
- MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
--MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100 PMIC");
-+MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/PFUZE200 PMIC");
- MODULE_LICENSE("GPL v2");
- MODULE_ALIAS("i2c:pfuze100-regulator");
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch b/recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch
deleted file mode 100644
index 21b2e0c..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From cef8d38fc22ed27e26c8b3d8594c152b6c542253 Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Fri, 14 Feb 2014 17:20:00 +0530
-Subject: [PATCH 06/10] regulator: pfuze100: Use of_get_child_by_name
-Organization: O.S. Systems Software LTDA.
-
-of_find_node_by_name walks the allnodes list, and can thus walk
-outside of the parent node. Use of_get_child_by_name instead.
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 4d286178d55cc5811d50750a44eb729252adef11)
-
-Upstream-Status: Pending
----
- drivers/regulator/pfuze100-regulator.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
-index 21114f7..15059c74 100644
---- a/drivers/regulator/pfuze100-regulator.c
-+++ b/drivers/regulator/pfuze100-regulator.c
-@@ -299,7 +299,7 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
- if (!np)
- return 0;
-
-- parent = of_find_node_by_name(np, "regulators");
-+ parent = of_get_child_by_name(np, "regulators");
- if (!parent) {
- dev_err(dev, "regulators node not found\n");
- return -EINVAL;
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch b/recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch
deleted file mode 100644
index d077858..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From cc1f086131aa802abc38428a5a690eb5f35c8225 Mon Sep 17 00:00:00 2001
-From: Fabio Estevam <fabio.estevam@freescale.com>
-Date: Tue, 18 Feb 2014 23:46:14 -0300
-Subject: [PATCH 07/10] pfuze100-regulator: Fix of_node_get() parameter
-Organization: O.S. Systems Software LTDA.
-
-Since commit d7857c42 (regulator: pfuze100: Use of_get_child_by_name) we get
-the following probe failure:
-
-pfuze100-regulator 1-0008: Full layer: 1, Metal layer: 0
-pfuze100-regulator 1-0008: FAB: 0, FIN: 0
-pfuze100-regulator 1-0008: regulators node not found
-pfuze100-regulator: probe of 1-0008 failed with error -22
-
-Now that of_get_child_by_name() is used we should adjust the device_node pointer
-'np' to not get the parent node anymore.
-
-Suggested-by: Shawn Guo <shawn.guo@linaro.org>
-Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-Acked-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 0780208ff201feb45e12ebecb39ecac4740b1244)
-
-Upstream-Status: Pending
----
- drivers/regulator/pfuze100-regulator.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
-index 15059c74..b9c1b9a 100644
---- a/drivers/regulator/pfuze100-regulator.c
-+++ b/drivers/regulator/pfuze100-regulator.c
-@@ -295,7 +295,7 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
- struct device_node *np, *parent;
- int ret;
-
-- np = of_node_get(dev->parent->of_node);
-+ np = of_node_get(dev->of_node);
- if (!np)
- return 0;
-
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch b/recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch
deleted file mode 100644
index f1e88d4..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch
+++ /dev/null
@@ -1,752 +0,0 @@
-From 37e501e8c4e1f1511e017aa0a7def38895a47fa6 Mon Sep 17 00:00:00 2001
-From: Robin Gong <b38343@freescale.com>
-Date: Thu, 6 Mar 2014 18:59:30 +0800
-Subject: [PATCH 08/10] ENGR00301078-1: ARM: dts: imx6dl-sabresd: add support
- for pfuze200 on mx6dl-sabresd
-Organization: O.S. Systems Software LTDA.
-
-move pmic device node from imx6qdl-sabresd.dtsi to up-level, and add
-another layer on imx6dl-sabresd to diff pfuze100 or pfuze200. Meanwhile
-only work in ldo-enable mode if using pfuze200,since 'SW1C' switch
-regulator is cut for cost-down which means VDDARM_IN and VDDSOC_IN have
-to share the same switch regulator
-
-Signed-off-by: Robin Gong <b38343@freescale.com>
-(cherry picked from commit 32e4e161b087bfdcea74bd80f0b24c341092c96b)
-
-Upstream-Status: Pending
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/imx6dl-sabresd-common.dtsi | 130 ++++++++++++++++++++
- arch/arm/boot/dts/imx6dl-sabresd-pf200.dts | 126 +++++++++++++++++++
- arch/arm/boot/dts/imx6dl-sabresd.dts | 175 ++++++++++++---------------
- arch/arm/boot/dts/imx6q-sabresd.dts | 101 ++++++++++++++++
- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 99 ---------------
- 6 files changed, 435 insertions(+), 197 deletions(-)
- create mode 100644 arch/arm/boot/dts/imx6dl-sabresd-common.dtsi
- create mode 100644 arch/arm/boot/dts/imx6dl-sabresd-pf200.dts
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index f43b68b..c744cda 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
- imx6dl-sabresd.dtb \
- imx6dl-sabresd-hdcp.dtb \
- imx6dl-sabresd-ldo.dtb \
-+ imx6dl-sabresd-pf200.dtb \
- imx6dl-wandboard.dtb \
- imx6q-arm2.dtb \
- imx6q-sabreauto.dtb \
-diff --git a/arch/arm/boot/dts/imx6dl-sabresd-common.dtsi b/arch/arm/boot/dts/imx6dl-sabresd-common.dtsi
-new file mode 100644
-index 0000000..2a07534
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6dl-sabresd-common.dtsi
-@@ -0,0 +1,130 @@
-+/*
-+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+&battery {
-+ offset-charger = <1485>;
-+ offset-discharger = <1464>;
-+ offset-usb-charger = <1285>;
-+};
-+
-+&i2c3 {
-+ max17135@48 {
-+ compatible = "maxim,max17135";
-+ reg = <0x48>;
-+ vneg_pwrup = <1>;
-+ gvee_pwrup = <1>;
-+ vpos_pwrup = <2>;
-+ gvdd_pwrup = <1>;
-+ gvdd_pwrdn = <1>;
-+ vpos_pwrdn = <2>;
-+ gvee_pwrdn = <1>;
-+ vneg_pwrdn = <1>;
-+ SENSOR-supply = <®_sensor>;
-+ gpio_pmic_pwrgood = <&gpio2 21 0>;
-+ gpio_pmic_vcom_ctrl = <&gpio3 17 0>;
-+ gpio_pmic_wakeup = <&gpio3 20 0>;
-+ gpio_pmic_v3p3 = <&gpio2 20 0>;
-+ gpio_pmic_intr = <&gpio2 25 0>;
-+
-+ regulators {
-+ DISPLAY_reg: DISPLAY {
-+ regulator-name = "DISPLAY";
-+ };
-+
-+ GVDD_reg: GVDD {
-+ /* 20v */
-+ regulator-name = "GVDD";
-+ };
-+
-+ GVEE_reg: GVEE {
-+ /* -22v */
-+ regulator-name = "GVEE";
-+ };
-+
-+ HVINN_reg: HVINN {
-+ /* -22v */
-+ regulator-name = "HVINN";
-+ };
-+
-+ HVINP_reg: HVINP {
-+ /* 20v */
-+ regulator-name = "HVINP";
-+ };
-+
-+ VCOM_reg: VCOM {
-+ regulator-name = "VCOM";
-+ /* 2's-compliment, -4325000 */
-+ regulator-min-microvolt = <0xffbe0178>;
-+ /* 2's-compliment, -500000 */
-+ regulator-max-microvolt = <0xfff85ee0>;
-+ };
-+
-+ VNEG_reg: VNEG {
-+ /* -15v */
-+ regulator-name = "VNEG";
-+ };
-+
-+ VPOS_reg: VPOS {
-+ /* 15v */
-+ regulator-name = "VPOS";
-+ };
-+
-+ V3P3_reg: V3P3 {
-+ regulator-name = "V3P3";
-+ };
-+ };
-+ };
-+};
-+
-+&iomuxc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_hog_1>, <&pinctrl_hog_2>;
-+
-+ hog {
-+ pinctrl_hog_2: hoggrp-2 {
-+ fsl,pins = <
-+ /* MAX17135 */
-+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
-+ MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x80000000
-+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
-+ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000
-+ MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000
-+ /* elan touch */
-+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000
-+ MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000
-+ MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x170b0
-+ >;
-+ };
-+ };
-+};
-+
-+&epdc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_epdc_0>;
-+ V3P3-supply = <&V3P3_reg>;
-+ VCOM-supply = <&VCOM_reg>;
-+ DISPLAY-supply = <&DISPLAY_reg>;
-+ status = "okay";
-+};
-+
-+&ldb {
-+ ipu_id = <0>;
-+ sec_ipu_id = <0>;
-+};
-+
-+&mxcfb1 {
-+ status = "okay";
-+};
-+
-+&mxcfb2 {
-+ status = "okay";
-+};
-+
-+&pxp {
-+ status = "okay";
-+};
-diff --git a/arch/arm/boot/dts/imx6dl-sabresd-pf200.dts b/arch/arm/boot/dts/imx6dl-sabresd-pf200.dts
-new file mode 100644
-index 0000000..499f7d3
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6dl-sabresd-pf200.dts
-@@ -0,0 +1,126 @@
-+/*
-+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/dts-v1/;
-+
-+#include "imx6dl.dtsi"
-+#include "imx6qdl-sabresd.dtsi"
-+#include "imx6dl-sabresd-common.dtsi"
-+
-+/ {
-+ model = "Freescale i.MX6 DualLite SABRE Smart Device Board(PFUZE200)";
-+ compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
-+};
-+
-+&cpu0 {
-+ arm-supply = <®_arm>;
-+ soc-supply = <®_soc>;
-+ pu-supply = <®_pu>; /* use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&gpc {
-+ fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */
-+ fsl,wdog-reset = <1>; /* watchdog select of reset source */
-+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&gpu {
-+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&vpu {
-+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&i2c2 {
-+ pmic: pfuze200@08 {
-+ compatible = "fsl,pfuze200";
-+ reg = <0x08>;
-+
-+ regulators {
-+ sw1a_reg: sw1ab {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
-+ };
-+
-+ sw2_reg: sw2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3a_reg: sw3a {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3b_reg: sw3b {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ swbst_reg: swbst {
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5150000>;
-+ };
-+
-+ snvs_reg: vsnvs {
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vref_reg: vrefddr {
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vgen1_reg: vgen1 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen2_reg: vgen2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen3_reg: vgen3 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ vgen4_reg: vgen4 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen5_reg: vgen5 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen6_reg: vgen6 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-+};
-diff --git a/arch/arm/boot/dts/imx6dl-sabresd.dts b/arch/arm/boot/dts/imx6dl-sabresd.dts
-index 5713c71..b4c738d 100644
---- a/arch/arm/boot/dts/imx6dl-sabresd.dts
-+++ b/arch/arm/boot/dts/imx6dl-sabresd.dts
-@@ -1,5 +1,5 @@
- /*
-- * Copyright (C) 2013 Freescale Semiconductor, Inc.
-+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
-@@ -10,131 +10,110 @@
-
- #include "imx6dl.dtsi"
- #include "imx6qdl-sabresd.dtsi"
-+#include "imx6dl-sabresd-common.dtsi"
-
- / {
-- model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
-+ model = "Freescale i.MX6 DualLite SABRE Smart Device Board(PFUZE100)";
- compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
- };
-
--&battery {
-- offset-charger = <1485>;
-- offset-discharger = <1464>;
-- offset-usb-charger = <1285>;
--};
--
--&i2c3 {
-- max17135@48 {
-- compatible = "maxim,max17135";
-- reg = <0x48>;
-- vneg_pwrup = <1>;
-- gvee_pwrup = <1>;
-- vpos_pwrup = <2>;
-- gvdd_pwrup = <1>;
-- gvdd_pwrdn = <1>;
-- vpos_pwrdn = <2>;
-- gvee_pwrdn = <1>;
-- vneg_pwrdn = <1>;
-- SENSOR-supply = <®_sensor>;
-- gpio_pmic_pwrgood = <&gpio2 21 0>;
-- gpio_pmic_vcom_ctrl = <&gpio3 17 0>;
-- gpio_pmic_wakeup = <&gpio3 20 0>;
-- gpio_pmic_v3p3 = <&gpio2 20 0>;
-- gpio_pmic_intr = <&gpio2 25 0>;
-+&i2c2 {
-+ pmic: pfuze100@08 {
-+ compatible = "fsl,pfuze100";
-+ reg = <0x08>;
-
- regulators {
-- DISPLAY_reg: DISPLAY {
-- regulator-name = "DISPLAY";
-+ sw1a_reg: sw1ab {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
- };
-
-- GVDD_reg: GVDD {
-- /* 20v */
-- regulator-name = "GVDD";
-+ sw1c_reg: sw1c {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
- };
-
-- GVEE_reg: GVEE {
-- /* -22v */
-- regulator-name = "GVEE";
-+ sw2_reg: sw2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
- };
-
-- HVINN_reg: HVINN {
-- /* -22v */
-- regulator-name = "HVINN";
-+ sw3a_reg: sw3a {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
- };
-
-- HVINP_reg: HVINP {
-- /* 20v */
-- regulator-name = "HVINP";
-+ sw3b_reg: sw3b {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
- };
-
-- VCOM_reg: VCOM {
-- regulator-name = "VCOM";
-- /* 2's-compliment, -4325000 */
-- regulator-min-microvolt = <0xffbe0178>;
-- /* 2's-compliment, -500000 */
-- regulator-max-microvolt = <0xfff85ee0>;
-+ sw4_reg: sw4 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
- };
-
-- VNEG_reg: VNEG {
-- /* -15v */
-- regulator-name = "VNEG";
-+ swbst_reg: swbst {
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5150000>;
- };
-
-- VPOS_reg: VPOS {
-- /* 15v */
-- regulator-name = "VPOS";
-+ snvs_reg: vsnvs {
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
- };
-
-- V3P3_reg: V3P3 {
-- regulator-name = "V3P3";
-+ vref_reg: vrefddr {
-+ regulator-boot-on;
-+ regulator-always-on;
- };
-- };
-- };
--};
-
--&iomuxc {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_hog_1>, <&pinctrl_hog_2>;
--
-- hog {
-- pinctrl_hog_2: hoggrp-2 {
-- fsl,pins = <
-- /* MAX17135 */
-- MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
-- MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x80000000
-- MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
-- MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000
-- MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000
-- /* elan touch */
-- MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000
-- MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000
-- MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x170b0
-- >;
-- };
-- };
--};
-+ vgen1_reg: vgen1 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-
--&epdc {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_epdc_0>;
-- V3P3-supply = <&V3P3_reg>;
-- VCOM-supply = <&VCOM_reg>;
-- DISPLAY-supply = <&DISPLAY_reg>;
-- status = "okay";
--};
-+ vgen2_reg: vgen2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-
--&ldb {
-- ipu_id = <0>;
-- sec_ipu_id = <0>;
--};
-+ vgen3_reg: vgen3 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-
--&mxcfb1 {
-- status = "okay";
--};
-+ vgen4_reg: vgen4 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-
--&mxcfb2 {
-- status = "okay";
--};
-+ vgen5_reg: vgen5 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-
--&pxp {
-- status = "okay";
-+ vgen6_reg: vgen6 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
- };
-diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
-index 072e7d3..5e5ff56 100644
---- a/arch/arm/boot/dts/imx6q-sabresd.dts
-+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
-@@ -26,6 +26,107 @@
- offset-usb-charger = <1685>;
- };
-
-+&i2c2 {
-+ pmic: pfuze100@08 {
-+ compatible = "fsl,pfuze100";
-+ reg = <0x08>;
-+
-+ regulators {
-+ sw1a_reg: sw1ab {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
-+ };
-+
-+ sw1c_reg: sw1c {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
-+ };
-+
-+ sw2_reg: sw2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3a_reg: sw3a {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3b_reg: sw3b {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw4_reg: sw4 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ swbst_reg: swbst {
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5150000>;
-+ };
-+
-+ snvs_reg: vsnvs {
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vref_reg: vrefddr {
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vgen1_reg: vgen1 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen2_reg: vgen2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen3_reg: vgen3 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ vgen4_reg: vgen4 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen5_reg: vgen5 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen6_reg: vgen6 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-+};
-+
- &mxcfb1 {
- status = "okay";
- };
-diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
-index 66b6145..5d774e5 100644
---- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
-@@ -405,105 +405,6 @@
- mclk_source = <0>;
- };
-
-- pmic: pfuze100@08 {
-- compatible = "fsl,pfuze100";
-- reg = <0x08>;
--
-- regulators {
-- sw1a_reg: sw1ab {
-- regulator-min-microvolt = <300000>;
-- regulator-max-microvolt = <1875000>;
-- regulator-boot-on;
-- regulator-always-on;
-- regulator-ramp-delay = <6250>;
-- };
--
-- sw1c_reg: sw1c {
-- regulator-min-microvolt = <300000>;
-- regulator-max-microvolt = <1875000>;
-- regulator-boot-on;
-- regulator-always-on;
-- regulator-ramp-delay = <6250>;
-- };
--
-- sw2_reg: sw2 {
-- regulator-min-microvolt = <800000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-boot-on;
-- regulator-always-on;
-- };
--
-- sw3a_reg: sw3a {
-- regulator-min-microvolt = <400000>;
-- regulator-max-microvolt = <1975000>;
-- regulator-boot-on;
-- regulator-always-on;
-- };
--
-- sw3b_reg: sw3b {
-- regulator-min-microvolt = <400000>;
-- regulator-max-microvolt = <1975000>;
-- regulator-boot-on;
-- regulator-always-on;
-- };
--
-- sw4_reg: sw4 {
-- regulator-min-microvolt = <800000>;
-- regulator-max-microvolt = <3300000>;
-- };
--
-- swbst_reg: swbst {
-- regulator-min-microvolt = <5000000>;
-- regulator-max-microvolt = <5150000>;
-- };
--
-- snvs_reg: vsnvs {
-- regulator-min-microvolt = <1000000>;
-- regulator-max-microvolt = <3000000>;
-- regulator-boot-on;
-- regulator-always-on;
-- };
--
-- vref_reg: vrefddr {
-- regulator-boot-on;
-- regulator-always-on;
-- };
--
-- vgen1_reg: vgen1 {
-- regulator-min-microvolt = <800000>;
-- regulator-max-microvolt = <1550000>;
-- };
--
-- vgen2_reg: vgen2 {
-- regulator-min-microvolt = <800000>;
-- regulator-max-microvolt = <1550000>;
-- };
--
-- vgen3_reg: vgen3 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <3300000>;
-- };
--
-- vgen4_reg: vgen4 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-always-on;
-- };
--
-- vgen5_reg: vgen5 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-always-on;
-- };
--
-- vgen6_reg: vgen6 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-always-on;
-- };
-- };
-- };
--
- egalax_ts@04 {
- compatible = "eeti,egalax_ts";
- reg = <0x04>;
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch b/recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch
deleted file mode 100644
index 326e0a7..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch
+++ /dev/null
@@ -1,1202 +0,0 @@
-From 3082ee40d024412e8c275f1945e4a06a638e81bb Mon Sep 17 00:00:00 2001
-From: Robin Gong <b38343@freescale.com>
-Date: Thu, 6 Mar 2014 19:36:02 +0800
-Subject: [PATCH 09/10] ENGR00301078-2: ARM: dts: imx6sl-evk: add support for
- pfuze200 on imx6sl-evk
-Organization: O.S. Systems Software LTDA.
-
-move pmic device node from imx6sl-evk.dtsi to upper-level, and add
-another layer on imx6sl-evk to diff pfuze100 or pfuze200. Meanwhile
-only works in ldo-enable mode if using pfuze200, since 'SW1C' switch
-regulator is cut for cost-down which means VDDARM_IN and VDDSOC_IN have
-to share the same switch regulator
-
-Signed-off-by: Robin Gong <b38343@freescale.com>
-
-Upstream-Status: Pending
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/imx6sl-evk-common.dtsi | 504 +++++++++++++++++++++++++++++++
- arch/arm/boot/dts/imx6sl-evk-pf200.dts | 122 ++++++++
- arch/arm/boot/dts/imx6sl-evk.dts | 497 +-----------------------------
- 4 files changed, 630 insertions(+), 494 deletions(-)
- create mode 100644 arch/arm/boot/dts/imx6sl-evk-common.dtsi
- create mode 100644 arch/arm/boot/dts/imx6sl-evk-pf200.dts
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index c744cda..c5f9a19 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -135,6 +135,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
- imx6sl-evk.dtb \
- imx6sl-evk-csi.dtb \
- imx6sl-evk-ldo.dtb \
-+ imx6sl-evk-pf200.dtb \
- vf610-twr.dtb
- dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
- imx23-olinuxino.dtb \
-diff --git a/arch/arm/boot/dts/imx6sl-evk-common.dtsi b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
-new file mode 100644
-index 0000000..a1a3969
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
-@@ -0,0 +1,504 @@
-+/*
-+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/ {
-+ memory {
-+ reg = <0x80000000 0x40000000>;
-+ };
-+
-+ battery: max8903@0 {
-+ compatible = "fsl,max8903-charger";
-+ pinctrl-names = "default";
-+ dok_input = <&gpio4 13 1>;
-+ uok_input = <&gpio4 13 1>;
-+ chg_input = <&gpio4 15 1>;
-+ flt_input = <&gpio4 14 1>;
-+ fsl,dcm_always_high;
-+ fsl,dc_valid;
-+ fsl,adc_disable;
-+ status = "okay";
-+ };
-+
-+ regulators {
-+ compatible = "simple-bus";
-+
-+ reg_lcd_3v3: lcd-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "lcd-3v3";
-+ gpio = <&gpio4 3 0>;
-+ enable-active-high;
-+ };
-+
-+ reg_aud3v: wm8962_supply_3v15 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "wm8962-supply-3v15";
-+ regulator-min-microvolt = <3150000>;
-+ regulator-max-microvolt = <3150000>;
-+ regulator-boot-on;
-+ };
-+
-+ reg_aud4v: wm8962_supply_4v2 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "wm8962-supply-4v2";
-+ regulator-min-microvolt = <4325000>;
-+ regulator-max-microvolt = <4325000>;
-+ regulator-boot-on;
-+ };
-+
-+ reg_usb_otg1_vbus: usb_otg1_vbus {
-+ compatible = "regulator-fixed";
-+ regulator-name = "usb_otg1_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio4 0 0>;
-+ enable-active-high;
-+ };
-+
-+ reg_usb_otg2_vbus: usb_otg2_vbus {
-+ compatible = "regulator-fixed";
-+ regulator-name = "usb_otg2_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio4 2 0>;
-+ enable-active-high;
-+ };
-+ };
-+
-+ backlight {
-+ compatible = "pwm-backlight";
-+ pwms = <&pwm1 0 5000000>;
-+ brightness-levels = <0 4 8 16 32 64 128 255>;
-+ default-brightness-level = <6>;
-+ };
-+
-+ csi_v4l2_cap {
-+ compatible = "fsl,imx6sl-csi-v4l2";
-+ status = "disabled";
-+ };
-+
-+ pxp_v4l2_out {
-+ compatible = "fsl,imx6sl-pxp-v4l2";
-+ status = "okay";
-+ };
-+
-+ sound {
-+ compatible = "fsl,imx6q-sabresd-wm8962",
-+ "fsl,imx-audio-wm8962";
-+ model = "wm8962-audio";
-+ ssi-controller = <&ssi2>;
-+ audio-codec = <&codec>;
-+ audio-routing =
-+ "Headphone Jack", "HPOUTL",
-+ "Headphone Jack", "HPOUTR",
-+ "Ext Spk", "SPKOUTL",
-+ "Ext Spk", "SPKOUTR",
-+ "AMIC", "MICBIAS",
-+ "IN3R", "AMIC";
-+ amic-mono;
-+ mux-int-port = <2>;
-+ mux-ext-port = <3>;
-+ hp-det-gpios = <&gpio4 19 1>;
-+ };
-+
-+ sound-spdif {
-+ compatible = "fsl,imx-audio-spdif",
-+ "fsl,imx6sl-evk-spdif";
-+ model = "imx-spdif";
-+ spdif-controller = <&spdif>;
-+ spdif-out;
-+ };
-+
-+ sii902x_reset: sii902x-reset {
-+ compatible = "gpio-reset";
-+ reset-gpios = <&gpio2 19 1>;
-+ reset-delay-us = <100000>;
-+ #reset-cells = <0>;
-+ };
-+};
-+
-+&audmux {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_audmux_1>;
-+ status = "okay";
-+};
-+
-+&csi {
-+ status = "disabled";
-+};
-+
-+&ecspi1 {
-+ fsl,spi-num-chipselects = <1>;
-+ cs-gpios = <&gpio4 11 0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ecspi1_1>;
-+ status = "okay";
-+
-+ flash: m25p80@0 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "st,m25p32";
-+ spi-max-frequency = <20000000>;
-+ reg = <0>;
-+ };
-+};
-+
-+&epdc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_epdc_0>;
-+ V3P3-supply = <&V3P3_reg>;
-+ VCOM-supply = <&VCOM_reg>;
-+ DISPLAY-supply = <&DISPLAY_reg>;
-+ status = "okay";
-+};
-+
-+&cpu0 {
-+ arm-supply = <&sw1a_reg>;
-+ soc-supply = <&sw1c_reg>;
-+ pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&fec {
-+ pinctrl-names = "default", "sleep";
-+ pinctrl-0 = <&pinctrl_fec_1>;
-+ pinctrl-1 = <&pinctrl_fec_1_sleep>;
-+ phy-mode = "rmii";
-+ phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */
-+ phy-reset-duration = <1>;
-+ status = "okay";
-+};
-+
-+&gpc {
-+ fsl,cpu_pupscr_sw2iso = <0xf>;
-+ fsl,cpu_pupscr_sw = <0xf>;
-+ fsl,cpu_pdnscr_iso2sw = <0x1>;
-+ fsl,cpu_pdnscr_iso = <0x1>;
-+ fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
-+ fsl,wdog-reset = <1>; /* watchdog select of reset source */
-+ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&gpu {
-+ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&i2c1 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c1_1>;
-+ status = "okay";
-+
-+ elan@10 {
-+ compatible = "elan,elan-touch";
-+ reg = <0x10>;
-+ interrupt-parent = <&gpio2>;
-+ interrupts = <10 2>;
-+ gpio_elan_cs = <&gpio2 9 0>;
-+ gpio_elan_rst = <&gpio4 4 0>;
-+ gpio_intr = <&gpio2 10 0>;
-+ status = "okay";
-+ };
-+
-+ max17135@48 {
-+ compatible = "maxim,max17135";
-+ reg = <0x48>;
-+ vneg_pwrup = <1>;
-+ gvee_pwrup = <2>;
-+ vpos_pwrup = <10>;
-+ gvdd_pwrup = <12>;
-+ gvdd_pwrdn = <1>;
-+ vpos_pwrdn = <2>;
-+ gvee_pwrdn = <8>;
-+ vneg_pwrdn = <10>;
-+ gpio_pmic_pwrgood = <&gpio2 13 0>;
-+ gpio_pmic_vcom_ctrl = <&gpio2 3 0>;
-+ gpio_pmic_wakeup = <&gpio2 14 0>;
-+ gpio_pmic_v3p3 = <&gpio2 7 0>;
-+ gpio_pmic_intr = <&gpio2 12 0>;
-+
-+ regulators {
-+ DISPLAY_reg: DISPLAY {
-+ regulator-name = "DISPLAY";
-+ };
-+
-+ GVDD_reg: GVDD {
-+ /* 20v */
-+ regulator-name = "GVDD";
-+ };
-+
-+ GVEE_reg: GVEE {
-+ /* -22v */
-+ regulator-name = "GVEE";
-+ };
-+
-+ HVINN_reg: HVINN {
-+ /* -22v */
-+ regulator-name = "HVINN";
-+ };
-+
-+ HVINP_reg: HVINP {
-+ /* 20v */
-+ regulator-name = "HVINP";
-+ };
-+
-+ VCOM_reg: VCOM {
-+ regulator-name = "VCOM";
-+ /* 2's-compliment, -4325000 */
-+ regulator-min-microvolt = <0xffbe0178>;
-+ /* 2's-compliment, -500000 */
-+ regulator-max-microvolt = <0xfff85ee0>;
-+ };
-+
-+ VNEG_reg: VNEG {
-+ /* -15v */
-+ regulator-name = "VNEG";
-+ };
-+
-+ VPOS_reg: VPOS {
-+ /* 15v */
-+ regulator-name = "VPOS";
-+ };
-+
-+ V3P3_reg: V3P3 {
-+ regulator-name = "V3P3";
-+ };
-+ };
-+ };
-+
-+ mma8450@1c {
-+ compatible = "fsl,mma8450";
-+ reg = <0x1c>;
-+ };
-+};
-+
-+&i2c2 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2_1>;
-+ status = "okay";
-+
-+ codec: wm8962@1a {
-+ compatible = "wlf,wm8962";
-+ reg = <0x1a>;
-+ clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
-+ DCVDD-supply = <&vgen3_reg>;
-+ DBVDD-supply = <®_aud3v>;
-+ AVDD-supply = <&vgen3_reg>;
-+ CPVDD-supply = <&vgen3_reg>;
-+ MICVDD-supply = <®_aud3v>;
-+ PLLVDD-supply = <&vgen3_reg>;
-+ SPKVDD1-supply = <®_aud4v>;
-+ SPKVDD2-supply = <®_aud4v>;
-+ amic-mono;
-+ };
-+
-+ sii902x@39 {
-+ compatible = "SiI,sii902x";
-+ interrupt-parent = <&gpio2>;
-+ interrupts = <10 2>;
-+ mode_str ="1280x720M@60";
-+ bits-per-pixel = <32>;
-+ resets = <&sii902x_reset>;
-+ reg = <0x39>;
-+ };
-+};
-+
-+&i2c3 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c3_1>;
-+ status = "disabled";
-+
-+ ov564x: ov564x@3c {
-+ compatible = "ovti,ov564x";
-+ reg = <0x3c>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_csi_0>;
-+ clocks = <&clks IMX6SL_CLK_CSI>;
-+ clock-names = "csi_mclk";
-+ AVDD-supply = <&vgen6_reg>; /* 2.8v */
-+ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
-+ pwn-gpios = <&gpio1 25 1>;
-+ rst-gpios = <&gpio1 26 0>;
-+ csi_id = <0>;
-+ mclk = <24000000>;
-+ mclk_source = <0>;
-+ };
-+};
-+
-+&iomuxc {
-+ pinctrl-names = "default", "sleep";
-+ pinctrl-0 = <&pinctrl_hog>;
-+ pinctrl-1 = <&pinctrl_hog_sleep>;
-+
-+ hog {
-+ pinctrl_hog: hoggrp {
-+ fsl,pins = <
-+ MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
-+ MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
-+ MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
-+ MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
-+ MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
-+ MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000
-+ MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x110b0
-+ MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x80000000
-+ MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000
-+ MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000
-+ MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000
-+ MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000
-+ MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x170b0
-+ MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x80000000
-+ MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x110b0
-+ MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x17000
-+ MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x17000
-+ MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 0x17000
-+ MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b0b0
-+ MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x1b0b0
-+ MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
-+ MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
-+ >;
-+ };
-+
-+ pinctrl_hog_sleep: hoggrp_sleep {
-+ fsl,pins = <
-+ MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x3080
-+ MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x3080
-+ MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x3080
-+ >;
-+ };
-+ };
-+};
-+
-+&kpp {
-+ pinctrl-names = "default", "sleep";
-+ pinctrl-0 = <&pinctrl_kpp_1>;
-+ pinctrl-1 = <&pinctrl_kpp_1_sleep>;
-+ linux,keymap = <
-+ 0x00000067 /* KEY_UP */
-+ 0x0001006c /* KEY_DOWN */
-+ 0x0002001c /* KEY_ENTER */
-+ 0x01000066 /* KEY_HOME */
-+ 0x0101006a /* KEY_RIGHT */
-+ 0x01020069 /* KEY_LEFT */
-+ 0x02000072 /* KEY_VOLUMEDOWN */
-+ 0x02010073 /* KEY_VOLUMEUP */
-+ >;
-+ status = "okay";
-+};
-+
-+&lcdif {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_lcdif_dat_0
-+ &pinctrl_lcdif_ctrl_0>;
-+ lcd-supply = <®_lcd_3v3>;
-+ display = <&display>;
-+ status = "okay";
-+
-+ display: display {
-+ bits-per-pixel = <16>;
-+ bus-width = <24>;
-+
-+ display-timings {
-+ native-mode = <&timing0>;
-+ timing0: timing0 {
-+ clock-frequency = <33500000>;
-+ hactive = <800>;
-+ vactive = <480>;
-+ hback-porch = <89>;
-+ hfront-porch = <164>;
-+ vback-porch = <23>;
-+ vfront-porch = <10>;
-+ hsync-len = <10>;
-+ vsync-len = <10>;
-+ hsync-active = <0>;
-+ vsync-active = <0>;
-+ de-active = <1>;
-+ pixelclk-active = <0>;
-+ };
-+ };
-+ };
-+};
-+
-+&pwm1 {
-+ pinctrl-names = "default", "sleep";
-+ pinctrl-0 = <&pinctrl_pwm1_0>;
-+ pinctrl-1 = <&pinctrl_pwm1_0_sleep>;
-+ status = "okay";
-+};
-+
-+&pxp {
-+ status = "okay";
-+};
-+
-+&spdif {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_spdif_1>;
-+ status = "okay";
-+};
-+
-+&ssi2 {
-+ fsl,mode = "i2s-slave";
-+ status = "okay";
-+};
-+
-+&uart1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart1_1>;
-+ status = "okay";
-+};
-+
-+&usbotg1 {
-+ vbus-supply = <®_usb_otg1_vbus>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotg1_1>;
-+ disable-over-current;
-+ imx6-usb-charger-detection;
-+ status = "okay";
-+};
-+
-+&usbotg2 {
-+ vbus-supply = <®_usb_otg2_vbus>;
-+ dr_mode = "host";
-+ disable-over-current;
-+ status = "okay";
-+};
-+
-+&usdhc1 {
-+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+ pinctrl-0 = <&pinctrl_usdhc1_1>;
-+ pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
-+ bus-width = <8>;
-+ cd-gpios = <&gpio4 7 0>;
-+ wp-gpios = <&gpio4 6 0>;
-+ keep-power-in-suspend;
-+ enable-sdio-wakeup;
-+ status = "okay";
-+};
-+
-+&usdhc2 {
-+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+ pinctrl-0 = <&pinctrl_usdhc2_1>;
-+ pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
-+ cd-gpios = <&gpio5 0 0>;
-+ wp-gpios = <&gpio4 29 0>;
-+ keep-power-in-suspend;
-+ enable-sdio-wakeup;
-+ status = "okay";
-+};
-+
-+&usdhc3 {
-+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+ pinctrl-0 = <&pinctrl_usdhc3_1>;
-+ pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
-+ cd-gpios = <&gpio3 22 0>;
-+ keep-power-in-suspend;
-+ enable-sdio-wakeup;
-+ status = "okay";
-+};
-diff --git a/arch/arm/boot/dts/imx6sl-evk-pf200.dts b/arch/arm/boot/dts/imx6sl-evk-pf200.dts
-new file mode 100644
-index 0000000..55d3081
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6sl-evk-pf200.dts
-@@ -0,0 +1,122 @@
-+/*
-+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/dts-v1/;
-+
-+#include "imx6sl.dtsi"
-+#include "imx6sl-evk-common.dtsi"
-+
-+/ {
-+ model = "Freescale i.MX6 SoloLite EVK Board(PFUZE200)";
-+ compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
-+};
-+
-+&cpu0 {
-+ arm-supply = <®_arm>;
-+ soc-supply = <®_soc>;
-+ pu-supply = <®_pu>; /* use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&gpc {
-+ fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */
-+ fsl,wdog-reset = <1>; /* watchdog select of reset source */
-+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&gpu {
-+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
-+
-+&i2c1 {
-+ pmic: pfuze200@08 {
-+ compatible = "fsl,pfuze200";
-+ reg = <0x08>;
-+
-+ regulators {
-+ sw1a_reg: sw1ab {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
-+ };
-+
-+ sw2_reg: sw2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3a_reg: sw3a {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3b_reg: sw3b {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ swbst_reg: swbst {
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5150000>;
-+ };
-+
-+ snvs_reg: vsnvs {
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vref_reg: vrefddr {
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vgen1_reg: vgen1 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen2_reg: vgen2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen3_reg: vgen3 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen4_reg: vgen4 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen5_reg: vgen5 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen6_reg: vgen6 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-+};
-diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
-index 4966f38..ed0ce89 100644
---- a/arch/arm/boot/dts/imx6sl-evk.dts
-+++ b/arch/arm/boot/dts/imx6sl-evk.dts
-@@ -1,5 +1,5 @@
- /*
-- * Copyright (C) 2013 Freescale Semiconductor, Inc.
-+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
-@@ -9,195 +9,14 @@
- /dts-v1/;
-
- #include "imx6sl.dtsi"
-+#include "imx6sl-evk-common.dtsi"
-
- / {
-- model = "Freescale i.MX6 SoloLite EVK Board";
-+ model = "Freescale i.MX6 SoloLite EVK Board(PFUZE100)";
- compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
--
-- memory {
-- reg = <0x80000000 0x40000000>;
-- };
--
-- battery: max8903@0 {
-- compatible = "fsl,max8903-charger";
-- pinctrl-names = "default";
-- dok_input = <&gpio4 13 1>;
-- uok_input = <&gpio4 13 1>;
-- chg_input = <&gpio4 15 1>;
-- flt_input = <&gpio4 14 1>;
-- fsl,dcm_always_high;
-- fsl,dc_valid;
-- fsl,adc_disable;
-- status = "okay";
-- };
-- regulators {
-- compatible = "simple-bus";
--
-- reg_lcd_3v3: lcd-3v3 {
-- compatible = "regulator-fixed";
-- regulator-name = "lcd-3v3";
-- gpio = <&gpio4 3 0>;
-- enable-active-high;
-- };
--
-- reg_aud3v: wm8962_supply_3v15 {
-- compatible = "regulator-fixed";
-- regulator-name = "wm8962-supply-3v15";
-- regulator-min-microvolt = <3150000>;
-- regulator-max-microvolt = <3150000>;
-- regulator-boot-on;
-- };
--
-- reg_aud4v: wm8962_supply_4v2 {
-- compatible = "regulator-fixed";
-- regulator-name = "wm8962-supply-4v2";
-- regulator-min-microvolt = <4325000>;
-- regulator-max-microvolt = <4325000>;
-- regulator-boot-on;
-- };
--
-- reg_usb_otg1_vbus: usb_otg1_vbus {
-- compatible = "regulator-fixed";
-- regulator-name = "usb_otg1_vbus";
-- regulator-min-microvolt = <5000000>;
-- regulator-max-microvolt = <5000000>;
-- gpio = <&gpio4 0 0>;
-- enable-active-high;
-- };
--
-- reg_usb_otg2_vbus: usb_otg2_vbus {
-- compatible = "regulator-fixed";
-- regulator-name = "usb_otg2_vbus";
-- regulator-min-microvolt = <5000000>;
-- regulator-max-microvolt = <5000000>;
-- gpio = <&gpio4 2 0>;
-- enable-active-high;
-- };
-- };
--
-- backlight {
-- compatible = "pwm-backlight";
-- pwms = <&pwm1 0 5000000>;
-- brightness-levels = <0 4 8 16 32 64 128 255>;
-- default-brightness-level = <6>;
-- };
--
-- csi_v4l2_cap {
-- compatible = "fsl,imx6sl-csi-v4l2";
-- status = "disabled";
-- };
--
-- pxp_v4l2_out {
-- compatible = "fsl,imx6sl-pxp-v4l2";
-- status = "okay";
-- };
--
-- sound {
-- compatible = "fsl,imx6q-sabresd-wm8962",
-- "fsl,imx-audio-wm8962";
-- model = "wm8962-audio";
-- ssi-controller = <&ssi2>;
-- audio-codec = <&codec>;
-- audio-routing =
-- "Headphone Jack", "HPOUTL",
-- "Headphone Jack", "HPOUTR",
-- "Ext Spk", "SPKOUTL",
-- "Ext Spk", "SPKOUTR",
-- "AMIC", "MICBIAS",
-- "IN3R", "AMIC";
-- amic-mono;
-- mux-int-port = <2>;
-- mux-ext-port = <3>;
-- hp-det-gpios = <&gpio4 19 1>;
-- };
--
-- sound-spdif {
-- compatible = "fsl,imx-audio-spdif",
-- "fsl,imx6sl-evk-spdif";
-- model = "imx-spdif";
-- spdif-controller = <&spdif>;
-- spdif-out;
-- };
--
-- sii902x_reset: sii902x-reset {
-- compatible = "gpio-reset";
-- reset-gpios = <&gpio2 19 1>;
-- reset-delay-us = <100000>;
-- #reset-cells = <0>;
-- };
--};
--
--&audmux {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_audmux_1>;
-- status = "okay";
--};
--
--&csi {
-- status = "disabled";
--};
--
--&ecspi1 {
-- fsl,spi-num-chipselects = <1>;
-- cs-gpios = <&gpio4 11 0>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_ecspi1_1>;
-- status = "okay";
--
-- flash: m25p80@0 {
-- #address-cells = <1>;
-- #size-cells = <1>;
-- compatible = "st,m25p32";
-- spi-max-frequency = <20000000>;
-- reg = <0>;
-- };
--};
--
--&epdc {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_epdc_0>;
-- V3P3-supply = <&V3P3_reg>;
-- VCOM-supply = <&VCOM_reg>;
-- DISPLAY-supply = <&DISPLAY_reg>;
-- status = "okay";
--};
--
--&cpu0 {
-- arm-supply = <&sw1a_reg>;
-- soc-supply = <&sw1c_reg>;
-- pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
--};
--
--&fec {
-- pinctrl-names = "default", "sleep";
-- pinctrl-0 = <&pinctrl_fec_1>;
-- pinctrl-1 = <&pinctrl_fec_1_sleep>;
-- phy-mode = "rmii";
-- phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */
-- phy-reset-duration = <1>;
-- status = "okay";
--};
--
--&gpc {
-- fsl,cpu_pupscr_sw2iso = <0xf>;
-- fsl,cpu_pupscr_sw = <0xf>;
-- fsl,cpu_pdnscr_iso2sw = <0x1>;
-- fsl,cpu_pdnscr_iso = <0x1>;
-- fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
-- fsl,wdog-reset = <1>; /* watchdog select of reset source */
-- pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
--};
--
--&gpu {
-- pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
- };
-
- &i2c1 {
-- clock-frequency = <100000>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_i2c1_1>;
-- status = "okay";
--
- pmic: pfuze100@08 {
- compatible = "fsl,pfuze100";
- reg = <0x08>;
-@@ -297,314 +116,4 @@
- };
- };
- };
--
-- elan@10 {
-- compatible = "elan,elan-touch";
-- reg = <0x10>;
-- interrupt-parent = <&gpio2>;
-- interrupts = <10 2>;
-- gpio_elan_cs = <&gpio2 9 0>;
-- gpio_elan_rst = <&gpio4 4 0>;
-- gpio_intr = <&gpio2 10 0>;
-- status = "okay";
-- };
--
-- max17135@48 {
-- compatible = "maxim,max17135";
-- reg = <0x48>;
-- vneg_pwrup = <1>;
-- gvee_pwrup = <2>;
-- vpos_pwrup = <10>;
-- gvdd_pwrup = <12>;
-- gvdd_pwrdn = <1>;
-- vpos_pwrdn = <2>;
-- gvee_pwrdn = <8>;
-- vneg_pwrdn = <10>;
-- gpio_pmic_pwrgood = <&gpio2 13 0>;
-- gpio_pmic_vcom_ctrl = <&gpio2 3 0>;
-- gpio_pmic_wakeup = <&gpio2 14 0>;
-- gpio_pmic_v3p3 = <&gpio2 7 0>;
-- gpio_pmic_intr = <&gpio2 12 0>;
--
-- regulators {
-- DISPLAY_reg: DISPLAY {
-- regulator-name = "DISPLAY";
-- };
--
-- GVDD_reg: GVDD {
-- /* 20v */
-- regulator-name = "GVDD";
-- };
--
-- GVEE_reg: GVEE {
-- /* -22v */
-- regulator-name = "GVEE";
-- };
--
-- HVINN_reg: HVINN {
-- /* -22v */
-- regulator-name = "HVINN";
-- };
--
-- HVINP_reg: HVINP {
-- /* 20v */
-- regulator-name = "HVINP";
-- };
--
-- VCOM_reg: VCOM {
-- regulator-name = "VCOM";
-- /* 2's-compliment, -4325000 */
-- regulator-min-microvolt = <0xffbe0178>;
-- /* 2's-compliment, -500000 */
-- regulator-max-microvolt = <0xfff85ee0>;
-- };
--
-- VNEG_reg: VNEG {
-- /* -15v */
-- regulator-name = "VNEG";
-- };
--
-- VPOS_reg: VPOS {
-- /* 15v */
-- regulator-name = "VPOS";
-- };
--
-- V3P3_reg: V3P3 {
-- regulator-name = "V3P3";
-- };
-- };
-- };
--
-- mma8450@1c {
-- compatible = "fsl,mma8450";
-- reg = <0x1c>;
-- };
--};
--
--&i2c2 {
-- clock-frequency = <100000>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_i2c2_1>;
-- status = "okay";
--
-- codec: wm8962@1a {
-- compatible = "wlf,wm8962";
-- reg = <0x1a>;
-- clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
-- DCVDD-supply = <&vgen3_reg>;
-- DBVDD-supply = <®_aud3v>;
-- AVDD-supply = <&vgen3_reg>;
-- CPVDD-supply = <&vgen3_reg>;
-- MICVDD-supply = <®_aud3v>;
-- PLLVDD-supply = <&vgen3_reg>;
-- SPKVDD1-supply = <®_aud4v>;
-- SPKVDD2-supply = <®_aud4v>;
-- amic-mono;
-- };
--
-- sii902x@39 {
-- compatible = "SiI,sii902x";
-- interrupt-parent = <&gpio2>;
-- interrupts = <10 2>;
-- mode_str ="1280x720M@60";
-- bits-per-pixel = <32>;
-- resets = <&sii902x_reset>;
-- reg = <0x39>;
-- };
--};
--
--&i2c3 {
-- clock-frequency = <100000>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_i2c3_1>;
-- status = "disabled";
--
-- ov564x: ov564x@3c {
-- compatible = "ovti,ov564x";
-- reg = <0x3c>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_csi_0>;
-- clocks = <&clks IMX6SL_CLK_CSI>;
-- clock-names = "csi_mclk";
-- AVDD-supply = <&vgen6_reg>; /* 2.8v */
-- DVDD-supply = <&vgen2_reg>; /* 1.5v*/
-- pwn-gpios = <&gpio1 25 1>;
-- rst-gpios = <&gpio1 26 0>;
-- csi_id = <0>;
-- mclk = <24000000>;
-- mclk_source = <0>;
-- };
--};
--
--&iomuxc {
-- pinctrl-names = "default", "sleep";
-- pinctrl-0 = <&pinctrl_hog>;
-- pinctrl-1 = <&pinctrl_hog_sleep>;
--
-- hog {
-- pinctrl_hog: hoggrp {
-- fsl,pins = <
-- MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
-- MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
-- MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
-- MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
-- MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
-- MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000
-- MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x110b0
-- MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x80000000
-- MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000
-- MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000
-- MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000
-- MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000
-- MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x170b0
-- MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x80000000
-- MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x110b0
-- MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x17000
-- MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x17000
-- MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 0x17000
-- MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b0b0
-- MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x1b0b0
-- MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
-- MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
-- >;
-- };
--
-- pinctrl_hog_sleep: hoggrp_sleep {
-- fsl,pins = <
-- MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x3080
-- MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x3080
-- MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x3080
-- >;
-- };
-- };
--};
--
--&kpp {
-- pinctrl-names = "default", "sleep";
-- pinctrl-0 = <&pinctrl_kpp_1>;
-- pinctrl-1 = <&pinctrl_kpp_1_sleep>;
-- linux,keymap = <
-- 0x00000067 /* KEY_UP */
-- 0x0001006c /* KEY_DOWN */
-- 0x0002001c /* KEY_ENTER */
-- 0x01000066 /* KEY_HOME */
-- 0x0101006a /* KEY_RIGHT */
-- 0x01020069 /* KEY_LEFT */
-- 0x02000072 /* KEY_VOLUMEDOWN */
-- 0x02010073 /* KEY_VOLUMEUP */
-- >;
-- status = "okay";
--};
--
--&lcdif {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_lcdif_dat_0
-- &pinctrl_lcdif_ctrl_0>;
-- lcd-supply = <®_lcd_3v3>;
-- display = <&display>;
-- status = "okay";
--
-- display: display {
-- bits-per-pixel = <16>;
-- bus-width = <24>;
--
-- display-timings {
-- native-mode = <&timing0>;
-- timing0: timing0 {
-- clock-frequency = <33500000>;
-- hactive = <800>;
-- vactive = <480>;
-- hback-porch = <89>;
-- hfront-porch = <164>;
-- vback-porch = <23>;
-- vfront-porch = <10>;
-- hsync-len = <10>;
-- vsync-len = <10>;
-- hsync-active = <0>;
-- vsync-active = <0>;
-- de-active = <1>;
-- pixelclk-active = <0>;
-- };
-- };
-- };
--};
--
--&pwm1 {
-- pinctrl-names = "default", "sleep";
-- pinctrl-0 = <&pinctrl_pwm1_0>;
-- pinctrl-1 = <&pinctrl_pwm1_0_sleep>;
-- status = "okay";
--};
--
--&pxp {
-- status = "okay";
--};
--
--&spdif {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_spdif_1>;
-- status = "okay";
--};
--
--&ssi2 {
-- fsl,mode = "i2s-slave";
-- status = "okay";
--};
--
--&uart1 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_uart1_1>;
-- status = "okay";
--};
--
--&usbotg1 {
-- vbus-supply = <®_usb_otg1_vbus>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usbotg1_1>;
-- disable-over-current;
-- imx6-usb-charger-detection;
-- status = "okay";
--};
--
--&usbotg2 {
-- vbus-supply = <®_usb_otg2_vbus>;
-- dr_mode = "host";
-- disable-over-current;
-- status = "okay";
--};
--
--&usdhc1 {
-- pinctrl-names = "default", "state_100mhz", "state_200mhz";
-- pinctrl-0 = <&pinctrl_usdhc1_1>;
-- pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
-- pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
-- bus-width = <8>;
-- cd-gpios = <&gpio4 7 0>;
-- wp-gpios = <&gpio4 6 0>;
-- keep-power-in-suspend;
-- enable-sdio-wakeup;
-- status = "okay";
--};
--
--&usdhc2 {
-- pinctrl-names = "default", "state_100mhz", "state_200mhz";
-- pinctrl-0 = <&pinctrl_usdhc2_1>;
-- pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
-- pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
-- cd-gpios = <&gpio5 0 0>;
-- wp-gpios = <&gpio4 29 0>;
-- keep-power-in-suspend;
-- enable-sdio-wakeup;
-- status = "okay";
--};
--
--&usdhc3 {
-- pinctrl-names = "default", "state_100mhz", "state_200mhz";
-- pinctrl-0 = <&pinctrl_usdhc3_1>;
-- pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
-- pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
-- cd-gpios = <&gpio3 22 0>;
-- keep-power-in-suspend;
-- enable-sdio-wakeup;
-- status = "okay";
- };
---
-2.1.0
-
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch b/recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch
deleted file mode 100644
index 4459576..0000000
--- a/recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 4a46352d23f1f7b4f513487cb1701a8592ba980f Mon Sep 17 00:00:00 2001
-From: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
-Date: Fri, 13 Jun 2014 15:43:14 -0500
-Subject: [PATCH 10/10] ENGR00318392 ARM:imx6x: Save/restore SCU and some CP15
- registers across suspend/resume
-Organization: O.S. Systems Software LTDA.
-
-This patch ensures that the SCU and certain A9 CP15 registers state are maintained across
-a suspend/resume cycle:
-1. Need to ensure that SCU standby bit is set again after suspend/resume cycle, else
-the system will never WAIT mode after a suspend/resume cycle. This bit should be enabled
-on all SMP systems immaterial of whether CPUIDLE is enabled or not.
-2. Several A9 errata workarounds involve setting bits in the ARM diagnostic register.
-Save/restore this register across a suspend/resume cycle.
-3. Save and restore the A9 power control register also.
-
-Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
-(cherry picked from commit 7b5b4ef5b3cdc65c0576f87cfa52bcca1bda8b33)
-
-Upstream-Status: Pending
----
- arch/arm/mach-imx/cpuidle-imx6q.c | 5 +----
- arch/arm/mach-imx/platsmp.c | 4 +++-
- arch/arm/mach-imx/pm-imx6.c | 36 ++++++++++++++++++++++++++++++++++++
- 3 files changed, 40 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c
-index d74d0ce..9ffbd34 100644
---- a/arch/arm/mach-imx/cpuidle-imx6q.c
-+++ b/arch/arm/mach-imx/cpuidle-imx6q.c
-@@ -1,5 +1,5 @@
- /*
-- * Copyright (C) 2012-2013 Freescale Semiconductor, Inc.
-+ * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
-@@ -65,9 +65,6 @@ static struct cpuidle_driver imx6q_cpuidle_driver = {
-
- int __init imx6q_cpuidle_init(void)
- {
-- /* Need to enable SCU standby for entering WAIT modes */
-- imx_scu_standby_enable();
--
- /* Set cache lpm bit for reliable WAIT mode support */
- imx6_set_cache_lpm_in_wait(true);
-
-diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
-index c6e1ab5..d2fa7ec 100644
---- a/arch/arm/mach-imx/platsmp.c
-+++ b/arch/arm/mach-imx/platsmp.c
-@@ -1,5 +1,5 @@
- /*
-- * Copyright 2011 Freescale Semiconductor, Inc.
-+ * Copyright 2011-2014 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
-@@ -77,6 +77,8 @@ static void __init imx_smp_init_cpus(void)
- void imx_smp_prepare(void)
- {
- scu_enable(scu_base);
-+ /* Need to enable SCU standby for entering WAIT mode */
-+ imx_scu_standby_enable();
- }
-
- static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
-diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
-index de46b87..587cc7e 100644
---- a/arch/arm/mach-imx/pm-imx6.c
-+++ b/arch/arm/mach-imx/pm-imx6.c
-@@ -73,6 +73,8 @@ static int (*suspend_in_iram_fn)(void *iram_vbase,
- unsigned long iram_pbase, unsigned int cpu_type);
- static unsigned int cpu_type;
- static void __iomem *ccm_base;
-+static unsigned long dcr;
-+static unsigned long pcr;
-
- unsigned long save_ttbr1(void)
- {
-@@ -111,6 +113,34 @@ void imx6_set_cache_lpm_in_wait(bool enable)
- }
- }
-
-+static void imx6_save_cpu_arch_regs(void)
-+{
-+ /* Save the Diagnostic Control Register. */
-+ asm volatile(
-+ "mrc p15, 0, %0, c15, c0, 1\n"
-+ : "=r" (dcr)
-+ );
-+ /* Save the Power Control Register. */
-+ asm volatile(
-+ "mrc p15, 0, %0, c15, c0, 0\n"
-+ : "=r" (pcr)
-+ );
-+}
-+
-+static void imx6_restore_cpu_arch_regs(void)
-+{
-+ /* Restore the diagnostic Control Register. */
-+ asm volatile(
-+ "mcr p15, 0, %0, c15, c0, 1\n"
-+ : : "r" (dcr)
-+ );
-+ /* Restore the Power Control Register. */
-+ asm volatile(
-+ "mcr p15, 0, %0, c15, c0, 0\n"
-+ : : "r" (pcr)
-+ );
-+}
-+
- static void imx6_enable_rbc(bool enable)
- {
- u32 val;
-@@ -290,8 +320,14 @@ static int imx6_pm_enter(suspend_state_t state)
- imx_gpc_pre_suspend(true);
- imx_anatop_pre_suspend();
- imx_set_cpu_jump(0, v7_cpu_resume);
-+
-+ imx6_save_cpu_arch_regs();
-+
- /* Zzz ... */
- cpu_suspend(0, imx6_suspend_finish);
-+
-+ imx6_restore_cpu_arch_regs();
-+
- if (!cpu_is_imx6sl())
- imx_smp_prepare();
- imx_anatop_post_resume();
---
-2.1.0
-
--
2.1.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 17:07 [PATCH 0/2][dizzy-next] linux-imx: add clock fix for T1.0 Gary Bisson
2014-12-03 17:07 ` [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2 Gary Bisson
@ 2014-12-03 17:07 ` Gary Bisson
2014-12-03 17:24 ` Daiane Angolini
` (2 more replies)
1 sibling, 3 replies; 13+ messages in thread
From: Gary Bisson @ 2014-12-03 17:07 UTC (permalink / raw)
To: meta-freescale; +Cc: fabio.estevam, Gary Bisson, otavio
A divider was still set to 4 instead of forcing it to 1 as those video
dividers weren't working on early revisions of the SoC.
Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
---
...6q-fix-video-divider-for-revision-1.0-of-.patch | 33 ++++++++++++++++++++++
recipes-kernel/linux/linux-imx_3.10.17.bb | 2 ++
2 files changed, 35 insertions(+)
create mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch b/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
new file mode 100644
index 0000000..bcddb16
--- /dev/null
+++ b/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
@@ -0,0 +1,33 @@
+From ffcd8b98f6ba3a2b7a4aecc1e5e454de5fa5c4c3 Mon Sep 17 00:00:00 2001
+From: Gary Bisson <bisson.gary@gmail.com>
+Date: Tue, 2 Dec 2014 22:11:14 -0800
+Subject: [PATCH] ARM: clk-imx6q: fix video divider for revision 1.0 of i.MX6q
+
+As post dividers do not work on i.MX6Q revision 1.0 they must be fixed
+to 1. As the table index was wrong, a divider a of 4 could still be
+requested which implied the clock not to be set properly. This is the
+root cause of the HDMI not working at high resolution on T1.0 version of
+the SoC, giving the following error:
+mxc_sdc_fb fb.27: timeout when waiting for flip irq
+
+Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
+---
+ arch/arm/mach-imx/clk-imx6q.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
+index e09b1e8..1e5c410 100644
+--- a/arch/arm/mach-imx/clk-imx6q.c
++++ b/arch/arm/mach-imx/clk-imx6q.c
+@@ -279,7 +279,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
+ post_div_table[1].div = 1;
+ post_div_table[2].div = 1;
+ video_div_table[1].div = 1;
+- video_div_table[2].div = 1;
++ video_div_table[3].div = 1;
+ };
+
+ /* type name parent_name base div_mask */
+--
+2.1.3
+
diff --git a/recipes-kernel/linux/linux-imx_3.10.17.bb b/recipes-kernel/linux/linux-imx_3.10.17.bb
index cae1489..143eaab 100644
--- a/recipes-kernel/linux/linux-imx_3.10.17.bb
+++ b/recipes-kernel/linux/linux-imx_3.10.17.bb
@@ -15,4 +15,6 @@ SRCBRANCH = "imx_3.10.17_1.0.0_ga"
SRCREV = "33597e348b2d60dd5c71890ef7b7d3d3fd6e4e97"
LOCALVERSION = "-1.0.2_ga"
+SRC_URI += "file://0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch"
+
COMPATIBLE_MACHINE = "(mx6)"
--
2.1.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 17:07 ` [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q Gary Bisson
@ 2014-12-03 17:24 ` Daiane Angolini
2014-12-03 18:39 ` Eric Nelson
2014-12-03 18:46 ` Fabio Estevam
2 siblings, 0 replies; 13+ messages in thread
From: Daiane Angolini @ 2014-12-03 17:24 UTC (permalink / raw)
To: Gary Bisson; +Cc: meta-freescale, Fabio Estevam, Otavio Salvador
On Wed, Dec 3, 2014 at 3:07 PM, Gary Bisson <bisson.gary@gmail.com> wrote:
> A divider was still set to 4 instead of forcing it to 1 as those video
> dividers weren't working on early revisions of the SoC.
I don´t understand what you want to say here. Would you mind to
re-phrase this commitlog?
"early revisions" has implications. I would love to include in the
commit log *when* the change took place (in TO.123) Do you have this
information?
And please, include Upstream-Status inside the patch you're including.
Daiane
>
> Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
> ---
> ...6q-fix-video-divider-for-revision-1.0-of-.patch | 33 ++++++++++++++++++++++
> recipes-kernel/linux/linux-imx_3.10.17.bb | 2 ++
> 2 files changed, 35 insertions(+)
> create mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
>
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch b/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
> new file mode 100644
> index 0000000..bcddb16
> --- /dev/null
> +++ b/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
> @@ -0,0 +1,33 @@
> +From ffcd8b98f6ba3a2b7a4aecc1e5e454de5fa5c4c3 Mon Sep 17 00:00:00 2001
> +From: Gary Bisson <bisson.gary@gmail.com>
> +Date: Tue, 2 Dec 2014 22:11:14 -0800
> +Subject: [PATCH] ARM: clk-imx6q: fix video divider for revision 1.0 of i.MX6q
> +
> +As post dividers do not work on i.MX6Q revision 1.0 they must be fixed
> +to 1. As the table index was wrong, a divider a of 4 could still be
> +requested which implied the clock not to be set properly. This is the
> +root cause of the HDMI not working at high resolution on T1.0 version of
> +the SoC, giving the following error:
> +mxc_sdc_fb fb.27: timeout when waiting for flip irq
> +
> +Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
> +---
> + arch/arm/mach-imx/clk-imx6q.c | 2 +-
> + 1 file changed, 1 insertion(+), 1 deletion(-)
> +
> +diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> +index e09b1e8..1e5c410 100644
> +--- a/arch/arm/mach-imx/clk-imx6q.c
> ++++ b/arch/arm/mach-imx/clk-imx6q.c
> +@@ -279,7 +279,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> + post_div_table[1].div = 1;
> + post_div_table[2].div = 1;
> + video_div_table[1].div = 1;
> +- video_div_table[2].div = 1;
> ++ video_div_table[3].div = 1;
> + };
> +
> + /* type name parent_name base div_mask */
> +--
> +2.1.3
> +
> diff --git a/recipes-kernel/linux/linux-imx_3.10.17.bb b/recipes-kernel/linux/linux-imx_3.10.17.bb
> index cae1489..143eaab 100644
> --- a/recipes-kernel/linux/linux-imx_3.10.17.bb
> +++ b/recipes-kernel/linux/linux-imx_3.10.17.bb
> @@ -15,4 +15,6 @@ SRCBRANCH = "imx_3.10.17_1.0.0_ga"
> SRCREV = "33597e348b2d60dd5c71890ef7b7d3d3fd6e4e97"
> LOCALVERSION = "-1.0.2_ga"
>
> +SRC_URI += "file://0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch"
> +
> COMPATIBLE_MACHINE = "(mx6)"
> --
> 2.1.3
>
> --
> _______________________________________________
> meta-freescale mailing list
> meta-freescale@yoctoproject.org
> https://lists.yoctoproject.org/listinfo/meta-freescale
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2
2014-12-03 17:07 ` [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2 Gary Bisson
@ 2014-12-03 17:29 ` Daiane Angolini
2014-12-03 17:33 ` Otavio Salvador
0 siblings, 1 reply; 13+ messages in thread
From: Daiane Angolini @ 2014-12-03 17:29 UTC (permalink / raw)
To: Gary Bisson; +Cc: meta-freescale, Fabio Estevam, Otavio Salvador
On Wed, Dec 3, 2014 at 3:07 PM, Gary Bisson <bisson.gary@gmail.com> wrote:
> Those have been removed from the recipe by Laurent Post:
I know you just included the hash, but please: s/Laurent/Lauren
Thanks a lot for cleaning this folder.
Daiane
> 438d4438: linux-imx: Upgrade to 3.10.17-1.0.2 patch release
>
> Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
> ---
> ...8-ARM-imx6sl-gpc-add-chip-revision-check-.patch | 52 -
> ...2-regulator-pfuze100-Fix-address-of-FABID.patch | 36 -
> ...3-regulator-pfuze100-add-pfuze200-support.patch | 506 --------
> ...fuze100-Add-terminate-entry-for-i2c-of-_d.patch | 61 -
> ...fuze100-Add-PFUZE200-support-to-Kconfig-a.patch | 56 -
> ...gulator-pfuze100-Use-of_get_child_by_name.patch | 34 -
> ...ze100-regulator-Fix-of_node_get-parameter.patch | 44 -
> ...8-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch | 752 ------------
> ...8-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch | 1202 --------------------
> ...2-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch | 133 ---
> 10 files changed, 2876 deletions(-)
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch
> delete mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch
>
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch b/recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch
> deleted file mode 100644
> index 962a804..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0001-ENGR00309838-ARM-imx6sl-gpc-add-chip-revision-check-.patch
> +++ /dev/null
> @@ -1,52 +0,0 @@
> -From 5dad39098c3c8686f23db638505bf00ae2cc092f Mon Sep 17 00:00:00 2001
> -From: Robby Cai <r63905@freescale.com>
> -Date: Fri, 23 May 2014 16:02:13 +0800
> -Subject: [PATCH 01/10] ENGR00309838 ARM: imx6sl: gpc: add chip revision check
> - for dispmix
> -Organization: O.S. Systems Software LTDA.
> -
> -The dispmix feature works without problem since TO1.2.
> -This patch adds the back-compatibility for older chip.
> -
> -Signed-off-by: Robby Cai <r63905@freescale.com>
> -(cherry picked from commit a187b916d55052fed10de1797009250095b598fb)
> -
> -Upstream-Status: Pending
> ----
> - arch/arm/mach-imx/gpc.c | 8 +++++---
> - 1 file changed, 5 insertions(+), 3 deletions(-)
> -
> -diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
> -index 9734327..25e987c 100644
> ---- a/arch/arm/mach-imx/gpc.c
> -+++ b/arch/arm/mach-imx/gpc.c
> -@@ -1,5 +1,5 @@
> - /*
> -- * Copyright 2011-2013 Freescale Semiconductor, Inc.
> -+ * Copyright 2011-2014 Freescale Semiconductor, Inc.
> - * Copyright 2011 Linaro Ltd.
> - *
> - * The code contained herein is licensed under the GNU General Public
> -@@ -90,7 +90,8 @@ static void imx_disp_clk(bool enable)
> -
> - static void imx_gpc_dispmix_on(void)
> - {
> -- if (cpu_is_imx6sl()) {
> -+ if (cpu_is_imx6sl() &&
> -+ imx_get_soc_revision() >= IMX_CHIP_REVISION_1_2) {
> - imx_disp_clk(true);
> -
> - writel_relaxed(0x0, gpc_base + GPC_PGC_DISP_PGCR_OFFSET);
> -@@ -105,7 +106,8 @@ static void imx_gpc_dispmix_on(void)
> -
> - static void imx_gpc_dispmix_off(void)
> - {
> -- if (cpu_is_imx6sl()) {
> -+ if (cpu_is_imx6sl() &&
> -+ imx_get_soc_revision() >= IMX_CHIP_REVISION_1_2) {
> - imx_disp_clk(true);
> -
> - writel_relaxed(0xFFFFFFFF,
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch b/recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch
> deleted file mode 100644
> index ff36488..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0002-regulator-pfuze100-Fix-address-of-FABID.patch
> +++ /dev/null
> @@ -1,36 +0,0 @@
> -From a38734076be8b4fbb1a9db757e1a69dddef61f63 Mon Sep 17 00:00:00 2001
> -From: Axel Lin <axel.lin@ingics.com>
> -Date: Mon, 9 Dec 2013 15:24:19 +0800
> -Subject: [PATCH 02/10] regulator: pfuze100: Fix address of FABID
> -Organization: O.S. Systems Software LTDA.
> -
> -According to the datasheet, the address of FABID is 0x4. Fix it.
> -
> -Signed-off-by: Axel Lin <axel.lin@ingics.com>
> -Acked-by: Robin Gong <b38343@freescale.com>
> -Signed-off-by: Mark Brown <broonie@linaro.org>
> -Cc: stable@vger.kernel.org
> -(cherry picked from commit c07a24939f36fb6de522a9726369ea64eee5d98d)
> -(cherry picked from commit cfec286ff9f375c2c289072d63cedbb0c7917a48)
> -
> -Upstream-Status: Pending
> ----
> - drivers/regulator/pfuze100-regulator.c | 2 +-
> - 1 file changed, 1 insertion(+), 1 deletion(-)
> -
> -diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
> -index ba67b2c..565a631 100644
> ---- a/drivers/regulator/pfuze100-regulator.c
> -+++ b/drivers/regulator/pfuze100-regulator.c
> -@@ -38,7 +38,7 @@
> -
> - #define PFUZE100_DEVICEID 0x0
> - #define PFUZE100_REVID 0x3
> --#define PFUZE100_FABID 0x3
> -+#define PFUZE100_FABID 0x4
> -
> - #define PFUZE100_SW1ABVOL 0x20
> - #define PFUZE100_SW1CVOL 0x2e
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch b/recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch
> deleted file mode 100644
> index 923da0a..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0003-regulator-pfuze100-add-pfuze200-support.patch
> +++ /dev/null
> @@ -1,506 +0,0 @@
> -From 08284f19c7cfdf84332c8098204f6e7fad368308 Mon Sep 17 00:00:00 2001
> -From: Robin Gong <b38343@freescale.com>
> -Date: Tue, 4 Mar 2014 17:40:36 +0800
> -Subject: [PATCH 03/10] regulator: pfuze100: add pfuze200 support
> -Organization: O.S. Systems Software LTDA.
> -
> -support pfuze200 chip which remove SW1C and SW4 based on pfuze100.
> -
> -Signed-off-by: Robin Gong <b38343@freescale.com>
> -Signed-off-by: Mark Brown <broonie@linaro.org>
> -(cherry picked from commit f2518480c7b744296a5587990a54e3a284d932b8)
> -
> -Conflicts:
> -
> - drivers/regulator/pfuze100-regulator.c
> -(cherry picked from commit f9e62732cfb59ff68fed303bbbb3913d2f1002bf)
> -
> -Upstream-Status: Pending
> ----
> - .../devicetree/bindings/regulator/pfuze100.txt | 96 ++++++++++-
> - drivers/regulator/pfuze100-regulator.c | 181 ++++++++++++++++-----
> - include/linux/regulator/pfuze100.h | 14 ++
> - 3 files changed, 245 insertions(+), 46 deletions(-)
> -
> -diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt b/Documentation/devicetree/bindings/regulator/pfuze100.txt
> -index fc989b2..34ef5d1 100644
> ---- a/Documentation/devicetree/bindings/regulator/pfuze100.txt
> -+++ b/Documentation/devicetree/bindings/regulator/pfuze100.txt
> -@@ -1,7 +1,7 @@
> - PFUZE100 family of regulators
> -
> - Required properties:
> --- compatible: "fsl,pfuze100"
> -+- compatible: "fsl,pfuze100" or "fsl,pfuze200"
> - - reg: I2C slave address
> -
> - Required child node:
> -@@ -10,11 +10,14 @@ Required child node:
> - Documentation/devicetree/bindings/regulator/regulator.txt.
> -
> - The valid names for regulators are:
> -+ --PFUZE100
> - sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6
> -+ --PFUZE200
> -+ sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6
> -
> - Each regulator is defined using the standard binding for regulators.
> -
> --Example:
> -+Example 1: PFUZE100
> -
> - pmic: pfuze100@08 {
> - compatible = "fsl,pfuze100";
> -@@ -113,3 +116,92 @@ Example:
> - };
> - };
> - };
> -+
> -+
> -+Example 2: PFUZE200
> -+
> -+ pmic: pfuze200@08 {
> -+ compatible = "fsl,pfuze200";
> -+ reg = <0x08>;
> -+
> -+ regulators {
> -+ sw1a_reg: sw1ab {
> -+ regulator-min-microvolt = <300000>;
> -+ regulator-max-microvolt = <1875000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ regulator-ramp-delay = <6250>;
> -+ };
> -+
> -+ sw2_reg: sw2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3a_reg: sw3a {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3b_reg: sw3b {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ swbst_reg: swbst {
> -+ regulator-min-microvolt = <5000000>;
> -+ regulator-max-microvolt = <5150000>;
> -+ };
> -+
> -+ snvs_reg: vsnvs {
> -+ regulator-min-microvolt = <1000000>;
> -+ regulator-max-microvolt = <3000000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vref_reg: vrefddr {
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen1_reg: vgen1 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen2_reg: vgen2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen3_reg: vgen3 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ };
> -+
> -+ vgen4_reg: vgen4 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen5_reg: vgen5 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen6_reg: vgen6 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+ };
> -+ };
> -diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
> -index 565a631..35b1de1 100644
> ---- a/drivers/regulator/pfuze100-regulator.c
> -+++ b/drivers/regulator/pfuze100-regulator.c
> -@@ -56,6 +56,8 @@
> - #define PFUZE100_VGEN5VOL 0x70
> - #define PFUZE100_VGEN6VOL 0x71
> -
> -+enum chips {PFUZE100, PFUZE200, PFUZE_NUM};
> -+
> - struct pfuze_regulator {
> - struct regulator_desc desc;
> - unsigned char stby_reg;
> -@@ -63,6 +65,7 @@ struct pfuze_regulator {
> - };
> -
> - struct pfuze_chip {
> -+ int chip_id;
> - struct regmap *regmap;
> - struct device *dev;
> - struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
> -@@ -77,15 +80,15 @@ static const int pfuze100_vsnvs[] = {
> - 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
> - };
> -
> --static const struct i2c_device_id pfuze_device_id[] = {
> -- {.name = "pfuze100"},
> -- {},
> -+static const struct i2c_device_id pfuze_device_id[PFUZE_NUM] = {
> -+ {.name = "pfuze100", .driver_data = PFUZE100},
> -+ {.name = "pfuze200", .driver_data = PFUZE200},
> - };
> - MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
> -
> --static const struct of_device_id pfuze_dt_ids[] = {
> -- { .compatible = "fsl,pfuze100" },
> -- {},
> -+static const struct of_device_id pfuze_dt_ids[PFUZE_NUM] = {
> -+ { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
> -+ { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
> - };
> - MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
> -
> -@@ -139,14 +142,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
> -
> - };
> -
> --#define PFUZE100_FIXED_REG(_name, base, voltage) \
> -- [PFUZE100_ ## _name] = { \
> -+#define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
> -+ [_chip ## _ ## _name] = { \
> - .desc = { \
> - .name = #_name, \
> - .n_voltages = 1, \
> - .ops = &pfuze100_fixed_regulator_ops, \
> - .type = REGULATOR_VOLTAGE, \
> -- .id = PFUZE100_ ## _name, \
> -+ .id = _chip ## _ ## _name, \
> - .owner = THIS_MODULE, \
> - .min_uV = (voltage), \
> - .enable_reg = (base), \
> -@@ -154,14 +157,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
> - }, \
> - }
> -
> --#define PFUZE100_SW_REG(_name, base, min, max, step) \
> -- [PFUZE100_ ## _name] = { \
> -+#define PFUZE100_SW_REG(_chip, _name, base, min, max, step) \
> -+ [_chip ## _ ## _name] = { \
> - .desc = { \
> - .name = #_name,\
> - .n_voltages = ((max) - (min)) / (step) + 1, \
> - .ops = &pfuze100_sw_regulator_ops, \
> - .type = REGULATOR_VOLTAGE, \
> -- .id = PFUZE100_ ## _name, \
> -+ .id = _chip ## _ ## _name, \
> - .owner = THIS_MODULE, \
> - .min_uV = (min), \
> - .uV_step = (step), \
> -@@ -172,14 +175,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
> - .stby_mask = 0x3f, \
> - }
> -
> --#define PFUZE100_SWB_REG(_name, base, mask, voltages) \
> -- [PFUZE100_ ## _name] = { \
> -+#define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \
> -+ [_chip ## _ ## _name] = { \
> - .desc = { \
> - .name = #_name, \
> - .n_voltages = ARRAY_SIZE(voltages), \
> - .ops = &pfuze100_swb_regulator_ops, \
> - .type = REGULATOR_VOLTAGE, \
> -- .id = PFUZE100_ ## _name, \
> -+ .id = _chip ## _ ## _name, \
> - .owner = THIS_MODULE, \
> - .volt_table = voltages, \
> - .vsel_reg = (base), \
> -@@ -187,14 +190,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
> - }, \
> - }
> -
> --#define PFUZE100_VGEN_REG(_name, base, min, max, step) \
> -- [PFUZE100_ ## _name] = { \
> -+#define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step) \
> -+ [_chip ## _ ## _name] = { \
> - .desc = { \
> - .name = #_name, \
> - .n_voltages = ((max) - (min)) / (step) + 1, \
> - .ops = &pfuze100_ldo_regulator_ops, \
> - .type = REGULATOR_VOLTAGE, \
> -- .id = PFUZE100_ ## _name, \
> -+ .id = _chip ## _ ## _name, \
> - .owner = THIS_MODULE, \
> - .min_uV = (min), \
> - .uV_step = (step), \
> -@@ -207,25 +210,45 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
> - .stby_mask = 0x20, \
> - }
> -
> -+/* PFUZE100 */
> - static struct pfuze_regulator pfuze100_regulators[] = {
> -- PFUZE100_SW_REG(SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
> -- PFUZE100_SW_REG(SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
> -- PFUZE100_SW_REG(SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
> -- PFUZE100_SW_REG(SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
> -- PFUZE100_SW_REG(SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
> -- PFUZE100_SW_REG(SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
> -- PFUZE100_SWB_REG(SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
> -- PFUZE100_SWB_REG(VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
> -- PFUZE100_FIXED_REG(VREFDDR, PFUZE100_VREFDDRCON, 750000),
> -- PFUZE100_VGEN_REG(VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
> -- PFUZE100_VGEN_REG(VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
> -- PFUZE100_VGEN_REG(VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
> -- PFUZE100_VGEN_REG(VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
> -- PFUZE100_VGEN_REG(VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
> -- PFUZE100_VGEN_REG(VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
> -+ PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
> -+ PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
> -+ PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
> -+ PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
> -+ PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
> -+ PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
> -+ PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
> -+ PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
> -+ PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
> -+ PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
> -+ PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
> -+ PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
> -+ PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
> -+ PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
> -+ PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
> -+};
> -+
> -+static struct pfuze_regulator pfuze200_regulators[] = {
> -+ PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
> -+ PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
> -+ PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
> -+ PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
> -+ PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
> -+ PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
> -+ PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
> -+ PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
> -+ PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
> -+ PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
> -+ PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
> -+ PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
> -+ PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
> - };
> -
> -+static struct pfuze_regulator *pfuze_regulators;
> -+
> - #ifdef CONFIG_OF
> -+/* PFUZE100 */
> - static struct of_regulator_match pfuze100_matches[] = {
> - { .name = "sw1ab", },
> - { .name = "sw1c", },
> -@@ -244,6 +267,26 @@ static struct of_regulator_match pfuze100_matches[] = {
> - { .name = "vgen6", },
> - };
> -
> -+/* PFUZE200 */
> -+static struct of_regulator_match pfuze200_matches[] = {
> -+
> -+ { .name = "sw1ab", },
> -+ { .name = "sw2", },
> -+ { .name = "sw3a", },
> -+ { .name = "sw3b", },
> -+ { .name = "swbst", },
> -+ { .name = "vsnvs", },
> -+ { .name = "vrefddr", },
> -+ { .name = "vgen1", },
> -+ { .name = "vgen2", },
> -+ { .name = "vgen3", },
> -+ { .name = "vgen4", },
> -+ { .name = "vgen5", },
> -+ { .name = "vgen6", },
> -+};
> -+
> -+static struct of_regulator_match *pfuze_matches;
> -+
> - static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
> - {
> - struct device *dev = chip->dev;
> -@@ -260,8 +303,20 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
> - return -EINVAL;
> - }
> -
> -- ret = of_regulator_match(dev, parent, pfuze100_matches,
> -- ARRAY_SIZE(pfuze100_matches));
> -+ switch (chip->chip_id) {
> -+ case PFUZE200:
> -+ pfuze_matches = pfuze200_matches;
> -+ ret = of_regulator_match(dev, parent, pfuze200_matches,
> -+ ARRAY_SIZE(pfuze200_matches));
> -+ break;
> -+
> -+ case PFUZE100:
> -+ default:
> -+ pfuze_matches = pfuze100_matches;
> -+ ret = of_regulator_match(dev, parent, pfuze100_matches,
> -+ ARRAY_SIZE(pfuze100_matches));
> -+ break;
> -+ }
> -
> - of_node_put(parent);
> - if (ret < 0) {
> -@@ -275,12 +330,12 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
> -
> - static inline struct regulator_init_data *match_init_data(int index)
> - {
> -- return pfuze100_matches[index].init_data;
> -+ return pfuze_matches[index].init_data;
> - }
> -
> - static inline struct device_node *match_of_node(int index)
> - {
> -- return pfuze100_matches[index].of_node;
> -+ return pfuze_matches[index].of_node;
> - }
> - #else
> - static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
> -@@ -308,7 +363,8 @@ static int pfuze_identify(struct pfuze_chip *pfuze_chip)
> - if (ret)
> - return ret;
> -
> -- if (value & 0x0f) {
> -+ if ((value & 0x0f) != pfuze_chip->chip_id) {
> -+ /* device id NOT match with your setting */
> - dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
> - return -ENODEV;
> - }
> -@@ -344,17 +400,31 @@ static int pfuze100_regulator_probe(struct i2c_client *client,
> - dev_get_platdata(&client->dev);
> - struct regulator_config config = { };
> - int i, ret;
> -+ const struct of_device_id *match;
> -+ u32 regulator_num;
> -+ u32 sw_check_start, sw_check_end;
> -
> - pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
> - GFP_KERNEL);
> - if (!pfuze_chip)
> - return -ENOMEM;
> -
> -- i2c_set_clientdata(client, pfuze_chip);
> --
> -- memcpy(pfuze_chip->regulator_descs, pfuze100_regulators,
> -- sizeof(pfuze_chip->regulator_descs));
> -+ if (client->dev.of_node) {
> -+ match = of_match_device(of_match_ptr(pfuze_dt_ids),
> -+ &client->dev);
> -+ if (!match) {
> -+ dev_err(&client->dev, "Error: No device match found\n");
> -+ return -ENODEV;
> -+ }
> -+ pfuze_chip->chip_id = (int)(long)match->data;
> -+ } else if (id) {
> -+ pfuze_chip->chip_id = id->driver_data;
> -+ } else {
> -+ dev_err(&client->dev, "No dts match or id table match found\n");
> -+ return -ENODEV;
> -+ }
> -
> -+ i2c_set_clientdata(client, pfuze_chip);
> - pfuze_chip->dev = &client->dev;
> -
> - pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
> -@@ -371,11 +441,34 @@ static int pfuze100_regulator_probe(struct i2c_client *client,
> - return ret;
> - }
> -
> -+ /* use the right regulators after identify the right device */
> -+ switch (pfuze_chip->chip_id) {
> -+ case PFUZE200:
> -+ pfuze_regulators = pfuze200_regulators;
> -+ regulator_num = ARRAY_SIZE(pfuze200_regulators);
> -+ sw_check_start = PFUZE200_SW2;
> -+ sw_check_end = PFUZE200_SW3B;
> -+ break;
> -+
> -+ case PFUZE100:
> -+ default:
> -+ pfuze_regulators = pfuze100_regulators;
> -+ regulator_num = ARRAY_SIZE(pfuze100_regulators);
> -+ sw_check_start = PFUZE100_SW2;
> -+ sw_check_end = PFUZE100_SW4;
> -+ break;
> -+ }
> -+ dev_info(&client->dev, "pfuze%s found.\n",
> -+ (pfuze_chip->chip_id == PFUZE100) ? "100" : "200");
> -+
> -+ memcpy(pfuze_chip->regulator_descs, pfuze_regulators,
> -+ sizeof(pfuze_chip->regulator_descs));
> -+
> - ret = pfuze_parse_regulators_dt(pfuze_chip);
> - if (ret)
> - return ret;
> -
> -- for (i = 0; i < PFUZE100_MAX_REGULATOR; i++) {
> -+ for (i = 0; i < regulator_num; i++) {
> - struct regulator_init_data *init_data;
> - struct regulator_desc *desc;
> - int val;
> -@@ -388,7 +481,7 @@ static int pfuze100_regulator_probe(struct i2c_client *client,
> - init_data = match_init_data(i);
> -
> - /* SW2~SW4 high bit check and modify the voltage value table */
> -- if (i > PFUZE100_SW1C && i < PFUZE100_SWBST) {
> -+ if (i >= sw_check_start && i <= sw_check_end) {
> - regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
> - if (val & 0x40) {
> - desc->min_uV = 800000;
> -diff --git a/include/linux/regulator/pfuze100.h b/include/linux/regulator/pfuze100.h
> -index 65d550b..364f7a7 100644
> ---- a/include/linux/regulator/pfuze100.h
> -+++ b/include/linux/regulator/pfuze100.h
> -@@ -35,6 +35,20 @@
> - #define PFUZE100_VGEN6 14
> - #define PFUZE100_MAX_REGULATOR 15
> -
> -+#define PFUZE200_SW1AB 0
> -+#define PFUZE200_SW2 1
> -+#define PFUZE200_SW3A 2
> -+#define PFUZE200_SW3B 3
> -+#define PFUZE200_SWBST 4
> -+#define PFUZE200_VSNVS 5
> -+#define PFUZE200_VREFDDR 6
> -+#define PFUZE200_VGEN1 7
> -+#define PFUZE200_VGEN2 8
> -+#define PFUZE200_VGEN3 9
> -+#define PFUZE200_VGEN4 10
> -+#define PFUZE200_VGEN5 11
> -+#define PFUZE200_VGEN6 12
> -+
> - struct regulator_init_data;
> -
> - struct pfuze_regulator_platform_data {
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch b/recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch
> deleted file mode 100644
> index c7381e3..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0004-regulator-pfuze100-Add-terminate-entry-for-i2c-of-_d.patch
> +++ /dev/null
> @@ -1,61 +0,0 @@
> -From fdbdb66994db6b896a5a6464b9c1efd7abfbfdb9 Mon Sep 17 00:00:00 2001
> -From: Axel Lin <axel.lin@ingics.com>
> -Date: Tue, 4 Mar 2014 18:20:14 +0800
> -Subject: [PATCH 04/10] regulator: pfuze100: Add terminate entry for
> - [i2c|of]_device_id tables
> -Organization: O.S. Systems Software LTDA.
> -
> -Also remove PFUZE_NUM to avoid below build warnings:
> -
> - CC [M] drivers/regulator/pfuze100-regulator.o
> -drivers/regulator/pfuze100-regulator.c:86:2: warning: excess elements in array initializer [enabled by default]
> -drivers/regulator/pfuze100-regulator.c:86:2: warning: (near initialization for 'pfuze_device_id') [enabled by default]
> -drivers/regulator/pfuze100-regulator.c:93:2: warning: excess elements in array initializer [enabled by default]
> -drivers/regulator/pfuze100-regulator.c:93:2: warning: (near initialization for 'pfuze_dt_ids') [enabled by default]
> -
> -Signed-off-by: Axel Lin <axel.lin@ingics.com>
> -Signed-off-by: Mark Brown <broonie@linaro.org>
> -(cherry picked from commit e6c4c3378d82c5eeb136ed06b1a23651bcdaf739)
> -(cherry picked from commit 12c7dd7c396378fd6dc907903a4ae540a75b31f5)
> -
> -Upstream-Status: Pending
> ----
> - drivers/regulator/pfuze100-regulator.c | 8 +++++---
> - 1 file changed, 5 insertions(+), 3 deletions(-)
> -
> -diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
> -index 35b1de1..0f4924e0 100644
> ---- a/drivers/regulator/pfuze100-regulator.c
> -+++ b/drivers/regulator/pfuze100-regulator.c
> -@@ -56,7 +56,7 @@
> - #define PFUZE100_VGEN5VOL 0x70
> - #define PFUZE100_VGEN6VOL 0x71
> -
> --enum chips {PFUZE100, PFUZE200, PFUZE_NUM};
> -+enum chips { PFUZE100, PFUZE200 };
> -
> - struct pfuze_regulator {
> - struct regulator_desc desc;
> -@@ -80,15 +80,17 @@ static const int pfuze100_vsnvs[] = {
> - 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
> - };
> -
> --static const struct i2c_device_id pfuze_device_id[PFUZE_NUM] = {
> -+static const struct i2c_device_id pfuze_device_id[] = {
> - {.name = "pfuze100", .driver_data = PFUZE100},
> - {.name = "pfuze200", .driver_data = PFUZE200},
> -+ { }
> - };
> - MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
> -
> --static const struct of_device_id pfuze_dt_ids[PFUZE_NUM] = {
> -+static const struct of_device_id pfuze_dt_ids[] = {
> - { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
> - { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
> -+ { }
> - };
> - MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
> -
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch b/recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch
> deleted file mode 100644
> index 7fcc79d..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0005-regulator-pfuze100-Add-PFUZE200-support-to-Kconfig-a.patch
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -From 2610dd3d4f0f167b77c4ce24e1756f7434a17cde Mon Sep 17 00:00:00 2001
> -From: Axel Lin <axel.lin@ingics.com>
> -Date: Wed, 5 Mar 2014 18:02:43 +0800
> -Subject: [PATCH 05/10] regulator: pfuze100: Add PFUZE200 support to Kconfig
> - and module description
> -Organization: O.S. Systems Software LTDA.
> -
> -Signed-off-by: Axel Lin <axel.lin@ingics.com>
> -Acked-by: Robin Gong <b38343@freescale.com>
> -Signed-off-by: Mark Brown <broonie@linaro.org>
> -(cherry picked from commit 2cee2121db44cfeee206d0854bedd52344eea444)
> -
> -Signed-off-by: Robin Gong <b38343@freescale.com>
> -(cherry picked from commit 88236aaba4ed9b89a7873b30fc1ca9cdcb6b407d)
> -
> -Upstream-Status: Pending
> ----
> - drivers/regulator/Kconfig | 6 +++---
> - drivers/regulator/pfuze100-regulator.c | 2 +-
> - 2 files changed, 4 insertions(+), 4 deletions(-)
> -
> -diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
> -index 1339404..5b64f2c 100644
> ---- a/drivers/regulator/Kconfig
> -+++ b/drivers/regulator/Kconfig
> -@@ -305,12 +305,12 @@ config REGULATOR_PCF50633
> - on PCF50633
> -
> - config REGULATOR_PFUZE100
> -- tristate "Support regulators on Freescale PFUZE100 PMIC"
> -+ tristate "Freescale PFUZE100/PFUZE200 regulator driver"
> - depends on I2C
> - select REGMAP_I2C
> - help
> -- Say y here to support the regulators found on the Freescale PFUZE100
> -- PMIC.
> -+ Say y here to support the regulators found on the Freescale
> -+ PFUZE100/PFUZE200 PMIC.
> -
> - config REGULATOR_RC5T583
> - tristate "RICOH RC5T583 Power regulators"
> -diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
> -index 0f4924e0..21114f7 100644
> ---- a/drivers/regulator/pfuze100-regulator.c
> -+++ b/drivers/regulator/pfuze100-regulator.c
> -@@ -535,6 +535,6 @@ static struct i2c_driver pfuze_driver = {
> - module_i2c_driver(pfuze_driver);
> -
> - MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
> --MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100 PMIC");
> -+MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/PFUZE200 PMIC");
> - MODULE_LICENSE("GPL v2");
> - MODULE_ALIAS("i2c:pfuze100-regulator");
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch b/recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch
> deleted file mode 100644
> index 21b2e0c..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0006-regulator-pfuze100-Use-of_get_child_by_name.patch
> +++ /dev/null
> @@ -1,34 +0,0 @@
> -From cef8d38fc22ed27e26c8b3d8594c152b6c542253 Mon Sep 17 00:00:00 2001
> -From: Sachin Kamat <sachin.kamat@linaro.org>
> -Date: Fri, 14 Feb 2014 17:20:00 +0530
> -Subject: [PATCH 06/10] regulator: pfuze100: Use of_get_child_by_name
> -Organization: O.S. Systems Software LTDA.
> -
> -of_find_node_by_name walks the allnodes list, and can thus walk
> -outside of the parent node. Use of_get_child_by_name instead.
> -
> -Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> -Signed-off-by: Mark Brown <broonie@linaro.org>
> -(cherry picked from commit 4d286178d55cc5811d50750a44eb729252adef11)
> -
> -Upstream-Status: Pending
> ----
> - drivers/regulator/pfuze100-regulator.c | 2 +-
> - 1 file changed, 1 insertion(+), 1 deletion(-)
> -
> -diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
> -index 21114f7..15059c74 100644
> ---- a/drivers/regulator/pfuze100-regulator.c
> -+++ b/drivers/regulator/pfuze100-regulator.c
> -@@ -299,7 +299,7 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
> - if (!np)
> - return 0;
> -
> -- parent = of_find_node_by_name(np, "regulators");
> -+ parent = of_get_child_by_name(np, "regulators");
> - if (!parent) {
> - dev_err(dev, "regulators node not found\n");
> - return -EINVAL;
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch b/recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch
> deleted file mode 100644
> index d077858..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0007-pfuze100-regulator-Fix-of_node_get-parameter.patch
> +++ /dev/null
> @@ -1,44 +0,0 @@
> -From cc1f086131aa802abc38428a5a690eb5f35c8225 Mon Sep 17 00:00:00 2001
> -From: Fabio Estevam <fabio.estevam@freescale.com>
> -Date: Tue, 18 Feb 2014 23:46:14 -0300
> -Subject: [PATCH 07/10] pfuze100-regulator: Fix of_node_get() parameter
> -Organization: O.S. Systems Software LTDA.
> -
> -Since commit d7857c42 (regulator: pfuze100: Use of_get_child_by_name) we get
> -the following probe failure:
> -
> -pfuze100-regulator 1-0008: Full layer: 1, Metal layer: 0
> -pfuze100-regulator 1-0008: FAB: 0, FIN: 0
> -pfuze100-regulator 1-0008: regulators node not found
> -pfuze100-regulator: probe of 1-0008 failed with error -22
> -
> -Now that of_get_child_by_name() is used we should adjust the device_node pointer
> -'np' to not get the parent node anymore.
> -
> -Suggested-by: Shawn Guo <shawn.guo@linaro.org>
> -Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> -Acked-by: Sachin Kamat <sachin.kamat@linaro.org>
> -Signed-off-by: Mark Brown <broonie@linaro.org>
> -(cherry picked from commit 0780208ff201feb45e12ebecb39ecac4740b1244)
> -
> -Upstream-Status: Pending
> ----
> - drivers/regulator/pfuze100-regulator.c | 2 +-
> - 1 file changed, 1 insertion(+), 1 deletion(-)
> -
> -diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
> -index 15059c74..b9c1b9a 100644
> ---- a/drivers/regulator/pfuze100-regulator.c
> -+++ b/drivers/regulator/pfuze100-regulator.c
> -@@ -295,7 +295,7 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
> - struct device_node *np, *parent;
> - int ret;
> -
> -- np = of_node_get(dev->parent->of_node);
> -+ np = of_node_get(dev->of_node);
> - if (!np)
> - return 0;
> -
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch b/recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch
> deleted file mode 100644
> index f1e88d4..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0008-ENGR00301078-1-ARM-dts-imx6dl-sabresd-add-support-fo.patch
> +++ /dev/null
> @@ -1,752 +0,0 @@
> -From 37e501e8c4e1f1511e017aa0a7def38895a47fa6 Mon Sep 17 00:00:00 2001
> -From: Robin Gong <b38343@freescale.com>
> -Date: Thu, 6 Mar 2014 18:59:30 +0800
> -Subject: [PATCH 08/10] ENGR00301078-1: ARM: dts: imx6dl-sabresd: add support
> - for pfuze200 on mx6dl-sabresd
> -Organization: O.S. Systems Software LTDA.
> -
> -move pmic device node from imx6qdl-sabresd.dtsi to up-level, and add
> -another layer on imx6dl-sabresd to diff pfuze100 or pfuze200. Meanwhile
> -only work in ldo-enable mode if using pfuze200,since 'SW1C' switch
> -regulator is cut for cost-down which means VDDARM_IN and VDDSOC_IN have
> -to share the same switch regulator
> -
> -Signed-off-by: Robin Gong <b38343@freescale.com>
> -(cherry picked from commit 32e4e161b087bfdcea74bd80f0b24c341092c96b)
> -
> -Upstream-Status: Pending
> ----
> - arch/arm/boot/dts/Makefile | 1 +
> - arch/arm/boot/dts/imx6dl-sabresd-common.dtsi | 130 ++++++++++++++++++++
> - arch/arm/boot/dts/imx6dl-sabresd-pf200.dts | 126 +++++++++++++++++++
> - arch/arm/boot/dts/imx6dl-sabresd.dts | 175 ++++++++++++---------------
> - arch/arm/boot/dts/imx6q-sabresd.dts | 101 ++++++++++++++++
> - arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 99 ---------------
> - 6 files changed, 435 insertions(+), 197 deletions(-)
> - create mode 100644 arch/arm/boot/dts/imx6dl-sabresd-common.dtsi
> - create mode 100644 arch/arm/boot/dts/imx6dl-sabresd-pf200.dts
> -
> -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> -index f43b68b..c744cda 100644
> ---- a/arch/arm/boot/dts/Makefile
> -+++ b/arch/arm/boot/dts/Makefile
> -@@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> - imx6dl-sabresd.dtb \
> - imx6dl-sabresd-hdcp.dtb \
> - imx6dl-sabresd-ldo.dtb \
> -+ imx6dl-sabresd-pf200.dtb \
> - imx6dl-wandboard.dtb \
> - imx6q-arm2.dtb \
> - imx6q-sabreauto.dtb \
> -diff --git a/arch/arm/boot/dts/imx6dl-sabresd-common.dtsi b/arch/arm/boot/dts/imx6dl-sabresd-common.dtsi
> -new file mode 100644
> -index 0000000..2a07534
> ---- /dev/null
> -+++ b/arch/arm/boot/dts/imx6dl-sabresd-common.dtsi
> -@@ -0,0 +1,130 @@
> -+/*
> -+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
> -+ *
> -+ * This program is free software; you can redistribute it and/or modify
> -+ * it under the terms of the GNU General Public License version 2 as
> -+ * published by the Free Software Foundation.
> -+ */
> -+
> -+&battery {
> -+ offset-charger = <1485>;
> -+ offset-discharger = <1464>;
> -+ offset-usb-charger = <1285>;
> -+};
> -+
> -+&i2c3 {
> -+ max17135@48 {
> -+ compatible = "maxim,max17135";
> -+ reg = <0x48>;
> -+ vneg_pwrup = <1>;
> -+ gvee_pwrup = <1>;
> -+ vpos_pwrup = <2>;
> -+ gvdd_pwrup = <1>;
> -+ gvdd_pwrdn = <1>;
> -+ vpos_pwrdn = <2>;
> -+ gvee_pwrdn = <1>;
> -+ vneg_pwrdn = <1>;
> -+ SENSOR-supply = <®_sensor>;
> -+ gpio_pmic_pwrgood = <&gpio2 21 0>;
> -+ gpio_pmic_vcom_ctrl = <&gpio3 17 0>;
> -+ gpio_pmic_wakeup = <&gpio3 20 0>;
> -+ gpio_pmic_v3p3 = <&gpio2 20 0>;
> -+ gpio_pmic_intr = <&gpio2 25 0>;
> -+
> -+ regulators {
> -+ DISPLAY_reg: DISPLAY {
> -+ regulator-name = "DISPLAY";
> -+ };
> -+
> -+ GVDD_reg: GVDD {
> -+ /* 20v */
> -+ regulator-name = "GVDD";
> -+ };
> -+
> -+ GVEE_reg: GVEE {
> -+ /* -22v */
> -+ regulator-name = "GVEE";
> -+ };
> -+
> -+ HVINN_reg: HVINN {
> -+ /* -22v */
> -+ regulator-name = "HVINN";
> -+ };
> -+
> -+ HVINP_reg: HVINP {
> -+ /* 20v */
> -+ regulator-name = "HVINP";
> -+ };
> -+
> -+ VCOM_reg: VCOM {
> -+ regulator-name = "VCOM";
> -+ /* 2's-compliment, -4325000 */
> -+ regulator-min-microvolt = <0xffbe0178>;
> -+ /* 2's-compliment, -500000 */
> -+ regulator-max-microvolt = <0xfff85ee0>;
> -+ };
> -+
> -+ VNEG_reg: VNEG {
> -+ /* -15v */
> -+ regulator-name = "VNEG";
> -+ };
> -+
> -+ VPOS_reg: VPOS {
> -+ /* 15v */
> -+ regulator-name = "VPOS";
> -+ };
> -+
> -+ V3P3_reg: V3P3 {
> -+ regulator-name = "V3P3";
> -+ };
> -+ };
> -+ };
> -+};
> -+
> -+&iomuxc {
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_hog_1>, <&pinctrl_hog_2>;
> -+
> -+ hog {
> -+ pinctrl_hog_2: hoggrp-2 {
> -+ fsl,pins = <
> -+ /* MAX17135 */
> -+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
> -+ MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x80000000
> -+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
> -+ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000
> -+ MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000
> -+ /* elan touch */
> -+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000
> -+ MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000
> -+ MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x170b0
> -+ >;
> -+ };
> -+ };
> -+};
> -+
> -+&epdc {
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_epdc_0>;
> -+ V3P3-supply = <&V3P3_reg>;
> -+ VCOM-supply = <&VCOM_reg>;
> -+ DISPLAY-supply = <&DISPLAY_reg>;
> -+ status = "okay";
> -+};
> -+
> -+&ldb {
> -+ ipu_id = <0>;
> -+ sec_ipu_id = <0>;
> -+};
> -+
> -+&mxcfb1 {
> -+ status = "okay";
> -+};
> -+
> -+&mxcfb2 {
> -+ status = "okay";
> -+};
> -+
> -+&pxp {
> -+ status = "okay";
> -+};
> -diff --git a/arch/arm/boot/dts/imx6dl-sabresd-pf200.dts b/arch/arm/boot/dts/imx6dl-sabresd-pf200.dts
> -new file mode 100644
> -index 0000000..499f7d3
> ---- /dev/null
> -+++ b/arch/arm/boot/dts/imx6dl-sabresd-pf200.dts
> -@@ -0,0 +1,126 @@
> -+/*
> -+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
> -+ *
> -+ * This program is free software; you can redistribute it and/or modify
> -+ * it under the terms of the GNU General Public License version 2 as
> -+ * published by the Free Software Foundation.
> -+ */
> -+
> -+/dts-v1/;
> -+
> -+#include "imx6dl.dtsi"
> -+#include "imx6qdl-sabresd.dtsi"
> -+#include "imx6dl-sabresd-common.dtsi"
> -+
> -+/ {
> -+ model = "Freescale i.MX6 DualLite SABRE Smart Device Board(PFUZE200)";
> -+ compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
> -+};
> -+
> -+&cpu0 {
> -+ arm-supply = <®_arm>;
> -+ soc-supply = <®_soc>;
> -+ pu-supply = <®_pu>; /* use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&gpc {
> -+ fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */
> -+ fsl,wdog-reset = <1>; /* watchdog select of reset source */
> -+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&gpu {
> -+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&vpu {
> -+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&i2c2 {
> -+ pmic: pfuze200@08 {
> -+ compatible = "fsl,pfuze200";
> -+ reg = <0x08>;
> -+
> -+ regulators {
> -+ sw1a_reg: sw1ab {
> -+ regulator-min-microvolt = <300000>;
> -+ regulator-max-microvolt = <1875000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ regulator-ramp-delay = <6250>;
> -+ };
> -+
> -+ sw2_reg: sw2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3a_reg: sw3a {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3b_reg: sw3b {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ swbst_reg: swbst {
> -+ regulator-min-microvolt = <5000000>;
> -+ regulator-max-microvolt = <5150000>;
> -+ };
> -+
> -+ snvs_reg: vsnvs {
> -+ regulator-min-microvolt = <1000000>;
> -+ regulator-max-microvolt = <3000000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vref_reg: vrefddr {
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen1_reg: vgen1 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen2_reg: vgen2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen3_reg: vgen3 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ };
> -+
> -+ vgen4_reg: vgen4 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen5_reg: vgen5 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen6_reg: vgen6 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+ };
> -+ };
> -+};
> -diff --git a/arch/arm/boot/dts/imx6dl-sabresd.dts b/arch/arm/boot/dts/imx6dl-sabresd.dts
> -index 5713c71..b4c738d 100644
> ---- a/arch/arm/boot/dts/imx6dl-sabresd.dts
> -+++ b/arch/arm/boot/dts/imx6dl-sabresd.dts
> -@@ -1,5 +1,5 @@
> - /*
> -- * Copyright (C) 2013 Freescale Semiconductor, Inc.
> -+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> -@@ -10,131 +10,110 @@
> -
> - #include "imx6dl.dtsi"
> - #include "imx6qdl-sabresd.dtsi"
> -+#include "imx6dl-sabresd-common.dtsi"
> -
> - / {
> -- model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
> -+ model = "Freescale i.MX6 DualLite SABRE Smart Device Board(PFUZE100)";
> - compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
> - };
> -
> --&battery {
> -- offset-charger = <1485>;
> -- offset-discharger = <1464>;
> -- offset-usb-charger = <1285>;
> --};
> --
> --&i2c3 {
> -- max17135@48 {
> -- compatible = "maxim,max17135";
> -- reg = <0x48>;
> -- vneg_pwrup = <1>;
> -- gvee_pwrup = <1>;
> -- vpos_pwrup = <2>;
> -- gvdd_pwrup = <1>;
> -- gvdd_pwrdn = <1>;
> -- vpos_pwrdn = <2>;
> -- gvee_pwrdn = <1>;
> -- vneg_pwrdn = <1>;
> -- SENSOR-supply = <®_sensor>;
> -- gpio_pmic_pwrgood = <&gpio2 21 0>;
> -- gpio_pmic_vcom_ctrl = <&gpio3 17 0>;
> -- gpio_pmic_wakeup = <&gpio3 20 0>;
> -- gpio_pmic_v3p3 = <&gpio2 20 0>;
> -- gpio_pmic_intr = <&gpio2 25 0>;
> -+&i2c2 {
> -+ pmic: pfuze100@08 {
> -+ compatible = "fsl,pfuze100";
> -+ reg = <0x08>;
> -
> - regulators {
> -- DISPLAY_reg: DISPLAY {
> -- regulator-name = "DISPLAY";
> -+ sw1a_reg: sw1ab {
> -+ regulator-min-microvolt = <300000>;
> -+ regulator-max-microvolt = <1875000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ regulator-ramp-delay = <6250>;
> - };
> -
> -- GVDD_reg: GVDD {
> -- /* 20v */
> -- regulator-name = "GVDD";
> -+ sw1c_reg: sw1c {
> -+ regulator-min-microvolt = <300000>;
> -+ regulator-max-microvolt = <1875000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ regulator-ramp-delay = <6250>;
> - };
> -
> -- GVEE_reg: GVEE {
> -- /* -22v */
> -- regulator-name = "GVEE";
> -+ sw2_reg: sw2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> - };
> -
> -- HVINN_reg: HVINN {
> -- /* -22v */
> -- regulator-name = "HVINN";
> -+ sw3a_reg: sw3a {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> - };
> -
> -- HVINP_reg: HVINP {
> -- /* 20v */
> -- regulator-name = "HVINP";
> -+ sw3b_reg: sw3b {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> - };
> -
> -- VCOM_reg: VCOM {
> -- regulator-name = "VCOM";
> -- /* 2's-compliment, -4325000 */
> -- regulator-min-microvolt = <0xffbe0178>;
> -- /* 2's-compliment, -500000 */
> -- regulator-max-microvolt = <0xfff85ee0>;
> -+ sw4_reg: sw4 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <3300000>;
> - };
> -
> -- VNEG_reg: VNEG {
> -- /* -15v */
> -- regulator-name = "VNEG";
> -+ swbst_reg: swbst {
> -+ regulator-min-microvolt = <5000000>;
> -+ regulator-max-microvolt = <5150000>;
> - };
> -
> -- VPOS_reg: VPOS {
> -- /* 15v */
> -- regulator-name = "VPOS";
> -+ snvs_reg: vsnvs {
> -+ regulator-min-microvolt = <1000000>;
> -+ regulator-max-microvolt = <3000000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> - };
> -
> -- V3P3_reg: V3P3 {
> -- regulator-name = "V3P3";
> -+ vref_reg: vrefddr {
> -+ regulator-boot-on;
> -+ regulator-always-on;
> - };
> -- };
> -- };
> --};
> -
> --&iomuxc {
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_hog_1>, <&pinctrl_hog_2>;
> --
> -- hog {
> -- pinctrl_hog_2: hoggrp-2 {
> -- fsl,pins = <
> -- /* MAX17135 */
> -- MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
> -- MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x80000000
> -- MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
> -- MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000
> -- MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000
> -- /* elan touch */
> -- MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000
> -- MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000
> -- MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x170b0
> -- >;
> -- };
> -- };
> --};
> -+ vgen1_reg: vgen1 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -
> --&epdc {
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_epdc_0>;
> -- V3P3-supply = <&V3P3_reg>;
> -- VCOM-supply = <&VCOM_reg>;
> -- DISPLAY-supply = <&DISPLAY_reg>;
> -- status = "okay";
> --};
> -+ vgen2_reg: vgen2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -
> --&ldb {
> -- ipu_id = <0>;
> -- sec_ipu_id = <0>;
> --};
> -+ vgen3_reg: vgen3 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ };
> -
> --&mxcfb1 {
> -- status = "okay";
> --};
> -+ vgen4_reg: vgen4 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -
> --&mxcfb2 {
> -- status = "okay";
> --};
> -+ vgen5_reg: vgen5 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -
> --&pxp {
> -- status = "okay";
> -+ vgen6_reg: vgen6 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+ };
> -+ };
> - };
> -diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
> -index 072e7d3..5e5ff56 100644
> ---- a/arch/arm/boot/dts/imx6q-sabresd.dts
> -+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
> -@@ -26,6 +26,107 @@
> - offset-usb-charger = <1685>;
> - };
> -
> -+&i2c2 {
> -+ pmic: pfuze100@08 {
> -+ compatible = "fsl,pfuze100";
> -+ reg = <0x08>;
> -+
> -+ regulators {
> -+ sw1a_reg: sw1ab {
> -+ regulator-min-microvolt = <300000>;
> -+ regulator-max-microvolt = <1875000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ regulator-ramp-delay = <6250>;
> -+ };
> -+
> -+ sw1c_reg: sw1c {
> -+ regulator-min-microvolt = <300000>;
> -+ regulator-max-microvolt = <1875000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ regulator-ramp-delay = <6250>;
> -+ };
> -+
> -+ sw2_reg: sw2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3a_reg: sw3a {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3b_reg: sw3b {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw4_reg: sw4 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ };
> -+
> -+ swbst_reg: swbst {
> -+ regulator-min-microvolt = <5000000>;
> -+ regulator-max-microvolt = <5150000>;
> -+ };
> -+
> -+ snvs_reg: vsnvs {
> -+ regulator-min-microvolt = <1000000>;
> -+ regulator-max-microvolt = <3000000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vref_reg: vrefddr {
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen1_reg: vgen1 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen2_reg: vgen2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen3_reg: vgen3 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ };
> -+
> -+ vgen4_reg: vgen4 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen5_reg: vgen5 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen6_reg: vgen6 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+ };
> -+ };
> -+};
> -+
> - &mxcfb1 {
> - status = "okay";
> - };
> -diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> -index 66b6145..5d774e5 100644
> ---- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> -+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> -@@ -405,105 +405,6 @@
> - mclk_source = <0>;
> - };
> -
> -- pmic: pfuze100@08 {
> -- compatible = "fsl,pfuze100";
> -- reg = <0x08>;
> --
> -- regulators {
> -- sw1a_reg: sw1ab {
> -- regulator-min-microvolt = <300000>;
> -- regulator-max-microvolt = <1875000>;
> -- regulator-boot-on;
> -- regulator-always-on;
> -- regulator-ramp-delay = <6250>;
> -- };
> --
> -- sw1c_reg: sw1c {
> -- regulator-min-microvolt = <300000>;
> -- regulator-max-microvolt = <1875000>;
> -- regulator-boot-on;
> -- regulator-always-on;
> -- regulator-ramp-delay = <6250>;
> -- };
> --
> -- sw2_reg: sw2 {
> -- regulator-min-microvolt = <800000>;
> -- regulator-max-microvolt = <3300000>;
> -- regulator-boot-on;
> -- regulator-always-on;
> -- };
> --
> -- sw3a_reg: sw3a {
> -- regulator-min-microvolt = <400000>;
> -- regulator-max-microvolt = <1975000>;
> -- regulator-boot-on;
> -- regulator-always-on;
> -- };
> --
> -- sw3b_reg: sw3b {
> -- regulator-min-microvolt = <400000>;
> -- regulator-max-microvolt = <1975000>;
> -- regulator-boot-on;
> -- regulator-always-on;
> -- };
> --
> -- sw4_reg: sw4 {
> -- regulator-min-microvolt = <800000>;
> -- regulator-max-microvolt = <3300000>;
> -- };
> --
> -- swbst_reg: swbst {
> -- regulator-min-microvolt = <5000000>;
> -- regulator-max-microvolt = <5150000>;
> -- };
> --
> -- snvs_reg: vsnvs {
> -- regulator-min-microvolt = <1000000>;
> -- regulator-max-microvolt = <3000000>;
> -- regulator-boot-on;
> -- regulator-always-on;
> -- };
> --
> -- vref_reg: vrefddr {
> -- regulator-boot-on;
> -- regulator-always-on;
> -- };
> --
> -- vgen1_reg: vgen1 {
> -- regulator-min-microvolt = <800000>;
> -- regulator-max-microvolt = <1550000>;
> -- };
> --
> -- vgen2_reg: vgen2 {
> -- regulator-min-microvolt = <800000>;
> -- regulator-max-microvolt = <1550000>;
> -- };
> --
> -- vgen3_reg: vgen3 {
> -- regulator-min-microvolt = <1800000>;
> -- regulator-max-microvolt = <3300000>;
> -- };
> --
> -- vgen4_reg: vgen4 {
> -- regulator-min-microvolt = <1800000>;
> -- regulator-max-microvolt = <3300000>;
> -- regulator-always-on;
> -- };
> --
> -- vgen5_reg: vgen5 {
> -- regulator-min-microvolt = <1800000>;
> -- regulator-max-microvolt = <3300000>;
> -- regulator-always-on;
> -- };
> --
> -- vgen6_reg: vgen6 {
> -- regulator-min-microvolt = <1800000>;
> -- regulator-max-microvolt = <3300000>;
> -- regulator-always-on;
> -- };
> -- };
> -- };
> --
> - egalax_ts@04 {
> - compatible = "eeti,egalax_ts";
> - reg = <0x04>;
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch b/recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch
> deleted file mode 100644
> index 326e0a7..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0009-ENGR00301078-2-ARM-dts-imx6sl-evk-add-support-for-pf.patch
> +++ /dev/null
> @@ -1,1202 +0,0 @@
> -From 3082ee40d024412e8c275f1945e4a06a638e81bb Mon Sep 17 00:00:00 2001
> -From: Robin Gong <b38343@freescale.com>
> -Date: Thu, 6 Mar 2014 19:36:02 +0800
> -Subject: [PATCH 09/10] ENGR00301078-2: ARM: dts: imx6sl-evk: add support for
> - pfuze200 on imx6sl-evk
> -Organization: O.S. Systems Software LTDA.
> -
> -move pmic device node from imx6sl-evk.dtsi to upper-level, and add
> -another layer on imx6sl-evk to diff pfuze100 or pfuze200. Meanwhile
> -only works in ldo-enable mode if using pfuze200, since 'SW1C' switch
> -regulator is cut for cost-down which means VDDARM_IN and VDDSOC_IN have
> -to share the same switch regulator
> -
> -Signed-off-by: Robin Gong <b38343@freescale.com>
> -
> -Upstream-Status: Pending
> ----
> - arch/arm/boot/dts/Makefile | 1 +
> - arch/arm/boot/dts/imx6sl-evk-common.dtsi | 504 +++++++++++++++++++++++++++++++
> - arch/arm/boot/dts/imx6sl-evk-pf200.dts | 122 ++++++++
> - arch/arm/boot/dts/imx6sl-evk.dts | 497 +-----------------------------
> - 4 files changed, 630 insertions(+), 494 deletions(-)
> - create mode 100644 arch/arm/boot/dts/imx6sl-evk-common.dtsi
> - create mode 100644 arch/arm/boot/dts/imx6sl-evk-pf200.dts
> -
> -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> -index c744cda..c5f9a19 100644
> ---- a/arch/arm/boot/dts/Makefile
> -+++ b/arch/arm/boot/dts/Makefile
> -@@ -135,6 +135,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> - imx6sl-evk.dtb \
> - imx6sl-evk-csi.dtb \
> - imx6sl-evk-ldo.dtb \
> -+ imx6sl-evk-pf200.dtb \
> - vf610-twr.dtb
> - dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
> - imx23-olinuxino.dtb \
> -diff --git a/arch/arm/boot/dts/imx6sl-evk-common.dtsi b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
> -new file mode 100644
> -index 0000000..a1a3969
> ---- /dev/null
> -+++ b/arch/arm/boot/dts/imx6sl-evk-common.dtsi
> -@@ -0,0 +1,504 @@
> -+/*
> -+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
> -+ *
> -+ * This program is free software; you can redistribute it and/or modify
> -+ * it under the terms of the GNU General Public License version 2 as
> -+ * published by the Free Software Foundation.
> -+ */
> -+
> -+/ {
> -+ memory {
> -+ reg = <0x80000000 0x40000000>;
> -+ };
> -+
> -+ battery: max8903@0 {
> -+ compatible = "fsl,max8903-charger";
> -+ pinctrl-names = "default";
> -+ dok_input = <&gpio4 13 1>;
> -+ uok_input = <&gpio4 13 1>;
> -+ chg_input = <&gpio4 15 1>;
> -+ flt_input = <&gpio4 14 1>;
> -+ fsl,dcm_always_high;
> -+ fsl,dc_valid;
> -+ fsl,adc_disable;
> -+ status = "okay";
> -+ };
> -+
> -+ regulators {
> -+ compatible = "simple-bus";
> -+
> -+ reg_lcd_3v3: lcd-3v3 {
> -+ compatible = "regulator-fixed";
> -+ regulator-name = "lcd-3v3";
> -+ gpio = <&gpio4 3 0>;
> -+ enable-active-high;
> -+ };
> -+
> -+ reg_aud3v: wm8962_supply_3v15 {
> -+ compatible = "regulator-fixed";
> -+ regulator-name = "wm8962-supply-3v15";
> -+ regulator-min-microvolt = <3150000>;
> -+ regulator-max-microvolt = <3150000>;
> -+ regulator-boot-on;
> -+ };
> -+
> -+ reg_aud4v: wm8962_supply_4v2 {
> -+ compatible = "regulator-fixed";
> -+ regulator-name = "wm8962-supply-4v2";
> -+ regulator-min-microvolt = <4325000>;
> -+ regulator-max-microvolt = <4325000>;
> -+ regulator-boot-on;
> -+ };
> -+
> -+ reg_usb_otg1_vbus: usb_otg1_vbus {
> -+ compatible = "regulator-fixed";
> -+ regulator-name = "usb_otg1_vbus";
> -+ regulator-min-microvolt = <5000000>;
> -+ regulator-max-microvolt = <5000000>;
> -+ gpio = <&gpio4 0 0>;
> -+ enable-active-high;
> -+ };
> -+
> -+ reg_usb_otg2_vbus: usb_otg2_vbus {
> -+ compatible = "regulator-fixed";
> -+ regulator-name = "usb_otg2_vbus";
> -+ regulator-min-microvolt = <5000000>;
> -+ regulator-max-microvolt = <5000000>;
> -+ gpio = <&gpio4 2 0>;
> -+ enable-active-high;
> -+ };
> -+ };
> -+
> -+ backlight {
> -+ compatible = "pwm-backlight";
> -+ pwms = <&pwm1 0 5000000>;
> -+ brightness-levels = <0 4 8 16 32 64 128 255>;
> -+ default-brightness-level = <6>;
> -+ };
> -+
> -+ csi_v4l2_cap {
> -+ compatible = "fsl,imx6sl-csi-v4l2";
> -+ status = "disabled";
> -+ };
> -+
> -+ pxp_v4l2_out {
> -+ compatible = "fsl,imx6sl-pxp-v4l2";
> -+ status = "okay";
> -+ };
> -+
> -+ sound {
> -+ compatible = "fsl,imx6q-sabresd-wm8962",
> -+ "fsl,imx-audio-wm8962";
> -+ model = "wm8962-audio";
> -+ ssi-controller = <&ssi2>;
> -+ audio-codec = <&codec>;
> -+ audio-routing =
> -+ "Headphone Jack", "HPOUTL",
> -+ "Headphone Jack", "HPOUTR",
> -+ "Ext Spk", "SPKOUTL",
> -+ "Ext Spk", "SPKOUTR",
> -+ "AMIC", "MICBIAS",
> -+ "IN3R", "AMIC";
> -+ amic-mono;
> -+ mux-int-port = <2>;
> -+ mux-ext-port = <3>;
> -+ hp-det-gpios = <&gpio4 19 1>;
> -+ };
> -+
> -+ sound-spdif {
> -+ compatible = "fsl,imx-audio-spdif",
> -+ "fsl,imx6sl-evk-spdif";
> -+ model = "imx-spdif";
> -+ spdif-controller = <&spdif>;
> -+ spdif-out;
> -+ };
> -+
> -+ sii902x_reset: sii902x-reset {
> -+ compatible = "gpio-reset";
> -+ reset-gpios = <&gpio2 19 1>;
> -+ reset-delay-us = <100000>;
> -+ #reset-cells = <0>;
> -+ };
> -+};
> -+
> -+&audmux {
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_audmux_1>;
> -+ status = "okay";
> -+};
> -+
> -+&csi {
> -+ status = "disabled";
> -+};
> -+
> -+&ecspi1 {
> -+ fsl,spi-num-chipselects = <1>;
> -+ cs-gpios = <&gpio4 11 0>;
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_ecspi1_1>;
> -+ status = "okay";
> -+
> -+ flash: m25p80@0 {
> -+ #address-cells = <1>;
> -+ #size-cells = <1>;
> -+ compatible = "st,m25p32";
> -+ spi-max-frequency = <20000000>;
> -+ reg = <0>;
> -+ };
> -+};
> -+
> -+&epdc {
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_epdc_0>;
> -+ V3P3-supply = <&V3P3_reg>;
> -+ VCOM-supply = <&VCOM_reg>;
> -+ DISPLAY-supply = <&DISPLAY_reg>;
> -+ status = "okay";
> -+};
> -+
> -+&cpu0 {
> -+ arm-supply = <&sw1a_reg>;
> -+ soc-supply = <&sw1c_reg>;
> -+ pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&fec {
> -+ pinctrl-names = "default", "sleep";
> -+ pinctrl-0 = <&pinctrl_fec_1>;
> -+ pinctrl-1 = <&pinctrl_fec_1_sleep>;
> -+ phy-mode = "rmii";
> -+ phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */
> -+ phy-reset-duration = <1>;
> -+ status = "okay";
> -+};
> -+
> -+&gpc {
> -+ fsl,cpu_pupscr_sw2iso = <0xf>;
> -+ fsl,cpu_pupscr_sw = <0xf>;
> -+ fsl,cpu_pdnscr_iso2sw = <0x1>;
> -+ fsl,cpu_pdnscr_iso = <0x1>;
> -+ fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
> -+ fsl,wdog-reset = <1>; /* watchdog select of reset source */
> -+ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&gpu {
> -+ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&i2c1 {
> -+ clock-frequency = <100000>;
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_i2c1_1>;
> -+ status = "okay";
> -+
> -+ elan@10 {
> -+ compatible = "elan,elan-touch";
> -+ reg = <0x10>;
> -+ interrupt-parent = <&gpio2>;
> -+ interrupts = <10 2>;
> -+ gpio_elan_cs = <&gpio2 9 0>;
> -+ gpio_elan_rst = <&gpio4 4 0>;
> -+ gpio_intr = <&gpio2 10 0>;
> -+ status = "okay";
> -+ };
> -+
> -+ max17135@48 {
> -+ compatible = "maxim,max17135";
> -+ reg = <0x48>;
> -+ vneg_pwrup = <1>;
> -+ gvee_pwrup = <2>;
> -+ vpos_pwrup = <10>;
> -+ gvdd_pwrup = <12>;
> -+ gvdd_pwrdn = <1>;
> -+ vpos_pwrdn = <2>;
> -+ gvee_pwrdn = <8>;
> -+ vneg_pwrdn = <10>;
> -+ gpio_pmic_pwrgood = <&gpio2 13 0>;
> -+ gpio_pmic_vcom_ctrl = <&gpio2 3 0>;
> -+ gpio_pmic_wakeup = <&gpio2 14 0>;
> -+ gpio_pmic_v3p3 = <&gpio2 7 0>;
> -+ gpio_pmic_intr = <&gpio2 12 0>;
> -+
> -+ regulators {
> -+ DISPLAY_reg: DISPLAY {
> -+ regulator-name = "DISPLAY";
> -+ };
> -+
> -+ GVDD_reg: GVDD {
> -+ /* 20v */
> -+ regulator-name = "GVDD";
> -+ };
> -+
> -+ GVEE_reg: GVEE {
> -+ /* -22v */
> -+ regulator-name = "GVEE";
> -+ };
> -+
> -+ HVINN_reg: HVINN {
> -+ /* -22v */
> -+ regulator-name = "HVINN";
> -+ };
> -+
> -+ HVINP_reg: HVINP {
> -+ /* 20v */
> -+ regulator-name = "HVINP";
> -+ };
> -+
> -+ VCOM_reg: VCOM {
> -+ regulator-name = "VCOM";
> -+ /* 2's-compliment, -4325000 */
> -+ regulator-min-microvolt = <0xffbe0178>;
> -+ /* 2's-compliment, -500000 */
> -+ regulator-max-microvolt = <0xfff85ee0>;
> -+ };
> -+
> -+ VNEG_reg: VNEG {
> -+ /* -15v */
> -+ regulator-name = "VNEG";
> -+ };
> -+
> -+ VPOS_reg: VPOS {
> -+ /* 15v */
> -+ regulator-name = "VPOS";
> -+ };
> -+
> -+ V3P3_reg: V3P3 {
> -+ regulator-name = "V3P3";
> -+ };
> -+ };
> -+ };
> -+
> -+ mma8450@1c {
> -+ compatible = "fsl,mma8450";
> -+ reg = <0x1c>;
> -+ };
> -+};
> -+
> -+&i2c2 {
> -+ clock-frequency = <100000>;
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_i2c2_1>;
> -+ status = "okay";
> -+
> -+ codec: wm8962@1a {
> -+ compatible = "wlf,wm8962";
> -+ reg = <0x1a>;
> -+ clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
> -+ DCVDD-supply = <&vgen3_reg>;
> -+ DBVDD-supply = <®_aud3v>;
> -+ AVDD-supply = <&vgen3_reg>;
> -+ CPVDD-supply = <&vgen3_reg>;
> -+ MICVDD-supply = <®_aud3v>;
> -+ PLLVDD-supply = <&vgen3_reg>;
> -+ SPKVDD1-supply = <®_aud4v>;
> -+ SPKVDD2-supply = <®_aud4v>;
> -+ amic-mono;
> -+ };
> -+
> -+ sii902x@39 {
> -+ compatible = "SiI,sii902x";
> -+ interrupt-parent = <&gpio2>;
> -+ interrupts = <10 2>;
> -+ mode_str ="1280x720M@60";
> -+ bits-per-pixel = <32>;
> -+ resets = <&sii902x_reset>;
> -+ reg = <0x39>;
> -+ };
> -+};
> -+
> -+&i2c3 {
> -+ clock-frequency = <100000>;
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_i2c3_1>;
> -+ status = "disabled";
> -+
> -+ ov564x: ov564x@3c {
> -+ compatible = "ovti,ov564x";
> -+ reg = <0x3c>;
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_csi_0>;
> -+ clocks = <&clks IMX6SL_CLK_CSI>;
> -+ clock-names = "csi_mclk";
> -+ AVDD-supply = <&vgen6_reg>; /* 2.8v */
> -+ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
> -+ pwn-gpios = <&gpio1 25 1>;
> -+ rst-gpios = <&gpio1 26 0>;
> -+ csi_id = <0>;
> -+ mclk = <24000000>;
> -+ mclk_source = <0>;
> -+ };
> -+};
> -+
> -+&iomuxc {
> -+ pinctrl-names = "default", "sleep";
> -+ pinctrl-0 = <&pinctrl_hog>;
> -+ pinctrl-1 = <&pinctrl_hog_sleep>;
> -+
> -+ hog {
> -+ pinctrl_hog: hoggrp {
> -+ fsl,pins = <
> -+ MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
> -+ MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
> -+ MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
> -+ MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
> -+ MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
> -+ MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000
> -+ MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x110b0
> -+ MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x80000000
> -+ MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000
> -+ MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000
> -+ MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000
> -+ MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000
> -+ MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x170b0
> -+ MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x80000000
> -+ MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x110b0
> -+ MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x17000
> -+ MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x17000
> -+ MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 0x17000
> -+ MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b0b0
> -+ MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x1b0b0
> -+ MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
> -+ MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
> -+ >;
> -+ };
> -+
> -+ pinctrl_hog_sleep: hoggrp_sleep {
> -+ fsl,pins = <
> -+ MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x3080
> -+ MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x3080
> -+ MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x3080
> -+ >;
> -+ };
> -+ };
> -+};
> -+
> -+&kpp {
> -+ pinctrl-names = "default", "sleep";
> -+ pinctrl-0 = <&pinctrl_kpp_1>;
> -+ pinctrl-1 = <&pinctrl_kpp_1_sleep>;
> -+ linux,keymap = <
> -+ 0x00000067 /* KEY_UP */
> -+ 0x0001006c /* KEY_DOWN */
> -+ 0x0002001c /* KEY_ENTER */
> -+ 0x01000066 /* KEY_HOME */
> -+ 0x0101006a /* KEY_RIGHT */
> -+ 0x01020069 /* KEY_LEFT */
> -+ 0x02000072 /* KEY_VOLUMEDOWN */
> -+ 0x02010073 /* KEY_VOLUMEUP */
> -+ >;
> -+ status = "okay";
> -+};
> -+
> -+&lcdif {
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_lcdif_dat_0
> -+ &pinctrl_lcdif_ctrl_0>;
> -+ lcd-supply = <®_lcd_3v3>;
> -+ display = <&display>;
> -+ status = "okay";
> -+
> -+ display: display {
> -+ bits-per-pixel = <16>;
> -+ bus-width = <24>;
> -+
> -+ display-timings {
> -+ native-mode = <&timing0>;
> -+ timing0: timing0 {
> -+ clock-frequency = <33500000>;
> -+ hactive = <800>;
> -+ vactive = <480>;
> -+ hback-porch = <89>;
> -+ hfront-porch = <164>;
> -+ vback-porch = <23>;
> -+ vfront-porch = <10>;
> -+ hsync-len = <10>;
> -+ vsync-len = <10>;
> -+ hsync-active = <0>;
> -+ vsync-active = <0>;
> -+ de-active = <1>;
> -+ pixelclk-active = <0>;
> -+ };
> -+ };
> -+ };
> -+};
> -+
> -+&pwm1 {
> -+ pinctrl-names = "default", "sleep";
> -+ pinctrl-0 = <&pinctrl_pwm1_0>;
> -+ pinctrl-1 = <&pinctrl_pwm1_0_sleep>;
> -+ status = "okay";
> -+};
> -+
> -+&pxp {
> -+ status = "okay";
> -+};
> -+
> -+&spdif {
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_spdif_1>;
> -+ status = "okay";
> -+};
> -+
> -+&ssi2 {
> -+ fsl,mode = "i2s-slave";
> -+ status = "okay";
> -+};
> -+
> -+&uart1 {
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_uart1_1>;
> -+ status = "okay";
> -+};
> -+
> -+&usbotg1 {
> -+ vbus-supply = <®_usb_otg1_vbus>;
> -+ pinctrl-names = "default";
> -+ pinctrl-0 = <&pinctrl_usbotg1_1>;
> -+ disable-over-current;
> -+ imx6-usb-charger-detection;
> -+ status = "okay";
> -+};
> -+
> -+&usbotg2 {
> -+ vbus-supply = <®_usb_otg2_vbus>;
> -+ dr_mode = "host";
> -+ disable-over-current;
> -+ status = "okay";
> -+};
> -+
> -+&usdhc1 {
> -+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -+ pinctrl-0 = <&pinctrl_usdhc1_1>;
> -+ pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
> -+ pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
> -+ bus-width = <8>;
> -+ cd-gpios = <&gpio4 7 0>;
> -+ wp-gpios = <&gpio4 6 0>;
> -+ keep-power-in-suspend;
> -+ enable-sdio-wakeup;
> -+ status = "okay";
> -+};
> -+
> -+&usdhc2 {
> -+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -+ pinctrl-0 = <&pinctrl_usdhc2_1>;
> -+ pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
> -+ pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
> -+ cd-gpios = <&gpio5 0 0>;
> -+ wp-gpios = <&gpio4 29 0>;
> -+ keep-power-in-suspend;
> -+ enable-sdio-wakeup;
> -+ status = "okay";
> -+};
> -+
> -+&usdhc3 {
> -+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -+ pinctrl-0 = <&pinctrl_usdhc3_1>;
> -+ pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
> -+ pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
> -+ cd-gpios = <&gpio3 22 0>;
> -+ keep-power-in-suspend;
> -+ enable-sdio-wakeup;
> -+ status = "okay";
> -+};
> -diff --git a/arch/arm/boot/dts/imx6sl-evk-pf200.dts b/arch/arm/boot/dts/imx6sl-evk-pf200.dts
> -new file mode 100644
> -index 0000000..55d3081
> ---- /dev/null
> -+++ b/arch/arm/boot/dts/imx6sl-evk-pf200.dts
> -@@ -0,0 +1,122 @@
> -+/*
> -+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
> -+ *
> -+ * This program is free software; you can redistribute it and/or modify
> -+ * it under the terms of the GNU General Public License version 2 as
> -+ * published by the Free Software Foundation.
> -+ */
> -+
> -+/dts-v1/;
> -+
> -+#include "imx6sl.dtsi"
> -+#include "imx6sl-evk-common.dtsi"
> -+
> -+/ {
> -+ model = "Freescale i.MX6 SoloLite EVK Board(PFUZE200)";
> -+ compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
> -+};
> -+
> -+&cpu0 {
> -+ arm-supply = <®_arm>;
> -+ soc-supply = <®_soc>;
> -+ pu-supply = <®_pu>; /* use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&gpc {
> -+ fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */
> -+ fsl,wdog-reset = <1>; /* watchdog select of reset source */
> -+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&gpu {
> -+ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> -+};
> -+
> -+&i2c1 {
> -+ pmic: pfuze200@08 {
> -+ compatible = "fsl,pfuze200";
> -+ reg = <0x08>;
> -+
> -+ regulators {
> -+ sw1a_reg: sw1ab {
> -+ regulator-min-microvolt = <300000>;
> -+ regulator-max-microvolt = <1875000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ regulator-ramp-delay = <6250>;
> -+ };
> -+
> -+ sw2_reg: sw2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3a_reg: sw3a {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ sw3b_reg: sw3b {
> -+ regulator-min-microvolt = <400000>;
> -+ regulator-max-microvolt = <1975000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ swbst_reg: swbst {
> -+ regulator-min-microvolt = <5000000>;
> -+ regulator-max-microvolt = <5150000>;
> -+ };
> -+
> -+ snvs_reg: vsnvs {
> -+ regulator-min-microvolt = <1000000>;
> -+ regulator-max-microvolt = <3000000>;
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vref_reg: vrefddr {
> -+ regulator-boot-on;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen1_reg: vgen1 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen2_reg: vgen2 {
> -+ regulator-min-microvolt = <800000>;
> -+ regulator-max-microvolt = <1550000>;
> -+ };
> -+
> -+ vgen3_reg: vgen3 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen4_reg: vgen4 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen5_reg: vgen5 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+
> -+ vgen6_reg: vgen6 {
> -+ regulator-min-microvolt = <1800000>;
> -+ regulator-max-microvolt = <3300000>;
> -+ regulator-always-on;
> -+ };
> -+ };
> -+ };
> -+};
> -diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
> -index 4966f38..ed0ce89 100644
> ---- a/arch/arm/boot/dts/imx6sl-evk.dts
> -+++ b/arch/arm/boot/dts/imx6sl-evk.dts
> -@@ -1,5 +1,5 @@
> - /*
> -- * Copyright (C) 2013 Freescale Semiconductor, Inc.
> -+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> -@@ -9,195 +9,14 @@
> - /dts-v1/;
> -
> - #include "imx6sl.dtsi"
> -+#include "imx6sl-evk-common.dtsi"
> -
> - / {
> -- model = "Freescale i.MX6 SoloLite EVK Board";
> -+ model = "Freescale i.MX6 SoloLite EVK Board(PFUZE100)";
> - compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
> --
> -- memory {
> -- reg = <0x80000000 0x40000000>;
> -- };
> --
> -- battery: max8903@0 {
> -- compatible = "fsl,max8903-charger";
> -- pinctrl-names = "default";
> -- dok_input = <&gpio4 13 1>;
> -- uok_input = <&gpio4 13 1>;
> -- chg_input = <&gpio4 15 1>;
> -- flt_input = <&gpio4 14 1>;
> -- fsl,dcm_always_high;
> -- fsl,dc_valid;
> -- fsl,adc_disable;
> -- status = "okay";
> -- };
> -- regulators {
> -- compatible = "simple-bus";
> --
> -- reg_lcd_3v3: lcd-3v3 {
> -- compatible = "regulator-fixed";
> -- regulator-name = "lcd-3v3";
> -- gpio = <&gpio4 3 0>;
> -- enable-active-high;
> -- };
> --
> -- reg_aud3v: wm8962_supply_3v15 {
> -- compatible = "regulator-fixed";
> -- regulator-name = "wm8962-supply-3v15";
> -- regulator-min-microvolt = <3150000>;
> -- regulator-max-microvolt = <3150000>;
> -- regulator-boot-on;
> -- };
> --
> -- reg_aud4v: wm8962_supply_4v2 {
> -- compatible = "regulator-fixed";
> -- regulator-name = "wm8962-supply-4v2";
> -- regulator-min-microvolt = <4325000>;
> -- regulator-max-microvolt = <4325000>;
> -- regulator-boot-on;
> -- };
> --
> -- reg_usb_otg1_vbus: usb_otg1_vbus {
> -- compatible = "regulator-fixed";
> -- regulator-name = "usb_otg1_vbus";
> -- regulator-min-microvolt = <5000000>;
> -- regulator-max-microvolt = <5000000>;
> -- gpio = <&gpio4 0 0>;
> -- enable-active-high;
> -- };
> --
> -- reg_usb_otg2_vbus: usb_otg2_vbus {
> -- compatible = "regulator-fixed";
> -- regulator-name = "usb_otg2_vbus";
> -- regulator-min-microvolt = <5000000>;
> -- regulator-max-microvolt = <5000000>;
> -- gpio = <&gpio4 2 0>;
> -- enable-active-high;
> -- };
> -- };
> --
> -- backlight {
> -- compatible = "pwm-backlight";
> -- pwms = <&pwm1 0 5000000>;
> -- brightness-levels = <0 4 8 16 32 64 128 255>;
> -- default-brightness-level = <6>;
> -- };
> --
> -- csi_v4l2_cap {
> -- compatible = "fsl,imx6sl-csi-v4l2";
> -- status = "disabled";
> -- };
> --
> -- pxp_v4l2_out {
> -- compatible = "fsl,imx6sl-pxp-v4l2";
> -- status = "okay";
> -- };
> --
> -- sound {
> -- compatible = "fsl,imx6q-sabresd-wm8962",
> -- "fsl,imx-audio-wm8962";
> -- model = "wm8962-audio";
> -- ssi-controller = <&ssi2>;
> -- audio-codec = <&codec>;
> -- audio-routing =
> -- "Headphone Jack", "HPOUTL",
> -- "Headphone Jack", "HPOUTR",
> -- "Ext Spk", "SPKOUTL",
> -- "Ext Spk", "SPKOUTR",
> -- "AMIC", "MICBIAS",
> -- "IN3R", "AMIC";
> -- amic-mono;
> -- mux-int-port = <2>;
> -- mux-ext-port = <3>;
> -- hp-det-gpios = <&gpio4 19 1>;
> -- };
> --
> -- sound-spdif {
> -- compatible = "fsl,imx-audio-spdif",
> -- "fsl,imx6sl-evk-spdif";
> -- model = "imx-spdif";
> -- spdif-controller = <&spdif>;
> -- spdif-out;
> -- };
> --
> -- sii902x_reset: sii902x-reset {
> -- compatible = "gpio-reset";
> -- reset-gpios = <&gpio2 19 1>;
> -- reset-delay-us = <100000>;
> -- #reset-cells = <0>;
> -- };
> --};
> --
> --&audmux {
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_audmux_1>;
> -- status = "okay";
> --};
> --
> --&csi {
> -- status = "disabled";
> --};
> --
> --&ecspi1 {
> -- fsl,spi-num-chipselects = <1>;
> -- cs-gpios = <&gpio4 11 0>;
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_ecspi1_1>;
> -- status = "okay";
> --
> -- flash: m25p80@0 {
> -- #address-cells = <1>;
> -- #size-cells = <1>;
> -- compatible = "st,m25p32";
> -- spi-max-frequency = <20000000>;
> -- reg = <0>;
> -- };
> --};
> --
> --&epdc {
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_epdc_0>;
> -- V3P3-supply = <&V3P3_reg>;
> -- VCOM-supply = <&VCOM_reg>;
> -- DISPLAY-supply = <&DISPLAY_reg>;
> -- status = "okay";
> --};
> --
> --&cpu0 {
> -- arm-supply = <&sw1a_reg>;
> -- soc-supply = <&sw1c_reg>;
> -- pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
> --};
> --
> --&fec {
> -- pinctrl-names = "default", "sleep";
> -- pinctrl-0 = <&pinctrl_fec_1>;
> -- pinctrl-1 = <&pinctrl_fec_1_sleep>;
> -- phy-mode = "rmii";
> -- phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */
> -- phy-reset-duration = <1>;
> -- status = "okay";
> --};
> --
> --&gpc {
> -- fsl,cpu_pupscr_sw2iso = <0xf>;
> -- fsl,cpu_pupscr_sw = <0xf>;
> -- fsl,cpu_pdnscr_iso2sw = <0x1>;
> -- fsl,cpu_pdnscr_iso = <0x1>;
> -- fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
> -- fsl,wdog-reset = <1>; /* watchdog select of reset source */
> -- pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> --};
> --
> --&gpu {
> -- pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
> - };
> -
> - &i2c1 {
> -- clock-frequency = <100000>;
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_i2c1_1>;
> -- status = "okay";
> --
> - pmic: pfuze100@08 {
> - compatible = "fsl,pfuze100";
> - reg = <0x08>;
> -@@ -297,314 +116,4 @@
> - };
> - };
> - };
> --
> -- elan@10 {
> -- compatible = "elan,elan-touch";
> -- reg = <0x10>;
> -- interrupt-parent = <&gpio2>;
> -- interrupts = <10 2>;
> -- gpio_elan_cs = <&gpio2 9 0>;
> -- gpio_elan_rst = <&gpio4 4 0>;
> -- gpio_intr = <&gpio2 10 0>;
> -- status = "okay";
> -- };
> --
> -- max17135@48 {
> -- compatible = "maxim,max17135";
> -- reg = <0x48>;
> -- vneg_pwrup = <1>;
> -- gvee_pwrup = <2>;
> -- vpos_pwrup = <10>;
> -- gvdd_pwrup = <12>;
> -- gvdd_pwrdn = <1>;
> -- vpos_pwrdn = <2>;
> -- gvee_pwrdn = <8>;
> -- vneg_pwrdn = <10>;
> -- gpio_pmic_pwrgood = <&gpio2 13 0>;
> -- gpio_pmic_vcom_ctrl = <&gpio2 3 0>;
> -- gpio_pmic_wakeup = <&gpio2 14 0>;
> -- gpio_pmic_v3p3 = <&gpio2 7 0>;
> -- gpio_pmic_intr = <&gpio2 12 0>;
> --
> -- regulators {
> -- DISPLAY_reg: DISPLAY {
> -- regulator-name = "DISPLAY";
> -- };
> --
> -- GVDD_reg: GVDD {
> -- /* 20v */
> -- regulator-name = "GVDD";
> -- };
> --
> -- GVEE_reg: GVEE {
> -- /* -22v */
> -- regulator-name = "GVEE";
> -- };
> --
> -- HVINN_reg: HVINN {
> -- /* -22v */
> -- regulator-name = "HVINN";
> -- };
> --
> -- HVINP_reg: HVINP {
> -- /* 20v */
> -- regulator-name = "HVINP";
> -- };
> --
> -- VCOM_reg: VCOM {
> -- regulator-name = "VCOM";
> -- /* 2's-compliment, -4325000 */
> -- regulator-min-microvolt = <0xffbe0178>;
> -- /* 2's-compliment, -500000 */
> -- regulator-max-microvolt = <0xfff85ee0>;
> -- };
> --
> -- VNEG_reg: VNEG {
> -- /* -15v */
> -- regulator-name = "VNEG";
> -- };
> --
> -- VPOS_reg: VPOS {
> -- /* 15v */
> -- regulator-name = "VPOS";
> -- };
> --
> -- V3P3_reg: V3P3 {
> -- regulator-name = "V3P3";
> -- };
> -- };
> -- };
> --
> -- mma8450@1c {
> -- compatible = "fsl,mma8450";
> -- reg = <0x1c>;
> -- };
> --};
> --
> --&i2c2 {
> -- clock-frequency = <100000>;
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_i2c2_1>;
> -- status = "okay";
> --
> -- codec: wm8962@1a {
> -- compatible = "wlf,wm8962";
> -- reg = <0x1a>;
> -- clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
> -- DCVDD-supply = <&vgen3_reg>;
> -- DBVDD-supply = <®_aud3v>;
> -- AVDD-supply = <&vgen3_reg>;
> -- CPVDD-supply = <&vgen3_reg>;
> -- MICVDD-supply = <®_aud3v>;
> -- PLLVDD-supply = <&vgen3_reg>;
> -- SPKVDD1-supply = <®_aud4v>;
> -- SPKVDD2-supply = <®_aud4v>;
> -- amic-mono;
> -- };
> --
> -- sii902x@39 {
> -- compatible = "SiI,sii902x";
> -- interrupt-parent = <&gpio2>;
> -- interrupts = <10 2>;
> -- mode_str ="1280x720M@60";
> -- bits-per-pixel = <32>;
> -- resets = <&sii902x_reset>;
> -- reg = <0x39>;
> -- };
> --};
> --
> --&i2c3 {
> -- clock-frequency = <100000>;
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_i2c3_1>;
> -- status = "disabled";
> --
> -- ov564x: ov564x@3c {
> -- compatible = "ovti,ov564x";
> -- reg = <0x3c>;
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_csi_0>;
> -- clocks = <&clks IMX6SL_CLK_CSI>;
> -- clock-names = "csi_mclk";
> -- AVDD-supply = <&vgen6_reg>; /* 2.8v */
> -- DVDD-supply = <&vgen2_reg>; /* 1.5v*/
> -- pwn-gpios = <&gpio1 25 1>;
> -- rst-gpios = <&gpio1 26 0>;
> -- csi_id = <0>;
> -- mclk = <24000000>;
> -- mclk_source = <0>;
> -- };
> --};
> --
> --&iomuxc {
> -- pinctrl-names = "default", "sleep";
> -- pinctrl-0 = <&pinctrl_hog>;
> -- pinctrl-1 = <&pinctrl_hog_sleep>;
> --
> -- hog {
> -- pinctrl_hog: hoggrp {
> -- fsl,pins = <
> -- MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
> -- MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
> -- MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
> -- MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
> -- MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
> -- MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000
> -- MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x110b0
> -- MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x80000000
> -- MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000
> -- MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000
> -- MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000
> -- MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000
> -- MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x170b0
> -- MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x80000000
> -- MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x110b0
> -- MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x17000
> -- MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x17000
> -- MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 0x17000
> -- MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b0b0
> -- MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x1b0b0
> -- MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
> -- MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
> -- >;
> -- };
> --
> -- pinctrl_hog_sleep: hoggrp_sleep {
> -- fsl,pins = <
> -- MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x3080
> -- MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x3080
> -- MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x3080
> -- >;
> -- };
> -- };
> --};
> --
> --&kpp {
> -- pinctrl-names = "default", "sleep";
> -- pinctrl-0 = <&pinctrl_kpp_1>;
> -- pinctrl-1 = <&pinctrl_kpp_1_sleep>;
> -- linux,keymap = <
> -- 0x00000067 /* KEY_UP */
> -- 0x0001006c /* KEY_DOWN */
> -- 0x0002001c /* KEY_ENTER */
> -- 0x01000066 /* KEY_HOME */
> -- 0x0101006a /* KEY_RIGHT */
> -- 0x01020069 /* KEY_LEFT */
> -- 0x02000072 /* KEY_VOLUMEDOWN */
> -- 0x02010073 /* KEY_VOLUMEUP */
> -- >;
> -- status = "okay";
> --};
> --
> --&lcdif {
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_lcdif_dat_0
> -- &pinctrl_lcdif_ctrl_0>;
> -- lcd-supply = <®_lcd_3v3>;
> -- display = <&display>;
> -- status = "okay";
> --
> -- display: display {
> -- bits-per-pixel = <16>;
> -- bus-width = <24>;
> --
> -- display-timings {
> -- native-mode = <&timing0>;
> -- timing0: timing0 {
> -- clock-frequency = <33500000>;
> -- hactive = <800>;
> -- vactive = <480>;
> -- hback-porch = <89>;
> -- hfront-porch = <164>;
> -- vback-porch = <23>;
> -- vfront-porch = <10>;
> -- hsync-len = <10>;
> -- vsync-len = <10>;
> -- hsync-active = <0>;
> -- vsync-active = <0>;
> -- de-active = <1>;
> -- pixelclk-active = <0>;
> -- };
> -- };
> -- };
> --};
> --
> --&pwm1 {
> -- pinctrl-names = "default", "sleep";
> -- pinctrl-0 = <&pinctrl_pwm1_0>;
> -- pinctrl-1 = <&pinctrl_pwm1_0_sleep>;
> -- status = "okay";
> --};
> --
> --&pxp {
> -- status = "okay";
> --};
> --
> --&spdif {
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_spdif_1>;
> -- status = "okay";
> --};
> --
> --&ssi2 {
> -- fsl,mode = "i2s-slave";
> -- status = "okay";
> --};
> --
> --&uart1 {
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_uart1_1>;
> -- status = "okay";
> --};
> --
> --&usbotg1 {
> -- vbus-supply = <®_usb_otg1_vbus>;
> -- pinctrl-names = "default";
> -- pinctrl-0 = <&pinctrl_usbotg1_1>;
> -- disable-over-current;
> -- imx6-usb-charger-detection;
> -- status = "okay";
> --};
> --
> --&usbotg2 {
> -- vbus-supply = <®_usb_otg2_vbus>;
> -- dr_mode = "host";
> -- disable-over-current;
> -- status = "okay";
> --};
> --
> --&usdhc1 {
> -- pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -- pinctrl-0 = <&pinctrl_usdhc1_1>;
> -- pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
> -- pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
> -- bus-width = <8>;
> -- cd-gpios = <&gpio4 7 0>;
> -- wp-gpios = <&gpio4 6 0>;
> -- keep-power-in-suspend;
> -- enable-sdio-wakeup;
> -- status = "okay";
> --};
> --
> --&usdhc2 {
> -- pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -- pinctrl-0 = <&pinctrl_usdhc2_1>;
> -- pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
> -- pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
> -- cd-gpios = <&gpio5 0 0>;
> -- wp-gpios = <&gpio4 29 0>;
> -- keep-power-in-suspend;
> -- enable-sdio-wakeup;
> -- status = "okay";
> --};
> --
> --&usdhc3 {
> -- pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -- pinctrl-0 = <&pinctrl_usdhc3_1>;
> -- pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
> -- pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
> -- cd-gpios = <&gpio3 22 0>;
> -- keep-power-in-suspend;
> -- enable-sdio-wakeup;
> -- status = "okay";
> - };
> ---
> -2.1.0
> -
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch b/recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch
> deleted file mode 100644
> index 4459576..0000000
> --- a/recipes-kernel/linux/linux-imx-3.10.17/0010-ENGR00318392-ARM-imx6x-Save-restore-SCU-and-some-CP1.patch
> +++ /dev/null
> @@ -1,133 +0,0 @@
> -From 4a46352d23f1f7b4f513487cb1701a8592ba980f Mon Sep 17 00:00:00 2001
> -From: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
> -Date: Fri, 13 Jun 2014 15:43:14 -0500
> -Subject: [PATCH 10/10] ENGR00318392 ARM:imx6x: Save/restore SCU and some CP15
> - registers across suspend/resume
> -Organization: O.S. Systems Software LTDA.
> -
> -This patch ensures that the SCU and certain A9 CP15 registers state are maintained across
> -a suspend/resume cycle:
> -1. Need to ensure that SCU standby bit is set again after suspend/resume cycle, else
> -the system will never WAIT mode after a suspend/resume cycle. This bit should be enabled
> -on all SMP systems immaterial of whether CPUIDLE is enabled or not.
> -2. Several A9 errata workarounds involve setting bits in the ARM diagnostic register.
> -Save/restore this register across a suspend/resume cycle.
> -3. Save and restore the A9 power control register also.
> -
> -Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
> -(cherry picked from commit 7b5b4ef5b3cdc65c0576f87cfa52bcca1bda8b33)
> -
> -Upstream-Status: Pending
> ----
> - arch/arm/mach-imx/cpuidle-imx6q.c | 5 +----
> - arch/arm/mach-imx/platsmp.c | 4 +++-
> - arch/arm/mach-imx/pm-imx6.c | 36 ++++++++++++++++++++++++++++++++++++
> - 3 files changed, 40 insertions(+), 5 deletions(-)
> -
> -diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c
> -index d74d0ce..9ffbd34 100644
> ---- a/arch/arm/mach-imx/cpuidle-imx6q.c
> -+++ b/arch/arm/mach-imx/cpuidle-imx6q.c
> -@@ -1,5 +1,5 @@
> - /*
> -- * Copyright (C) 2012-2013 Freescale Semiconductor, Inc.
> -+ * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> -@@ -65,9 +65,6 @@ static struct cpuidle_driver imx6q_cpuidle_driver = {
> -
> - int __init imx6q_cpuidle_init(void)
> - {
> -- /* Need to enable SCU standby for entering WAIT modes */
> -- imx_scu_standby_enable();
> --
> - /* Set cache lpm bit for reliable WAIT mode support */
> - imx6_set_cache_lpm_in_wait(true);
> -
> -diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
> -index c6e1ab5..d2fa7ec 100644
> ---- a/arch/arm/mach-imx/platsmp.c
> -+++ b/arch/arm/mach-imx/platsmp.c
> -@@ -1,5 +1,5 @@
> - /*
> -- * Copyright 2011 Freescale Semiconductor, Inc.
> -+ * Copyright 2011-2014 Freescale Semiconductor, Inc.
> - * Copyright 2011 Linaro Ltd.
> - *
> - * The code contained herein is licensed under the GNU General Public
> -@@ -77,6 +77,8 @@ static void __init imx_smp_init_cpus(void)
> - void imx_smp_prepare(void)
> - {
> - scu_enable(scu_base);
> -+ /* Need to enable SCU standby for entering WAIT mode */
> -+ imx_scu_standby_enable();
> - }
> -
> - static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
> -diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
> -index de46b87..587cc7e 100644
> ---- a/arch/arm/mach-imx/pm-imx6.c
> -+++ b/arch/arm/mach-imx/pm-imx6.c
> -@@ -73,6 +73,8 @@ static int (*suspend_in_iram_fn)(void *iram_vbase,
> - unsigned long iram_pbase, unsigned int cpu_type);
> - static unsigned int cpu_type;
> - static void __iomem *ccm_base;
> -+static unsigned long dcr;
> -+static unsigned long pcr;
> -
> - unsigned long save_ttbr1(void)
> - {
> -@@ -111,6 +113,34 @@ void imx6_set_cache_lpm_in_wait(bool enable)
> - }
> - }
> -
> -+static void imx6_save_cpu_arch_regs(void)
> -+{
> -+ /* Save the Diagnostic Control Register. */
> -+ asm volatile(
> -+ "mrc p15, 0, %0, c15, c0, 1\n"
> -+ : "=r" (dcr)
> -+ );
> -+ /* Save the Power Control Register. */
> -+ asm volatile(
> -+ "mrc p15, 0, %0, c15, c0, 0\n"
> -+ : "=r" (pcr)
> -+ );
> -+}
> -+
> -+static void imx6_restore_cpu_arch_regs(void)
> -+{
> -+ /* Restore the diagnostic Control Register. */
> -+ asm volatile(
> -+ "mcr p15, 0, %0, c15, c0, 1\n"
> -+ : : "r" (dcr)
> -+ );
> -+ /* Restore the Power Control Register. */
> -+ asm volatile(
> -+ "mcr p15, 0, %0, c15, c0, 0\n"
> -+ : : "r" (pcr)
> -+ );
> -+}
> -+
> - static void imx6_enable_rbc(bool enable)
> - {
> - u32 val;
> -@@ -290,8 +320,14 @@ static int imx6_pm_enter(suspend_state_t state)
> - imx_gpc_pre_suspend(true);
> - imx_anatop_pre_suspend();
> - imx_set_cpu_jump(0, v7_cpu_resume);
> -+
> -+ imx6_save_cpu_arch_regs();
> -+
> - /* Zzz ... */
> - cpu_suspend(0, imx6_suspend_finish);
> -+
> -+ imx6_restore_cpu_arch_regs();
> -+
> - if (!cpu_is_imx6sl())
> - imx_smp_prepare();
> - imx_anatop_post_resume();
> ---
> -2.1.0
> -
> --
> 2.1.3
>
> --
> _______________________________________________
> meta-freescale mailing list
> meta-freescale@yoctoproject.org
> https://lists.yoctoproject.org/listinfo/meta-freescale
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2
2014-12-03 17:29 ` Daiane Angolini
@ 2014-12-03 17:33 ` Otavio Salvador
2014-12-03 18:13 ` Gary Bisson
0 siblings, 1 reply; 13+ messages in thread
From: Otavio Salvador @ 2014-12-03 17:33 UTC (permalink / raw)
To: Daiane Angolini; +Cc: meta-freescale, Gary Bisson, Fabio Estevam
On Wed, Dec 3, 2014 at 3:29 PM, Daiane Angolini <daiane.list@gmail.com> wrote:
> On Wed, Dec 3, 2014 at 3:07 PM, Gary Bisson <bisson.gary@gmail.com> wrote:
>> Those have been removed from the recipe by Laurent Post:
>
> I know you just included the hash, but please: s/Laurent/Lauren
>
>
> Thanks a lot for cleaning this folder.
I fixed this locally; this specific patch you don't need to resend.
Please fix the 2/2 as suggested by Daiane.
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.br http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854 Mobile: +1 (347) 903-9750
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2
2014-12-03 17:33 ` Otavio Salvador
@ 2014-12-03 18:13 ` Gary Bisson
0 siblings, 0 replies; 13+ messages in thread
From: Gary Bisson @ 2014-12-03 18:13 UTC (permalink / raw)
To: Otavio Salvador, Daiane Angolini; +Cc: meta-freescale, Fabio Estevam
Daiane, Otavio,
On 12/03/2014 09:33 AM, Otavio Salvador wrote:
> On Wed, Dec 3, 2014 at 3:29 PM, Daiane Angolini <daiane.list@gmail.com> wrote:
>> On Wed, Dec 3, 2014 at 3:07 PM, Gary Bisson <bisson.gary@gmail.com> wrote:
>>> Those have been removed from the recipe by Laurent Post:
>> I know you just included the hash, but please: s/Laurent/Lauren
>>
>>
>> Thanks a lot for cleaning this folder.
> I fixed this locally; this specific patch you don't need to resend.
> Please fix the 2/2 as suggested by Daiane.
>
Thanks! I will re-send the second patch only.
Gary
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 17:07 ` [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q Gary Bisson
2014-12-03 17:24 ` Daiane Angolini
@ 2014-12-03 18:39 ` Eric Nelson
2014-12-03 18:46 ` Fabio Estevam
2 siblings, 0 replies; 13+ messages in thread
From: Eric Nelson @ 2014-12-03 18:39 UTC (permalink / raw)
To: Gary Bisson, meta-freescale; +Cc: fabio.estevam, otavio
Hi Gary,
On 12/03/2014 10:07 AM, Gary Bisson wrote:
> A divider was still set to 4 instead of forcing it to 1 as those video
> dividers weren't working on early revisions of the SoC.
>
> Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
> ---
> ...6q-fix-video-divider-for-revision-1.0-of-.patch | 33 ++++++++++++++++++++++
> recipes-kernel/linux/linux-imx_3.10.17.bb | 2 ++
> 2 files changed, 35 insertions(+)
> create mode 100644 recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
>
> diff --git a/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch b/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
> new file mode 100644
> index 0000000..bcddb16
> --- /dev/null
> +++ b/recipes-kernel/linux/linux-imx-3.10.17/0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch
> @@ -0,0 +1,33 @@
> +From ffcd8b98f6ba3a2b7a4aecc1e5e454de5fa5c4c3 Mon Sep 17 00:00:00 2001
> +From: Gary Bisson <bisson.gary@gmail.com>
> +Date: Tue, 2 Dec 2014 22:11:14 -0800
> +Subject: [PATCH] ARM: clk-imx6q: fix video divider for revision 1.0 of i.MX6q
> +
> +As post dividers do not work on i.MX6Q revision 1.0 they must be fixed
> +to 1. As the table index was wrong, a divider a of 4 could still be
> +requested which implied the clock not to be set properly. This is the
> +root cause of the HDMI not working at high resolution on T1.0 version of
> +the SoC, giving the following error:
> +mxc_sdc_fb fb.27: timeout when waiting for flip irq
> +
> +Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
> +---
> + arch/arm/mach-imx/clk-imx6q.c | 2 +-
> + 1 file changed, 1 insertion(+), 1 deletion(-)
> +
> +diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> +index e09b1e8..1e5c410 100644
> +--- a/arch/arm/mach-imx/clk-imx6q.c
> ++++ b/arch/arm/mach-imx/clk-imx6q.c
> +@@ -279,7 +279,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> + post_div_table[1].div = 1;
> + post_div_table[2].div = 1;
> + video_div_table[1].div = 1;
This was clearly a typo, since video_div_table[2] is already
initialized to 1, whereas video_div_table[3] is initialized to 4.
> +- video_div_table[2].div = 1;
> ++ video_div_table[3].div = 1;
> + };
> +
> + /* type name parent_name base div_mask */
> +--
> +2.1.3
> +
> diff --git a/recipes-kernel/linux/linux-imx_3.10.17.bb b/recipes-kernel/linux/linux-imx_3.10.17.bb
> index cae1489..143eaab 100644
> --- a/recipes-kernel/linux/linux-imx_3.10.17.bb
> +++ b/recipes-kernel/linux/linux-imx_3.10.17.bb
> @@ -15,4 +15,6 @@ SRCBRANCH = "imx_3.10.17_1.0.0_ga"
> SRCREV = "33597e348b2d60dd5c71890ef7b7d3d3fd6e4e97"
> LOCALVERSION = "-1.0.2_ga"
>
> +SRC_URI += "file://0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch"
> +
> COMPATIBLE_MACHINE = "(mx6)"
>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
And, on a SABRE Lite with TO 1.0 using linux-boundary-3.10.17_1.0.2_ga:
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
For use with linux-boundary, I'd like to pull this patch directly into
our tree, so it's available to folks not using YP.
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 17:07 ` [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q Gary Bisson
2014-12-03 17:24 ` Daiane Angolini
2014-12-03 18:39 ` Eric Nelson
@ 2014-12-03 18:46 ` Fabio Estevam
2014-12-03 19:07 ` Gary Bisson
2 siblings, 1 reply; 13+ messages in thread
From: Fabio Estevam @ 2014-12-03 18:46 UTC (permalink / raw)
To: Gary Bisson; +Cc: meta-freescale, Fabio Estevam, Otavio Salvador
Hi Gary,
> @@ -0,0 +1,33 @@
> +From ffcd8b98f6ba3a2b7a4aecc1e5e454de5fa5c4c3 Mon Sep 17 00:00:00 2001
> +From: Gary Bisson <bisson.gary@gmail.com>
> +Date: Tue, 2 Dec 2014 22:11:14 -0800
> +Subject: [PATCH] ARM: clk-imx6q: fix video divider for revision 1.0 of i.MX6q
> +
> +As post dividers do not work on i.MX6Q revision 1.0 they must be fixed
> +to 1. As the table index was wrong, a divider a of 4 could still be
> +requested which implied the clock not to be set properly. This is the
> +root cause of the HDMI not working at high resolution on T1.0 version of
> +the SoC, giving the following error:
> +mxc_sdc_fb fb.27: timeout when waiting for flip irq
> +
> +Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
> +---
> + arch/arm/mach-imx/clk-imx6q.c | 2 +-
> + 1 file changed, 1 insertion(+), 1 deletion(-)
> +
> +diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> +index e09b1e8..1e5c410 100644
> +--- a/arch/arm/mach-imx/clk-imx6q.c
> ++++ b/arch/arm/mach-imx/clk-imx6q.c
> +@@ -279,7 +279,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> + post_div_table[1].div = 1;
> + post_div_table[2].div = 1;
> + video_div_table[1].div = 1;
> +- video_div_table[2].div = 1;
> ++ video_div_table[3].div = 1;
Could you please fix the mainline kernel and send a patch to the
linux-arm-kernel mailing list?
Please also Cc shawn.guo@linaro.org.
Regards,
Fabio Estevam
Thanks
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 18:46 ` Fabio Estevam
@ 2014-12-03 19:07 ` Gary Bisson
2014-12-03 19:10 ` Fabio Estevam
0 siblings, 1 reply; 13+ messages in thread
From: Gary Bisson @ 2014-12-03 19:07 UTC (permalink / raw)
To: Fabio Estevam; +Cc: meta-freescale, Fabio Estevam, Otavio Salvador
Hi Fabio,
On 12/03/2014 10:46 AM, Fabio Estevam wrote:
> Hi Gary,
>
>> @@ -0,0 +1,33 @@
>> +From ffcd8b98f6ba3a2b7a4aecc1e5e454de5fa5c4c3 Mon Sep 17 00:00:00 2001
>> +From: Gary Bisson <bisson.gary@gmail.com>
>> +Date: Tue, 2 Dec 2014 22:11:14 -0800
>> +Subject: [PATCH] ARM: clk-imx6q: fix video divider for revision 1.0 of i.MX6q
>> +
>> +As post dividers do not work on i.MX6Q revision 1.0 they must be fixed
>> +to 1. As the table index was wrong, a divider a of 4 could still be
>> +requested which implied the clock not to be set properly. This is the
>> +root cause of the HDMI not working at high resolution on T1.0 version of
>> +the SoC, giving the following error:
>> +mxc_sdc_fb fb.27: timeout when waiting for flip irq
>> +
>> +Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
>> +---
>> + arch/arm/mach-imx/clk-imx6q.c | 2 +-
>> + 1 file changed, 1 insertion(+), 1 deletion(-)
>> +
>> +diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
>> +index e09b1e8..1e5c410 100644
>> +--- a/arch/arm/mach-imx/clk-imx6q.c
>> ++++ b/arch/arm/mach-imx/clk-imx6q.c
>> +@@ -279,7 +279,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
>> + post_div_table[1].div = 1;
>> + post_div_table[2].div = 1;
>> + video_div_table[1].div = 1;
>> +- video_div_table[2].div = 1;
>> ++ video_div_table[3].div = 1;
> Could you please fix the mainline kernel and send a patch to the
> linux-arm-kernel mailing list?
>
> Please also Cc shawn.guo@linaro.org.
>
> Regards,
>
> Fabio Estevam
>
> Thanks
As explained on my coverletter, this patch fixes HDMI up to 1080p30 but
doesn't work on 1080p60 which implies that I cannot really test it on
mainline.
I plan on working on this issue later this week and only then plan on
submitting it to the mainline.
Do you think it'd be better to add this one first today and later on add
the one that allows the testing?
Thanks,
Gary
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 19:07 ` Gary Bisson
@ 2014-12-03 19:10 ` Fabio Estevam
2014-12-03 19:14 ` Gary Bisson
0 siblings, 1 reply; 13+ messages in thread
From: Fabio Estevam @ 2014-12-03 19:10 UTC (permalink / raw)
To: Gary Bisson; +Cc: meta-freescale, Fabio Estevam, Otavio Salvador
On Wed, Dec 3, 2014 at 5:07 PM, Gary Bisson <bisson.gary@gmail.com> wrote:
> As explained on my coverletter, this patch fixes HDMI up to 1080p30 but
> doesn't work on 1080p60 which implies that I cannot really test it on
> mainline.
> I plan on working on this issue later this week and only then plan on
> submitting it to the mainline.
>
> Do you think it'd be better to add this one first today and later on add the
> one that allows the testing?
Yes, I do. Better to have some HDMI then no HDMI at all ;-)
The 1080p60 is probably a different fix and not silicon version related.
Thanks
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 19:10 ` Fabio Estevam
@ 2014-12-03 19:14 ` Gary Bisson
2014-12-03 19:17 ` Fabio Estevam
0 siblings, 1 reply; 13+ messages in thread
From: Gary Bisson @ 2014-12-03 19:14 UTC (permalink / raw)
To: Fabio Estevam; +Cc: meta-freescale, Fabio Estevam, Otavio Salvador
Hi Fabio,
On Wed, Dec 3, 2014 at 11:10 AM, Fabio Estevam <festevam@gmail.com> wrote:
> On Wed, Dec 3, 2014 at 5:07 PM, Gary Bisson <bisson.gary@gmail.com> wrote:
>
>> As explained on my coverletter, this patch fixes HDMI up to 1080p30 but
>> doesn't work on 1080p60 which implies that I cannot really test it on
>> mainline.
>> I plan on working on this issue later this week and only then plan on
>> submitting it to the mainline.
>>
>> Do you think it'd be better to add this one first today and later on add the
>> one that allows the testing?
>
> Yes, I do. Better to have some HDMI then no HDMI at all ;-)
>
> The 1080p60 is probably a different fix and not silicon version related.
>
> Thanks
Ok I'll do that today then. Regarding the issue I still think this is
silicon version related as 1080p60 works fine on rev1.2.
Thanks,
Gary
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q
2014-12-03 19:14 ` Gary Bisson
@ 2014-12-03 19:17 ` Fabio Estevam
0 siblings, 0 replies; 13+ messages in thread
From: Fabio Estevam @ 2014-12-03 19:17 UTC (permalink / raw)
To: Gary Bisson; +Cc: meta-freescale, Fabio Estevam, Otavio Salvador
On Wed, Dec 3, 2014 at 5:14 PM, Gary Bisson <bisson.gary@gmail.com> wrote:
> Ok I'll do that today then. Regarding the issue I still think this is
> silicon version related as 1080p60 works fine on rev1.2.
Ok, understood. The 1080p60 TO1.0 issue can be fixed later when you
have some time to debug it.
Thanks
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2014-12-03 19:17 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-12-03 17:07 [PATCH 0/2][dizzy-next] linux-imx: add clock fix for T1.0 Gary Bisson
2014-12-03 17:07 ` [PATCH 1/2][dizzy-next] linux-imx: remove unnecessary patches for 3.10.17-1.0.2 Gary Bisson
2014-12-03 17:29 ` Daiane Angolini
2014-12-03 17:33 ` Otavio Salvador
2014-12-03 18:13 ` Gary Bisson
2014-12-03 17:07 ` [PATCH 2/2][dizzy-next] linux-imx: add clock patch for T1.0 version of i.MX6Q Gary Bisson
2014-12-03 17:24 ` Daiane Angolini
2014-12-03 18:39 ` Eric Nelson
2014-12-03 18:46 ` Fabio Estevam
2014-12-03 19:07 ` Gary Bisson
2014-12-03 19:10 ` Fabio Estevam
2014-12-03 19:14 ` Gary Bisson
2014-12-03 19:17 ` Fabio Estevam
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