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From: Marek Szyprowski <m.szyprowski@samsung.com>
To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: Marek Szyprowski <m.szyprowski@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	linux-samsung-soc@vger.kernel.org, linux-omap@vger.kernel.org,
	Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
	Russell King - ARM Linux <linux@arm.linux.org.uk>,
	Kukjin Kim <kgene.kim@samsung.com>,
	lauraa@codeaurora.org, linus.walleij@linaro.org,
	tony@atomide.com, drake@endlessm.com, loeliger@gmail.com,
	Mark Rutland <mark.rutland@arm.com>,
	nm@ti.com, khilman@linaro.org
Subject: [PATCH v10 8/8] ARM: dts: exynos4: Add nodes for L2 cache controller
Date: Tue, 23 Dec 2014 11:48:36 +0100	[thread overview]
Message-ID: <1419331716-8972-9-git-send-email-m.szyprowski@samsung.com> (raw)
In-Reply-To: <1419331716-8972-1-git-send-email-m.szyprowski@samsung.com>

From: Tomasz Figa <t.figa@samsung.com>

This patch adds device tree nodes for L2 cache controller present on
Exynos4 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/boot/dts/exynos4210.dtsi |  9 +++++++++
 arch/arm/boot/dts/exynos4x12.dtsi | 14 ++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index bcc9e63c8070..8e45ea44317e 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -81,6 +81,15 @@
 		reg = <0x10023CA0 0x20>;
 	};
 
+	l2c: l2-cache-controller@10502000 {
+		compatible = "arm,pl310-cache";
+		reg = <0x10502000 0x1000>;
+		cache-unified;
+		cache-level = <2>;
+		arm,tag-latency = <2 2 1>;
+		arm,data-latency = <2 2 1>;
+	};
+
 	gic: interrupt-controller@10490000 {
 		cpu-offset = <0x8000>;
 	};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 93b70402e943..8bc97c415c9a 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -54,6 +54,20 @@
 		reg = <0x10023CA0 0x20>;
 	};
 
+	l2c: l2-cache-controller@10502000 {
+		compatible = "arm,pl310-cache";
+		reg = <0x10502000 0x1000>;
+		cache-unified;
+		cache-level = <2>;
+		arm,tag-latency = <2 2 1>;
+		arm,data-latency = <3 2 1>;
+		arm,double-linefill = <1>;
+		arm,double-linefill-incr = <0>;
+		arm,double-linefill-wrap = <1>;
+		arm,prefetch-drop = <1>;
+		arm,prefetch-offset = <7>;
+	};
+
 	clock: clock-controller@10030000 {
 		compatible = "samsung,exynos4412-clock";
 		reg = <0x10030000 0x20000>;
-- 
1.9.2


WARNING: multiple messages have this Message-ID (diff)
From: m.szyprowski@samsung.com (Marek Szyprowski)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 8/8] ARM: dts: exynos4: Add nodes for L2 cache controller
Date: Tue, 23 Dec 2014 11:48:36 +0100	[thread overview]
Message-ID: <1419331716-8972-9-git-send-email-m.szyprowski@samsung.com> (raw)
In-Reply-To: <1419331716-8972-1-git-send-email-m.szyprowski@samsung.com>

From: Tomasz Figa <t.figa@samsung.com>

This patch adds device tree nodes for L2 cache controller present on
Exynos4 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/boot/dts/exynos4210.dtsi |  9 +++++++++
 arch/arm/boot/dts/exynos4x12.dtsi | 14 ++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index bcc9e63c8070..8e45ea44317e 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -81,6 +81,15 @@
 		reg = <0x10023CA0 0x20>;
 	};
 
+	l2c: l2-cache-controller at 10502000 {
+		compatible = "arm,pl310-cache";
+		reg = <0x10502000 0x1000>;
+		cache-unified;
+		cache-level = <2>;
+		arm,tag-latency = <2 2 1>;
+		arm,data-latency = <2 2 1>;
+	};
+
 	gic: interrupt-controller at 10490000 {
 		cpu-offset = <0x8000>;
 	};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 93b70402e943..8bc97c415c9a 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -54,6 +54,20 @@
 		reg = <0x10023CA0 0x20>;
 	};
 
+	l2c: l2-cache-controller at 10502000 {
+		compatible = "arm,pl310-cache";
+		reg = <0x10502000 0x1000>;
+		cache-unified;
+		cache-level = <2>;
+		arm,tag-latency = <2 2 1>;
+		arm,data-latency = <3 2 1>;
+		arm,double-linefill = <1>;
+		arm,double-linefill-incr = <0>;
+		arm,double-linefill-wrap = <1>;
+		arm,prefetch-drop = <1>;
+		arm,prefetch-offset = <7>;
+	};
+
 	clock: clock-controller at 10030000 {
 		compatible = "samsung,exynos4412-clock";
 		reg = <0x10030000 0x20000>;
-- 
1.9.2

  parent reply	other threads:[~2014-12-23 10:49 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-23 10:48 [PATCH v10 0/8] Enable L2 cache support on Exynos4210/4x12 SoCs Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 1/8] ARM: OMAP2+: use common l2cache initialization code Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 2/8] ARM: l2c: Refactor the driver to use commit-like interface Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 17:06   ` Tony Lindgren
2014-12-23 17:06     ` Tony Lindgren
2014-12-23 17:13     ` Nishanth Menon
2014-12-23 17:13       ` Nishanth Menon
2014-12-23 17:13       ` Nishanth Menon
2014-12-28 11:34       ` Tomasz Figa
2014-12-28 11:34         ` Tomasz Figa
2014-12-29 14:29         ` Nishanth Menon
2014-12-29 14:29           ` Nishanth Menon
2014-12-29 14:29           ` Nishanth Menon
2014-12-29 18:23   ` Nishanth Menon
2014-12-29 18:23     ` Nishanth Menon
2014-12-29 18:23     ` Nishanth Menon
2014-12-30  9:05     ` Tomasz Figa
2014-12-30  9:05       ` Tomasz Figa
2014-12-30  9:05       ` Tomasz Figa
2014-12-30 14:51       ` Nishanth Menon
2014-12-30 14:51         ` Nishanth Menon
2014-12-30 14:51         ` Nishanth Menon
2015-01-02  9:13         ` Tomasz Figa
2015-01-02  9:13           ` Tomasz Figa
2015-01-02  9:13           ` Tomasz Figa
2015-01-02  9:28           ` Tomasz Figa
2015-01-02  9:28             ` Tomasz Figa
2015-01-02  9:28             ` Tomasz Figa
2015-01-02 15:36             ` Nishanth Menon
2015-01-02 15:36               ` Nishanth Menon
2015-01-02 15:36               ` Nishanth Menon
2015-01-02 15:38           ` Nishanth Menon
2015-01-02 15:38             ` Nishanth Menon
2015-01-02 15:38             ` Nishanth Menon
2015-01-02  8:55     ` Tomasz Figa
2015-01-02  8:55       ` Tomasz Figa
2015-01-02 17:57       ` Nishanth Menon
2015-01-02 17:57         ` Nishanth Menon
2015-01-02 17:57         ` Nishanth Menon
2014-12-23 10:48 ` [PATCH v10 3/8] ARM: l2c: Add interface to ask hypervisor to configure L2C Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 4/8] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 5/8] ARM: l2c: Add support for overriding prefetch settings Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 6/8] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 7/8] ARM: EXYNOS: Add support for non-secure L2X0 resume Marek Szyprowski
2014-12-23 10:48   ` Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski [this message]
2014-12-23 10:48   ` [PATCH v10 8/8] ARM: dts: exynos4: Add nodes for L2 cache controller Marek Szyprowski

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