* [PATCH] nand: add Types of controllers from ECC point of view
@ 2014-12-27 10:46 Oleksij Rempel
2014-12-30 18:53 ` Boris Brezillon
0 siblings, 1 reply; 2+ messages in thread
From: Oleksij Rempel @ 2014-12-27 10:46 UTC (permalink / raw)
To: boris.brezillon, linux-mtd; +Cc: Oleksij Rempel
it is mostly copy&paste of Boris Brezillons answer on linux-mtd list.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
---
doc/nand.xml | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/doc/nand.xml b/doc/nand.xml
index 281e0e0..197241c 100644
--- a/doc/nand.xml
+++ b/doc/nand.xml
@@ -113,6 +113,21 @@ protection or connected to VCC to enable writes unconditionally. As NAND flash u
a command driven programming and erasing, an accidental write or erase is not
likely to happen. The Ready / Busy output is not necessary for operation,
but it can be tied to a GPIO or an interrupt line. </p>
+
+<h3>Types of controllers from ECC point of view</h3>
+<p>1) Wiser controllers are generating 0xff ECC bytes for a data chunk
+(chunk == ECC step size) filled with 0xff. With BCH algorithms this is
+easily done by XORing the ECC bytes with the appropriate pattern (see
+soft BCH implementation)</p>
+<p>2) Some controller just verify if the data chunk + ECC bytes are all
+0xff before passing it to the ECC engine. If they are filled with 0xff
+the ECC correction is bypassed.</p>
+<p>This method has one drawback: it does not properly handle bitflips
+occurring in erased pages (if one bitflip occurs the NAND controller
+consider the chunk as not empty, and pass it to the BCH engine).</p>
+<p>3) The controller does not handle erased pages at all, and in this case
+you'll have to manually test it (see is_buf_blank in drivers/mtd/nand/pxa3xx_nand.c) when you
+encounter an ECC error.</p>
</div>
<hr size="2" />
--
1.9.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] nand: add Types of controllers from ECC point of view
2014-12-27 10:46 [PATCH] nand: add Types of controllers from ECC point of view Oleksij Rempel
@ 2014-12-30 18:53 ` Boris Brezillon
0 siblings, 0 replies; 2+ messages in thread
From: Boris Brezillon @ 2014-12-30 18:53 UTC (permalink / raw)
To: Oleksij Rempel; +Cc: linux-mtd
Hi Oleksij,
On Sat, 27 Dec 2014 11:46:35 +0100
Oleksij Rempel <linux@rempel-privat.de> wrote:
> it is mostly copy&paste of Boris Brezillons answer on linux-mtd list.
Please describe what your patch does, not where it comes from.
If I wanted I'd ask you to add my SoB...
>
> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
> ---
> doc/nand.xml | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/doc/nand.xml b/doc/nand.xml
> index 281e0e0..197241c 100644
> --- a/doc/nand.xml
> +++ b/doc/nand.xml
> @@ -113,6 +113,21 @@ protection or connected to VCC to enable writes unconditionally. As NAND flash u
> a command driven programming and erasing, an accidental write or erase is not
> likely to happen. The Ready / Busy output is not necessary for operation,
> but it can be tied to a GPIO or an interrupt line. </p>
> +
> +<h3>Types of controllers from ECC point of view</h3>
This paragraph has nothing to do with NAND Filesystems and thus should
be placed in its own section.
Moreover, I'm not sure the title is clear enough. How about
<h2>ECC controllers</h3>
<!--description of what ECC controllers are-->
<!--other stuff related to ECC-->
<h3>BCH Algorithm</h3>
<!--description of BCH algorithm -->
<h4>ECC bytes for empty pages (filled with 0xff)</h4>
<!-- put some context here -->
<!-- then the description below (not sure you should directly reuse
my words though) -->
> +<p>1) Wiser controllers are generating 0xff ECC bytes for a data chunk
> +(chunk == ECC step size) filled with 0xff. With BCH algorithms this is
> +easily done by XORing the ECC bytes with the appropriate pattern (see
> +soft BCH implementation)</p>
> +<p>2) Some controller just verify if the data chunk + ECC bytes are all
> +0xff before passing it to the ECC engine. If they are filled with 0xff
> +the ECC correction is bypassed.</p>
> +<p>This method has one drawback: it does not properly handle bitflips
> +occurring in erased pages (if one bitflip occurs the NAND controller
> +consider the chunk as not empty, and pass it to the BCH engine).</p>
> +<p>3) The controller does not handle erased pages at all, and in this case
> +you'll have to manually test it (see is_buf_blank in drivers/mtd/nand/pxa3xx_nand.c) when you
> +encounter an ECC error.</p>
Please use:
<ol>
<li>Wiser controllers are generating 0xff ECC bytes for a data
chunk...</li>
<li>...</li>
</ol>
Regards,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2014-12-30 18:54 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-12-27 10:46 [PATCH] nand: add Types of controllers from ECC point of view Oleksij Rempel
2014-12-30 18:53 ` Boris Brezillon
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.