From: Jisheng Zhang <jszhang@marvell.com>
To: <sebastian.hesselbarth@gmail.com>, <mturquette@linaro.org>,
<sboyd@codeaurora.org>, <alexandre.belloni@free-electrons.com>,
<antoine.tenart@free-electrons.com>, <robh+dt@kernel.org>,
<pawel.moll@arm.com>, <mark.rutland@arm.com>,
<ijc+devicetree@hellion.org.uk>, <galak@codeaurora.org>,
<linux@arm.linux.org.uk>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <stable@vger.kernel.org>,
Jisheng Zhang <jszhang@marvell.com>
Subject: [PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
Date: Wed, 31 Dec 2014 16:57:50 +0800 [thread overview]
Message-ID: <1420016272-6789-2-git-send-email-jszhang@marvell.com> (raw)
In-Reply-To: <1420016272-6789-1-git-send-email-jszhang@marvell.com>
On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work Without this patch due to the "core" clk is gated.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable@vger.kernel.org # 3.16+
---
arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c9..903f3bb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
compatible = "mrvl,pxav3-mmc";
reg = <0xab1000 0x200>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&chip CLKID_SDIO1XIN>;
+ clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+ clock-names = "io", "core";
status = "disabled";
};
--
2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
To: sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Subject: [PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
Date: Wed, 31 Dec 2014 16:57:50 +0800 [thread overview]
Message-ID: <1420016272-6789-2-git-send-email-jszhang@marvell.com> (raw)
In-Reply-To: <1420016272-6789-1-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work Without this patch due to the "core" clk is gated.
Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 3.16+
---
arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c9..903f3bb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
compatible = "mrvl,pxav3-mmc";
reg = <0xab1000 0x200>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&chip CLKID_SDIO1XIN>;
+ clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+ clock-names = "io", "core";
status = "disabled";
};
--
2.1.4
--
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WARNING: multiple messages have this Message-ID (diff)
From: jszhang@marvell.com (Jisheng Zhang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
Date: Wed, 31 Dec 2014 16:57:50 +0800 [thread overview]
Message-ID: <1420016272-6789-2-git-send-email-jszhang@marvell.com> (raw)
In-Reply-To: <1420016272-6789-1-git-send-email-jszhang@marvell.com>
On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work Without this patch due to the "core" clk is gated.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: stable at vger.kernel.org # 3.16+
---
arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c9..903f3bb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
compatible = "mrvl,pxav3-mmc";
reg = <0xab1000 0x200>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&chip CLKID_SDIO1XIN>;
+ clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+ clock-names = "io", "core";
status = "disabled";
};
--
2.1.4
next prev parent reply other threads:[~2014-12-31 9:03 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-31 8:57 [PATCH 0/3] fix non-working eMMC on Marvell BG2Q DMP board Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang [this message]
2014-12-31 8:57 ` [PATCH 1/3] ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang
2015-01-07 14:22 ` Sebastian Hesselbarth
2015-01-07 14:22 ` Sebastian Hesselbarth
2015-01-07 14:22 ` Sebastian Hesselbarth
2014-12-31 8:57 ` [PATCH 2/3] ARM: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang
2015-01-07 14:22 ` Sebastian Hesselbarth
2015-01-07 14:22 ` Sebastian Hesselbarth
2014-12-31 8:57 ` [PATCH 3/3] clk: berlin: bg2q: remove non-exist "smemc" gate clock Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang
2014-12-31 8:57 ` Jisheng Zhang
2015-01-07 14:11 ` Sebastian Hesselbarth
2015-01-07 14:11 ` Sebastian Hesselbarth
2015-01-07 14:22 ` Jisheng Zhang
2015-01-07 14:22 ` Jisheng Zhang
2015-01-07 14:22 ` Jisheng Zhang
2015-01-07 14:22 ` Jisheng Zhang
2015-01-07 14:30 ` Sebastian Hesselbarth
2015-01-07 14:30 ` Sebastian Hesselbarth
2015-01-07 14:30 ` Sebastian Hesselbarth
2015-01-09 12:13 ` Jisheng Zhang
2015-01-09 12:13 ` Jisheng Zhang
2015-01-09 12:13 ` Jisheng Zhang
2015-01-09 12:13 ` Jisheng Zhang
2015-01-10 13:08 ` Sebastian Hesselbarth
2015-01-10 13:08 ` Sebastian Hesselbarth
2015-01-10 13:08 ` Sebastian Hesselbarth
2015-01-13 0:28 ` Mike Turquette
2015-01-13 0:28 ` Mike Turquette
2015-01-13 0:28 ` Mike Turquette
2015-01-13 12:17 ` Sebastian Hesselbarth
2015-01-13 12:17 ` Sebastian Hesselbarth
2015-01-13 12:17 ` Sebastian Hesselbarth
2015-01-13 19:27 ` Mike Turquette
2015-01-13 19:27 ` Mike Turquette
2015-01-13 19:27 ` Mike Turquette
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