* [PATCH V2 1/9] ARM: sirf: drop MARCO low-level debug port
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-03 1:36 ` [PATCH V2 2/9] ARM: dts: drop MARCO platform DT stuff Barry Song
` (8 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Barry Song <Baohua.Song@csr.com>
MARCO will not be supported any more. it has been replaced by CSR
atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
arch/arm/Kconfig.debug | 9 +--------
arch/arm/include/debug/sirf.S | 2 --
arch/arm/mach-prima2/lluart.c | 2 --
3 files changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5ddd490..e0a3cc9 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -920,13 +920,6 @@ choice
Say Y here if you want the debug print routines to direct
their output to the uart1 port on SiRFprimaII devices.
- config DEBUG_SIRFMARCO_UART1
- bool "Kernel low-level debugging messages via SiRFmarco UART1"
- depends on ARCH_MARCO
- help
- Say Y here if you want the debug print routines to direct
- their output to the uart1 port on SiRFmarco devices.
-
config STIH41X_DEBUG_ASC2
bool "Use StiH415/416 ASC2 UART for low-level debug"
depends on ARCH_STI
@@ -1195,7 +1188,7 @@ config DEBUG_LL_INCLUDE
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
- default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
+ default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1
default "debug/sti.S" if DEBUG_STI_UART
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/ux500.S" if DEBUG_UX500_UART
diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S
index dbf250c..006ec9f 100644
--- a/arch/arm/include/debug/sirf.S
+++ b/arch/arm/include/debug/sirf.S
@@ -8,8 +8,6 @@
#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
#define SIRFSOC_UART1_PA_BASE 0xb0060000
-#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
-#define SIRFSOC_UART1_PA_BASE 0xcc060000
#else
#define SIRFSOC_UART1_PA_BASE 0
#endif
diff --git a/arch/arm/mach-prima2/lluart.c b/arch/arm/mach-prima2/lluart.c
index 99c0c92..20453c1 100644
--- a/arch/arm/mach-prima2/lluart.c
+++ b/arch/arm/mach-prima2/lluart.c
@@ -13,8 +13,6 @@
#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
#define SIRFSOC_UART1_PA_BASE 0xb0060000
-#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
-#define SIRFSOC_UART1_PA_BASE 0xcc060000
#else
#define SIRFSOC_UART1_PA_BASE 0
#endif
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 2/9] ARM: dts: drop MARCO platform DT stuff
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
2015-01-03 1:36 ` [PATCH V2 1/9] ARM: sirf: drop MARCO low-level debug port Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-03 1:36 ` [PATCH V2 3/9] ARM: sirf: drop MARCO support in reset controller module Barry Song
` (7 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Barry Song <Baohua.Song@csr.com>
MARCO will not be supported any more. it has been replaced by CSR
atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
Documentation/devicetree/bindings/arm/sirf.txt | 2 -
arch/arm/boot/dts/Makefile | 1 -
arch/arm/boot/dts/marco-evb.dts | 54 --
arch/arm/boot/dts/marco.dtsi | 757 -------------------------
4 files changed, 814 deletions(-)
delete mode 100644 arch/arm/boot/dts/marco-evb.dts
delete mode 100644 arch/arm/boot/dts/marco.dtsi
diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt
index c6ba6d3..9daa1c1 100644
--- a/Documentation/devicetree/bindings/arm/sirf.txt
+++ b/Documentation/devicetree/bindings/arm/sirf.txt
@@ -4,6 +4,4 @@ CSR SiRFprimaII and SiRFmarco device tree bindings.
Required root node properties:
- compatible:
- "sirf,prima2-cb" : prima2 "cb" evaluation board
- - "sirf,marco-cb" : marco "cb" evaluation board
- "sirf,prima2" : prima2 device based board
- - "sirf,marco" : marco device based board
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd..68feb8f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -175,7 +175,6 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
kirkwood-ts419-6281.dtb \
kirkwood-ts419-6282.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
-dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb
dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \
pxa910-dkb.dtb \
diff --git a/arch/arm/boot/dts/marco-evb.dts b/arch/arm/boot/dts/marco-evb.dts
deleted file mode 100644
index 5130aea..0000000
--- a/arch/arm/boot/dts/marco-evb.dts
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * DTS file for CSR SiRFmarco Evaluation Board
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-/dts-v1/;
-
-/include/ "marco.dtsi"
-
-/ {
- model = "CSR SiRFmarco Evaluation Board";
- compatible = "sirf,marco-cb", "sirf,marco";
-
- memory {
- reg = <0x40000000 0x60000000>;
- };
-
- axi {
- peri-iobg {
- uart1: uart at cc060000 {
- status = "okay";
- };
- uart2: uart at cc070000 {
- status = "okay";
- };
- i2c0: i2c at cc0e0000 {
- status = "okay";
- fpga-cpld at 4d {
- compatible = "sirf,fpga-cpld";
- reg = <0x4d>;
- };
- };
- spi1: spi at cc170000 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins_a>;
- spi at 0 {
- compatible = "spidev";
- reg = <0>;
- spi-max-frequency = <1000000>;
- };
- };
- pci-iobg {
- sd0: sdhci at cd000000 {
- bus-width = <8>;
- status = "okay";
- };
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/marco.dtsi b/arch/arm/boot/dts/marco.dtsi
deleted file mode 100644
index fb35422..0000000
--- a/arch/arm/boot/dts/marco.dtsi
+++ /dev/null
@@ -1,757 +0,0 @@
-/*
- * DTS file for CSR SiRFmarco SoC
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-/include/ "skeleton.dtsi"
-/ {
- compatible = "sirf,marco";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu at 0 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- reg = <0>;
- };
- cpu at 1 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- reg = <1>;
- };
- };
-
- axi {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x40000000 0x40000000 0xa0000000>;
-
- l2-cache-controller at c0030000 {
- compatible = "arm,pl310-cache";
- reg = <0xc0030000 0x1000>;
- interrupts = <0 59 0>;
- arm,tag-latency = <1 1 1>;
- arm,data-latency = <1 1 1>;
- arm,filter-ranges = <0x40000000 0x80000000>;
- };
-
- gic: interrupt-controller at c0011000 {
- compatible = "arm,cortex-a9-gic";
- interrupt-controller;
- #interrupt-cells = <3>;
- reg = <0xc0011000 0x1000>,
- <0xc0010100 0x0100>;
- };
-
- rstc-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xc2000000 0xc2000000 0x1000000>;
-
- rstc: reset-controller at c2000000 {
- compatible = "sirf,marco-rstc";
- reg = <0xc2000000 0x10000>;
- #reset-cells = <1>;
- };
- };
-
- sys-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xc3000000 0xc3000000 0x1000000>;
-
- clock-controller at c3000000 {
- compatible = "sirf,marco-clkc";
- reg = <0xc3000000 0x1000>;
- interrupts = <0 3 0>;
- };
-
- rsc-controller at c3010000 {
- compatible = "sirf,marco-rsc";
- reg = <0xc3010000 0x1000>;
- };
- };
-
- mem-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xc4000000 0xc4000000 0x1000000>;
-
- memory-controller at c4000000 {
- compatible = "sirf,marco-memc";
- reg = <0xc4000000 0x10000>;
- interrupts = <0 27 0>;
- };
- };
-
- disp-iobg0 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xc5000000 0xc5000000 0x1000000>;
-
- display0 at c5000000 {
- compatible = "sirf,marco-lcd";
- reg = <0xc5000000 0x10000>;
- interrupts = <0 30 0>;
- };
-
- vpp0 at c5010000 {
- compatible = "sirf,marco-vpp";
- reg = <0xc5010000 0x10000>;
- interrupts = <0 31 0>;
- };
- };
-
- disp-iobg1 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xc6000000 0xc6000000 0x1000000>;
-
- display1 at c6000000 {
- compatible = "sirf,marco-lcd";
- reg = <0xc6000000 0x10000>;
- interrupts = <0 62 0>;
- };
-
- vpp1 at c6010000 {
- compatible = "sirf,marco-vpp";
- reg = <0xc6010000 0x10000>;
- interrupts = <0 63 0>;
- };
- };
-
- graphics-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xc8000000 0xc8000000 0x1000000>;
-
- graphics at c8000000 {
- compatible = "powervr,sgx540";
- reg = <0xc8000000 0x1000000>;
- interrupts = <0 6 0>;
- };
- };
-
- multimedia-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xc9000000 0xc9000000 0x1000000>;
-
- multimedia at a0000000 {
- compatible = "sirf,marco-video-codec";
- reg = <0xc9000000 0x1000000>;
- interrupts = <0 5 0>;
- };
- };
-
- dsp-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xca000000 0xca000000 0x2000000>;
-
- dspif at ca000000 {
- compatible = "sirf,marco-dspif";
- reg = <0xca000000 0x10000>;
- interrupts = <0 9 0>;
- };
-
- gps at ca010000 {
- compatible = "sirf,marco-gps";
- reg = <0xca010000 0x10000>;
- interrupts = <0 7 0>;
- };
-
- dsp at cb000000 {
- compatible = "sirf,marco-dsp";
- reg = <0xcb000000 0x1000000>;
- interrupts = <0 8 0>;
- };
- };
-
- peri-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xcc000000 0xcc000000 0x2000000>;
-
- timer at cc020000 {
- compatible = "sirf,marco-tick";
- reg = <0xcc020000 0x1000>;
- interrupts = <0 0 0>,
- <0 1 0>,
- <0 2 0>,
- <0 49 0>,
- <0 50 0>,
- <0 51 0>;
- };
-
- nand at cc030000 {
- compatible = "sirf,marco-nand";
- reg = <0xcc030000 0x10000>;
- interrupts = <0 41 0>;
- };
-
- audio at cc040000 {
- compatible = "sirf,marco-audio";
- reg = <0xcc040000 0x10000>;
- interrupts = <0 35 0>;
- };
-
- uart0: uart at cc050000 {
- cell-index = <0>;
- compatible = "sirf,marco-uart";
- reg = <0xcc050000 0x1000>;
- interrupts = <0 17 0>;
- fifosize = <128>;
- status = "disabled";
- };
-
- uart1: uart at cc060000 {
- cell-index = <1>;
- compatible = "sirf,marco-uart";
- reg = <0xcc060000 0x1000>;
- interrupts = <0 18 0>;
- fifosize = <32>;
- status = "disabled";
- };
-
- uart2: uart at cc070000 {
- cell-index = <2>;
- compatible = "sirf,marco-uart";
- reg = <0xcc070000 0x1000>;
- interrupts = <0 19 0>;
- fifosize = <128>;
- status = "disabled";
- };
-
- uart3: uart at cc190000 {
- cell-index = <3>;
- compatible = "sirf,marco-uart";
- reg = <0xcc190000 0x1000>;
- interrupts = <0 66 0>;
- fifosize = <128>;
- status = "disabled";
- };
-
- uart4: uart at cc1a0000 {
- cell-index = <4>;
- compatible = "sirf,marco-uart";
- reg = <0xcc1a0000 0x1000>;
- interrupts = <0 69 0>;
- fifosize = <128>;
- status = "disabled";
- };
-
- usp0: usp at cc080000 {
- cell-index = <0>;
- compatible = "sirf,marco-usp";
- reg = <0xcc080000 0x10000>;
- interrupts = <0 20 0>;
- status = "disabled";
- };
-
- usp1: usp at cc090000 {
- cell-index = <1>;
- compatible = "sirf,marco-usp";
- reg = <0xcc090000 0x10000>;
- interrupts = <0 21 0>;
- status = "disabled";
- };
-
- usp2: usp at cc0a0000 {
- cell-index = <2>;
- compatible = "sirf,marco-usp";
- reg = <0xcc0a0000 0x10000>;
- interrupts = <0 22 0>;
- status = "disabled";
- };
-
- dmac0: dma-controller at cc0b0000 {
- cell-index = <0>;
- compatible = "sirf,marco-dmac";
- reg = <0xcc0b0000 0x10000>;
- interrupts = <0 12 0>;
- };
-
- dmac1: dma-controller at cc160000 {
- cell-index = <1>;
- compatible = "sirf,marco-dmac";
- reg = <0xcc160000 0x10000>;
- interrupts = <0 13 0>;
- };
-
- vip at cc0c0000 {
- compatible = "sirf,marco-vip";
- reg = <0xcc0c0000 0x10000>;
- };
-
- spi0: spi at cc0d0000 {
- cell-index = <0>;
- compatible = "sirf,marco-spi";
- reg = <0xcc0d0000 0x10000>;
- interrupts = <0 15 0>;
- sirf,spi-num-chipselects = <1>;
- cs-gpios = <&gpio 0 0>;
- sirf,spi-dma-rx-channel = <25>;
- sirf,spi-dma-tx-channel = <20>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi1: spi at cc170000 {
- cell-index = <1>;
- compatible = "sirf,marco-spi";
- reg = <0xcc170000 0x10000>;
- interrupts = <0 16 0>;
- sirf,spi-num-chipselects = <1>;
- cs-gpios = <&gpio 0 0>;
- sirf,spi-dma-rx-channel = <12>;
- sirf,spi-dma-tx-channel = <13>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c0: i2c at cc0e0000 {
- cell-index = <0>;
- compatible = "sirf,marco-i2c";
- reg = <0xcc0e0000 0x10000>;
- interrupts = <0 24 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c at cc0f0000 {
- cell-index = <1>;
- compatible = "sirf,marco-i2c";
- reg = <0xcc0f0000 0x10000>;
- interrupts = <0 25 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- tsc at cc110000 {
- compatible = "sirf,marco-tsc";
- reg = <0xcc110000 0x10000>;
- interrupts = <0 33 0>;
- };
-
- gpio: pinctrl at cc120000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sirf,marco-pinctrl";
- reg = <0xcc120000 0x10000>;
- interrupts = <0 43 0>,
- <0 44 0>,
- <0 45 0>,
- <0 46 0>,
- <0 47 0>;
- gpio-controller;
- interrupt-controller;
-
- lcd_16pins_a: lcd0_0 {
- lcd {
- sirf,pins = "lcd_16bitsgrp";
- sirf,function = "lcd_16bits";
- };
- };
- lcd_18pins_a: lcd0_1 {
- lcd {
- sirf,pins = "lcd_18bitsgrp";
- sirf,function = "lcd_18bits";
- };
- };
- lcd_24pins_a: lcd0_2 {
- lcd {
- sirf,pins = "lcd_24bitsgrp";
- sirf,function = "lcd_24bits";
- };
- };
- lcdrom_pins_a: lcdrom0_0 {
- lcd {
- sirf,pins = "lcdromgrp";
- sirf,function = "lcdrom";
- };
- };
- uart0_pins_a: uart0_0 {
- uart {
- sirf,pins = "uart0grp";
- sirf,function = "uart0";
- };
- };
- uart1_pins_a: uart1_0 {
- uart {
- sirf,pins = "uart1grp";
- sirf,function = "uart1";
- };
- };
- uart2_pins_a: uart2_0 {
- uart {
- sirf,pins = "uart2grp";
- sirf,function = "uart2";
- };
- };
- uart2_noflow_pins_a: uart2_1 {
- uart {
- sirf,pins = "uart2_nostreamctrlgrp";
- sirf,function = "uart2_nostreamctrl";
- };
- };
- spi0_pins_a: spi0_0 {
- spi {
- sirf,pins = "spi0grp";
- sirf,function = "spi0";
- };
- };
- spi1_pins_a: spi1_0 {
- spi {
- sirf,pins = "spi1grp";
- sirf,function = "spi1";
- };
- };
- i2c0_pins_a: i2c0_0 {
- i2c {
- sirf,pins = "i2c0grp";
- sirf,function = "i2c0";
- };
- };
- i2c1_pins_a: i2c1_0 {
- i2c {
- sirf,pins = "i2c1grp";
- sirf,function = "i2c1";
- };
- };
- pwm0_pins_a: pwm0_0 {
- pwm {
- sirf,pins = "pwm0grp";
- sirf,function = "pwm0";
- };
- };
- pwm1_pins_a: pwm1_0 {
- pwm {
- sirf,pins = "pwm1grp";
- sirf,function = "pwm1";
- };
- };
- pwm2_pins_a: pwm2_0 {
- pwm {
- sirf,pins = "pwm2grp";
- sirf,function = "pwm2";
- };
- };
- pwm3_pins_a: pwm3_0 {
- pwm {
- sirf,pins = "pwm3grp";
- sirf,function = "pwm3";
- };
- };
- gps_pins_a: gps_0 {
- gps {
- sirf,pins = "gpsgrp";
- sirf,function = "gps";
- };
- };
- vip_pins_a: vip_0 {
- vip {
- sirf,pins = "vipgrp";
- sirf,function = "vip";
- };
- };
- sdmmc0_pins_a: sdmmc0_0 {
- sdmmc0 {
- sirf,pins = "sdmmc0grp";
- sirf,function = "sdmmc0";
- };
- };
- sdmmc1_pins_a: sdmmc1_0 {
- sdmmc1 {
- sirf,pins = "sdmmc1grp";
- sirf,function = "sdmmc1";
- };
- };
- sdmmc2_pins_a: sdmmc2_0 {
- sdmmc2 {
- sirf,pins = "sdmmc2grp";
- sirf,function = "sdmmc2";
- };
- };
- sdmmc3_pins_a: sdmmc3_0 {
- sdmmc3 {
- sirf,pins = "sdmmc3grp";
- sirf,function = "sdmmc3";
- };
- };
- sdmmc4_pins_a: sdmmc4_0 {
- sdmmc4 {
- sirf,pins = "sdmmc4grp";
- sirf,function = "sdmmc4";
- };
- };
- sdmmc5_pins_a: sdmmc5_0 {
- sdmmc5 {
- sirf,pins = "sdmmc5grp";
- sirf,function = "sdmmc5";
- };
- };
- i2s_pins_a: i2s_0 {
- i2s {
- sirf,pins = "i2sgrp";
- sirf,function = "i2s";
- };
- };
- ac97_pins_a: ac97_0 {
- ac97 {
- sirf,pins = "ac97grp";
- sirf,function = "ac97";
- };
- };
- nand_pins_a: nand_0 {
- nand {
- sirf,pins = "nandgrp";
- sirf,function = "nand";
- };
- };
- usp0_pins_a: usp0_0 {
- usp0 {
- sirf,pins = "usp0grp";
- sirf,function = "usp0";
- };
- };
- usp1_pins_a: usp1_0 {
- usp1 {
- sirf,pins = "usp1grp";
- sirf,function = "usp1";
- };
- };
- usp2_pins_a: usp2_0 {
- usp2 {
- sirf,pins = "usp2grp";
- sirf,function = "usp2";
- };
- };
- usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus_0 {
- usb0_utmi_drvbus {
- sirf,pins = "usb0_utmi_drvbusgrp";
- sirf,function = "usb0_utmi_drvbus";
- };
- };
- usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus_0 {
- usb1_utmi_drvbus {
- sirf,pins = "usb1_utmi_drvbusgrp";
- sirf,function = "usb1_utmi_drvbus";
- };
- };
- warm_rst_pins_a: warm_rst_0 {
- warm_rst {
- sirf,pins = "warm_rstgrp";
- sirf,function = "warm_rst";
- };
- };
- pulse_count_pins_a: pulse_count_0 {
- pulse_count {
- sirf,pins = "pulse_countgrp";
- sirf,function = "pulse_count";
- };
- };
- cko0_rst_pins_a: cko0_rst_0 {
- cko0_rst {
- sirf,pins = "cko0_rstgrp";
- sirf,function = "cko0_rst";
- };
- };
- cko1_rst_pins_a: cko1_rst_0 {
- cko1_rst {
- sirf,pins = "cko1_rstgrp";
- sirf,function = "cko1_rst";
- };
- };
- };
-
- pwm at cc130000 {
- compatible = "sirf,marco-pwm";
- reg = <0xcc130000 0x10000>;
- };
-
- efusesys at cc140000 {
- compatible = "sirf,marco-efuse";
- reg = <0xcc140000 0x10000>;
- };
-
- pulsec at cc150000 {
- compatible = "sirf,marco-pulsec";
- reg = <0xcc150000 0x10000>;
- interrupts = <0 48 0>;
- };
-
- pci-iobg {
- compatible = "sirf,marco-pciiobg", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xcd000000 0xcd000000 0x1000000>;
-
- sd0: sdhci at cd000000 {
- cell-index = <0>;
- compatible = "sirf,marco-sdhc";
- reg = <0xcd000000 0x100000>;
- interrupts = <0 38 0>;
- status = "disabled";
- };
-
- sd1: sdhci at cd100000 {
- cell-index = <1>;
- compatible = "sirf,marco-sdhc";
- reg = <0xcd100000 0x100000>;
- interrupts = <0 38 0>;
- status = "disabled";
- };
-
- sd2: sdhci at cd200000 {
- cell-index = <2>;
- compatible = "sirf,marco-sdhc";
- reg = <0xcd200000 0x100000>;
- interrupts = <0 23 0>;
- status = "disabled";
- };
-
- sd3: sdhci at cd300000 {
- cell-index = <3>;
- compatible = "sirf,marco-sdhc";
- reg = <0xcd300000 0x100000>;
- interrupts = <0 23 0>;
- status = "disabled";
- };
-
- sd4: sdhci at cd400000 {
- cell-index = <4>;
- compatible = "sirf,marco-sdhc";
- reg = <0xcd400000 0x100000>;
- interrupts = <0 39 0>;
- status = "disabled";
- };
-
- sd5: sdhci at cd500000 {
- cell-index = <5>;
- compatible = "sirf,marco-sdhc";
- reg = <0xcd500000 0x100000>;
- interrupts = <0 39 0>;
- status = "disabled";
- };
-
- pci-copy at cd900000 {
- compatible = "sirf,marco-pcicp";
- reg = <0xcd900000 0x100000>;
- interrupts = <0 40 0>;
- };
-
- rom-interface at cda00000 {
- compatible = "sirf,marco-romif";
- reg = <0xcda00000 0x100000>;
- };
- };
- };
-
- rtc-iobg {
- compatible = "sirf,marco-rtciobg", "sirf-marco-rtciobg-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0xc1000000 0x10000>;
-
- gpsrtc at 1000 {
- compatible = "sirf,marco-gpsrtc";
- reg = <0x1000 0x1000>;
- interrupts = <0 55 0>,
- <0 56 0>,
- <0 57 0>;
- };
-
- sysrtc at 2000 {
- compatible = "sirf,marco-sysrtc";
- reg = <0x2000 0x1000>;
- interrupts = <0 52 0>,
- <0 53 0>,
- <0 54 0>;
- };
-
- pwrc at 3000 {
- compatible = "sirf,marco-pwrc";
- reg = <0x3000 0x1000>;
- interrupts = <0 32 0>;
- };
- };
-
- uus-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xce000000 0xce000000 0x1000000>;
-
- usb0: usb at ce000000 {
- compatible = "chipidea,ci13611a-marco";
- reg = <0xce000000 0x10000>;
- interrupts = <0 10 0>;
- };
-
- usb1: usb at ce010000 {
- compatible = "chipidea,ci13611a-marco";
- reg = <0xce010000 0x10000>;
- interrupts = <0 11 0>;
- };
-
- security at ce020000 {
- compatible = "sirf,marco-security";
- reg = <0xce020000 0x10000>;
- interrupts = <0 42 0>;
- };
- };
-
- can-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xd0000000 0xd0000000 0x1000000>;
-
- can0: can at d0000000 {
- compatible = "sirf,marco-can";
- reg = <0xd0000000 0x10000>;
- };
-
- can1: can at d0010000 {
- compatible = "sirf,marco-can";
- reg = <0xd0010000 0x10000>;
- };
- };
-
- lvds-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xd1000000 0xd1000000 0x1000000>;
-
- lvds at d1000000 {
- compatible = "sirf,marco-lvds";
- reg = <0xd1000000 0x10000>;
- interrupts = <0 64 0>;
- };
- };
- };
-};
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 3/9] ARM: sirf: drop MARCO support in reset controller module
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
2015-01-03 1:36 ` [PATCH V2 1/9] ARM: sirf: drop MARCO low-level debug port Barry Song
2015-01-03 1:36 ` [PATCH V2 2/9] ARM: dts: drop MARCO platform DT stuff Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-03 1:36 ` [PATCH V2 4/9] ARM: sirf: drop MARCO machine Barry Song
` (6 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Barry Song <Baohua.Song@csr.com>
MARCO will not be supported any more. it has been replaced by CSR
atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
arch/arm/mach-prima2/rstc.c | 41 ++++++++++++-----------------------------
1 file changed, 12 insertions(+), 29 deletions(-)
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index e1f1f86..7c251eb 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -34,36 +34,20 @@ static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
mutex_lock(&rstc_lock);
- if (of_device_is_compatible(rcdev->of_node, "sirf,prima2-rstc")) {
- /*
- * Writing 1 to this bit resets corresponding block.
- * Writing 0 to this bit de-asserts reset signal of the
- * corresponding block. datasheet doesn't require explicit
- * delay between the set and clear of reset bit. it could
- * be shorter if tests pass.
- */
- writel(readl(sirfsoc_rstc_base +
+ /*
+ * Writing 1 to this bit resets corresponding block.
+ * Writing 0 to this bit de-asserts reset signal of the
+ * corresponding block. datasheet doesn't require explicit
+ * delay between the set and clear of reset bit. it could
+ * be shorter if tests pass.
+ */
+ writel(readl(sirfsoc_rstc_base +
(reset_bit / 32) * 4) | (1 << reset_bit),
- sirfsoc_rstc_base + (reset_bit / 32) * 4);
- msleep(20);
- writel(readl(sirfsoc_rstc_base +
+ sirfsoc_rstc_base + (reset_bit / 32) * 4);
+ msleep(20);
+ writel(readl(sirfsoc_rstc_base +
(reset_bit / 32) * 4) & ~(1 << reset_bit),
- sirfsoc_rstc_base + (reset_bit / 32) * 4);
- } else {
- /*
- * For MARCO and POLO
- * Writing 1 to SET register resets corresponding block.
- * Writing 1 to CLEAR register de-asserts reset signal of the
- * corresponding block.
- * datasheet doesn't require explicit delay between the set and
- * clear of reset bit. it could be shorter if tests pass.
- */
- writel(1 << reset_bit,
- sirfsoc_rstc_base + (reset_bit / 32) * 8);
- msleep(20);
- writel(1 << reset_bit,
- sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
- }
+ sirfsoc_rstc_base + (reset_bit / 32) * 4);
mutex_unlock(&rstc_lock);
@@ -106,7 +90,6 @@ static int sirfsoc_rstc_probe(struct platform_device *pdev)
static const struct of_device_id rstc_ids[] = {
{ .compatible = "sirf,prima2-rstc" },
- { .compatible = "sirf,marco-rstc" },
{},
};
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 4/9] ARM: sirf: drop MARCO machine
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
` (2 preceding siblings ...)
2015-01-03 1:36 ` [PATCH V2 3/9] ARM: sirf: drop MARCO support in reset controller module Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-03 1:36 ` [PATCH V2 5/9] ARM: sirf: move platsmp to support atlas7 SoC Barry Song
` (5 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Barry Song <Baohua.Song@csr.com>
MARCO will not be supported any more. it has been replaced by CSR
atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
arch/arm/mach-prima2/Kconfig | 9 ---------
arch/arm/mach-prima2/common.c | 17 -----------------
arch/arm/mach-prima2/rtciobrg.c | 1 -
3 files changed, 27 deletions(-)
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index 042f693..cc1c323 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -28,15 +28,6 @@ config ARCH_PRIMA2
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
-config ARCH_MARCO
- bool "CSR SiRFSoC MARCO ARM Cortex A9 Platform"
- default y
- select ARM_GIC
- select HAVE_ARM_SCU if SMP
- select SMP_ON_UP if SMP
- help
- Support for CSR SiRFSoC ARM Cortex A9 Platform
-
config SIRF_IRQ
bool
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index a860ea2..bc53cc4 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -58,20 +58,3 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
.dt_compat = prima2_dt_match,
MACHINE_END
#endif
-
-#ifdef CONFIG_ARCH_MARCO
-static const char *marco_dt_match[] __initconst = {
- "sirf,marco",
- NULL
-};
-
-DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
- /* Maintainer: Barry Song <baohua.song@csr.com> */
- .l2c_aux_val = 0,
- .l2c_aux_mask = ~0,
- .smp = smp_ops(sirfsoc_smp_ops),
- .map_io = sirfsoc_map_io,
- .init_late = sirfsoc_init_late,
- .dt_compat = marco_dt_match,
-MACHINE_END
-#endif
diff --git a/arch/arm/mach-prima2/rtciobrg.c b/arch/arm/mach-prima2/rtciobrg.c
index 70a0b47..8f66d8f 100644
--- a/arch/arm/mach-prima2/rtciobrg.c
+++ b/arch/arm/mach-prima2/rtciobrg.c
@@ -104,7 +104,6 @@ EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_writel);
static const struct of_device_id rtciobrg_ids[] = {
{ .compatible = "sirf,prima2-rtciobg" },
- { .compatible = "sirf,marco-rtciobg" },
{}
};
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 5/9] ARM: sirf: move platsmp to support atlas7 SoC
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
` (3 preceding siblings ...)
2015-01-03 1:36 ` [PATCH V2 4/9] ARM: sirf: drop MARCO machine Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-03 1:36 ` [PATCH V2 6/9] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song
` (4 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Zhiwu Song <Zhiwu.Song@csr.com>
this patch breaks marco SMP support, but marco project has been dropped.
so its correct cpu1 jump/flag address for atlas7 and remove scu related
logic as scu doesn't expose in cortex-a7.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
arch/arm/mach-prima2/common.c | 1 -
arch/arm/mach-prima2/platsmp.c | 52 +++++++++++-------------------------------
2 files changed, 13 insertions(+), 40 deletions(-)
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index bc53cc4..a20b8d4 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -23,7 +23,6 @@ static void __init sirfsoc_init_late(void)
static __init void sirfsoc_map_io(void)
{
sirfsoc_map_lluart();
- sirfsoc_map_scu();
}
#ifdef CONFIG_ARCH_ATLAS6
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
index 335c12e..fc2b03c 100644
--- a/arch/arm/mach-prima2/platsmp.c
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -20,30 +20,10 @@
#include "common.h"
-static void __iomem *scu_base;
-static void __iomem *rsc_base;
+static void __iomem *clk_base;
static DEFINE_SPINLOCK(boot_lock);
-static struct map_desc scu_io_desc __initdata = {
- .length = SZ_4K,
- .type = MT_DEVICE,
-};
-
-void __init sirfsoc_map_scu(void)
-{
- unsigned long base;
-
- /* Get SCU base */
- asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
-
- scu_io_desc.virtual = SIRFSOC_VA(base);
- scu_io_desc.pfn = __phys_to_pfn(base);
- iotable_init(&scu_io_desc, 1);
-
- scu_base = (void __iomem *)SIRFSOC_VA(base);
-}
-
static void sirfsoc_secondary_init(unsigned int cpu)
{
/*
@@ -60,8 +40,8 @@ static void sirfsoc_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-static struct of_device_id rsc_ids[] = {
- { .compatible = "sirf,marco-rsc" },
+static struct of_device_id clk_ids[] = {
+ { .compatible = "sirf,atlas7-clkc" },
{},
};
@@ -70,27 +50,27 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
unsigned long timeout;
struct device_node *np;
- np = of_find_matching_node(NULL, rsc_ids);
+ np = of_find_matching_node(NULL, clk_ids);
if (!np)
return -ENODEV;
- rsc_base = of_iomap(np, 0);
- if (!rsc_base)
+ clk_base = of_iomap(np, 0);
+ if (!clk_base)
return -ENOMEM;
/*
- * write the address of secondary startup into the sram register
- * at offset 0x2C, then write the magic number 0x3CAF5D62 to the
- * RSC register at offset 0x28, which is what boot rom code is
+ * write the address of secondary startup into the clkc register
+ * at offset 0x2bC, then write the magic number 0x3CAF5D62 to the
+ * clkc register at offset 0x2b8, which is what boot rom code is
* waiting for. This would wake up the secondary core from WFE
*/
-#define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2C
+#define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2bc
__raw_writel(virt_to_phys(sirfsoc_secondary_startup),
- rsc_base + SIRFSOC_CPU1_JUMPADDR_OFFSET);
+ clk_base + SIRFSOC_CPU1_JUMPADDR_OFFSET);
-#define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x28
+#define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x2b8
__raw_writel(0x3CAF5D62,
- rsc_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET);
+ clk_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET);
/* make sure write buffer is drained */
mb();
@@ -132,13 +112,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
return pen_release != -1 ? -ENOSYS : 0;
}
-static void __init sirfsoc_smp_prepare_cpus(unsigned int max_cpus)
-{
- scu_enable(scu_base);
-}
-
struct smp_operations sirfsoc_smp_ops __initdata = {
- .smp_prepare_cpus = sirfsoc_smp_prepare_cpus,
.smp_secondary_init = sirfsoc_secondary_init,
.smp_boot_secondary = sirfsoc_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 6/9] ARM: sirf: add two debug ports for CSRatlas7 SoC
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
` (4 preceding siblings ...)
2015-01-03 1:36 ` [PATCH V2 5/9] ARM: sirf: move platsmp to support atlas7 SoC Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-04 16:55 ` Arnd Bergmann
2015-01-03 1:36 ` [PATCH V2 7/9] ARM: sirf: add atlas7 machine support Barry Song
` (3 subsequent siblings)
9 siblings, 1 reply; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Guo Zeng <Guo.Zeng@csr.com>
this patch adds UART0 and UART1 as LLUART port, as the new atlas7
registers layout are different, it also refines some names of old
hard-coded MARCOs.
this patch also moves to CONFIG_DEBUG_UART_PHYS/DEBUG_UART_VIRT
and debug_ll_io_init().
Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
arch/arm/Kconfig.debug | 36 +++++++++++++++++++++++++++++++++---
arch/arm/include/debug/sirf.S | 28 +++++++++++++---------------
arch/arm/mach-prima2/common.c | 7 -------
arch/arm/mach-prima2/lluart.c | 33 ---------------------------------
4 files changed, 46 insertions(+), 58 deletions(-)
delete mode 100644 arch/arm/mach-prima2/lluart.c
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e0a3cc9..1edfb86 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -916,10 +916,29 @@ choice
config DEBUG_SIRFPRIMA2_UART1
bool "Kernel low-level debugging messages via SiRFprimaII UART1"
depends on ARCH_PRIMA2
+ select DEBUG_SIRFSOC_UART
help
Say Y here if you want the debug print routines to direct
their output to the uart1 port on SiRFprimaII devices.
+ config DEBUG_SIRFATLAS7_UART0
+ bool "Kernel low-level debugging messages via SiRFatlas7 UART0"
+ depends on ARCH_ATLAS7
+ select DEBUG_SIRFSOC_UART
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to the uart0 port on SiRFATLAS7 devices.The uart0
+ is used on SiRFATLAS7 as a extra debug port.sometimes an extra
+ debug port can be very useful.
+
+ config DEBUG_SIRFATLAS7_UART1
+ bool "Kernel low-level debugging messages via SiRFatlas7 UART1"
+ depends on ARCH_ATLAS7
+ select DEBUG_SIRFSOC_UART
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to the uart1 port on SiRFATLAS7 devices.
+
config STIH41X_DEBUG_ASC2
bool "Use StiH415/416 ASC2 UART for low-level debug"
depends on ARCH_STI
@@ -1154,6 +1173,10 @@ config DEBUG_STI_UART
bool
depends on ARCH_STI
+config DEBUG_SIRFSOC_UART
+ bool
+ depends on ARCH_SIRF
+
config DEBUG_LL_INCLUDE
string
default "debug/sa1100.S" if DEBUG_SA1100
@@ -1188,7 +1211,7 @@ config DEBUG_LL_INCLUDE
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
- default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1
+ default "debug/sirf.S" if DEBUG_SIRFSOC_UART
default "debug/sti.S" if DEBUG_STI_UART
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/ux500.S" if DEBUG_UX500_UART
@@ -1305,6 +1328,9 @@ config DEBUG_UART_PHYS
default 0xfff36000 if DEBUG_HIGHBANK_UART
default 0xfffe8600 if DEBUG_UART_BCM63XX
default 0xfffff700 if ARCH_IOP33X
+ default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1
+ default 0x18010000 if DEBUG_SIRFATLAS7_UART0
+ default 0x18020000 if DEBUG_SIRFATLAS7_UART1
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
DEBUG_LL_UART_EFM32 || \
DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
@@ -1313,7 +1339,8 @@ config DEBUG_UART_PHYS
DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
- DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
+ DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || \
+ DEBUG_SIRFSOC_UART
config DEBUG_UART_VIRT
hex "Virtual base address of debug UART"
@@ -1387,11 +1414,14 @@ config DEBUG_UART_VIRT
default 0xfef36000 if DEBUG_HIGHBANK_UART
default 0xfefff700 if ARCH_IOP33X
default 0xff003000 if DEBUG_U300_UART
+ default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1
+ default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
+ default 0xfec20000 if DEBUG_SIRFATLAS7_UART1
default DEBUG_UART_PHYS if !MMU
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
- DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
+ DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || DEBUG_SIRFSOC_UART
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S
index 006ec9f..630f231 100644
--- a/arch/arm/include/debug/sirf.S
+++ b/arch/arm/include/debug/sirf.S
@@ -6,35 +6,33 @@
* Licensed under GPLv2 or later.
*/
-#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
-#define SIRFSOC_UART1_PA_BASE 0xb0060000
-#else
-#define SIRFSOC_UART1_PA_BASE 0
-#endif
+#define SIRF_LLUART_TXFIFO_STATUS 0x0114
+#define SIRF_LLUART_TXFIFO_DATA 0x0118
-#define SIRFSOC_UART1_VA_BASE 0xFEC60000
+#define SIRF_LLUART_TXFIFO_FULL (1 << 5)
-#define SIRFSOC_UART_TXFIFO_STATUS 0x0114
-#define SIRFSOC_UART_TXFIFO_DATA 0x0118
+#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0
+#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8)
+#else
+#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6)
+#endif
-#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5)
-#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6)
.macro addruart, rp, rv, tmp
- ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical
- ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual
+ ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical
+ ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual
.endm
.macro senduart,rd,rx
- str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
+ str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA]
.endm
.macro busyuart,rd,rx
.endm
.macro waituart,rd,rx
-1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
- tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY
+1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
+ tst \rd, #SIRF_LLUART_TXFIFO_EMPTY
beq 1001b
.endm
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index a20b8d4..c62ff68 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -20,11 +20,6 @@ static void __init sirfsoc_init_late(void)
sirfsoc_pm_init();
}
-static __init void sirfsoc_map_io(void)
-{
- sirfsoc_map_lluart();
-}
-
#ifdef CONFIG_ARCH_ATLAS6
static const char *atlas6_dt_match[] __initconst = {
"sirf,atlas6",
@@ -35,7 +30,6 @@ DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.l2c_aux_val = 0,
.l2c_aux_mask = ~0,
- .map_io = sirfsoc_map_io,
.init_late = sirfsoc_init_late,
.dt_compat = atlas6_dt_match,
MACHINE_END
@@ -51,7 +45,6 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.l2c_aux_val = 0,
.l2c_aux_mask = ~0,
- .map_io = sirfsoc_map_io,
.dma_zone_size = SZ_256M,
.init_late = sirfsoc_init_late,
.dt_compat = prima2_dt_match,
diff --git a/arch/arm/mach-prima2/lluart.c b/arch/arm/mach-prima2/lluart.c
deleted file mode 100644
index 20453c1..0000000
--- a/arch/arm/mach-prima2/lluart.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Static memory mapping for DEBUG_LL
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/kernel.h>
-#include <asm/page.h>
-#include <asm/mach/map.h>
-#include "common.h"
-
-#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
-#define SIRFSOC_UART1_PA_BASE 0xb0060000
-#else
-#define SIRFSOC_UART1_PA_BASE 0
-#endif
-
-#define SIRFSOC_UART1_VA_BASE SIRFSOC_VA(0x060000)
-#define SIRFSOC_UART1_SIZE SZ_4K
-
-void __init sirfsoc_map_lluart(void)
-{
- struct map_desc sirfsoc_lluart_map = {
- .virtual = SIRFSOC_UART1_VA_BASE,
- .pfn = __phys_to_pfn(SIRFSOC_UART1_PA_BASE),
- .length = SIRFSOC_UART1_SIZE,
- .type = MT_DEVICE,
- };
-
- iotable_init(&sirfsoc_lluart_map, 1);
-}
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 6/9] ARM: sirf: add two debug ports for CSRatlas7 SoC
2015-01-03 1:36 ` [PATCH V2 6/9] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song
@ 2015-01-04 16:55 ` Arnd Bergmann
0 siblings, 0 replies; 13+ messages in thread
From: Arnd Bergmann @ 2015-01-04 16:55 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 03 January 2015 09:36:44 Barry Song wrote:
> From: Guo Zeng <Guo.Zeng@csr.com>
>
> this patch adds UART0 and UART1 as LLUART port, as the new atlas7
> registers layout are different, it also refines some names of old
> hard-coded MARCOs.
>
> this patch also moves to CONFIG_DEBUG_UART_PHYS/DEBUG_UART_VIRT
> and debug_ll_io_init().
>
> Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>
>
The patch looks ok, but if you have the chance, better split it into
two separate patches to do the two things you describe above.
Arnd
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH V2 7/9] ARM: sirf: add atlas7 machine support
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
` (5 preceding siblings ...)
2015-01-03 1:36 ` [PATCH V2 6/9] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-03 1:36 ` [PATCH V2 8/9] ARM: dts: add init dts file for CSR atlas7 SoC Barry Song
` (2 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Zhiwu Song <Zhiwu.Song@csr.com>
atlas7 is next-gen auto soc from CSR.
It could bring to customers most integrated SoC solution:
- World leading Bluetooth 4.0 and GNSS baseband
- Audio processing, analog CODEC and ADC by DSP
- Analog video input
- SDR accelerators
- CAN bus support by Cortex-M3
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
Documentation/devicetree/bindings/arm/sirf.txt | 4 ++++
arch/arm/mach-prima2/Kconfig | 13 ++++++++++++-
arch/arm/mach-prima2/common.c | 13 +++++++++++++
3 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt
index 9daa1c1..7b28ee6 100644
--- a/Documentation/devicetree/bindings/arm/sirf.txt
+++ b/Documentation/devicetree/bindings/arm/sirf.txt
@@ -3,5 +3,9 @@ CSR SiRFprimaII and SiRFmarco device tree bindings.
Required root node properties:
- compatible:
+ - "sirf,atlas6-cb" : atlas6 "cb" evaluation board
+ - "sirf,atlas6" : atlas6 device based board
+ - "sirf,atlas7-cb" : atlas7 "cb" evaluation board
+ - "sirf,atlas7" : atlas7 device based board
- "sirf,prima2-cb" : prima2 "cb" evaluation board
- "sirf,prima2" : prima2 device based board
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index cc1c323..a219dc3 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -11,7 +11,7 @@ menuconfig ARCH_SIRF
if ARCH_SIRF
-comment "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
+comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features"
config ARCH_ATLAS6
bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
@@ -20,6 +20,17 @@ config ARCH_ATLAS6
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
+config ARCH_ATLAS7
+ bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform"
+ default y
+ select ARM_GIC
+ select CPU_V7
+ select HAVE_ARM_SCU if SMP
+ select HAVE_SMP
+ select SMP_ON_UP if SMP
+ help
+ Support for CSR SiRFSoC ARM Cortex A7 Platform
+
config ARCH_PRIMA2
bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
default y
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index c62ff68..0c819bb 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -50,3 +50,16 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
.dt_compat = prima2_dt_match,
MACHINE_END
#endif
+
+#ifdef CONFIG_ARCH_ATLAS7
+static const char *atlas7_dt_match[] __initdata = {
+ "sirf,atlas7",
+ NULL
+};
+
+DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)")
+ /* Maintainer: Barry Song <baohua.song@csr.com> */
+ .smp = smp_ops(sirfsoc_smp_ops),
+ .dt_compat = atlas7_dt_match,
+MACHINE_END
+#endif
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 8/9] ARM: dts: add init dts file for CSR atlas7 SoC
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
` (6 preceding siblings ...)
2015-01-03 1:36 ` [PATCH V2 7/9] ARM: sirf: add atlas7 machine support Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-03 1:36 ` [PATCH V2 9/9] clocksource: marco: rename marco to atlas7 Barry Song
2015-01-04 16:56 ` [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Arnd Bergmann
9 siblings, 0 replies; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Zhiwu Song <Zhiwu.Song@csr.com>
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens
of MARCOs, in each MARCO, there are dozens of hardware modules.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Hao Liu <Hao.Liu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/atlas7-evb.dts | 110 ++++++
arch/arm/boot/dts/atlas7.dtsi | 813 +++++++++++++++++++++++++++++++++++++++
3 files changed, 924 insertions(+)
create mode 100644 arch/arm/boot/dts/atlas7-evb.dts
create mode 100644 arch/arm/boot/dts/atlas7.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 68feb8f..0048cb1 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -52,6 +52,7 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
+dtb-$(CONFIG_ARCH_ATLAS7) += atlas7-evb.dtb
dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb
diff --git a/arch/arm/boot/dts/atlas7-evb.dts b/arch/arm/boot/dts/atlas7-evb.dts
new file mode 100644
index 0000000..49cf59a
--- /dev/null
+++ b/arch/arm/boot/dts/atlas7-evb.dts
@@ -0,0 +1,110 @@
+/*
+ * DTS file for CSR SiRFatlas7 Evaluation Board
+ *
+ * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/dts-v1/;
+
+/include/ "atlas7.dtsi"
+
+/ {
+ model = "CSR SiRFatlas7 Evaluation Board";
+ compatible = "sirf,atlas7-cb", "sirf,atlas7";
+
+ chosen {
+ bootargs = "console=ttySiRF1,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x40000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ vpp_reserved: vpp_mem at 5e800000 {
+ compatible = "sirf,reserved-memory";
+ reg = <0x5e800000 0x800000>;
+ };
+
+ nanddisk_reserved: nanddisk at 46000000 {
+ reg = <0x46000000 0x200000>;
+ no-map;
+ };
+ };
+
+
+ noc {
+ mediam {
+ nand at 17050000 {
+ memory-region = <&nanddisk_reserved>;
+ };
+ };
+
+ gnssm {
+ spi1: spi at 18200000 {
+ status = "okay";
+ spiflash: macronix at 0{
+ status = "okay";
+ compatible = "macronix,mx25l6405d";
+ reg = <0>;
+ spi-max-frequency = <37500000>;
+ spi-cpha;
+ spi-cpol;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partitions at 0 {
+ label = "myspiboot";
+ reg = <0x0 0x800000>;
+ };
+ };
+ };
+ };
+
+ btm {
+ uart6: uart at 11000000 {
+ status = "okay";
+ sirf,uart-has-rtscts;
+ };
+ };
+
+ disp-iobg {
+ vpp at 13110000 {
+ memory-region = <&vpp_reserved>;
+ };
+ };
+
+ display0: display at 0 {
+ compatible = "lvds-panel";
+ source = "lvds.0";
+
+ bl-gpios = <&gpio_1 63 0>;
+ data-lines = <24>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <60000000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hfront-porch = <220>;
+ hback-porch = <100>;
+ hsync-len = <1>;
+ vback-porch = <10>;
+ vfront-porch = <25>;
+ vsync-len = <1>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <1>;
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/atlas7.dtsi b/arch/arm/boot/dts/atlas7.dtsi
new file mode 100644
index 0000000..a753178
--- /dev/null
+++ b/arch/arm/boot/dts/atlas7.dtsi
@@ -0,0 +1,813 @@
+/*
+ * DTS file for CSR SiRFatlas7 SoC
+ *
+ * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/include/ "skeleton.dtsi"
+/ {
+ compatible = "sirf,atlas7";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ serial6 = &uart6;
+ serial9 = &usp2;
+ };
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0>;
+ };
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <1>;
+ };
+ };
+
+ noc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x10000000 0x10000000 0xc0000000>;
+
+ gic: interrupt-controller at 10301000 {
+ compatible = "arm,cortex-a9-gic";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x10301000 0x1000>,
+ <0x10302000 0x0100>;
+ };
+
+ pmu_regulator: pmu_regulator at 10E30020 {
+ compatible = "sirf,atlas7-pmu-ldo";
+ reg = <0x10E30020 0x4>;
+ ldo: ldo {
+ regulator-name = "ldo";
+ };
+ };
+
+ atlas7_codec: atlas7_codec at 10E30000 {
+ #sound-dai-cells = <0>;
+ compatible = "sirf,atlas7-codec";
+ reg = <0x10E30000 0x400>;
+ clocks = <&car 62>;
+ ldo-supply = <&ldo>;
+ };
+
+ atlas7_iacc: atlas7_iacc at 10D01000 {
+ #sound-dai-cells = <0>;
+ compatible = "sirf,atlas7-iacc";
+ reg = <0x10D01000 0x100>;
+ dmas = <&dmac3 0>, <&dmac3 7>, <&dmac3 8>,
+ <&dmac3 3>, <&dmac3 9>;
+ dma-names = "rx", "tx0", "tx1", "tx2", "tx3";
+ clocks = <&car 62>;
+ };
+
+ ipc at 13240000 {
+ compatible = "sirf,atlas7-ipc";
+ ranges = <0x13240000 0x13240000 0x00010000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ hwspinlock {
+ compatible = "sirf,hwspinlock";
+ reg = <0x13240000 0x00010000>;
+
+ num-spinlocks = <30>;
+ };
+
+ ns_m3_rproc at 0 {
+ compatible = "sirf,ns2m30-rproc";
+ reg = <0x13240000 0x00010000>;
+ interrupts = <0 123 0>;
+ };
+
+ ns_m3_rproc at 1 {
+ compatible = "sirf,ns2m31-rproc";
+ reg = <0x13240000 0x00010000>;
+ interrupts = <0 126 0>;
+ };
+
+ ns_kal_rproc at 0 {
+ compatible = "sirf,ns2kal0-rproc";
+ reg = <0x13240000 0x00010000>;
+ interrupts = <0 124 0>;
+ };
+
+ ns_kal_rproc at 1 {
+ compatible = "sirf,ns2kal1-rproc";
+ reg = <0x13240000 0x00010000>;
+ interrupts = <0 127 0>;
+ };
+ };
+
+ pinctrl: ioc at 18880000 {
+ compatible = "sirf,atlas7-ioc";
+ reg = <0x18880000 0x1000>,
+ <0x10E40000 0x1000>;
+ };
+
+ pmipc {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x13240000 0x13240000 0x00010000>;
+ pmipc at 0x13240000 {
+ compatible = "sirf,atlas7-pmipc";
+ reg = <0x13240000 0x00010000>;
+ };
+ };
+
+ dramfw {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x10830000 0x10830000 0x18000>;
+ dramfw at 10820000 {
+ compatible = "sirf,nocfw-dramfw";
+ reg = <0x10830000 0x18000>;
+ };
+ };
+
+ spramfw {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x10250000 0x10250000 0x3000>;
+ spramfw at 10820000 {
+ compatible = "sirf,nocfw-spramfw";
+ reg = <0x10250000 0x3000>;
+ };
+ };
+
+ cpum {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x10200000 0x10200000 0x3000>;
+ cpum at 10200000 {
+ compatible = "sirf,nocfw-cpum";
+ reg = <0x10200000 0x3000>;
+ };
+ };
+
+ cgum {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x18641000 0x18641000 0x3000>,
+ <0x18620000 0x18620000 0x1000>;
+
+ cgum at 18641000 {
+ compatible = "sirf,nocfw-cgum";
+ reg = <0x18641000 0x3000>;
+ };
+
+ car: clock-controller at 18620000 {
+ compatible = "sirf,atlas7-car";
+ reg = <0x18620000 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+ };
+
+ gnssm {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x18000000 0x18000000 0x0000ffff>,
+ <0x18010000 0x18010000 0x1000>,
+ <0x18020000 0x18020000 0x1000>,
+ <0x18030000 0x18030000 0x1000>,
+ <0x18040000 0x18040000 0x1000>,
+ <0x18050000 0x18050000 0x1000>,
+ <0x18060000 0x18060000 0x1000>,
+ <0x18100000 0x18100000 0x3000>,
+ <0x18250000 0x18250000 0x10000>,
+ <0x18200000 0x18200000 0x1000>;
+
+ dmac0: dma-controller at 18000000 {
+ cell-index = <0>;
+ compatible = "sirf,atlas7-dmac";
+ reg = <0x18000000 0x1000>;
+ interrupts = <0 12 0>;
+ clocks = <&car 89>;
+ dma-channels = <16>;
+ #dma-cells = <1>;
+ };
+
+ gnssmfw at 0x18100000 {
+ compatible = "sirf,nocfw-gnssm";
+ reg = <0x18100000 0x3000>;
+ };
+
+ uart0: uart at 18010000 {
+ cell-index = <0>;
+ compatible = "sirf,atlas7-uart";
+ reg = <0x18010000 0x1000>;
+ interrupts = <0 17 0>;
+ clocks = <&car 90>;
+ fifosize = <128>;
+ dmas = <&dmac0 3>, <&dmac0 2>;
+ dma-names = "rx", "tx";
+ };
+
+ uart1: uart at 18020000 {
+ cell-index = <1>;
+ compatible = "sirf,atlas7-uart";
+ reg = <0x18020000 0x1000>;
+ interrupts = <0 18 0>;
+ clocks = <&car 88>;
+ fifosize = <32>;
+ };
+
+ uart2: uart at 18030000 {
+ cell-index = <2>;
+ compatible = "sirf,atlas7-uart";
+ reg = <0x18030000 0x1000>;
+ interrupts = <0 19 0>;
+ clocks = <&car 91>;
+ fifosize = <128>;
+ dmas = <&dmac0 6>, <&dmac0 7>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+ uart3: uart at 18040000 {
+ cell-index = <3>;
+ compatible = "sirf,atlas7-uart";
+ reg = <0x18040000 0x1000>;
+ interrupts = <0 66 0>;
+ clocks = <&car 92>;
+ fifosize = <128>;
+ dmas = <&dmac0 4>, <&dmac0 5>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+ uart4: uart at 18050000 {
+ cell-index = <4>;
+ compatible = "sirf,atlas7-uart";
+ reg = <0x18050000 0x1000>;
+ interrupts = <0 69 0>;
+ clocks = <&car 93>;
+ fifosize = <128>;
+ dmas = <&dmac0 0>, <&dmac0 1>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+ uart5: uart at 18060000 {
+ cell-index = <5>;
+ compatible = "sirf,atlas7-uart";
+ reg = <0x18060000 0x1000>;
+ interrupts = <0 71 0>;
+ clocks = <&car 94>;
+ fifosize = <128>;
+ dmas = <&dmac0 8>, <&dmac0 9>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+ dspub at 18250000 {
+ compatible = "dx,cc44p";
+ reg = <0x18250000 0x10000>;
+ interrupts = <0 27 0>;
+ };
+
+ spi1: spi at 18200000 {
+ compatible = "sirf,prima2-spi";
+ reg = <0x18200000 0x1000>;
+ interrupts = <0 16 0>;
+ clocks = <&car 95>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ dmas = <&dmac0 12>, <&dmac0 13>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+ };
+
+
+ gpum {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x13000000 0x13000000 0x3000>;
+ gpum at 0x13000000 {
+ compatible = "sirf,nocfw-gpum";
+ reg = <0x13000000 0x3000>;
+ };
+ };
+
+ mediam {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x16000000 0x16000000 0x00200000>,
+ <0x17020000 0x17020000 0x1000>,
+ <0x17030000 0x17030000 0x1000>,
+ <0x17040000 0x17040000 0x1000>,
+ <0x17050000 0x17050000 0x10000>,
+ <0x17060000 0x17060000 0x200>,
+ <0x17060200 0x17060200 0x100>,
+ <0x17070000 0x17070000 0x200>,
+ <0x17070200 0x17070200 0x100>,
+ <0x170A0000 0x170A0000 0x3000>;
+
+ mediam at 170A0000 {
+ compatible = "sirf,nocfw-mediam";
+ reg = <0x170A0000 0x3000>;
+ };
+
+ gpio_0: gpio_mediam at 17040000 {
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ compatible = "sirf,atlas7-gpio";
+ reg = <0x17040000 0x1000>;
+ interrupts = <0 13 0>, <0 14 0>;
+ clocks = <&car 107>;
+ clock-names = "gpio0_io";
+ gpio-controller;
+ interrupt-controller;
+ };
+
+ nand at 17050000 {
+ compatible = "sirf,atlas7-nand";
+ reg = <0x17050000 0x10000>;
+ interrupts = <0 41 0>;
+ clocks = <&car 108>, <&car 112>;
+ clock-names = "nand_io", "nand_nand";
+ };
+
+ sd0: sdhci at 16000000 {
+ cell-index = <0>;
+ compatible = "sirf,atlas7-sdhc";
+ reg = <0x16000000 0x100000>;
+ interrupts = <0 38 0>;
+ clocks = <&car 109>, <&car 111>;
+ clock-names = "core", "iface";
+ wp-inverted;
+ non-removable;
+ status = "disabled";
+ bus-width = <8>;
+ };
+
+ sd1: sdhci at 16100000 {
+ cell-index = <1>;
+ compatible = "sirf,atlas7-sdhc";
+ reg = <0x16100000 0x100000>;
+ interrupts = <0 38 0>;
+ clocks = <&car 109>, <&car 111>;
+ clock-names = "core", "iface";
+ non-removable;
+ status = "disabled";
+ bus-width = <8>;
+ };
+
+ usb0: usb at 17060000 {
+ cell-index = <0>;
+ compatible = "sirf,atlas7-usb";
+ reg = <0x17060000 0x200>;
+ interrupts = <0 10 0>;
+ clocks = <&car 113>;
+ sirf,usbphy = <&usbphy0>;
+ phy_type = "utmi";
+ dr_mode = "otg";
+ maximum-speed = "high-speed";
+ status = "okay";
+ };
+
+ usb1: usb at 17070000 {
+ cell-index = <1>;
+ compatible = "sirf,atlas7-usb";
+ reg = <0x17070000 0x200>;
+ interrupts = <0 11 0>;
+ clocks = <&car 114>;
+ sirf,usbphy = <&usbphy1>;
+ phy_type = "utmi";
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+ status = "okay";
+ };
+
+ usbphy0: usbphy at 0 {
+ compatible = "sirf,atlas7-usbphy";
+ reg = <0x17060200 0x100>;
+ clocks = <&car 115>;
+ status = "okay";
+ };
+
+ usbphy1: usbphy at 1 {
+ compatible = "sirf,atlas7-usbphy";
+ reg = <0x17070200 0x100>;
+ clocks = <&car 116>;
+ status = "okay";
+ };
+
+ i2c0: i2c at 17020000 {
+ cell-index = <0>;
+ compatible = "sirf,prima2-i2c";
+ reg = <0x17020000 0x1000>;
+ interrupts = <0 24 0>;
+ clocks = <&car 105>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ };
+
+ vdifm {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x13290000 0x13290000 0x3000>,
+ <0x13300000 0x13300000 0x1000>,
+ <0x14200000 0x14200000 0x600000>;
+
+ vdifm at 13290000 {
+ compatible = "sirf,nocfw-vdifm";
+ reg = <0x13290000 0x3000>;
+ };
+
+ gpio_1: gpio_vdifm at 13300000 {
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ compatible = "sirf,atlas7-gpio";
+ reg = <0x13300000 0x1000>;
+ interrupts = <0 43 0>, <0 44 0>, <0 45 0>;
+ clocks = <&car 84>;
+ clock-names = "gpio1_io";
+ gpio-controller;
+ interrupt-controller;
+ };
+
+ sd2: sdhci at 14200000 {
+ cell-index = <2>;
+ compatible = "sirf,atlas7-sdhc";
+ reg = <0x14200000 0x100000>;
+ interrupts = <0 23 0>;
+ clocks = <&car 70>, <&car 75>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ vqmmc-supply = <&vqmmc>;
+ vqmmc: vqmmc at 2 {
+ regulator-min-microvolt = <1650000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-name = "vqmmc-ldo";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-allow-bypass;
+ };
+ };
+
+ sd3: sdhci at 14300000 {
+ cell-index = <3>;
+ compatible = "sirf,atlas7-sdhc";
+ reg = <0x14300000 0x100000>;
+ interrupts = <0 23 0>;
+ clocks = <&car 76>, <&car 81>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ bus-width = <4>;
+ };
+
+ sd5: sdhci at 14500000 {
+ cell-index = <5>;
+ compatible = "sirf,atlas7-sdhc";
+ reg = <0x14500000 0x100000>;
+ interrupts = <0 39 0>;
+ clocks = <&car 71>, <&car 76>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ bus-width = <4>;
+ loop-dma;
+ };
+
+ sd6: sdhci at 14600000 {
+ cell-index = <6>;
+ compatible = "sirf,atlas7-sdhc";
+ reg = <0x14600000 0x100000>;
+ interrupts = <0 98 0>;
+ clocks = <&car 72>, <&car 77>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ bus-width = <4>;
+ };
+
+ sd7: sdhci at 14700000 {
+ cell-index = <7>;
+ compatible = "sirf,atlas7-sdhc";
+ reg = <0x14700000 0x100000>;
+ interrupts = <0 98 0>;
+ clocks = <&car 72>, <&car 77>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ bus-width = <4>;
+ };
+ };
+
+ audiom {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x10d50000 0x10d50000 0x0000ffff>,
+ <0x10d60000 0x10d60000 0x0000ffff>,
+ <0x10d80000 0x10d80000 0x0000ffff>,
+ <0x10d90000 0x10d90000 0x0000ffff>,
+ <0x10ED0000 0x10ED0000 0x3000>,
+ <0x10dc8000 0x10dc8000 0x1000>,
+ <0x10dc0000 0x10dc0000 0x1000>,
+ <0x10db0000 0x10db0000 0x4000>,
+ <0x10d40000 0x10d40000 0x1000>,
+ <0x10d30000 0x10d30000 0x1000>;
+
+ timer at 10dc0000 {
+ compatible = "sirf,atlas7-tick";
+ reg = <0x10dc0000 0x1000>;
+ interrupts = <0 0 0>,
+ <0 1 0>,
+ <0 2 0>,
+ <0 49 0>,
+ <0 50 0>,
+ <0 51 0>;
+ clocks = <&car 47>;
+ };
+
+ timerb at 10dc8000 {
+ compatible = "sirf,atlas7-tick";
+ reg = <0x10dc8000 0x1000>;
+ interrupts = <0 74 0>,
+ <0 75 0>,
+ <0 76 0>,
+ <0 77 0>,
+ <0 78 0>,
+ <0 79 0>;
+ clocks = <&car 47>;
+ };
+
+ vip0 at 10db0000 {
+ compatible = "sirf,atlas7-vip0";
+ reg = <0x10db0000 0x2000>;
+ interrupts = <0 85 0>;
+ sirf,vip_cma_size = <0xC00000>;
+ };
+
+ cvd at 10db2000 {
+ compatible = "sirf,cvd";
+ reg = <0x10db2000 0x2000>;
+ clocks = <&car 46>;
+ };
+
+ dmac2: dma-controller at 10d50000 {
+ cell-index = <2>;
+ compatible = "sirf,atlas7-dmac";
+ reg = <0x10d50000 0xffff>;
+ interrupts = <0 55 0>;
+ clocks = <&car 60>;
+ dma-channels = <16>;
+ #dma-cells = <1>;
+ };
+
+ dmac3: dma-controller at 10d60000 {
+ cell-index = <3>;
+ compatible = "sirf,atlas7-dmac";
+ reg = <0x10d60000 0xffff>;
+ interrupts = <0 56 0>;
+ clocks = <&car 61>;
+ dma-channels = <16>;
+ #dma-cells = <1>;
+ };
+
+ adc: adc at 10d80000 {
+ compatible = "sirf,atlas7-adc";
+ reg = <0x10d80000 0xffff>;
+ interrupts = <0 34 0>;
+ clocks = <&car 49>;
+ #io-channel-cells = <1>;
+ };
+
+ pulsec at 10d90000 {
+ compatible = "sirf,prima2-pulsec";
+ reg = <0x10d90000 0xffff>;
+ interrupts = <0 42 0>;
+ clocks = <&car 54>;
+ };
+
+ audiom at 10ED0000 {
+ compatible = "sirf,nocfw-audiom";
+ reg = <0x10ED0000 0x3000>;
+ interrupts = <0 102 0>;
+ };
+
+ usp1: usp at 10d30000 {
+ cell-index = <1>;
+ reg = <0x10d30000 0x1000>;
+ fifosize = <512>;
+ clocks = <&car 58>;
+ dmas = <&dmac2 6>, <&dmac2 7>;
+ dma-names = "rx", "tx";
+ };
+
+ usp2: usp at 10d40000 {
+ cell-index = <2>;
+ reg = <0x10d40000 0x1000>;
+ interrupts = <0 22 0>;
+ clocks = <&car 59>;
+ dmas = <&dmac2 12>, <&dmac2 13>;
+ dma-names = "rx", "tx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+
+ ddrm {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x10820000 0x10820000 0x3000>,
+ <0x10800000 0x10800000 0x2000>;
+ ddrm at 10820000 {
+ compatible = "sirf,nocfw-ddrm";
+ reg = <0x10820000 0x3000>;
+ interrupts = <0 105 0>;
+ };
+
+ memory-controller at 0x10800000 {
+ compatible = "sirf,atlas7-memc";
+ reg = <0x10800000 0x2000>;
+ };
+
+ };
+
+ btm {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x11002000 0x11002000 0x0000ffff>,
+ <0x11010000 0x11010000 0x3000>,
+ <0x11000000 0x11000000 0x1000>,
+ <0x11001000 0x11001000 0x1000>;
+
+ dmac4: dma-controller at 11002000 {
+ cell-index = <4>;
+ compatible = "sirf,atlas7-dmac";
+ reg = <0x11002000 0x1000>;
+ interrupts = <0 99 0>;
+ clocks = <&car 130>;
+ dma-channels = <16>;
+ #dma-cells = <1>;
+ };
+ uart6: uart at 11000000 {
+ cell-index = <6>;
+ compatible = "sirf,atlas7-bt-uart",
+ "sirf,atlas7-uart";
+ reg = <0x11000000 0x1000>;
+ interrupts = <0 100 0>;
+ clocks = <&car 131>, <&car 133>, <&car 134>;
+ clock-names = "uart", "general", "noc";
+ fifosize = <128>;
+ dmas = <&dmac4 12>, <&dmac4 13>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ usp3: usp at 11001000 {
+ compatible = "sirf,atlas7-bt-usp",
+ "sirf,prima2-usp-pcm";
+ cell-index = <3>;
+ reg = <0x11001000 0x1000>;
+ fifosize = <512>;
+ clocks = <&car 132>, <&car 129>, <&car 133>,
+ <&car 134>, <&car 135>;
+ clock-names = "usp3_io", "a7ca_btss", "a7ca_io",
+ "noc_btm_io", "thbtm_io";
+ dmas = <&dmac4 0>, <&dmac4 1>;
+ dma-names = "rx", "tx";
+ };
+
+ btm at 11010000 {
+ compatible = "sirf,nocfw-btm";
+ reg = <0x11010000 0x3000>;
+ };
+ };
+
+ rtcm {
+ compatible = "arteris, flexnoc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x18810000 0x18810000 0x3000>,
+ <0x18840000 0x18840000 0x1000>,
+ <0x18890000 0x18890000 0x1000>,
+ <0x188B0000 0x188B0000 0x10000>,
+ <0x188D0000 0x188D0000 0x1000>;
+ rtcm at 18810000 {
+ compatible = "sirf,nocfw-rtcm";
+ reg = <0x18810000 0x3000>;
+ interrupts = <0 109 0>;
+ };
+
+ gpio_2: gpio_rtcm at 18890000 {
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ compatible = "sirf,atlas7-gpio";
+ reg = <0x18890000 0x1000>;
+ interrupts = <0 47 0>;
+ gpio-controller;
+ interrupt-controller;
+ };
+
+ rtc-iobg at 18840000 {
+ compatible = "sirf,prima2-rtciobg",
+ "sirf-prima2-rtciobg-bus",
+ "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x18840000 0x1000>;
+
+ sysrtc at 2000 {
+ compatible = "sirf,prima2-sysrtc";
+ reg = <0x2000 0x100>;
+ interrupts = <0 52 0>;
+ };
+ pwrc at 3000 {
+ compatible = "sirf,atlas7-pwrc";
+ reg = <0x3000 0x100>;
+ };
+ };
+
+ qspi: flash at 188B0000 {
+ cell-index = <0>;
+ compatible = "sirf,atlas7-qspi-nor";
+ reg = <0x188B0000 0x10000>;
+ interrupts = <0 15 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ retain at 0x188D0000 {
+ compatible = "sirf,atlas7-retain";
+ reg = <0x188D0000 0x1000>;
+ };
+
+ };
+ disp-iobg {
+ /* lcdc0 */
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x13100000 0x13100000 0x20000>,
+ <0x10e10000 0x10e10000 0x10000>;
+
+ lcd at 13100000 {
+ compatible = "sirf,atlas7-lcdc";
+ reg = <0x13100000 0x10000>;
+ interrupts = <0 30 0>;
+ clocks = <&car 79>;
+ };
+ vpp at 13110000 {
+ compatible = "sirf,atlas7-vpp";
+ reg = <0x13110000 0x10000>;
+ interrupts = <0 31 0>;
+ clocks = <&car 78>;
+ resets = <&car 29>;
+ };
+ lvds at 10e10000 {
+ compatible = "sirf,atlas7-lvdsc";
+ reg = <0x10e10000 0x10000>;
+ interrupts = <0 64 0>;
+ clocks = <&car 54>;
+ resets = <&car 29>;
+ };
+
+ };
+
+ graphics-iobg {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x12000000 0x12000000 0x1000000>;
+
+ graphics at 12000000 {
+ compatible = "powervr,sgx531";
+ reg = <0x12000000 0x1000000>;
+ interrupts = <0 6 0>;
+ clocks = <&car 126>;
+ };
+ };
+ };
+};
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 9/9] clocksource: marco: rename marco to atlas7
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
` (7 preceding siblings ...)
2015-01-03 1:36 ` [PATCH V2 8/9] ARM: dts: add init dts file for CSR atlas7 SoC Barry Song
@ 2015-01-03 1:36 ` Barry Song
2015-01-04 18:00 ` Daniel Lezcano
2015-01-04 16:56 ` [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Arnd Bergmann
9 siblings, 1 reply; 13+ messages in thread
From: Barry Song @ 2015-01-03 1:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Barry Song <Baohua.Song@csr.com>
marco project is replaced by atlas7 and we should obliterate
its all traces.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
drivers/clocksource/Makefile | 2 +-
drivers/clocksource/{timer-marco.c => timer-atlas7.c} | 15 +++++++--------
2 files changed, 8 insertions(+), 9 deletions(-)
rename drivers/clocksource/{timer-marco.c => timer-atlas7.c} (95%)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 94d90b2..306bc47 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
obj-$(CONFIG_ORION_TIMER) += time-orion.o
obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
obj-$(CONFIG_ARCH_CLPS711X) += clps711x-timer.o
-obj-$(CONFIG_ARCH_MARCO) += timer-marco.o
+obj-$(CONFIG_ARCH_ATLAS7) += timer-atlas7.o
obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o
obj-$(CONFIG_ARCH_MXS) += mxs_timer.o
obj-$(CONFIG_ARCH_PXA) += pxa_timer.o
diff --git a/drivers/clocksource/timer-marco.c b/drivers/clocksource/timer-atlas7.c
similarity index 95%
rename from drivers/clocksource/timer-marco.c
rename to drivers/clocksource/timer-atlas7.c
index 361a789..60f9de3 100644
--- a/drivers/clocksource/timer-marco.c
+++ b/drivers/clocksource/timer-atlas7.c
@@ -38,7 +38,7 @@
#define SIRFSOC_TIMER_REG_CNT 6
-static unsigned long marco_timer_rate;
+static unsigned long atlas7_timer_rate;
static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
SIRFSOC_TIMER_WATCHDOG_EN,
@@ -195,7 +195,7 @@ static int sirfsoc_local_timer_setup(struct clock_event_device *ce)
ce->rating = 200;
ce->set_mode = sirfsoc_timer_set_mode;
ce->set_next_event = sirfsoc_timer_set_next_event;
- clockevents_calc_mult_shift(ce, marco_timer_rate, 60);
+ clockevents_calc_mult_shift(ce, atlas7_timer_rate, 60);
ce->max_delta_ns = clockevent_delta2ns(-2, ce);
ce->min_delta_ns = clockevent_delta2ns(2, ce);
ce->cpumask = cpumask_of(cpu);
@@ -255,9 +255,8 @@ static void __init sirfsoc_clockevent_init(void)
}
/* initialize the kernel jiffy timer source */
-static void __init sirfsoc_marco_timer_init(struct device_node *np)
+static void __init sirfsoc_atlas7_timer_init(struct device_node *np)
{
- u32 timer_div;
struct clk *clk;
clk = of_clk_get(np, 0);
@@ -265,7 +264,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
BUG_ON(clk_prepare_enable(clk));
- marco_timer_rate = clk_get_rate(clk);
+ atlas7_timer_rate = clk_get_rate(clk);
/* timer dividers: 0, not divided */
writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);
@@ -283,7 +282,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
/* Clear all interrupts */
writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
- BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, marco_timer_rate));
+ BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, atlas7_timer_rate));
sirfsoc_clockevent_init();
}
@@ -302,6 +301,6 @@ static void __init sirfsoc_of_timer_init(struct device_node *np)
if (!sirfsoc_timer1_irq.irq)
panic("No irq passed for timer1 via DT\n");
- sirfsoc_marco_timer_init(np);
+ sirfsoc_atlas7_timer_init(np);
}
-CLOCKSOURCE_OF_DECLARE(sirfsoc_marco_timer, "sirf,marco-tick", sirfsoc_of_timer_init );
+CLOCKSOURCE_OF_DECLARE(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);
--
2.2.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V2 9/9] clocksource: marco: rename marco to atlas7
2015-01-03 1:36 ` [PATCH V2 9/9] clocksource: marco: rename marco to atlas7 Barry Song
@ 2015-01-04 18:00 ` Daniel Lezcano
0 siblings, 0 replies; 13+ messages in thread
From: Daniel Lezcano @ 2015-01-04 18:00 UTC (permalink / raw)
To: linux-arm-kernel
On 01/03/2015 02:36 AM, Barry Song wrote:
> From: Barry Song <Baohua.Song@csr.com>
>
> marco project is replaced by atlas7 and we should obliterate
> its all traces.
>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---
> drivers/clocksource/Makefile | 2 +-
> drivers/clocksource/{timer-marco.c => timer-atlas7.c} | 15 +++++++--------
> 2 files changed, 8 insertions(+), 9 deletions(-)
> rename drivers/clocksource/{timer-marco.c => timer-atlas7.c} (95%)
>
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 94d90b2..306bc47 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -18,7 +18,7 @@ obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
> obj-$(CONFIG_ORION_TIMER) += time-orion.o
> obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
> obj-$(CONFIG_ARCH_CLPS711X) += clps711x-timer.o
> -obj-$(CONFIG_ARCH_MARCO) += timer-marco.o
> +obj-$(CONFIG_ARCH_ATLAS7) += timer-atlas7.o
> obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o
> obj-$(CONFIG_ARCH_MXS) += mxs_timer.o
> obj-$(CONFIG_ARCH_PXA) += pxa_timer.o
> diff --git a/drivers/clocksource/timer-marco.c b/drivers/clocksource/timer-atlas7.c
> similarity index 95%
> rename from drivers/clocksource/timer-marco.c
> rename to drivers/clocksource/timer-atlas7.c
> index 361a789..60f9de3 100644
> --- a/drivers/clocksource/timer-marco.c
> +++ b/drivers/clocksource/timer-atlas7.c
> @@ -38,7 +38,7 @@
>
> #define SIRFSOC_TIMER_REG_CNT 6
>
> -static unsigned long marco_timer_rate;
> +static unsigned long atlas7_timer_rate;
>
> static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
> SIRFSOC_TIMER_WATCHDOG_EN,
> @@ -195,7 +195,7 @@ static int sirfsoc_local_timer_setup(struct clock_event_device *ce)
> ce->rating = 200;
> ce->set_mode = sirfsoc_timer_set_mode;
> ce->set_next_event = sirfsoc_timer_set_next_event;
> - clockevents_calc_mult_shift(ce, marco_timer_rate, 60);
> + clockevents_calc_mult_shift(ce, atlas7_timer_rate, 60);
> ce->max_delta_ns = clockevent_delta2ns(-2, ce);
> ce->min_delta_ns = clockevent_delta2ns(2, ce);
> ce->cpumask = cpumask_of(cpu);
> @@ -255,9 +255,8 @@ static void __init sirfsoc_clockevent_init(void)
> }
>
> /* initialize the kernel jiffy timer source */
> -static void __init sirfsoc_marco_timer_init(struct device_node *np)
> +static void __init sirfsoc_atlas7_timer_init(struct device_node *np)
> {
> - u32 timer_div;
> struct clk *clk;
>
> clk = of_clk_get(np, 0);
> @@ -265,7 +264,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
>
> BUG_ON(clk_prepare_enable(clk));
>
> - marco_timer_rate = clk_get_rate(clk);
> + atlas7_timer_rate = clk_get_rate(clk);
>
> /* timer dividers: 0, not divided */
> writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);
> @@ -283,7 +282,7 @@ static void __init sirfsoc_marco_timer_init(struct device_node *np)
> /* Clear all interrupts */
> writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
>
> - BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, marco_timer_rate));
> + BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, atlas7_timer_rate));
>
> sirfsoc_clockevent_init();
> }
> @@ -302,6 +301,6 @@ static void __init sirfsoc_of_timer_init(struct device_node *np)
> if (!sirfsoc_timer1_irq.irq)
> panic("No irq passed for timer1 via DT\n");
>
> - sirfsoc_marco_timer_init(np);
> + sirfsoc_atlas7_timer_init(np);
> }
> -CLOCKSOURCE_OF_DECLARE(sirfsoc_marco_timer, "sirf,marco-tick", sirfsoc_of_timer_init );
> +CLOCKSOURCE_OF_DECLARE(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);
>
--
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform
2015-01-03 1:36 [PATCH V2 0/9] ARM: sirf: drop CSR marco and add atlas7 platform Barry Song
` (8 preceding siblings ...)
2015-01-03 1:36 ` [PATCH V2 9/9] clocksource: marco: rename marco to atlas7 Barry Song
@ 2015-01-04 16:56 ` Arnd Bergmann
9 siblings, 0 replies; 13+ messages in thread
From: Arnd Bergmann @ 2015-01-04 16:56 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 03 January 2015 09:36:38 Barry Song wrote:
> From: Barry Song <Baohua.Song@csr.com>
>
> this patchset drops MARCO as it is not supported any more. its replacement
> is atlas7.
> some IPs from marco are moved to atlas7, for example timer. for this kind
> of IPs, we rename to atlas7. some IPs need some change for atlas7, such as
> platsmp, we break marco and move to atlas7 directly.
>
> the patchset add debug ports, machine and devicetree for the new atlas7.
>
Looks all good, please add my
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply [flat|nested] 13+ messages in thread