From: Daniel Thompson <daniel.thompson@linaro.org> To: Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Russell King <linux@arm.linux.org.uk> Cc: Daniel Thompson <daniel.thompson@linaro.org>, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patches@linaro.org, linaro-kernel@lists.linaro.org, John Stultz <john.stultz@linaro.org>, Sumit Semwal <sumit.semwal@linaro.org>, Dirk Behme <dirk.behme@de.bosch.com>, Daniel Drake <drake@endlessm.com>, Dmitry Pervushin <dpervushin@gmail.com>, Tim Sander <tim@krieglstein.org>, Stephen Boyd <sboyd@codeaurora.org> Subject: [RFC PATCH 4/5] arm: perf: Make v7 support FIQ-safe Date: Tue, 13 Jan 2015 16:35:30 +0000 [thread overview] Message-ID: <1421166931-14134-5-git-send-email-daniel.thompson@linaro.org> (raw) In-Reply-To: <1421166931-14134-1-git-send-email-daniel.thompson@linaro.org> armv7pmu_disable_event() is called during irq handler. If irq handling switches over to fiq then the spin locks in this function risks deadlock. Both armv7_pmnc_disable_counter() and armv7_pmnc_disable_intens() are unconditional co-processor writes. I haven't yet come up with an schedule where other users of pmu_lock would break if interleaved with these calls so I have simply removed them. The other changed required it so avoid calling irq_work_run() when run from a FIQ handler. The pended work will either be dispatched by the irq work IPI or by a timer handler. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> --- arch/arm/kernel/perf_event_v7.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 8993770c47de..08f426486d3e 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -744,7 +744,6 @@ static void armv7pmu_enable_event(struct perf_event *event) static void armv7pmu_disable_event(struct perf_event *event) { - unsigned long flags; struct hw_perf_event *hwc = &event->hw; struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); @@ -757,11 +756,6 @@ static void armv7pmu_disable_event(struct perf_event *event) } /* - * Disable counter and interrupt - */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); - - /* * Disable counter */ armv7_pmnc_disable_counter(idx); @@ -770,8 +764,6 @@ static void armv7pmu_disable_event(struct perf_event *event) * Disable interrupt for this counter */ armv7_pmnc_disable_intens(idx); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) @@ -831,7 +823,8 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) * platforms that can have the PMU interrupts raised as an NMI, this * will not work. */ - irq_work_run(); + if (!in_nmi()) + irq_work_run(); return IRQ_HANDLED; } -- 1.9.3
WARNING: multiple messages have this Message-ID (diff)
From: daniel.thompson@linaro.org (Daniel Thompson) To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 4/5] arm: perf: Make v7 support FIQ-safe Date: Tue, 13 Jan 2015 16:35:30 +0000 [thread overview] Message-ID: <1421166931-14134-5-git-send-email-daniel.thompson@linaro.org> (raw) In-Reply-To: <1421166931-14134-1-git-send-email-daniel.thompson@linaro.org> armv7pmu_disable_event() is called during irq handler. If irq handling switches over to fiq then the spin locks in this function risks deadlock. Both armv7_pmnc_disable_counter() and armv7_pmnc_disable_intens() are unconditional co-processor writes. I haven't yet come up with an schedule where other users of pmu_lock would break if interleaved with these calls so I have simply removed them. The other changed required it so avoid calling irq_work_run() when run from a FIQ handler. The pended work will either be dispatched by the irq work IPI or by a timer handler. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> --- arch/arm/kernel/perf_event_v7.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 8993770c47de..08f426486d3e 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -744,7 +744,6 @@ static void armv7pmu_enable_event(struct perf_event *event) static void armv7pmu_disable_event(struct perf_event *event) { - unsigned long flags; struct hw_perf_event *hwc = &event->hw; struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); @@ -757,11 +756,6 @@ static void armv7pmu_disable_event(struct perf_event *event) } /* - * Disable counter and interrupt - */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); - - /* * Disable counter */ armv7_pmnc_disable_counter(idx); @@ -770,8 +764,6 @@ static void armv7pmu_disable_event(struct perf_event *event) * Disable interrupt for this counter */ armv7_pmnc_disable_intens(idx); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) @@ -831,7 +823,8 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) * platforms that can have the PMU interrupts raised as an NMI, this * will not work. */ - irq_work_run(); + if (!in_nmi()) + irq_work_run(); return IRQ_HANDLED; } -- 1.9.3
next prev parent reply other threads:[~2015-01-13 16:36 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-01-13 16:35 [RFC PATCH 0/5] irq: Allow irqs to be routed to NMI/FIQ Daniel Thompson 2015-01-13 16:35 ` Daniel Thompson 2015-01-13 16:35 ` [RFC PATCH 1/5] arm: irq: Add a __nmi_count stat Daniel Thompson 2015-01-13 16:35 ` Daniel Thompson 2015-01-13 16:35 ` [RFC PATCH 2/5] irq: Allow interrupts to routed to NMI (or similar) Daniel Thompson 2015-01-13 16:35 ` Daniel Thompson 2015-01-19 16:21 ` Joshua Clayton 2015-01-19 16:21 ` Joshua Clayton 2015-01-19 17:33 ` Daniel Thompson 2015-01-19 17:33 ` Daniel Thompson 2015-01-13 16:35 ` [RFC PATCH 3/5] irq: gic: Add support for NMI routing Daniel Thompson 2015-01-13 16:35 ` Daniel Thompson 2015-01-13 16:35 ` Daniel Thompson [this message] 2015-01-13 16:35 ` [RFC PATCH 4/5] arm: perf: Make v7 support FIQ-safe Daniel Thompson 2015-01-13 16:35 ` [RFC PATCH 5/5] arm: perf: Use FIQ to handle PMU events Daniel Thompson 2015-01-13 16:35 ` Daniel Thompson 2015-01-19 16:35 ` Joshua Clayton 2015-01-19 16:35 ` Joshua Clayton 2015-01-20 10:18 ` Daniel Thompson 2015-01-20 10:18 ` Daniel Thompson 2015-01-20 17:35 ` Joshua Clayton 2015-01-20 17:35 ` Joshua Clayton 2015-01-19 17:48 ` Russell King - ARM Linux 2015-01-19 17:48 ` Russell King - ARM Linux 2015-01-20 10:04 ` Daniel Thompson 2015-01-20 10:04 ` Daniel Thompson 2015-01-21 17:03 ` [RFC PATCH v2 0/5] irq: Allow irqs to be routed to NMI/FIQ Daniel Thompson 2015-01-21 17:03 ` Daniel Thompson 2015-01-21 17:03 ` [RFC PATCH v2 1/5] arm: irq: Add a __nmi_count stat Daniel Thompson 2015-01-21 17:03 ` Daniel Thompson 2015-01-21 17:03 ` [RFC PATCH v2 2/5] irq: Allow interrupts to routed to NMI (or similar) Daniel Thompson 2015-01-21 17:03 ` Daniel Thompson 2015-01-24 23:37 ` Thomas Gleixner 2015-01-24 23:37 ` Thomas Gleixner 2015-01-21 17:03 ` [RFC PATCH v2 3/5] irq: gic: Add support for NMI routing Daniel Thompson 2015-01-21 17:03 ` Daniel Thompson 2015-01-21 17:03 ` [RFC PATCH v2 4/5] arm: perf: Make v7 support FIQ-safe Daniel Thompson 2015-01-21 17:03 ` Daniel Thompson 2015-01-21 17:03 ` [RFC PATCH v2 5/5] arm: perf: Use FIQ to handle PMU events Daniel Thompson 2015-01-21 17:03 ` Daniel Thompson
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