[PATCH v1 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[PATCH v1 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Iurii Konovalenko]

From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>

The following patch series adds basic support needed for R-Car Gen2 evm boards.
Verified on Xen 4.5.0 stable on Lager board with and without early_printk.

Iurii Konovalenko (1):
  xen/arm: Introduce support for Renesas R-Car Gen2 platform

Oleksandr Tyshchenko (2):
  xen/arm: Add R-Car Gen2 support for early printk
  xen/arm: Add new driver for R-Car Gen2 UART

 config/arm32.mk                          |   1 +
 docs/misc/arm/early-printk.txt           |   1 +
 xen/arch/arm/Rules.mk                    |   4 +
 xen/arch/arm/arm32/debug-rcar2.inc       |  49 ++++
 xen/arch/arm/platforms/Makefile          |   1 +
 xen/arch/arm/platforms/shmobile.c        | 149 ++++++++++++
 xen/drivers/char/Makefile                |   1 +
 xen/drivers/char/rcar2-uart.c            | 376 +++++++++++++++++++++++++++++++
 xen/include/asm-arm/platforms/shmobile.h |  24 ++
 xen/include/asm-arm/rcar2-uart.h         | 107 +++++++++
 10 files changed, 713 insertions(+)
 create mode 100644 xen/arch/arm/arm32/debug-rcar2.inc
 create mode 100644 xen/arch/arm/platforms/shmobile.c
 create mode 100644 xen/drivers/char/rcar2-uart.c
 create mode 100644 xen/include/asm-arm/platforms/shmobile.h
 create mode 100644 xen/include/asm-arm/rcar2-uart.h

-- 
1.9.1

[PATCH v1 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Iurii Konovalenko]

From: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
---
 docs/misc/arm/early-printk.txt     |   1 +
 xen/arch/arm/Rules.mk              |   4 ++
 xen/arch/arm/arm32/debug-rcar2.inc |  49 +++++++++++++++++
 xen/include/asm-arm/rcar2-uart.h   | 107 +++++++++++++++++++++++++++++++++++++
 4 files changed, 161 insertions(+)
 create mode 100644 xen/arch/arm/arm32/debug-rcar2.inc
 create mode 100644 xen/include/asm-arm/rcar2-uart.h

diff --git a/docs/misc/arm/early-printk.txt b/docs/misc/arm/early-printk.txt
index 71a0247..1ca2a55 100644
--- a/docs/misc/arm/early-printk.txt
+++ b/docs/misc/arm/early-printk.txt
@@ -19,6 +19,7 @@ where mach is the name of the machine:
   - brcm: printk with 8250 on Broadcom 7445D0 boards with A15 processors.
   - hip04-d01: printk with 8250 on HiSilicon Hip-04 D01
   - seattle: printk with pl011 for AMD Seattle processor
+  - lager: printk with SCIF0 on Renesas R-Car H2 processors
 
 The base address and baud rate is hardcoded in xen/arch/arm/Rules.mk,
 see there when adding support for new machines.
diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk
index 4ee51a9..ff02893 100644
--- a/xen/arch/arm/Rules.mk
+++ b/xen/arch/arm/Rules.mk
@@ -109,6 +109,10 @@ ifeq ($(CONFIG_EARLY_PRINTK), seattle)
 EARLY_PRINTK_INC := pl011
 EARLY_UART_BASE_ADDRESS := 0xe1010000
 endif
+ifeq ($(CONFIG_EARLY_PRINTK), lager)
+EARLY_PRINTK_INC := rcar2
+EARLY_UART_BASE_ADDRESS := 0xe6e60000
+endif
 
 ifneq ($(EARLY_PRINTK_INC),)
 EARLY_PRINTK := y
diff --git a/xen/arch/arm/arm32/debug-rcar2.inc b/xen/arch/arm/arm32/debug-rcar2.inc
new file mode 100644
index 0000000..a66895c
--- /dev/null
+++ b/xen/arch/arm/arm32/debug-rcar2.inc
@@ -0,0 +1,49 @@
+/*
+ * xen/arch/arm/arm32/debug-rcar2.inc
+ *
+ * R-Car Gen2 specific debug code
+ *
+ * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
+ * Copyright (C) 2014, Globallogic.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/rcar2-uart.h>
+
+/* R-Car Gen2 UART wait UART to be ready to transmit
+ * rb: register which contains the UART base address
+ * rc: scratch register 
+ */
+.macro early_uart_ready rb rc
+1:
+        ldrh   \rc, [\rb, #SCIF_SCFSR]   /* <- SCFSR (status register) */
+        tst    \rc, #SCFSR_TDFE          /* Check TDFE bit */
+        beq    1b                        /* Wait for the UART to be ready */
+.endm
+
+/* R-Car Gen2 UART transmit character
+ * rb: register which contains the UART base address
+ * rt: register which contains the character to transmit 
+ */
+.macro early_uart_transmit rb rt
+        strb   \rt, [\rb, #SCIF_SCFTDR]                  /* -> SCFTDR (data register) */
+        ldrh   \rt, [\rb, #SCIF_SCFSR]                   /* <- SCFSR (status register) */
+        and    \rt, \rt, #(~(SCFSR_TEND | SCFSR_TDFE))   /* Clear TEND and TDFE bits */
+        strh   \rt, [\rb, #SCIF_SCFSR]                   /* -> SCFSR (status register) */
+.endm
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/rcar2-uart.h b/xen/include/asm-arm/rcar2-uart.h
new file mode 100644
index 0000000..10a56fb
--- /dev/null
+++ b/xen/include/asm-arm/rcar2-uart.h
@@ -0,0 +1,107 @@
+/*
+ * xen/include/asm-arm/rcar2-uart.h
+ *
+ * Common constant definition between early printk and the UART driver
+ * for the R-Car Gen2 UART.
+ *
+ * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
+ * Copyright (C) 2014, Globallogic.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARM_RCAR2_H
+#define __ASM_ARM_RCAR2_H
+
+#define SCIF_FIFO_MAX_SIZE    16
+#define SCIF_CLK_FREQ         14745600
+
+/* Register offsets */
+#define SCIF_SCSMR     (0x00)    /* Serial mode register           */
+#define SCIF_SCBRR     (0x04)    /* Bit rate register              */
+#define SCIF_SCSCR     (0x08)    /* Serial control register        */
+#define SCIF_SCFTDR    (0x0C)    /* Transmit FIFO data register    */
+#define SCIF_SCFSR     (0x10)    /* Serial status register         */
+#define SCIF_SCFRDR    (0x14)    /* Receive FIFO data register     */
+#define SCIF_SCFCR     (0x18)    /* FIFO control register          */
+#define SCIF_SCFDR     (0x1C)    /* FIFO data count register       */
+#define SCIF_SCSPTR    (0x20)    /* Serial port register           */
+#define SCIF_SCLSR     (0x24)    /* Line status register           */
+#define SCIF_DL        (0x30)    /* Frequency division register    */
+#define SCIF_CKS       (0x34)    /* Clock Select register          */
+
+/* Serial Control Register (SCSCR) */
+#define SCSCR_TIE     (1 << 7)    /* Transmit Interrupt Enable */
+#define SCSCR_RIE     (1 << 6)    /* Receive Interrupt Enable */
+#define SCSCR_TE      (1 << 5)    /* Transmit Enable */
+#define SCSCR_RE      (1 << 4)    /* Receive Enable */
+#define SCSCR_REIE    (1 << 3)    /* Receive Error Interrupt Enable */
+#define SCSCR_TOIE    (1 << 2)    /* Timeout Interrupt Enable */
+#define SCSCR_CKE1    (1 << 1)    /* Clock Enable 1 */
+#define SCSCR_CKE0    (1 << 0)    /* Clock Enable 0 */
+
+#define SCSCR_CKE00    (0)
+#define SCSCR_CKE01    (SCSCR_CKE0)
+#define SCSCR_CKE10    (SCSCR_CKE1)
+#define SCSCR_CKE11    (SCSCR_CKE1 | SCSCR_CKE0)
+
+/* Serial Mode Register (SCSMR) */
+#define SCSMR_CHR     (1 << 6)    /* 7-bit Character Length */
+#define SCSMR_PE      (1 << 5)    /* Parity Enable */
+#define SCSMR_ODD     (1 << 4)    /* Odd Parity */
+#define SCSMR_STOP    (1 << 3)    /* Stop Bit Length */
+
+/* Serial Status Register (SCFSR) */
+#define SCFSR_ER      (1 << 7)    /* Receive Error */
+#define SCFSR_TEND    (1 << 6)    /* Transmission End */
+#define SCFSR_TDFE    (1 << 5)    /* Transmit FIFO Data Empty */
+#define SCFSR_BRK     (1 << 4)    /* Break Detect */
+#define SCFSR_FER     (1 << 3)    /* Framing Error */
+#define SCFSR_PER     (1 << 2)    /* Parity Error */
+#define SCFSR_RDF     (1 << 1)    /* Receive FIFO Data Full */
+#define SCFSR_DR      (1 << 0)    /* Receive Data Ready */
+
+#define SCIF_ERRORS    (SCFSR_PER | SCFSR_FER | SCFSR_ER | SCFSR_BRK)
+
+/* Line Status Register (SCLSR) */
+#define SCLSR_TO      (1 << 2)    /* Timeout */
+#define SCLSR_ORER    (1 << 0)    /* Overrun Error */
+
+/* FIFO Control Register (SCFCR) */
+#define SCFCR_RTRG1    (1 << 7)    /* Receive FIFO Data Count Trigger 1 */
+#define SCFCR_RTRG0    (1 << 6)    /* Receive FIFO Data Count Trigger 0 */
+#define SCFCR_TTRG1    (1 << 5)    /* Transmit FIFO Data Count Trigger 1 */
+#define SCFCR_TTRG0    (1 << 4)    /* Transmit FIFO Data Count Trigger 0 */
+#define SCFCR_MCE      (1 << 3)    /* Modem Control Enable */
+#define SCFCR_TFRST    (1 << 2)    /* Transmit FIFO Data Register Reset */
+#define SCFCR_RFRST    (1 << 1)    /* Receive FIFO Data Register Reset */
+#define SCFCR_LOOP     (1 << 0)    /* Loopback Test */
+
+#define SCFCR_RTRG00    (0)
+#define SCFCR_RTRG01    (SCFCR_RTRG0)
+#define SCFCR_RTRG10    (SCFCR_RTRG1)
+#define SCFCR_RTRG11    (SCFCR_RTRG1 | SCFCR_RTRG0)
+
+#define SCFCR_TTRG00    (0)
+#define SCFCR_TTRG01    (SCFCR_TTRG0)
+#define SCFCR_TTRG10    (SCFCR_TTRG1)
+#define SCFCR_TTRG11    (SCFCR_TTRG1 | SCFCR_TTRG0)
+
+#endif /* __ASM_ARM_RCAR2_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
1.9.1

[PATCH v1 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Iurii Konovalenko]

From: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
---
 config/arm32.mk               |   1 +
 xen/drivers/char/Makefile     |   1 +
 xen/drivers/char/rcar2-uart.c | 376 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 378 insertions(+)
 create mode 100644 xen/drivers/char/rcar2-uart.c

diff --git a/config/arm32.mk b/config/arm32.mk
index 4f83a63..6ee5173 100644
--- a/config/arm32.mk
+++ b/config/arm32.mk
@@ -12,6 +12,7 @@ CFLAGS += -marm
 HAS_PL011 := y
 HAS_EXYNOS4210 := y
 HAS_OMAP := y
+HAS_RCAR2 := y
 HAS_NS16550 := y
 
 # Use only if calling $(LD) directly.
diff --git a/xen/drivers/char/Makefile b/xen/drivers/char/Makefile
index 911b788..64428b7 100644
--- a/xen/drivers/char/Makefile
+++ b/xen/drivers/char/Makefile
@@ -3,6 +3,7 @@ obj-$(HAS_NS16550) += ns16550.o
 obj-$(HAS_PL011) += pl011.o
 obj-$(HAS_EXYNOS4210) += exynos4210-uart.o
 obj-$(HAS_OMAP) += omap-uart.o
+obj-$(HAS_RCAR2) += rcar2-uart.o
 obj-$(HAS_EHCI) += ehci-dbgp.o
 obj-$(CONFIG_ARM) += dt-uart.o
 obj-y += serial.o
diff --git a/xen/drivers/char/rcar2-uart.c b/xen/drivers/char/rcar2-uart.c
new file mode 100644
index 0000000..85d1b17
--- /dev/null
+++ b/xen/drivers/char/rcar2-uart.c
@@ -0,0 +1,376 @@
+/*
+ * xen/drivers/char/rcar2-uart.c
+ *
+ * Driver for R-Car Gen2 UART.
+ *
+ * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
+ * Copyright (C) 2014, Globallogic.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <xen/config.h>
+#include <xen/console.h>
+#include <xen/errno.h>
+#include <xen/serial.h>
+#include <xen/init.h>
+#include <xen/irq.h>
+#include <xen/mm.h>
+#include <xen/delay.h>
+#include <asm/device.h>
+#include <asm/rcar2-uart.h>
+#include <asm/io.h>
+
+#define PARITY_NONE    0
+#define PARITY_EVEN    1
+#define PARITY_ODD     2
+
+#define rcar2_readb(uart, off)          readb((uart)->regs + (off))
+#define rcar2_writeb(uart, off, val)    writeb((val), (uart)->regs + (off))
+
+#define rcar2_readw(uart, off)          readw((uart)->regs + (off))
+#define rcar2_writew(uart, off, val)    writew((val), (uart)->regs + (off))
+
+static struct rcar2_uart {
+    unsigned int baud, clock_hz, data_bits, parity, stop_bits;
+    unsigned int irq;
+    char __iomem *regs;
+    struct irqaction irqaction;
+    struct vuart_info vuart;
+    bool_t irq_en;
+} rcar2_com = {0};
+
+static void rcar2_uart_interrupt(int irq, void *data, struct cpu_user_regs *regs)
+{
+    struct serial_port *port = data;
+    struct rcar2_uart *uart = port->uart;
+    uint16_t status, ctrl;
+
+    ctrl = rcar2_readw(uart, SCIF_SCSCR);
+    status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
+    /* Ignore next flag if TX Interrupt is disabled */
+    if ( !(ctrl & SCSCR_TIE) )
+        status &= ~SCFSR_TDFE;
+
+    while ( status != 0 )
+    {
+        /* TX Interrupt */
+        if ( status & SCFSR_TDFE )
+        {
+            serial_tx_interrupt(port, regs);
+
+            if ( port->txbufc == port->txbufp )
+            {
+                /*
+                 * There is no data bytes to send. We have to disable
+                 * TX Interrupt to prevent us from getting stuck in the
+                 * interrupt handler
+                 */
+                ctrl = rcar2_readw(uart, SCIF_SCSCR);
+                ctrl &= ~SCSCR_TIE;
+                rcar2_writew(uart, SCIF_SCSCR, ctrl);
+            }
+        }
+
+        /* RX Interrupt */
+        if ( status & (SCFSR_RDF | SCFSR_DR) )
+            serial_rx_interrupt(port, regs);
+
+        /* Error Interrupt */
+        if ( status & SCIF_ERRORS )
+            rcar2_writew(uart, SCIF_SCFSR, ~SCIF_ERRORS);
+        if ( rcar2_readw(uart, SCIF_SCLSR) & SCLSR_ORER )
+            rcar2_writew(uart, SCIF_SCLSR, 0);
+
+        status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
+        if ( !(ctrl & SCSCR_TIE) )
+            status &= ~SCFSR_TDFE;
+    }
+}
+
+static void __init rcar2_uart_init_preirq(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+    unsigned int divisor;
+    uint16_t val;
+
+    /*
+     * Wait until last bit has been transmitted. This is needed for a smooth
+     * transition when we come from early printk
+     */
+    while ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TEND) );
+
+    /* Disable TX/RX parts and all interrupts */
+    rcar2_writew(uart, SCIF_SCSCR, 0);
+
+    /* Reset TX/RX FIFOs */
+    rcar2_writew(uart, SCIF_SCFCR, SCFCR_RFRST | SCFCR_TFRST);
+
+    /* Clear all errors and flags */
+    rcar2_readw(uart, SCIF_SCFSR);
+    rcar2_writew(uart, SCIF_SCFSR, 0);
+    rcar2_readw(uart, SCIF_SCLSR);
+    rcar2_writew(uart, SCIF_SCLSR, 0);
+
+    /* Select Baud rate generator output as a clock source */
+    rcar2_writew(uart, SCIF_SCSCR, SCSCR_CKE10);
+
+    /* Setup protocol format and Baud rate, select Asynchronous mode */
+    val = 0;
+    ASSERT( uart->data_bits >= 7 && uart->data_bits <= 8 );
+    if ( uart->data_bits == 7 )
+        val |= SCSMR_CHR;
+    else
+        val &= ~SCSMR_CHR;
+
+    ASSERT( uart->stop_bits >= 1 && uart->stop_bits <= 2 );
+    if ( uart->stop_bits == 2 )
+        val |= SCSMR_STOP;
+    else
+        val &= ~SCSMR_STOP;
+
+    ASSERT( uart->parity >= PARITY_NONE && uart->parity <= PARITY_ODD );
+    switch ( uart->parity )
+    {
+    case PARITY_NONE:
+        val &= ~SCSMR_PE;
+        break;
+
+    case PARITY_EVEN:
+        val |= SCSMR_PE;
+        break;
+
+    case PARITY_ODD:
+        val |= SCSMR_PE | SCSMR_ODD;
+        break;
+    }
+    rcar2_writew(uart, SCIF_SCSMR, val);
+
+    ASSERT( uart->clock_hz > 0 );
+    if ( uart->baud != BAUD_AUTO )
+    {
+        /* Setup desired Baud rate */
+        divisor = uart->clock_hz / (uart->baud << 4);
+        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
+        rcar2_writew(uart, SCIF_DL, (uint16_t)divisor);
+        /* Selects the frequency divided clock (SC_CLK external input) */
+        rcar2_writew(uart, SCIF_CKS, 0);
+        /*
+         * TODO: should be uncommented
+         * udelay(1000000 / uart->baud + 1);
+         */
+    }
+    else
+    {
+        /* Read current Baud rate */
+        divisor = rcar2_readw(uart, SCIF_DL);
+        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
+        uart->baud = uart->clock_hz / (divisor << 4);
+    }
+
+    /* Setup trigger level for TX/RX FIFOs */
+    rcar2_writew(uart, SCIF_SCFCR, SCFCR_RTRG11 | SCFCR_TTRG11);
+
+    /* Enable TX/RX parts */
+    rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
+                 SCSCR_TE | SCSCR_RE);
+}
+
+static void __init rcar2_uart_init_postirq(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+    int rc;
+
+    uart->irqaction.handler = rcar2_uart_interrupt;
+    uart->irqaction.name    = "rcar2_uart";
+    uart->irqaction.dev_id  = port;
+
+    if ( (rc = setup_irq(uart->irq, 0, &uart->irqaction)) != 0 )
+        dprintk(XENLOG_ERR, "Failed to allocated rcar2_uart IRQ %d\n",
+                uart->irq);
+
+    /* Clear all errors */
+    if ( rcar2_readw(uart, SCIF_SCFSR) & SCIF_ERRORS )
+        rcar2_writew(uart, SCIF_SCFSR, ~SCIF_ERRORS);
+    if ( rcar2_readw(uart, SCIF_SCLSR) & SCLSR_ORER )
+        rcar2_writew(uart, SCIF_SCLSR, 0);
+
+    /* Enable TX/RX and Error Interrupts  */
+    rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
+                 SCSCR_TIE | SCSCR_RIE | SCSCR_REIE);
+
+    uart->irq_en = 1;
+}
+
+static void rcar2_uart_suspend(struct serial_port *port)
+{
+    BUG();
+}
+
+static void rcar2_uart_resume(struct serial_port *port)
+{
+    BUG();
+}
+
+static int rcar2_uart_tx_ready(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+    uint16_t cnt;
+
+    /* Check for empty space in TX FIFO */
+    if ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TDFE) )
+        return 0;
+
+    /*
+     * It seems that the Framework has a data bytes to send.
+     * Enable TX Interrupt disabled from interrupt handler before
+     */
+    if ( uart->irq_en )
+        rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
+                     SCSCR_TIE);
+
+     /* Check number of data bytes stored in TX FIFO */
+    cnt = rcar2_readw(uart, SCIF_SCFDR) >> 8;
+    ASSERT( cnt >= 0 && cnt <= SCIF_FIFO_MAX_SIZE );
+
+    return (SCIF_FIFO_MAX_SIZE - cnt);
+}
+
+static void rcar2_uart_putc(struct serial_port *port, char c)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    rcar2_writeb(uart, SCIF_SCFTDR, c);
+    /* Clear required TX flags */
+    rcar2_writew(uart, SCIF_SCFSR, rcar2_readw(uart, SCIF_SCFSR) &
+                 ~(SCFSR_TEND | SCFSR_TDFE));
+}
+
+static int rcar2_uart_getc(struct serial_port *port, char *pc)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    /* Check for available data bytes in RX FIFO */
+    if ( !(rcar2_readw(uart, SCIF_SCFSR) & (SCFSR_RDF | SCFSR_DR)) )
+        return 0;
+
+    *pc = rcar2_readb(uart, SCIF_SCFRDR);
+
+    /* dummy read */
+    rcar2_readw(uart, SCIF_SCFSR);
+    /* Clear required RX flags */
+    rcar2_writew(uart, SCIF_SCFSR, ~(SCFSR_RDF | SCFSR_DR));
+
+    return 1;
+}
+
+static int __init rcar2_uart_irq(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    return ((uart->irq > 0) ? uart->irq : -1);
+}
+
+static const struct vuart_info *rcar2_vuart_info(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    return &uart->vuart;
+}
+
+static struct uart_driver __read_mostly rcar2_uart_driver = {
+    .init_preirq  = rcar2_uart_init_preirq,
+    .init_postirq = rcar2_uart_init_postirq,
+    .endboot      = NULL,
+    .suspend      = rcar2_uart_suspend,
+    .resume       = rcar2_uart_resume,
+    .tx_ready     = rcar2_uart_tx_ready,
+    .putc         = rcar2_uart_putc,
+    .getc         = rcar2_uart_getc,
+    .irq          = rcar2_uart_irq,
+    .vuart_info   = rcar2_vuart_info,
+};
+
+static int __init rcar2_uart_init(struct dt_device_node *dev,
+                                 const void *data)
+{
+    const char *config = data;
+    struct rcar2_uart *uart;
+    int res;
+    u64 addr, size;
+
+    if ( strcmp(config, "") )
+        printk("WARNING: UART configuration is not supported\n");
+
+    uart = &rcar2_com;
+
+    uart->clock_hz  = SCIF_CLK_FREQ;
+    uart->baud      = BAUD_AUTO;
+    uart->data_bits = 8;
+    uart->parity    = PARITY_NONE;
+    uart->stop_bits = 1;
+
+    res = dt_device_get_address(dev, 0, &addr, &size);
+    if ( res )
+    {
+        printk("rcar2-uart: Unable to retrieve the base"
+                     " address of the UART\n");
+        return res;
+    }
+
+    uart->regs = ioremap_attr(addr, size, PAGE_HYPERVISOR_NOCACHE);
+    if ( !uart->regs )
+    {
+        printk("rcar2-uart: Unable to map the UART memory\n");
+        return -ENOMEM;
+    }
+
+    res = platform_get_irq(dev, 0);
+    if ( res < 0 )
+    {
+        printk("rcar2-uart: Unable to retrieve the IRQ\n");
+        return res;
+    }
+    uart->irq = res;
+
+    uart->vuart.base_addr  = addr;
+    uart->vuart.size       = size;
+    uart->vuart.data_off   = SCIF_SCFTDR;
+    uart->vuart.status_off = SCIF_SCFSR;
+    uart->vuart.status     = SCFSR_TDFE;
+
+    /* Register with generic serial driver */
+    serial_register_uart(SERHND_DTUART, &rcar2_uart_driver, uart);
+
+    dt_device_set_used_by(dev, DOMID_XEN);
+
+    return 0;
+}
+
+static const char * const rcar2_uart_dt_compat[] __initconst =
+{
+    "renesas,scif",
+    NULL
+};
+
+DT_DEVICE_START(rcar2_uart, "R-Car Gen2 UART", DEVICE_SERIAL)
+    .compatible = rcar2_uart_dt_compat,
+    .init = rcar2_uart_init,
+DT_DEVICE_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
1.9.1

[PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Iurii Konovalenko]

From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>

Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
---
 xen/arch/arm/platforms/Makefile          |   1 +
 xen/arch/arm/platforms/shmobile.c        | 149 +++++++++++++++++++++++++++++++
 xen/include/asm-arm/platforms/shmobile.h |  24 +++++
 3 files changed, 174 insertions(+)
 create mode 100644 xen/arch/arm/platforms/shmobile.c
 create mode 100644 xen/include/asm-arm/platforms/shmobile.h

diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile
index 8f47c16..29e931a 100644
--- a/xen/arch/arm/platforms/Makefile
+++ b/xen/arch/arm/platforms/Makefile
@@ -4,5 +4,6 @@ obj-$(CONFIG_ARM_32) += exynos5.o
 obj-$(CONFIG_ARM_32) += midway.o
 obj-$(CONFIG_ARM_32) += omap5.o
 obj-$(CONFIG_ARM_32) += sunxi.o
+obj-$(CONFIG_ARM_32) += shmobile.o
 obj-$(CONFIG_ARM_64) += seattle.o
 obj-$(CONFIG_ARM_64) += xgene-storm.o
diff --git a/xen/arch/arm/platforms/shmobile.c b/xen/arch/arm/platforms/shmobile.c
new file mode 100644
index 0000000..4c78ed6
--- /dev/null
+++ b/xen/arch/arm/platforms/shmobile.c
@@ -0,0 +1,149 @@
+/*
+ * xen/arch/arm/platforms/shmobile.c
+ *
+ * Renesas R-Car Gen2 specific settings
+ *
+ * Iurii Konovalenko <iurii.konovalenko@globallogic.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/p2m.h>
+#include <xen/config.h>
+#include <xen/device_tree.h>
+#include <xen/domain_page.h>
+#include <xen/mm.h>
+#include <xen/vmap.h>
+#include <asm/platforms/shmobile.h>
+#include <asm/platform.h>
+#include <asm/io.h>
+
+u32 shmobile_read_mode_pins(void)
+{
+    static uint32_t mode;
+
+    void __iomem *modemr = ioremap_nocache(SHMOBILE_MODEMR, 4);
+    if( !modemr )
+    {
+        dprintk( XENLOG_ERR, "Unable to map shmobile Mode MR\n");
+        return 0;
+    }
+
+    mode = readl_relaxed(modemr);
+    iounmap(modemr);
+
+    return mode;
+}
+
+static int shmobile_init_time(void)
+{
+    uint32_t freq;
+    void __iomem *tmu;
+    int extal_mhz = 0;
+    uint32_t mode = shmobile_read_mode_pins();
+
+    /* At Linux boot time the Renesas R-Car Gen2 arch timer comes
+     * up with the counter disabled. Moreover, it may also report
+     * a potentially incorrect fixed 13 MHz frequency. To be
+     * correct these registers need to be updated to use the
+     * frequency EXTAL / 2 which can be determined by the MD pins.
+     */
+
+    switch ( mode & (MD(14) | MD(13)) ) {
+    case 0:
+        extal_mhz = 15;
+        break;
+    case MD(13):
+        extal_mhz = 20;
+        break;
+    case MD(14):
+        extal_mhz = 26;
+        break;
+    case MD(13) | MD(14):
+        extal_mhz = 30;
+        break;
+    }
+
+    /* The arch timer frequency equals EXTAL / 2 */
+    freq = extal_mhz * (1000000 / 2);
+
+    /* Remap "armgcnt address map" space */
+    tmu = ioremap_attr(SHMOBILE_ARCH_TIMER_BASE, PAGE_SIZE, 
+            PAGE_HYPERVISOR_NOCACHE);
+    if ( !tmu )
+    {
+        dprintk(XENLOG_ERR, "Unable to map TMU\n");
+        return -ENOMEM;
+    }
+    /*
+     * Update the timer if it is either not running, or is not at the
+     * right frequency. The timer is only configurable in secure mode
+     * so this avoids an abort if the loader started the timer and
+     * entered the kernel in non-secure mode.
+     */
+
+    if ( (readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTCR) & 1) == 0 ||
+            readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTFID0) != freq ) {
+        /* Update registers with correct frequency */
+        writel_relaxed(freq, tmu + SHMOBILE_ARCH_TIMER_CNTFID0);
+
+        /* make sure arch timer is started by setting bit 0 of CNTCR */
+        writel_relaxed(1, tmu + SHMOBILE_ARCH_TIMER_CNTCR);
+    }
+
+    iounmap(tmu);
+
+    return 0;
+}
+
+static int __init shmobile_smp_init(void)
+{
+    void __iomem *p;
+    /* setup reset vectors */
+    p = ioremap_nocache(SHMOBILE_RAM, 0x1000);
+    if( !p )
+    {
+        dprintk( XENLOG_ERR, "Unable to map shmobile ICRAM\n");
+        return -ENOMEM;
+    }
+
+    writel_relaxed(__pa(init_secondary), p + SHMOBILE_SMP_START_OFFSET);
+    iounmap(p);
+
+    asm("sev;");
+
+    return 0;
+}
+
+static const char const *shmobile_dt_compat[] __initdata =
+{
+    "renesas,lager",
+    NULL
+};
+
+PLATFORM_START(shmobile, "Renesas R-Car Gen2")
+    .compatible = shmobile_dt_compat,
+    .init_time = shmobile_init_time,
+    .cpu_up = cpu_up_send_sgi,
+    .smp_init = shmobile_smp_init,
+
+    .dom0_gnttab_start = 0xc0000000,
+    .dom0_gnttab_size = 0x20000,
+PLATFORM_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/platforms/shmobile.h b/xen/include/asm-arm/platforms/shmobile.h
new file mode 100644
index 0000000..fd506d7
--- /dev/null
+++ b/xen/include/asm-arm/platforms/shmobile.h
@@ -0,0 +1,24 @@
+#ifndef __ASM_ARM_PLATFORMS_SHMOBILE_H
+#define __ASM_ARM_PLATFORMS_SHMOBILE_H
+
+#define SHMOBILE_ARCH_TIMER_BASE                  0xE6080000
+#define SHMOBILE_ARCH_TIMER_CNTCR                 0x0
+#define SHMOBILE_ARCH_TIMER_CNTFID0               0x20
+
+#define SHMOBILE_MODEMR                           0xE6160060
+#define SHMOBILE_RAM                              0xE63C0000
+#define SHMOBILE_SMP_START_OFFSET                 0xFFC
+
+#define MD(nr)                                    BIT(nr)
+
+#endif /* __ASM_ARM_PLATFORMS_SHMOBILE_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
+
-- 
1.9.1

Re: [PATCH v1 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Julien Grall]

Hello Iurii,

Thanks for adding the support of a new board in Xen.

On 16/01/15 12:50, Iurii Konovalenko wrote:
> diff --git a/xen/include/asm-arm/rcar2-uart.h b/xen/include/asm-arm/rcar2-uart.h
> new file mode 100644
> index 0000000..10a56fb
> --- /dev/null
> +++ b/xen/include/asm-arm/rcar2-uart.h

[..]

> +#ifndef __ASM_ARM_RCAR2_H
> +#define __ASM_ARM_RCAR2_H

According to the name of the guard should be called __ASM_ARM_RCAR2_UART_H

[..]

> +#endif /* __ASM_ARM_RCAR2_H */

Ditto.

Regards,

-- 
Julien Grall

Re: [PATCH v1 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Ian Campbell]

On Fri, 2015-01-16 at 13:05 +0000, Julien Grall wrote:
> Hello Iurii,
> 
> Thanks for adding the support of a new board in Xen.
> 
> On 16/01/15 12:50, Iurii Konovalenko wrote:
> > diff --git a/xen/include/asm-arm/rcar2-uart.h b/xen/include/asm-arm/rcar2-uart.h
> > new file mode 100644
> > index 0000000..10a56fb
> > --- /dev/null
> > +++ b/xen/include/asm-arm/rcar2-uart.h
> 
> [..]
> 
> > +#ifndef __ASM_ARM_RCAR2_H
> > +#define __ASM_ARM_RCAR2_H
> 
> According to the name of the guard should be called __ASM_ARM_RCAR2_UART_H

Is RCAR2 the name of the board, the soc or the name of uart IP block?

I'd prefer the naming (here and for the main driver) to be as far to the
right of that list as possible.

Ian.

Re: [PATCH v1 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Julien Grall]

On 16/01/15 13:08, Ian Campbell wrote:
> I'd prefer the naming (here and for the main driver) to be as far to the
> right of that list as possible.

All the UART headers in xen/ and asm-arm/ are called myuart-uart.h.

I think it's better if we keep the same convention everywhere.

Regards,

-- 
Julien Grall

Re: [PATCH v1 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Ian Campbell]

On Fri, 2015-01-16 at 13:11 +0000, Julien Grall wrote:
> On 16/01/15 13:08, Ian Campbell wrote:
> > I'd prefer the naming (here and for the main driver) to be as far to the
> > right of that list as possible.
> 
> All the UART headers in xen/ and asm-arm/ are called myuart-uart.h.
> 
> I think it's better if we keep the same convention everywhere.

I'm trying to confirm that RCAR2 is actually the appropriate value for
myuart.

Ian.

Re: [PATCH v1 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Julien Grall]

Hi Iurii,

On 16/01/15 12:50, Iurii Konovalenko wrote:
> +static int __init rcar2_uart_init(struct dt_device_node *dev,
> +                                 const void *data)
> +{
> +    const char *config = data;
> +    struct rcar2_uart *uart;
> +    int res;
> +    u64 addr, size;
> +
> +    if ( strcmp(config, "") )
> +        printk("WARNING: UART configuration is not supported\n");
> +
> +    uart = &rcar2_com;
> +
> +    uart->clock_hz  = SCIF_CLK_FREQ;
> +    uart->baud      = BAUD_AUTO;
> +    uart->data_bits = 8;
> +    uart->parity    = PARITY_NONE;
> +    uart->stop_bits = 1;
> +
> +    res = dt_device_get_address(dev, 0, &addr, &size);
> +    if ( res )
> +    {
> +        printk("rcar2-uart: Unable to retrieve the base"
> +                     " address of the UART\n");
> +        return res;
> +    }
> +
> +    uart->regs = ioremap_attr(addr, size, PAGE_HYPERVISOR_NOCACHE);

Please use ioremap_nocache

-- 
Julien Grall

Re: [PATCH v1 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Oleksandr Tyshchenko]

[-- Attachment #1.1: Type: text/plain, Size: 1224 bytes --]

Hi all.

Let me explain.

The Renesas R-Car Gen2 is a family of SoCs (R-Car H2, M2, etc.).
The "Lager" is a name of development board based on R-Car H2 SoC.
The UART IP block named SCIF (Serial Communication Interface with FIFO)
is common for all SoCs in R-Car Gen2 family.


On Fri, Jan 16, 2015 at 3:08 PM, Ian Campbell <Ian.Campbell@citrix.com>
wrote:

> On Fri, 2015-01-16 at 13:05 +0000, Julien Grall wrote:
> > Hello Iurii,
> >
> > Thanks for adding the support of a new board in Xen.
> >
> > On 16/01/15 12:50, Iurii Konovalenko wrote:
> > > diff --git a/xen/include/asm-arm/rcar2-uart.h
> b/xen/include/asm-arm/rcar2-uart.h
> > > new file mode 100644
> > > index 0000000..10a56fb
> > > --- /dev/null
> > > +++ b/xen/include/asm-arm/rcar2-uart.h
> >
> > [..]
> >
> > > +#ifndef __ASM_ARM_RCAR2_H
> > > +#define __ASM_ARM_RCAR2_H
> >
> > According to the name of the guard should be called
> __ASM_ARM_RCAR2_UART_H
>
> Is RCAR2 the name of the board, the soc or the name of uart IP block?
>
> I'd prefer the naming (here and for the main driver) to be as far to the
> right of that list as possible.
>
> Ian.
>
>


-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com
<http://www.globallogic.com/>

[-- Attachment #1.2: Type: text/html, Size: 3429 bytes --]

[-- Attachment #2: Type: text/plain, Size: 126 bytes --]

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel

Re: [PATCH v1 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Ian Campbell]

On Fri, 2015-01-16 at 15:26 +0200, Oleksandr Tyshchenko wrote:
> Hi all. 
> 
> Let me explain.
> 
> 
> The Renesas R-Car Gen2 is a family of SoCs (R-Car H2, M2, etc.).
> The "Lager" is a name of development board based on R-Car H2 SoC.
> The UART IP block named SCIF (Serial Communication Interface with FIFO)
> is common for all SoCs in R-Car Gen2 family.

Sounds like RCAR2 is indeed the right name to use then, thanks.

Ian.

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Julien Grall]

Hi Iurii,

On 16/01/15 12:50, Iurii Konovalenko wrote:
> From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
> 
> Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
> ---
>  xen/arch/arm/platforms/Makefile          |   1 +
>  xen/arch/arm/platforms/shmobile.c        | 149 +++++++++++++++++++++++++++++++
>  xen/include/asm-arm/platforms/shmobile.h |  24 +++++

We are trying to avoid introduce new platform header. If you don't need
it in other files, please move the defines in the platform code.

[..]

> +#include <asm/p2m.h>
> +#include <xen/config.h>
> +#include <xen/device_tree.h>
> +#include <xen/domain_page.h>
> +#include <xen/mm.h>
> +#include <xen/vmap.h>
> +#include <asm/platforms/shmobile.h>
> +#include <asm/platform.h>
> +#include <asm/io.h>

The convention is to first include <xen/*.h> then <asm/*.h>.

Futhermore, I think most of the includes are not necessary here.

The following includes should be enough:

#include <xen/mm.h>
#include <xen/vmap.h>
#include <asm/platform.h>
#include <asm/io.h>


> +
> +u32 shmobile_read_mode_pins(void)

static

> +{
> +    static uint32_t mode;

Why the static here?

> +
> +    void __iomem *modemr = ioremap_nocache(SHMOBILE_MODEMR, 4);

Missing a blank here between the variable declaration and the code.

> +    if( !modemr )
> +    {
> +        dprintk( XENLOG_ERR, "Unable to map shmobile Mode MR\n");
> +        return 0;
> +    }
> +
> +    mode = readl_relaxed(modemr);
> +    iounmap(modemr);
> +
> +    return mode;
> +}
> +
> +static int shmobile_init_time(void)

I know the other platform code doesn't do it. But this function is only
call during Xen boot. So it should be __init.

> +{
> +    uint32_t freq;
> +    void __iomem *tmu;
> +    int extal_mhz = 0;
> +    uint32_t mode = shmobile_read_mode_pins();
> +
> +    /* At Linux boot time the Renesas R-Car Gen2 arch timer comes

The coding style for multiline comment block is:

/*
 * My comment
 * line 2
 */

> +     * up with the counter disabled. Moreover, it may also report
> +     * a potentially incorrect fixed 13 MHz frequency. To be
> +     * correct these registers need to be updated to use the
> +     * frequency EXTAL / 2 which can be determined by the MD pins.
> +     */
> +
> +    switch ( mode & (MD(14) | MD(13)) ) {

The coding style require the bracket to be on a separate line.


switch
{

> +    case 0:
> +        extal_mhz = 15;
> +        break;
> +    case MD(13):
> +        extal_mhz = 20;
> +        break;
> +    case MD(14):
> +        extal_mhz = 26;
> +        break;
> +    case MD(13) | MD(14):
> +        extal_mhz = 30;
> +        break;
> +    }
> +
> +    /* The arch timer frequency equals EXTAL / 2 */
> +    freq = extal_mhz * (1000000 / 2);
> +
> +    /* Remap "armgcnt address map" space */
> +    tmu = ioremap_attr(SHMOBILE_ARCH_TIMER_BASE, PAGE_SIZE, 
> +            PAGE_HYPERVISOR_NOCACHE);

ioremap_nocache

> +    if ( !tmu )
> +    {
> +        dprintk(XENLOG_ERR, "Unable to map TMU\n");
> +        return -ENOMEM;
> +    }
> +    /*
> +     * Update the timer if it is either not running, or is not at the
> +     * right frequency. The timer is only configurable in secure mode
> +     * so this avoids an abort if the loader started the timer and
> +     * entered the kernel in non-secure mode.
> +     */
> +
> +    if ( (readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTCR) & 1) == 0 ||
> +            readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTFID0) != freq ) {

if
{

> +        /* Update registers with correct frequency */
> +        writel_relaxed(freq, tmu + SHMOBILE_ARCH_TIMER_CNTFID0);
> +
> +        /* make sure arch timer is started by setting bit 0 of CNTCR */
> +        writel_relaxed(1, tmu + SHMOBILE_ARCH_TIMER_CNTCR);
> +    }

AFAIU, this code is based on the Linux version, right? If so some part
of the code differs from upstream:
	- Linux is using iowrite32 (i.e writel on Xen)
        - Linux is update CNTFRQ

Is there any reason that this code diverge?

> +
> +    iounmap(tmu);
> +
> +    return 0;
> +}
> +
> +static int __init shmobile_smp_init(void)
> +{
> +    void __iomem *p;

Missing blank line here.

> +    /* setup reset vectors */
> +    p = ioremap_nocache(SHMOBILE_RAM, 0x1000);
> +    if( !p )
> +    {
> +        dprintk( XENLOG_ERR, "Unable to map shmobile ICRAM\n");
> +        return -ENOMEM;
> +    }
> +
> +    writel_relaxed(__pa(init_secondary), p + SHMOBILE_SMP_START_OFFSET);
> +    iounmap(p);
> +
> +    asm("sev;");

This sev can be reordered by the compiler. We have a macro sev() which
should avoid this issue.

Regards,

-- 
Julien Grall

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Iurii Konovalenko]

[-- Attachment #1.1: Type: text/plain, Size: 5725 bytes --]

Hi, Julien.

On Fri, Jan 16, 2015 at 4:08 PM, Julien Grall <julien.grall@linaro.org>
wrote:
> Hi Iurii,
>
> On 16/01/15 12:50, Iurii Konovalenko wrote:
>> From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
>>
>> Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
>> ---
>>  xen/arch/arm/platforms/Makefile          |   1 +
>>  xen/arch/arm/platforms/shmobile.c        | 149
+++++++++++++++++++++++++++++++
>>  xen/include/asm-arm/platforms/shmobile.h |  24 +++++
>
> We are trying to avoid introduce new platform header. If you don't need
> it in other files, please move the defines in the platform code.

No problem, will move all defines to shmobile.c.

>
> [..]
>
>> +#include <asm/p2m.h>
>> +#include <xen/config.h>
>> +#include <xen/device_tree.h>
>> +#include <xen/domain_page.h>
>> +#include <xen/mm.h>
>> +#include <xen/vmap.h>
>> +#include <asm/platforms/shmobile.h>
>> +#include <asm/platform.h>
>> +#include <asm/io.h>
>
> The convention is to first include <xen/*.h> then <asm/*.h>.
>
> Futhermore, I think most of the includes are not necessary here.
>
> The following includes should be enough:
>
> #include <xen/mm.h>
> #include <xen/vmap.h>
> #include <asm/platform.h>
> #include <asm/io.h>
>

Yes, sure. Will fix it.

>
>> +
>> +u32 shmobile_read_mode_pins(void)
>
> static

OK, will add it.

>
>> +{
>> +    static uint32_t mode;
>
> Why the static here?

Sorry, migrated here as static from Linux kernel. Will fix it.

>
>> +
>> +    void __iomem *modemr = ioremap_nocache(SHMOBILE_MODEMR, 4);
>
> Missing a blank here between the variable declaration and the code.

OK

>
>> +    if( !modemr )
>> +    {
>> +        dprintk( XENLOG_ERR, "Unable to map shmobile Mode MR\n");
>> +        return 0;
>> +    }
>> +
>> +    mode = readl_relaxed(modemr);
>> +    iounmap(modemr);
>> +
>> +    return mode;
>> +}
>> +
>> +static int shmobile_init_time(void)
>
> I know the other platform code doesn't do it. But this function is only
> call during Xen boot. So it should be __init.

I used xen/arch/arm/platforms/omap5.c file as a reference. In that file
this function has no such attribute.
But I agree with you and will add this attribute.

>
>> +{
>> +    uint32_t freq;
>> +    void __iomem *tmu;
>> +    int extal_mhz = 0;
>> +    uint32_t mode = shmobile_read_mode_pins();
>> +
>> +    /* At Linux boot time the Renesas R-Car Gen2 arch timer comes
>
> The coding style for multiline comment block is:
>
> /*
>  * My comment
>  * line 2
>  */
>

OK, will fix it.

>> +     * up with the counter disabled. Moreover, it may also report
>> +     * a potentially incorrect fixed 13 MHz frequency. To be
>> +     * correct these registers need to be updated to use the
>> +     * frequency EXTAL / 2 which can be determined by the MD pins.
>> +     */
>> +
>> +    switch ( mode & (MD(14) | MD(13)) ) {
>
> The coding style require the bracket to be on a separate line.
>
>
> switch
> {
>

OK, will fix it.

>> +    case 0:
>> +        extal_mhz = 15;
>> +        break;
>> +    case MD(13):
>> +        extal_mhz = 20;
>> +        break;
>> +    case MD(14):
>> +        extal_mhz = 26;
>> +        break;
>> +    case MD(13) | MD(14):
>> +        extal_mhz = 30;
>> +        break;
>> +    }
>> +
>> +    /* The arch timer frequency equals EXTAL / 2 */
>> +    freq = extal_mhz * (1000000 / 2);
>> +
>> +    /* Remap "armgcnt address map" space */
>> +    tmu = ioremap_attr(SHMOBILE_ARCH_TIMER_BASE, PAGE_SIZE,
>> +            PAGE_HYPERVISOR_NOCACHE);
>
> ioremap_nocache
>

OK, will use this API.

>> +    if ( !tmu )
>> +    {
>> +        dprintk(XENLOG_ERR, "Unable to map TMU\n");
>> +        return -ENOMEM;
>> +    }
>> +    /*
>> +     * Update the timer if it is either not running, or is not at the
>> +     * right frequency. The timer is only configurable in secure mode
>> +     * so this avoids an abort if the loader started the timer and
>> +     * entered the kernel in non-secure mode.
>> +     */
>> +
>> +    if ( (readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTCR) & 1) == 0 ||
>> +            readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTFID0) != freq ) {
>
> if
> {
>

OK, will fix it.

>> +        /* Update registers with correct frequency */
>> +        writel_relaxed(freq, tmu + SHMOBILE_ARCH_TIMER_CNTFID0);
>> +
>> +        /* make sure arch timer is started by setting bit 0 of CNTCR */
>> +        writel_relaxed(1, tmu + SHMOBILE_ARCH_TIMER_CNTCR);
>> +    }
>
> AFAIU, this code is based on the Linux version, right? If so some part
> of the code differs from upstream:
>         - Linux is using iowrite32 (i.e writel on Xen)

Agree, I will use writel/readl API

>         - Linux is update CNTFRQ
>
> Is there any reason that this code diverge?
>

Linux kernel 3.14-ltsi, which I used as a reference, use CNTFID0
in file arch/arm/mach-shmobile/setup-rcar-gen2.c:
iowrite32(freq, base + CNTFID0);

>> +
>> +    iounmap(tmu);
>> +
>> +    return 0;
>> +}
>> +
>> +static int __init shmobile_smp_init(void)
>> +{
>> +    void __iomem *p;
>
> Missing blank line here.
>

OK, will fix it.

>> +    /* setup reset vectors */
>> +    p = ioremap_nocache(SHMOBILE_RAM, 0x1000);
>> +    if( !p )
>> +    {
>> +        dprintk( XENLOG_ERR, "Unable to map shmobile ICRAM\n");
>> +        return -ENOMEM;
>> +    }
>> +
>> +    writel_relaxed(__pa(init_secondary), p + SHMOBILE_SMP_START_OFFSET);
>> +    iounmap(p);
>> +
>> +    asm("sev;");
>
> This sev can be reordered by the compiler. We have a macro sev() which
> should avoid this issue.
>

OK, will use this API.

> Regards,
>
> --
> Julien Grall

Thanks a lot for valuable advices.

Best regards.

Iurii Konovalenko | Senior Software Engineer
GlobalLogic
P +3.8044.492.9695 M +38.099.932.2909
S yufuntik

[-- Attachment #1.2: Type: text/html, Size: 8532 bytes --]

[-- Attachment #2: Type: text/plain, Size: 126 bytes --]

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Julien Grall]

On 16/01/15 15:29, Iurii Konovalenko wrote:
>> Is there any reason that this code diverge?
>>
> 
> Linux kernel 3.14-ltsi, which I used as a reference, use CNTFID0
> in file arch/arm/mach-shmobile/setup-rcar-gen2.c:
> iowrite32(freq, base + CNTFID0);

Which seems different from upstream:

1. /* Update registers with correct frequency */
2. iowrite32(freq, base + CNTFID0);
3. asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
4.
5. /* make sure arch timer is started by setting bit 0 of CNTCR */
6. iowrite32(1, base + CNTCR);

Regards,

-- 
Julien Grall

Re: [PATCH v1 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

[-- Attachment #1.1: Type: text/plain, Size: 1222 bytes --]

On Fri, Jan 16, 2015 at 3:19 PM, Julien Grall <julien.grall@linaro.org>
wrote:

> Hi Iurii,
>
Hi Julien

>
> On 16/01/15 12:50, Iurii Konovalenko wrote:
> > +static int __init rcar2_uart_init(struct dt_device_node *dev,
> > +                                 const void *data)
> > +{
> > +    const char *config = data;
> > +    struct rcar2_uart *uart;
> > +    int res;
> > +    u64 addr, size;
> > +
> > +    if ( strcmp(config, "") )
> > +        printk("WARNING: UART configuration is not supported\n");
> > +
> > +    uart = &rcar2_com;
> > +
> > +    uart->clock_hz  = SCIF_CLK_FREQ;
> > +    uart->baud      = BAUD_AUTO;
> > +    uart->data_bits = 8;
> > +    uart->parity    = PARITY_NONE;
> > +    uart->stop_bits = 1;
> > +
> > +    res = dt_device_get_address(dev, 0, &addr, &size);
> > +    if ( res )
> > +    {
> > +        printk("rcar2-uart: Unable to retrieve the base"
> > +                     " address of the UART\n");
> > +        return res;
> > +    }
> > +
> > +    uart->regs = ioremap_attr(addr, size, PAGE_HYPERVISOR_NOCACHE);
>
> Please use ioremap_nocache
>
ok

>
> --
> Julien Grall
>



-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com
<http://www.globallogic.com/>

[-- Attachment #1.2: Type: text/html, Size: 3799 bytes --]

[-- Attachment #2: Type: text/plain, Size: 126 bytes --]

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Iurii Konovalenko]

[-- Attachment #1.1: Type: text/plain, Size: 1209 bytes --]

I tried to add instruction: asm volatile("mcr p15, 0, %0, c14, c0, 0" : :
"r" (freq));
Also I tried to write it via Xen API: WRITE_SYSREG32(freq, CNTFRQ_EL0);

But unfortunately Xen fails on both this instructions with "Undefined
instruction" exception.
You can see log in attachment.
Could you please suggest reason, why it happens?

Best regards.

Iurii Konovalenko | Senior Software Engineer
GlobalLogic
P +3.8044.492.9695 M +38.099.932.2909
S yufuntik
www.globallogic.com
http://www.globallogic.com/email_disclaimer.txt

On Fri, Jan 16, 2015 at 5:32 PM, Julien Grall <julien.grall@linaro.org>
wrote:

> On 16/01/15 15:29, Iurii Konovalenko wrote:
> >> Is there any reason that this code diverge?
> >>
> >
> > Linux kernel 3.14-ltsi, which I used as a reference, use CNTFID0
> > in file arch/arm/mach-shmobile/setup-rcar-gen2.c:
> > iowrite32(freq, base + CNTFID0);
>
> Which seems different from upstream:
>
> 1. /* Update registers with correct frequency */
> 2. iowrite32(freq, base + CNTFID0);
> 3. asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
> 4.
> 5. /* make sure arch timer is started by setting bit 0 of CNTCR */
> 6. iowrite32(1, base + CNTCR);
>
> Regards,
>
> --
> Julien Grall
>

[-- Attachment #1.2: Type: text/html, Size: 3879 bytes --]

[-- Attachment #2: renesas.log --]
[-- Type: text/x-log, Size: 4250 bytes --]

- UART enabled -
- CPU 00000000 booting -
- Xen starting in Hyp mode -
- Zero BSS -
- Setting up control registers -
- Turning on paging -
- Ready -
(XEN) Checking for initrd in /chosen
(XEN) RAM: 0000000040000000 - 000000007fffffff
(XEN) RAM: 0000000140000000 - 00000001ffffffff
(XEN) 
(XEN) MODULE[0]: 0000000070ef9000 - 0000000070efd000 Device Tree  
(XEN) MODULE[1]: 0000000072000000 - 0000000074000000 Kernel       
(XEN) MODULE[2]: 0000000074000000 - 0000000074010000 XSM          
(XEN)  RESVD[0]: 000000007ff9a000 - 000000007ff9a120
(XEN)  RESVD[1]: 0000000070ef9000 - 0000000070efd000
(XEN) 
(XEN) Command line: dom0_mem=1024M console=dtuart dtuart=serial6 dom0_max_vcpus=4 bootscrub=0 flask_enforcing=1
(XEN) Placing Xen at 0x000000007fc00000-0x000000007fe00000
(XEN) Update BOOTMOD_XEN from 0000000090000000-00000000900f9701 => 000000007fc00000-000000007fcf9701
(XEN) Xen heap: 00000001e0000000-0000000200000000 (131072 pages)
(XEN) Dom heap: 917504 pages
(XEN) Domain heap initialised
(XEN) Looking for UART console serial6
 Xen 4.5.0
(XEN) Xen version 4.5.0 (ikonovalenko@) (arm-linux-gnueabihf-gcc (crosstool-NG linaro-1.13.1-4.7-2013.04-20130415 - Linaro GCC 2013.04) 4.7.3 20130328 (prerelease)) debug=y Fri Jan 16 18:01:31 EET 2015
(XEN) Latest ChangeSet: Thu Nov 6 11:59:59 2014 +0200 git:67995e1-dirty
(XEN) Processor: 413fc0f2: "ARM Limited", variant: 0x3, part 0xc0f, rev 0x2
(XEN) 32-bit Execution:
(XEN)   Processor Features: 00001131:00011011
(XEN)     Instruction Sets: AArch32 A32 Thumb Thumb-2 ThumbEE Jazelle
(XEN)     Extensions: GenericTimer Security
(XEN)   Debug Features: 02010555
(XEN)   Auxiliary Features: 00000000
(XEN)   Memory Model Features: 10201105 40000000 01240000 02102211
(XEN)  ISA Features: 02101110 13112111 21232041 11112131 10011142 00000000
(XEN) Platform: Renesas R-Car Gen2
(XEN) /psci method must be smc, but is: "hvc"
(XEN) Generic Timer IRQ: phys=30 hyp=26 virt=27
(XEN) CPU0: Unexpected Trap: Undefined Instruction
(XEN) ----[ Xen-4.5.0  arm32  debug=y  Not tainted ]----
(XEN) CPU:    0
(XEN) PC:     002560a0 shmobile_init_time+0xb8/0xd8
(XEN) CPSR:   600001da MODE:Hypervisor
(XEN)      R0: 10009000 R1: 00400000 R2: e6080e71 R3: 00000000
(XEN)      R4: 00989680 R5: 002f6234 R6: 40008c28 R7: 00000002
(XEN)      R8: 00000004 R9: 00000001 R10:00000000 R11:002afe8c R12:40001048
(XEN) HYP: SP: 002afe7c LR: 0024a58c
(XEN) 
(XEN)   VTCR_EL2: 80000000
(XEN)  VTTBR_EL2: 0000000000000000
(XEN) 
(XEN)  SCTLR_EL2: 30cd187f
(XEN)    HCR_EL2: 000000000038643f
(XEN)  TTBR0_EL2: 000000007fcf0000
(XEN) 
(XEN)    ESR_EL2: 00000000
(XEN)  HPFAR_EL2: 0000000000000000
(XEN)      HDFAR: 00000000
(XEN)      HIFAR: 00000000
(XEN) 
(XEN) Xen stack trace from sp=002afe7c:
(XEN)    0025605c 00255fe8 00000004 002afe94 0027e4b0 002afeb4 00280588 00272024
(XEN)    00000004 00000002 00272024 00272024 00000004 002aff54 0027f5c4 11112131
(XEN)    10011142 00000000 00000000 00000000 00000000 ffffffff ffffffff 00000001
(XEN)    ffffb000 40000000 00000000 00272010 00000002 00000000 00000002 00298048
(XEN)    00298428 00020000 00274628 00298028 00000000 e0000000 00000001 00000000
(XEN)    00000002 00000000 00000002 00000000 00000002 00000000 00000018 00000000
(XEN)    00000001 00000000 70ef9000 90000000 8fe00000 00400000 00200540 00000000
(XEN)    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN)    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN)    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN)    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN)    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN)    00000000
(XEN) Xen call trace:
(XEN)    [<002560a0>] shmobile_init_time+0xb8/0xd8 (PC)
(XEN)    [<0024a58c>] map_pages_to_xen+0x30/0x38 (LR)
(XEN)    [<0027e4b0>] platform_init_time+0x2c/0x40
(XEN)    [<00280588>] init_xen_time+0x94/0x160
(XEN)    [<0027f5c4>] start_xen+0xa54/0xe30
(XEN)    [<00200540>] paging+0x94/0xd8
(XEN) 
(XEN) 
(XEN) ****************************************
(XEN) Panic on CPU 0:
(XEN) CPU0: Unexpected Trap: Undefined Instruction
(XEN) 
(XEN) ****************************************
(XEN) 
(XEN) Reboot in five seconds...


[-- Attachment #3: Type: text/plain, Size: 126 bytes --]

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Julien Grall]

On 16/01/15 16:17, Iurii Konovalenko wrote:
> I tried to add instruction: asm volatile("mcr p15, 0, %0, c14, c0, 0" :
> : "r" (freq));
> Also I tried to write it via Xen API: WRITE_SYSREG32(freq, CNTFRQ_EL0);
> 
> But unfortunately Xen fails on both this instructions with "Undefined
> instruction" exception.
> You can see log in attachment.
> Could you please suggest reason, why it happens?

CNTFRQ can only be written in Secure PL1 mode.

I have the feeling CNTFRQ is not update automatically when Xen is
writing in CNTFID0. So the frequency may mismatch.

Assuming this, I'm wondering if we hit the second part of the if
sentence [1] and therefore this code useful?

BWT I see in the log:

(XEN) /psci method must be smc, but is: "hvc"

Does it mean your platform support PSCI? Or did you add the PSCI node
for DOM0?

Regards,

[1] readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTFID0) != freq

-- 
Julien Grall

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Iurii Konovalenko]

On Fri, Jan 16, 2015 at 6:31 PM, Julien Grall <julien.grall@linaro.org> wrote:
>
> On 16/01/15 16:17, Iurii Konovalenko wrote:
> > I tried to add instruction: asm volatile("mcr p15, 0, %0, c14, c0, 0" :
> > : "r" (freq));
> > Also I tried to write it via Xen API: WRITE_SYSREG32(freq, CNTFRQ_EL0);
> >
> > But unfortunately Xen fails on both this instructions with "Undefined
> > instruction" exception.
> > You can see log in attachment.
> > Could you please suggest reason, why it happens?
>
> CNTFRQ can only be written in Secure PL1 mode.
>
> I have the feeling CNTFRQ is not update automatically when Xen is
> writing in CNTFID0. So the frequency may mismatch.
>
> Assuming this, I'm wondering if we hit the second part of the if
> sentence [1] and therefore this code useful?
>

Now I understand it.
So I will set up frequency and enable timer in u-boot.
As there is no way to change frequency in Hypervisor mode, I will
remove from board file mode checking and frequency related staff.
So time init function is like:

static int __init shmobile_init_time(void)
{
    void __iomem *tmu;

    /* Remap "armgcnt address map" space */
    tmu = ioremap_nocache(SHMOBILE_ARCH_TIMER_BASE, PAGE_SIZE);
    if ( !tmu )
    {
        dprintk(XENLOG_ERR, "Unable to map TMU\n");
        return -ENOMEM;
    }
    /* Enable the timer if it is not running */
    if ( (readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTCR) & 1) == 0 )
        writel_relaxed(1, tmu + SHMOBILE_ARCH_TIMER_CNTCR);

    iounmap(tmu);

    return 0;
}

Am I right?

> BWT I see in the log:
>
> (XEN) /psci method must be smc, but is: "hvc"
>
> Does it mean your platform support PSCI? Or did you add the PSCI node
> for DOM0?

I added PSCI node to dom0 Device Tree:
    psci {
        compatible = "arm,psci";
        method = "hvc";
        cpu_on = <2>;
    };

>
> Regards,
>
> [1] readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTFID0) != freq
>
> --
> Julien Grall

Best regards.

Iurii Konovalenko | Senior Software Engineer
GlobalLogic
P +3.8044.492.9695 M +38.099.932.2909
S yufuntik
www.globallogic.com
http://www.globallogic.com/email_disclaimer.txt

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Julien Grall]

On 16/01/15 19:11, Iurii Konovalenko wrote:
> On Fri, Jan 16, 2015 at 6:31 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>
>> On 16/01/15 16:17, Iurii Konovalenko wrote:
>>> I tried to add instruction: asm volatile("mcr p15, 0, %0, c14, c0, 0" :
>>> : "r" (freq));
>>> Also I tried to write it via Xen API: WRITE_SYSREG32(freq, CNTFRQ_EL0);
>>>
>>> But unfortunately Xen fails on both this instructions with "Undefined
>>> instruction" exception.
>>> You can see log in attachment.
>>> Could you please suggest reason, why it happens?
>>
>> CNTFRQ can only be written in Secure PL1 mode.
>>
>> I have the feeling CNTFRQ is not update automatically when Xen is
>> writing in CNTFID0. So the frequency may mismatch.
>>
>> Assuming this, I'm wondering if we hit the second part of the if
>> sentence [1] and therefore this code useful?
>>
> 
> Now I understand it.
> So I will set up frequency and enable timer in u-boot.
> As there is no way to change frequency in Hypervisor mode, I will
> remove from board file mode checking and frequency related staff.
> So time init function is like:
> 
> static int __init shmobile_init_time(void)
> {
>     void __iomem *tmu;
> 
>     /* Remap "armgcnt address map" space */
>     tmu = ioremap_nocache(SHMOBILE_ARCH_TIMER_BASE, PAGE_SIZE);
>     if ( !tmu )
>     {
>         dprintk(XENLOG_ERR, "Unable to map TMU\n");
>         return -ENOMEM;
>     }
>     /* Enable the timer if it is not running */
>     if ( (readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTCR) & 1) == 0 )
>         writel_relaxed(1, tmu + SHMOBILE_ARCH_TIMER_CNTCR);
> 
>     iounmap(tmu);
> 
>     return 0;
> }
> 
> Am I right?

While you are modifying U-boot, can you also enable the timer? It would
avoid to do specific timer initialization for this board.

>> BWT I see in the log:
>>
>> (XEN) /psci method must be smc, but is: "hvc"
>>
>> Does it mean your platform support PSCI? Or did you add the PSCI node
>> for DOM0?
> 
> I added PSCI node to dom0 Device Tree:
>     psci {
>         compatible = "arm,psci";
>         method = "hvc";
>         cpu_on = <2>;
>     };

You don't need to add it. Xen will create the PSCI node for DOM0 during
the domain building.

Regards,

-- 
Julien Grall

Re: [PATCH v1 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Julien Grall]

On 16/01/2015 19:34, Julien Grall wrote:
> On 16/01/15 19:11, Iurii Konovalenko wrote:
>> On Fri, Jan 16, 2015 at 6:31 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>>
>>> On 16/01/15 16:17, Iurii Konovalenko wrote:
>>>> I tried to add instruction: asm volatile("mcr p15, 0, %0, c14, c0, 0" :
>>>> : "r" (freq));
>>>> Also I tried to write it via Xen API: WRITE_SYSREG32(freq, CNTFRQ_EL0);
>>>>
>>>> But unfortunately Xen fails on both this instructions with "Undefined
>>>> instruction" exception.
>>>> You can see log in attachment.
>>>> Could you please suggest reason, why it happens?
>>>
>>> CNTFRQ can only be written in Secure PL1 mode.
>>>
>>> I have the feeling CNTFRQ is not update automatically when Xen is
>>> writing in CNTFID0. So the frequency may mismatch.
>>>
>>> Assuming this, I'm wondering if we hit the second part of the if
>>> sentence [1] and therefore this code useful?
>>>
>>
>> Now I understand it.
>> So I will set up frequency and enable timer in u-boot.
>> As there is no way to change frequency in Hypervisor mode, I will
>> remove from board file mode checking and frequency related staff.
>> So time init function is like:
>>
>> static int __init shmobile_init_time(void)
>> {
>>      void __iomem *tmu;
>>
>>      /* Remap "armgcnt address map" space */
>>      tmu = ioremap_nocache(SHMOBILE_ARCH_TIMER_BASE, PAGE_SIZE);
>>      if ( !tmu )
>>      {
>>          dprintk(XENLOG_ERR, "Unable to map TMU\n");
>>          return -ENOMEM;
>>      }
>>      /* Enable the timer if it is not running */
>>      if ( (readl_relaxed(tmu + SHMOBILE_ARCH_TIMER_CNTCR) & 1) == 0 )
>>          writel_relaxed(1, tmu + SHMOBILE_ARCH_TIMER_CNTCR);
>>
>>      iounmap(tmu);
>>
>>      return 0;
>> }
>>
>> Am I right?
>
> While you are modifying U-boot, can you also enable the timer? It would
> avoid to do specific timer initialization for this board.

BTW, can you document somewhere (wiki page, commit message...) which 
U-boot will be required to use Xen on this platform?

In general, it would be nice if those patch reach upstream U-boot.

Regards,

-- 
Julien Grall